2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Module name: iSeries_setup.c
8 * Architecture- / platform-specific boot-time initialization code for
9 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
10 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/bootmem.h>
26 #include <linux/blk.h>
27 #include <linux/seq_file.h>
29 #include <asm/processor.h>
30 #include <asm/machdep.h>
33 #include <asm/pgtable.h>
34 #include <asm/mmu_context.h>
37 #include "iSeries_setup.h"
40 #include <asm/iSeries/LparData.h>
41 #include <asm/iSeries/HvCallHpt.h>
42 #include <asm/iSeries/HvLpConfig.h>
43 #include <asm/iSeries/HvCallEvent.h>
44 #include <asm/iSeries/HvCallSm.h>
45 #include <asm/iSeries/HvCallXm.h>
46 #include <asm/iSeries/ItLpQueue.h>
47 #include <asm/iSeries/IoHriMainStore.h>
48 #include <asm/iSeries/iSeries_proc.h>
49 #include <asm/proc_pmc.h>
50 #include <asm/perfmon.h>
51 #include <asm/iSeries/mf.h>
52 #include <asm/cputable.h>
54 /* Function Prototypes */
56 extern void abort(void);
57 #ifdef CONFIG_PPC_ISERIES
58 static void build_iSeries_Memory_Map( void );
59 static void setup_iSeries_cache_sizes( void );
60 static void iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr);
62 extern void ppcdbg_initialize(void);
63 extern void iSeries_pcibios_init(void);
64 extern void iSeries_pcibios_fixup(void);
65 extern void iSeries_pcibios_fixup_bus(int);
66 extern void iSeries_init_irq_desc(irq_desc_t *desc);
68 /* Global Variables */
70 static unsigned long procFreqHz = 0;
71 static unsigned long procFreqMhz = 0;
72 static unsigned long procFreqMhzHundreths = 0;
74 static unsigned long tbFreqHz = 0;
75 static unsigned long tbFreqMhz = 0;
76 static unsigned long tbFreqMhzHundreths = 0;
78 int piranha_simulator = 0;
82 extern int rd_size; /* Defined in drivers/block/rd.c */
83 extern unsigned long klimit;
84 extern unsigned long embedded_sysmap_start;
85 extern unsigned long embedded_sysmap_end;
87 extern unsigned long iSeries_recal_tb;
88 extern unsigned long iSeries_recal_titan;
93 static int mf_initialized = 0;
96 unsigned long absStart;
98 unsigned long logicalStart;
99 unsigned long logicalEnd;
103 * Process the main store vpd to determine where the holes in memory are
104 * and return the number of physical blocks and fill in the array of
108 unsigned long iSeries_process_Condor_mainstore_vpd( struct MemoryBlock *mb_array, unsigned long max_entries )
110 /* Determine if absolute memory has any
111 * holes so that we can interpret the
112 * access map we get back from the hypervisor
116 unsigned long holeFirstChunk, holeSizeChunks;
117 unsigned long numMemoryBlocks = 1;
118 struct IoHriMainStoreSegment4 * msVpd = (struct IoHriMainStoreSegment4 *)xMsVpd;
119 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
120 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
121 unsigned long holeSize = holeEnd - holeStart;
123 printk("Mainstore_VPD: Condor\n");
125 mb_array[0].logicalStart = 0;
126 mb_array[0].logicalEnd = 0x100000000;
127 mb_array[0].absStart = 0;
128 mb_array[0].absEnd = 0x100000000;
132 holeStart = holeStart & 0x000fffffffffffff;
133 holeStart = addr_to_chunk(holeStart);
134 holeFirstChunk = holeStart;
135 holeSize = addr_to_chunk(holeSize);
136 holeSizeChunks = holeSize;
137 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
138 holeFirstChunk, holeSizeChunks );
139 mb_array[0].logicalEnd = holeFirstChunk;
140 mb_array[0].absEnd = holeFirstChunk;
141 mb_array[1].logicalStart = holeFirstChunk;
142 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
143 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
144 mb_array[1].absEnd = 0x100000000;
148 return numMemoryBlocks;
151 #define MaxSegmentAreas 32
152 #define MaxSegmentAdrRangeBlocks 128
153 #define MaxAreaRangeBlocks 4
154 unsigned long iSeries_process_Regatta_mainstore_vpd( struct MemoryBlock *mb_array, unsigned long max_entries )
156 struct IoHriMainStoreSegment5 * msVpdP = (struct IoHriMainStoreSegment5 *)xMsVpd;
157 unsigned long numSegmentBlocks = 0;
158 u32 existsBits = msVpdP->msAreaExists;
159 unsigned long area_num;
161 printk("Mainstore_VPD: Regatta\n");
163 for ( area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
164 unsigned long numAreaBlocks;
165 struct IoHriMainStoreArea4 * currentArea;
167 if ( existsBits & 0x80000000 ) {
168 unsigned long block_num;
170 currentArea = &msVpdP->msAreaArray[area_num];
171 numAreaBlocks = currentArea->numAdrRangeBlocks;
173 printk("ms_vpd: processing area %2ld blocks=%ld", area_num, numAreaBlocks);
175 for ( block_num = 0; block_num < numAreaBlocks; ++block_num ) {
176 /* Process an address range block */
177 struct MemoryBlock tempBlock;
180 tempBlock.absStart = (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
181 tempBlock.absEnd = (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
182 tempBlock.logicalStart = 0;
183 tempBlock.logicalEnd = 0;
185 printk("\n block %ld absStart=%016lx absEnd=%016lx", block_num,
186 tempBlock.absStart, tempBlock.absEnd);
188 for ( i=0; i<numSegmentBlocks; ++i ) {
189 if ( mb_array[i].absStart == tempBlock.absStart )
192 if ( i == numSegmentBlocks ) {
193 if ( numSegmentBlocks == max_entries ) {
194 panic("iSeries_process_mainstore_vpd: too many memory blocks");
196 mb_array[numSegmentBlocks] = tempBlock;
200 printk(" (duplicate)");
207 /* Now sort the blocks found into ascending sequence */
208 if ( numSegmentBlocks > 1 ) {
210 for ( m=0; m<numSegmentBlocks-1; ++m ) {
211 for ( n=numSegmentBlocks-1; m<n; --n ) {
212 if ( mb_array[n].absStart < mb_array[n-1].absStart ) {
213 struct MemoryBlock tempBlock;
214 tempBlock = mb_array[n];
215 mb_array[n] = mb_array[n-1];
216 mb_array[n-1] = tempBlock;
222 /* Assign "logical" addresses to each block. These
223 * addresses correspond to the hypervisor "bitmap" space.
224 * Convert all addresses into units of 256K chunks.
227 unsigned long i, nextBitmapAddress;
228 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
229 nextBitmapAddress = 0;
230 for ( i=0; i<numSegmentBlocks; ++i ) {
231 unsigned long length = mb_array[i].absEnd - mb_array[i].absStart;
232 mb_array[i].logicalStart = nextBitmapAddress;
233 mb_array[i].logicalEnd = nextBitmapAddress + length;
234 nextBitmapAddress += length;
235 printk(" Bitmap range: %016lx - %016lx\n"
236 " Absolute range: %016lx - %016lx\n",
237 mb_array[i].logicalStart, mb_array[i].logicalEnd,
238 mb_array[i].absStart, mb_array[i].absEnd);
239 mb_array[i].absStart = addr_to_chunk( mb_array[i].absStart & 0x000fffffffffffff );
240 mb_array[i].absEnd = addr_to_chunk( mb_array[i].absEnd & 0x000fffffffffffff );
241 mb_array[i].logicalStart = addr_to_chunk( mb_array[i].logicalStart );
242 mb_array[i].logicalEnd = addr_to_chunk( mb_array[i].logicalEnd );
246 return numSegmentBlocks;
250 unsigned long iSeries_process_mainstore_vpd( struct MemoryBlock *mb_array, unsigned long max_entries )
253 unsigned long mem_blocks = 0;
255 if (cur_cpu_spec->cpu_features & CPU_FTR_SLB)
256 mem_blocks = iSeries_process_Regatta_mainstore_vpd( mb_array, max_entries );
258 mem_blocks = iSeries_process_Condor_mainstore_vpd( mb_array, max_entries );
260 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
261 for ( i=0; i<mem_blocks; ++i ) {
262 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
263 " abs chunks %016lx - %016lx\n",
264 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
265 mb_array[i].absStart, mb_array[i].absEnd);
272 * void __init iSeries_init_early()
278 iSeries_init_early(void)
280 #ifdef CONFIG_PPC_ISERIES
281 #if defined(CONFIG_BLK_DEV_INITRD)
283 * If the init RAM disk has been configured and there is
284 * a non-zero starting address for it, set it up
287 if ( naca->xRamDisk ) {
288 initrd_start = (unsigned long)__va(naca->xRamDisk);
289 initrd_end = initrd_start + naca->xRamDiskSize * PAGE_SIZE;
290 initrd_below_start_ok = 1; // ramdisk in kernel space
291 ROOT_DEV = MKDEV( RAMDISK_MAJOR, 0 );
293 if ( ((rd_size*1024)/PAGE_SIZE) < naca->xRamDiskSize )
294 rd_size = (naca->xRamDiskSize*PAGE_SIZE)/1024;
297 #endif /* CONFIG_BLK_DEV_INITRD */
300 /* ROOT_DEV = MKDEV( VIODASD_MAJOR, 1 ); */
303 iSeries_recal_tb = get_tb();
304 iSeries_recal_titan = HvCallXm_loadTod();
306 ppc_md.setup_arch = iSeries_setup_arch;
307 ppc_md.setup_residual = iSeries_setup_residual;
308 ppc_md.get_cpuinfo = iSeries_get_cpuinfo;
309 ppc_md.irq_cannonicalize = NULL;
310 ppc_md.init_IRQ = iSeries_init_IRQ;
311 ppc_md.init_irq_desc = iSeries_init_irq_desc;
312 ppc_md.init_ras_IRQ = NULL;
313 ppc_md.get_irq = iSeries_get_irq;
316 ppc_md.pcibios_fixup = iSeries_pcibios_fixup;
317 ppc_md.pcibios_fixup_bus = iSeries_pcibios_fixup_bus;
319 ppc_md.restart = iSeries_restart;
320 ppc_md.power_off = iSeries_power_off;
321 ppc_md.halt = iSeries_halt;
323 ppc_md.time_init = NULL;
324 ppc_md.get_boot_time = iSeries_get_boot_time;
325 ppc_md.set_rtc_time = iSeries_set_rtc_time;
326 ppc_md.get_rtc_time = iSeries_get_rtc_time;
327 ppc_md.calibrate_decr = iSeries_calibrate_decr;
328 ppc_md.progress = iSeries_progress;
330 ppc_md.kbd_setkeycode = NULL;
331 ppc_md.kbd_getkeycode = NULL;
332 ppc_md.kbd_translate = NULL;
333 ppc_md.kbd_unexpected_up = NULL;
334 ppc_md.kbd_leds = NULL;
335 ppc_md.kbd_init_hw = NULL;
337 #if defined(CONFIG_MAGIC_SYSRQ)
338 ppc_md.ppc_kbd_sysrq_xlate = NULL;
344 /* Initialize the table which translate Linux physical addresses to
345 * AS/400 absolute addresses
348 build_iSeries_Memory_Map();
350 setup_iSeries_cache_sizes();
352 /* Initialize machine-dependency vectors */
359 if ( itLpNaca.xPirEnvironMode == 0 )
360 piranha_simulator = 1;
365 * void __init iSeries_init()
369 iSeries_init(unsigned long r3, unsigned long r4, unsigned long r5,
370 unsigned long r6, unsigned long r7)
372 /* Associate Lp Event Queue 0 with processor 0 */
373 HvCallEvent_setLpEventQueueInterruptProc( 0, 0 );
376 /* copy the command line parameter from the primary VSP */
378 HvCallEvent_dmaToSp( cmd_line,
381 HvLpDma_Direction_RemoteToLocal );
383 p = q = cmd_line + 255;
384 while( p > cmd_line ) {
385 if ((*p == 0) || (*p == ' ') || (*p == '\n'))
394 iSeries_proc_early_init();
399 iSeries_proc_callback( &pmc_proc_init );
402 #ifdef CONFIG_PPC_ISERIES
404 * The iSeries may have very large memories ( > 128 GB ) and a partition
405 * may get memory in "chunks" that may be anywhere in the 2**52 real
406 * address space. The chunks are 256K in size. To map this to the
407 * memory model Linux expects, the AS/400 specific code builds a
408 * translation table to translate what Linux thinks are "physical"
409 * addresses to the actual real addresses. This allows us to make
410 * it appear to Linux that we have contiguous memory starting at
411 * physical address zero while in fact this could be far from the truth.
412 * To avoid confusion, I'll let the words physical and/or real address
413 * apply to the Linux addresses while I'll use "absolute address" to
414 * refer to the actual hardware real address.
416 * build_iSeries_Memory_Map gets information from the Hypervisor and
417 * looks at the Main Store VPD to determine the absolute addresses
418 * of the memory that has been assigned to our partition and builds
419 * a table used to translate Linux's physical addresses to these
420 * absolute addresses. Absolute addresses are needed when
421 * communicating with the hypervisor (e.g. to build HPT entries)
424 static void __init build_iSeries_Memory_Map(void)
426 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
428 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
430 u32 totalChunks,moreChunks;
431 u32 currChunk, thisChunk, absChunk;
435 struct MemoryBlock mb[32];
436 unsigned long numMemoryBlocks, curBlock, lock_shift;
438 /* Chunk size on iSeries is 256K bytes */
439 totalChunks = (u32)HvLpConfig_getMsChunks();
440 klimit = msChunks_alloc(klimit, totalChunks, 1UL<<18);
442 /* Get absolute address of our load area
443 * and map it to physical address 0
444 * This guarantees that the loadarea ends up at physical 0
445 * otherwise, it might not be returned by PLIC as the first
449 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
450 loadAreaSize = itLpNaca.xLoadAreaChunks;
452 /* Only add the pages already mapped here.
453 * Otherwise we might add the hpt pages
454 * The rest of the pages of the load area
455 * aren't in the HPT yet and can still
456 * be assigned an arbitrary physical address
458 if ( (loadAreaSize * 64) > HvPagesToMap )
459 loadAreaSize = HvPagesToMap / 64;
461 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
463 /* TODO Do we need to do something if the HPT is in the 64MB load area?
464 * This would be required if the itLpNaca.xLoadAreaChunks includes
468 printk( "Mapping load area - physical addr = 0000000000000000\n"
469 " absolute addr = %016lx\n",
470 chunk_to_addr(loadAreaFirstChunk) );
471 printk( "Load area size %dK\n", loadAreaSize*256 );
473 for ( nextPhysChunk = 0;
474 nextPhysChunk < loadAreaSize;
476 msChunks.abs[nextPhysChunk] = loadAreaFirstChunk+nextPhysChunk;
479 /* Get absolute address of our HPT and remember it so
480 * we won't map it to any physical address
483 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
484 hptSizePages = (u32)(HvCallHpt_getHptPages());
485 hptSizeChunks = hptSizePages >> (msChunks.chunk_shift-PAGE_SHIFT);
486 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
488 printk( "HPT absolute addr = %016lx, size = %dK\n",
489 chunk_to_addr(hptFirstChunk), hptSizeChunks*256 );
491 /* Fill in the htab_data structure */
493 /* Fill in size of hashed page table */
494 num_ptegs = hptSizePages * (PAGE_SIZE/(sizeof(HPTE)*HPTES_PER_GROUP));
495 htab_data.htab_num_ptegs = num_ptegs;
496 htab_data.htab_hash_mask = num_ptegs - 1;
497 naca->pftSize = __ilog2(num_ptegs << 7);
500 * Calculate the number of bits to shift the pteg selector such that we
501 * use the high order 8 bits to select a page table lock.
503 asm ("cntlzd %0,%1" : "=r" (lock_shift) : "r" (htab_data.htab_hash_mask));
504 htab_data.htab_lock_shift = (64 - lock_shift) - 8;
506 /* The actual hashed page table is in the hypervisor, we have no direct access */
507 htab_data.htab = NULL;
509 /* Determine if absolute memory has any
510 * holes so that we can interpret the
511 * access map we get back from the hypervisor
514 numMemoryBlocks = iSeries_process_mainstore_vpd( mb, 32 );
516 /* Process the main store access map from the hypervisor
517 * to build up our physical -> absolute translation table
522 moreChunks = totalChunks;
524 while ( moreChunks ) {
525 map = HvCallSm_get64BitsOfAccessMap( itLpNaca.xLpIndex,
527 thisChunk = currChunk;
529 chunkBit = map >> 63;
534 while ( thisChunk >= mb[curBlock].logicalEnd ) {
536 if ( curBlock >= numMemoryBlocks )
537 panic("out of memory blocks");
539 if ( thisChunk < mb[curBlock].logicalStart )
540 panic("memory block error");
542 absChunk = mb[curBlock].absStart + ( thisChunk - mb[curBlock].logicalStart );
544 if ( ( ( absChunk < hptFirstChunk ) ||
545 ( absChunk > hptLastChunk ) ) &&
546 ( ( absChunk < loadAreaFirstChunk ) ||
547 ( absChunk > loadAreaLastChunk ) ) ) {
548 msChunks.abs[nextPhysChunk] = absChunk;
558 /* main store size (in chunks) is
559 * totalChunks - hptSizeChunks
560 * which should be equal to
563 systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
565 /* Bolt kernel mappings for all of memory */
566 iSeries_bolt_kernel(0, systemcfg->physicalMemorySize);
569 lmb_add(0, systemcfg->physicalMemorySize);
570 lmb_analyze(); /* ?? */
571 lmb_reserve(0, __pa(klimit));
574 * Hardcode to GP size. I am not sure where to get this info. DRENG
580 * Set up the variables that describe the cache line sizes
584 static void __init setup_iSeries_cache_sizes(void)
587 unsigned procIx = get_paca()->xLpPaca.xDynHvPhysicalProcIndex;
589 systemcfg->iCacheL1Size = xIoHriProcessorVpd[procIx].xInstCacheSize * 1024;
590 systemcfg->iCacheL1LineSize = xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
591 systemcfg->dCacheL1Size = xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024;
592 systemcfg->dCacheL1LineSize = xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
593 naca->iCacheL1LinesPerPage = PAGE_SIZE / systemcfg->iCacheL1LineSize;
594 naca->dCacheL1LinesPerPage = PAGE_SIZE / systemcfg->dCacheL1LineSize;
596 i = systemcfg->iCacheL1LineSize;
598 while ((i=(i/2))) ++n;
599 naca->iCacheL1LogLineSize = n;
600 i = systemcfg->dCacheL1LineSize;
602 while ((i=(i/2))) ++n;
603 naca->dCacheL1LogLineSize = n;
605 printk( "D-cache line size = %d\n", (unsigned)systemcfg->dCacheL1LineSize);
606 printk( "I-cache line size = %d\n", (unsigned)systemcfg->iCacheL1LineSize);
610 * Bolt the kernel addr space into the HPT
612 static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr)
615 unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
618 for (pa=saddr; pa < eaddr ;pa+=PAGE_SIZE) {
619 unsigned long ea = (unsigned long)__va(pa);
620 unsigned long vsid = get_kernel_vsid( ea );
621 unsigned long va = ( vsid << 28 ) | ( pa & 0xfffffff );
622 unsigned long vpn = va >> PAGE_SHIFT;
623 unsigned long slot = HvCallHpt_findValid( &hpte, vpn );
624 if (hpte.dw0.dw0.v) {
625 /* HPTE exists, so just bolt it */
626 HvCallHpt_setSwBits(slot, 0x10, 0);
627 /* And make sure the pp bits are correct */
628 HvCallHpt_setPp(slot, PP_RWXX);
630 /* No HPTE exists, so create a new bolted one */
631 make_pte(NULL, va, (unsigned long)__v2a(ea),
636 #endif /* CONFIG_PPC_ISERIES */
638 extern unsigned long ppc_proc_freq;
639 extern unsigned long ppc_tb_freq;
645 iSeries_setup_arch(void)
648 unsigned procIx = get_paca()->xLpPaca.xDynHvPhysicalProcIndex;
650 /* Add an eye catcher and the systemcfg layout version number */
651 strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
652 systemcfg->version.major = SYSTEMCFG_MAJOR;
653 systemcfg->version.minor = SYSTEMCFG_MINOR;
656 /* Setup the Lp Event Queue */
658 /* Allocate a page for the Event Stack
659 * The hypervisor wants the absolute real address, so
660 * we subtract out the KERNELBASE and add in the
661 * absolute real address of the kernel load area
664 eventStack = alloc_bootmem_pages( LpEventStackSize );
666 memset( eventStack, 0, LpEventStackSize );
668 /* Invoke the hypervisor to initialize the event stack */
670 HvCallEvent_setLpEventStack( 0, eventStack, LpEventStackSize );
672 /* Initialize fields in our Lp Event Queue */
674 xItLpQueue.xSlicEventStackPtr = (char *)eventStack;
675 xItLpQueue.xSlicCurEventPtr = (char *)eventStack;
676 xItLpQueue.xSlicLastValidEventPtr = (char *)eventStack +
677 (LpEventStackSize - LpEventMaxSize);
678 xItLpQueue.xIndex = 0;
680 /* Compute processor frequency */
681 procFreqHz = (((1UL<<34) * 1000000) / xIoHriProcessorVpd[procIx].xProcFreq );
682 procFreqMhz = procFreqHz / 1000000;
683 procFreqMhzHundreths = (procFreqHz/10000) - (procFreqMhz*100);
685 ppc_proc_freq = procFreqHz;
687 /* Compute time base frequency */
688 tbFreqHz = (((1UL<<32) * 1000000) / xIoHriProcessorVpd[procIx].xTimeBaseFreq );
689 tbFreqMhz = tbFreqHz / 1000000;
690 tbFreqMhzHundreths = (tbFreqHz/10000) - (tbFreqMhz*100);
692 ppc_tb_freq = tbFreqHz;
694 printk("Max logical processors = %d\n",
695 itVpdAreas.xSlicMaxLogicalProcs );
696 printk("Max physical processors = %d\n",
697 itVpdAreas.xSlicMaxPhysicalProcs );
698 printk("Processor frequency = %lu.%02lu\n",
700 procFreqMhzHundreths );
701 printk("Time base frequency = %lu.%02lu\n",
703 tbFreqMhzHundreths );
704 systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
705 printk("Processor version = %x\n", systemcfg->processor);
707 #if defined(CONFIG_IRQ_ALL_CPUS)
708 do_spread_lpevents(MAX_PACAS);
713 * int as400_setup_residual()
716 * This routine pretty-prints CPU information gathered from the VPD
717 * for use in /proc/cpuinfo
720 * *buffer - Buffer into which CPU data is to be printed.
723 * *buffer - Buffer with CPU data.
726 * The number of bytes copied into 'buffer' if OK, otherwise zero or less
729 void iSeries_setup_residual(struct seq_file *m)
732 seq_printf(m,"clock\t\t: %lu.%02luMhz\n",
733 procFreqMhz, procFreqMhzHundreths );
734 seq_printf(m,"time base\t: %lu.%02luMHz\n",
735 tbFreqMhz, tbFreqMhzHundreths );
736 seq_printf(m,"i-cache\t\t: %d\n",
737 systemcfg->iCacheL1LineSize);
738 seq_printf(m,"d-cache\t\t: %d\n",
739 systemcfg->dCacheL1LineSize);
743 void iSeries_get_cpuinfo(struct seq_file *m)
746 seq_printf(m,"machine\t\t: 64-bit iSeries Logical Partition\n");
755 iSeries_get_irq(struct pt_regs *regs)
757 /* -2 means ignore this interrupt */
765 iSeries_restart(char *cmd)
774 iSeries_power_off(void)
789 * Nothing to do here.
792 iSeries_time_init(void)
798 unsigned long jdh_time = 0;
800 extern void setup_default_decr(void);
803 * void __init iSeries_calibrate_decr()
806 * This routine retrieves the internal processor frequency from the VPD,
807 * and sets up the kernel timer decrementer based on that value.
811 iSeries_calibrate_decr(void)
813 unsigned long cyclesPerUsec;
815 struct div_result divres;
817 /* Compute decrementer (and TB) frequency
821 cyclesPerUsec = ppc_tb_freq / 1000000; /* cycles / usec */
823 /* Set the amount to refresh the decrementer by. This
824 * is the number of decrementer ticks it takes for
828 tb_ticks_per_jiffy = ppc_tb_freq / HZ;
831 /* TEST CODE FOR ADJTIME */
832 tb_ticks_per_jiffy += tb_ticks_per_jiffy / 5000;
833 /* END OF TEST CODE */
837 * tb_ticks_per_sec = freq; would give better accuracy
838 * but tb_ticks_per_sec = tb_ticks_per_jiffy*HZ; assures
839 * that jiffies (and xtime) will match the time returned
840 * by do_gettimeofday.
842 tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
843 tb_ticks_per_usec = cyclesPerUsec;
844 div128_by_32( 1024*1024, 0, tb_ticks_per_sec, &divres );
845 tb_to_xs = divres.result_low;
846 setup_default_decr();
850 iSeries_progress( char * st, unsigned short code )
852 printk( "Progress: [%04x] - %s\n", (unsigned)code, st );
853 if ( !piranha_simulator && mf_initialized ) {
855 mf_displayProgress( code );
862 void iSeries_fixup_klimit(void)
864 /* Change klimit to take into account any ram disk that may be included */
866 klimit = KERNELBASE + (u64)naca->xRamDisk + (naca->xRamDiskSize * PAGE_SIZE);
868 /* No ram disk was included - check and see if there was an embedded system map */
869 /* Change klimit to take into account any embedded system map */
870 if (embedded_sysmap_end)
871 klimit = KERNELBASE + ((embedded_sysmap_end+4095) & 0xfffffffffffff000);