2 * arch/ppc64/kernel/ppc_asm.h
4 * Definitions used by various bits of low-level assembly code on PowerPC.
6 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
14 #include <linux/config.h>
16 #include <asm/ppc_asm.tmpl>
20 * Macros for storing registers into and loading registers from
23 #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base)
24 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
25 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
26 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
27 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
28 #define REST_GPR(n, base) ld n,GPR0+8*(n)(base)
29 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
30 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
31 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
32 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
34 #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
35 #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
36 #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
37 #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
38 #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
39 #define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
40 #define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
41 #define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
42 #define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
43 #define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
44 #define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
45 #define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
48 * Once a version of gas that understands the AltiVec instructions
49 * is freely available, we can do this the normal way... - paulus
51 #define LVX(r,a,b) .long (31<<26)+((r)<<21)+((a)<<16)+((b)<<11)+(103<<1)
52 #define STVX(r,a,b) .long (31<<26)+((r)<<21)+((a)<<16)+((b)<<11)+(231<<1)
53 #define MFVSCR(r) .long (4<<26)+((r)<<21)+(770<<1)
54 #define MTVSCR(r) .long (4<<26)+((r)<<11)+(802<<1)
55 #define DSSALL .long (0x1f<<26)+(0x10<<21)+(0x336<<1)
58 #define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); STVX(n,b,base)
59 #define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
60 #define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
61 #define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
62 #define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
63 #define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
64 #define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); LVX(n,b,base)
65 #define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
66 #define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base)
67 #define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base)
68 #define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base)
69 #define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base)
72 #define CHECKANYINT(ra,rb) \
73 mfspr rb,SPRG3; /* Get Paca address */\
74 ld ra,PACALPPACA+LPPACAANYINT(rb); /* Get pending interrupt flags */\
77 /* Macros to adjust thread priority for Iseries hardware multithreading */
78 #define HMT_LOW or 1,1,1
79 #define HMT_MEDIUM or 2,2,2
80 #define HMT_HIGH or 3,3,3
82 /* Insert the high 32 bits of the MSR into what will be the new
83 MSR (via SRR1 and rfid) This preserves the MSR.SF and MSR.ISF
86 #define FIX_SRR1(ra, rb) \
91 #define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
94 * LOADADDR( rn, name )
95 * loads the address of 'name' into 'rn'
97 * LOADBASE( rn, name )
98 * loads the address (less the low 16 bits) of 'name' into 'rn'
99 * suitable for base+disp addressing
101 #define LOADADDR(rn,name) \
102 lis rn,name##@highest; \
103 ori rn,rn,name##@higher; \
104 rldicr rn,rn,32,31; \
105 oris rn,rn,name##@h; \
108 #define LOADBASE(rn,name) \
109 lis rn,name@highest; \
110 ori rn,rn,name@higher; \
111 rldicr rn,rn,32,31; \
115 #define SET_REG_TO_CONST(reg, value) \
116 lis reg,(((value)>>48)&0xFFFF); \
117 ori reg,reg,(((value)>>32)&0xFFFF); \
118 rldicr reg,reg,32,31; \
119 oris reg,reg,(((value)>>16)&0xFFFF); \
120 ori reg,reg,((value)&0xFFFF);
122 #define SET_REG_TO_LABEL(reg, label) \
123 lis reg,(label)@highest; \
124 ori reg,reg,(label)@higher; \
125 rldicr reg,reg,32,31; \
126 oris reg,reg,(label)@h; \
127 ori reg,reg,(label)@l;
130 /* PPPBBB - DRENG If KERNELBASE is always 0xC0...,
131 * Then we can easily do this with one asm insn. -Peter
133 #define tophys(rd,rs) \
134 lis rd,((KERNELBASE>>48)&0xFFFF); \
135 rldicr rd,rd,32,31; \
138 #define tovirt(rd,rs) \
139 lis rd,((KERNELBASE>>48)&0xFFFF); \
140 rldicr rd,rd,32,31; \