bcmdrivers/opensource/include/bcm963xx/board.h

   1 /*
   2 <:copyright-gpl
   3  Copyright 2002 Broadcom Corp. All Rights Reserved.
   4
   5  This program is free software; you can distribute it and/or modify it
   6  under the terms of the GNU General Public License (Version 2) as
   7  published by the Free Software Foundation.
   8
   9  This program is distributed in the hope it will be useful, but WITHOUT
  10  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  for more details.
  13
  14  You should have received a copy of the GNU General Public License along
  15  with this program; if not, write to the Free Software Foundation, Inc.,
  16  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17 :>
  18 */
  19 /***********************************************************************/
  20 /*                                                                     */
  21 /*   MODULE:  board.h                                                  */
  22 /*   DATE:    97/02/18                                                 */
  23 /*   PURPOSE: Board specific information.  This module should include  */
  24 /*            all base device addresses and board specific macros.     */
  25 /*                                                                     */
  26 /***********************************************************************/
  27 #ifndef _BOARD_H
  28 #define _BOARD_H
  29
  30 #if __cplusplus
  31 extern "C" {
  32 #endif
  33 /*****************************************************************************/
  34 /*                    Misc board definitions                                 */
  35 /*****************************************************************************/
  36
  37 /*****************************************************************************/
  38 /*                    Physical Memory Map                                    */
  39 /*****************************************************************************/
  40
  41 #define PHYS_DRAM_BASE           0x00000000     /* Dynamic RAM Base */
  42 #define PHYS_FLASH_BASE          0x1FC00000     /* Flash Memory         */
  43
  44 /*****************************************************************************/
  45 /* Note that the addresses above are physical addresses and that programs    */
  46 /* have to use converted addresses defined below:                            */
  47 /*****************************************************************************/
  48 #define DRAM_BASE           (0x80000000 | PHYS_DRAM_BASE)   /* cached DRAM */
  49 #define DRAM_BASE_NOCACHE   (0xA0000000 | PHYS_DRAM_BASE)   /* uncached DRAM */
  50 #define FLASH_BASE          (0xA0000000 | PHYS_FLASH_BASE)  /* uncached Flash  */
  51
  52 /*****************************************************************************/
  53 /*  Select the PLL value to get the desired CPU clock frequency.             */
  54 /*                                                                           */
  55 /*                                                                           */
  56 /*****************************************************************************/
  57 #define FPERIPH            50000000
  58
  59 #define ONEK                            1024
  60 #define BLK64K                          (64*ONEK)
  61 #define FLASH45_BLKS_BOOT_ROM           1
  62 #define FLASH45_LENGTH_BOOT_ROM         (FLASH45_BLKS_BOOT_ROM * BLK64K)
  63 #define FLASH_RESERVED_AT_END           (64*ONEK) /*reserved for PSI, scratch pad*/
  64
  65 /*****************************************************************************/
  66 /* Note that the addresses above are physical addresses and that programs    */
  67 /* have to use converted addresses defined below:                            */
  68 /*****************************************************************************/
  69 #define DRAM_BASE           (0x80000000 | PHYS_DRAM_BASE)   /* cached DRAM */
  70 #define DRAM_BASE_NOCACHE   (0xA0000000 | PHYS_DRAM_BASE)   /* uncached DRAM */
  71 #define FLASH_BASE          (0xA0000000 | PHYS_FLASH_BASE)  /* uncached Flash  */
  72
  73 /*****************************************************************************/
  74 /*  Select the PLL value to get the desired CPU clock frequency.             */
  75 /*                                                                           */
  76 /*                                                                           */
  77 /*****************************************************************************/
  78 #define FPERIPH            50000000
  79
  80 #define SDRAM_TYPE_ADDRESS_OFFSET   16
  81 #define NVRAM_DATA_OFFSET           0x0580
  82 #define NVRAM_DATA_ID               0x0f1e2d3c
  83 #define BOARD_SDRAM_TYPE            *(unsigned long *) \
  84                                     (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
  85
  86 #define ONEK                1024
  87 #define BLK64K              (64*ONEK)
  88
  89 // nvram and psi flash definitions for 45
  90 #define FLASH45_LENGTH_NVRAM            ONEK            // 1k nvram
  91 #define NVRAM_PSI_DEFAULT               24              // default psi in K byes
  92
  93 /*****************************************************************************/
  94 /*       NVRAM Offset and definition                                         */
  95 /*****************************************************************************/
  96
  97 #define NVRAM_VERSION_NUMBER            2
  98 #define NVRAM_VERSION_NUMBER_ADDRESS    0
  99
 100 #define NVRAM_BOOTLINE_LEN              256
 101 #define NVRAM_BOARD_ID_STRING_LEN       16
 102 #define NVRAM_MAC_ADDRESS_LEN           6
 103 #define NVRAM_MAC_COUNT_MAX             32
 104
 105 /*****************************************************************************/
 106 /*       Misc Offsets                                                        */
 107 /*****************************************************************************/
 108
 109 #define CFE_VERSION_OFFSET           0x0570
 110 #define CFE_VERSION_MARK_SIZE        5
 111 #define CFE_VERSION_SIZE             5
 112
 113 typedef struct
 114 {
 115     unsigned long ulVersion;
 116     char szBootline[NVRAM_BOOTLINE_LEN];
 117     char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
 118     unsigned long ulReserved1[2];
 119     unsigned long ulNumMacAddrs;
 120     unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
 121     char chReserved[2];
 122     char chCountry[4];  // USR9108
 123     unsigned long ulCheckSum;
 124 } NVRAM_DATA, *PNVRAM_DATA;
 125
 126
 127 /*****************************************************************************/
 128 /*          board ioctl calls for flash, led and some other utilities        */
 129 /*****************************************************************************/
 130
 131
 132 /* Defines. for board driver */
 133 #define BOARD_IOCTL_MAGIC       'B'
 134 #define BOARD_DRV_MAJOR          206
 135
 136 #define MAC_ADDRESS_ANY         (unsigned long) -1
 137
 138 #define BOARD_IOCTL_FLASH_INIT \
 139     _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
 140
 141 #define BOARD_IOCTL_FLASH_WRITE \
 142     _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
 143
 144 #define BOARD_IOCTL_FLASH_READ \
 145     _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
 146
 147 #define BOARD_IOCTL_GET_NR_PAGES \
 148     _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
 149
 150 #define BOARD_IOCTL_DUMP_ADDR \
 151     _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
 152
 153 #define BOARD_IOCTL_SET_MEMORY \
 154     _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
 155
 156 #define BOARD_IOCTL_MIPS_SOFT_RESET \
 157     _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
 158
 159 #define BOARD_IOCTL_LED_CTRL \
 160     _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
 161
 162 #define BOARD_IOCTL_GET_ID \
 163     _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
 164
 165 #define BOARD_IOCTL_GET_MAC_ADDRESS \
 166     _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
 167
 168 #define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
 169     _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
 170
 171 #define BOARD_IOCTL_GET_PSI_SIZE \
 172     _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
 173
 174 #define BOARD_IOCTL_GET_SDRAM_SIZE \
 175     _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
 176
 177 #define BOARD_IOCTL_GET_ENET_MODE_FLAG \
 178     _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
 179
 180 #define BOARD_IOCTL_SET_ENET_MODE_FLAG \
 181     _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
 182
 183 #define BOARD_IOCTL_GET_BOOTLINE \
 184     _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
 185
 186 #define BOARD_IOCTL_SET_BOOTLINE \
 187     _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
 188
 189 #define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
 190     _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
 191
 192 #define BOARD_IOCTL_GET_CHIP_ID \
 193     _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
 194
 195 #define BOARD_IOCTL_GET_NUM_ENET \
 196     _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
 197
 198 #define BOARD_IOCTL_GET_CFE_VER \
 199     _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
 200
 201 #define BOARD_IOCTL_GET_ENET_CFG \
 202     _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
 203
 204 #define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
 205     _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
 206
 207 #define BOARD_IOCTL_SET_TRIGGER_EVENT \
 208     _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
 209
 210 #define BOARD_IOCTL_GET_TRIGGER_EVENT \
 211     _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
 212
 213 #define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
 214     _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
 215
 216 #define BOARD_IOCTL_SET_SES_LED \
 217     _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
 218
 219 #define BOARD_IOCTL_GET_CNTRY_SEL \
 220     _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
 221
 222
 223 // for the action in BOARD_IOCTL_PARMS for flash operation
 224 typedef enum
 225 {
 226     PERSISTENT,
 227     NVRAM,
 228     BCM_IMAGE_CFE,
 229     BCM_IMAGE_FS,
 230     BCM_IMAGE_KERNEL,
 231     BCM_IMAGE_WHOLE,
 232     SCRATCH_PAD,
 233     FLASH_SIZE,
 234 } BOARD_IOCTL_ACTION;
 235
 236
 237 typedef struct boardIoctParms
 238 {
 239     char *string;
 240     char *buf;
 241     int strLen;
 242     int offset;
 243     BOARD_IOCTL_ACTION  action;        /* flash read/write: nvram, persistent, bcm image */
 244     int result;
 245 } BOARD_IOCTL_PARMS;
 246
 247
 248 // LED defines
 249 typedef enum
 250 {
 251     kLedAdsl,
 252     kLedWireless,
 253     kLedUsb,
 254     kLedHpna,
 255     kLedWanData,
 256     kLedPPP,
 257     kLedVoip,
 258     kLedSes,
 259     kLedEnd,                // NOTE: Insert the new led name before this one.  Alway stay at the end.
 260 } BOARD_LED_NAME;
 261
 262 typedef enum
 263 {
 264     kLedStateOff,                        /* turn led off */
 265     kLedStateOn,                         /* turn led on */
 266     kLedStateFail,                       /* turn led on red */
 267     kLedStateBlinkOnce,                  /* blink once, ~100ms and ignore the same call during the 100ms period */
 268     kLedStateSlowBlinkContinues,         /* slow blink continues at ~600ms interval */
 269     kLedStateFastBlinkContinues,         /* fast blink continues at ~200ms interval */
 270 } BOARD_LED_STATE;
 271
 272
 273 // virtual and physical map pair defined in board.c
 274 typedef struct ledmappair
 275 {
 276     BOARD_LED_NAME ledName;         // virtual led name
 277     BOARD_LED_STATE ledInitState;   // initial led state when the board boots.
 278     unsigned short ledMask;         // physical GPIO pin mask
 279     unsigned short ledActiveLow;    // reset bit to turn on LED
 280     unsigned short ledMaskFail;     // physical GPIO pin mask for state failure
 281     unsigned short ledActiveLowFail;// reset bit to turn on LED
 282 } LED_MAP_PAIR, *PLED_MAP_PAIR;
 283
 284 typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
 285
 286 /* Flash storage address information that is determined by the flash driver. */
 287 typedef struct flashaddrinfo
 288 {
 289     int flash_persistent_start_blk;
 290     int flash_persistent_number_blk;
 291     int flash_persistent_length;
 292     unsigned long flash_persistent_blk_offset;
 293     int flash_scratch_pad_start_blk;         // start before psi (SP_BUF_LEN)
 294     int flash_scratch_pad_number_blk;
 295     int flash_scratch_pad_length;
 296     unsigned long flash_scratch_pad_blk_offset;
 297     int flash_nvram_start_blk;
 298     int flash_nvram_number_blk;
 299     int flash_nvram_length;
 300     unsigned long flash_nvram_blk_offset;
 301 } FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
 302
 303 // scratch pad defines
 304 /* SP - Persisten Scratch Pad format:
 305        sp header        : 32 bytes
 306        tokenId-1        : 8 bytes
 307        tokenId-1 len    : 4 bytes
 308        tokenId-1 data
 309        ....
 310        tokenId-n        : 8 bytes
 311        tokenId-n len    : 4 bytes
 312        tokenId-n data
 313 */
 314
 315 #define MAGIC_NUM_LEN       8
 316 #define MAGIC_NUMBER        "gOGoBrCm"
 317 #define TOKEN_NAME_LEN      16
 318 #define SP_VERSION          1
 319 #define SP_MAX_LEN          8 * 1024            // 8k buf before psi
 320 #define SP_RESERVERD        16
 321
 322 typedef struct _SP_HEADER
 323 {
 324     char SPMagicNum[MAGIC_NUM_LEN];             // 8 bytes of magic number
 325     int SPVersion;                              // version number
 326     int SPUsedLen;                              // used sp len
 327     char SPReserved[SP_RESERVERD];              // reservied, total 32 bytes
 328 } SP_HEADER, *PSP_HEADER;
 329
 330 typedef struct _TOKEN_DEF
 331 {
 332     char tokenName[TOKEN_NAME_LEN];
 333     int tokenLen;
 334 } SP_TOKEN, *PSP_TOKEN;
 335
 336
 337 /*****************************************************************************/
 338 /*          Function Prototypes                                              */
 339 /*****************************************************************************/
 340 #if !defined(__ASM_ASM_H)
 341 void dumpaddr( unsigned char *pAddr, int nLen );
 342
 343 void kerSysFlashAddrInfoGet(PFLASH_ADDR_INFO pflash_addr_info);
 344 int kerSysNvRamGet(char *string, int strLen, int offset);
 345 int kerSysNvRamSet(char *string, int strLen, int offset);
 346 int kerSysPersistentGet(char *string, int strLen, int offset);
 347 int kerSysPersistentSet(char *string, int strLen, int offset);
 348 int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
 349 int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
 350 int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
 351 int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
 352 int kerSysReleaseMacAddress( unsigned char *pucaAddr );
 353 int kerSysGetSdramSize( void );
 354 void kerSysGetBootline(char *string, int strLen);
 355 void kerSysSetBootline(char *string, int strLen);
 356 void kerSysMipsSoftReset(void);
 357 void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
 358 void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
 359 int kerSysFlashSizeGet(void);
 360 #endif
 361
 362 #if __cplusplus
 363 }
 364 #endif
 365
 366 #endif /* _BOARD_H */
 367