3 Copyright 2002 Broadcom Corp. All Rights Reserved.
5 This program is free software; you can distribute it and/or modify it
6 under the terms of the GNU General Public License (Version 2) as
7 published by the Free Software Foundation.
9 This program is distributed in the hope it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 You should have received a copy of the GNU General Public License along
15 with this program; if not, write to the Free Software Foundation, Inc.,
16 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 /***********************************************************************/
22 /* PURPOSE: Board specific information. This module should include */
23 /* all base device addresses and board specific macros. */
25 /***********************************************************************/
33 #define DYING_GASP_API
35 /*****************************************************************************/
36 /* Physical Memory Map */
37 /*****************************************************************************/
39 #define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
40 #define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
42 #define HPI_BASE 0x1D000000 /* Host Processor Interface base address */
43 #define HPI_SIZE 0x8000 /* 32K */
45 /*****************************************************************************/
46 /* Note that the addresses above are physical addresses and that programs */
47 /* have to use converted addresses defined below: */
48 /*****************************************************************************/
49 #define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
50 #define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
52 /* Binary images are always built for a standard MIPS boot address */
53 #define IMAGE_BASE (0xA0000000 | 0x1FC00000)
55 /* Some chips support alternative boot vector */
56 #if defined(_BCM96358_) || defined(CONFIG_BCM96358)
57 #define FLASH_BASE (0xA0000000 | (MPI->cs[0].base & 0xFFFFFF00))
58 #define BOOT_OFFSET (FLASH_BASE - IMAGE_BASE)
60 #define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
64 /*****************************************************************************/
65 /* Select the PLL value to get the desired CPU clock frequency. */
66 /*****************************************************************************/
67 #define FPERIPH 50000000
69 /*****************************************************************************/
70 /* Board memory type offset */
71 /*****************************************************************************/
72 #define SDRAM_TYPE_ADDRESS_OFFSET 16
73 #define THREAD_NUM_ADDRESS_OFFSET 20
74 #define NVRAM_DATA_OFFSET 0x0580
75 #define NVRAM_DATA_ID 0x0f1e2d3c
76 #define BOARD_SDRAM_TYPE *(unsigned long *)(FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
77 #define BOARD_SDRAM_TYPE_ADDRESS (0xA0000000 + PHYS_FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
78 #define BOARD_THREAD_NUM *(unsigned long *)(FLASH_BASE + THREAD_NUM_ADDRESS_OFFSET)
79 #define BOARD_THREAD_NUM_ADDRESS (0xA0000000 + PHYS_FLASH_BASE + THREAD_NUM_ADDRESS_OFFSET)
80 #define BOARD_IMAGE_DOWNLOAD_ADDRESS \
81 ((cfe_sdramsize > 0x00800000) ? 0x80800000 : 0x80000000)
82 #define BOARD_IMAGE_DOWNLOAD_SIZE \
83 ((cfe_sdramsize > 0x00800000) ? 0x00800000 : 0x00400000)
85 /*****************************************************************************/
86 /* NVRAM Offset and definition */
87 /*****************************************************************************/
88 #define NVRAM_PSI_DEFAULT 24 // default psi in K byes
90 #define BLK64K (64*ONEK)
91 #define FLASH_LENGTH_BOOT_ROM (64*ONEK)
92 #define FLASH_RESERVED_AT_END (64*ONEK) /*reserved for PSI, scratch pad*/
93 #define FLASH45_BLKS_BOOT_ROM 1
94 #define FLASH45_LENGTH_BOOT_ROM (FLASH45_BLKS_BOOT_ROM * BLK64K)
97 #define NVRAM_LENGTH ONEK // 1k nvram
98 #define NVRAM_VERSION_NUMBER 2
99 #define NVRAM_VERSION_NUMBER_ADDRESS 0
101 #define NVRAM_BOOTLINE_LEN 256
102 #define NVRAM_BOARD_ID_STRING_LEN 16
103 #define NVRAM_MAC_ADDRESS_LEN 6
104 #define NVRAM_MAC_COUNT_MAX 32
105 #define NVRAM_MAC_COUNT_DEFAULT 0
107 /*****************************************************************************/
109 /*****************************************************************************/
110 #define CFE_VERSION_OFFSET 0x0570
111 #define CFE_VERSION_MARK_SIZE 5
112 #define CFE_VERSION_SIZE 6 //ODM michaelc, display ODM CFE version
114 #define BOOT_LATEST_IMAGE '0'
115 #define BOOT_PREVIOUS_IMAGE '1'
119 unsigned long ulVersion;
120 char szBootline[NVRAM_BOOTLINE_LEN];
121 char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
122 //unsigned long ulReserved1[2];
123 unsigned char sprom_saved_flag;
124 unsigned char Reserved[7];//reserved
125 unsigned long ulNumMacAddrs;
126 unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
128 unsigned long ulCheckSum;
129 } NVRAM_DATA, *PNVRAM_DATA;
132 /*****************************************************************************/
133 /* board ioctl calls for flash, led and some other utilities */
134 /*****************************************************************************/
137 /* Defines. for board driver */
138 #define BOARD_IOCTL_MAGIC 'B'
139 #define BOARD_DRV_MAJOR 206
141 #define MAC_ADDRESS_ANY (unsigned long) -1
143 #define BOARD_IOCTL_FLASH_INIT \
144 _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
146 #define BOARD_IOCTL_FLASH_WRITE \
147 _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
149 #define BOARD_IOCTL_FLASH_READ \
150 _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
152 #define BOARD_IOCTL_GET_NR_PAGES \
153 _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
155 #define BOARD_IOCTL_DUMP_ADDR \
156 _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
158 #define BOARD_IOCTL_SET_MEMORY \
159 _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
161 #define BOARD_IOCTL_MIPS_SOFT_RESET \
162 _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
164 #define BOARD_IOCTL_LED_CTRL \
165 _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
167 #define BOARD_IOCTL_GET_ID \
168 _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
170 #define BOARD_IOCTL_GET_MAC_ADDRESS \
171 _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
173 #define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
174 _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
176 #define BOARD_IOCTL_GET_PSI_SIZE \
177 _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
179 #define BOARD_IOCTL_GET_SDRAM_SIZE \
180 _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
182 #define BOARD_IOCTL_SET_MONITOR_FD \
183 _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
185 #define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
186 _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
188 #define BOARD_IOCTL_GET_BOOTLINE \
189 _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
191 #define BOARD_IOCTL_SET_BOOTLINE \
192 _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
194 #define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
195 _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
197 #define BOARD_IOCTL_GET_CHIP_ID \
198 _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
200 #define BOARD_IOCTL_GET_NUM_ENET \
201 _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
203 #define BOARD_IOCTL_GET_CFE_VER \
204 _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
206 #define BOARD_IOCTL_GET_ENET_CFG \
207 _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
209 #define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
210 _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
212 #define BOARD_IOCTL_SET_TRIGGER_EVENT \
213 _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
215 #define BOARD_IOCTL_GET_TRIGGER_EVENT \
216 _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
218 #define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
219 _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
221 #define BOARD_IOCTL_SET_SES_LED \
222 _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
224 #define BOARD_IOCTL_GET_VCOPE_GPIO \
225 _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
227 #define BOARD_IOCTL_SET_CS_PAR \
228 _IOWR(BOARD_IOCTL_MAGIC, 28, BOARD_IOCTL_PARMS)
230 #define BOARD_IOCTL_SET_PLL \
231 _IOWR(BOARD_IOCTL_MAGIC, 29, BOARD_IOCTL_PARMS)
233 #define BOARD_IOCTL_SET_GPIO \
234 _IOWR(BOARD_IOCTL_MAGIC, 30, BOARD_IOCTL_PARMS)
236 //swda add,05/17/2006
237 #define BOARD_IOCTL_INFO_BOOT_COMPLETE \
238 _IOWR(BOARD_IOCTL_MAGIC, 40, BOARD_IOCTL_PARMS)
240 #if ODM_AUTO_PROVISION_LAN
241 #define BOARD_IOCTL_AUTO_PROVISION_LAN \
242 _IOWR(BOARD_IOCTL_MAGIC, 41, BOARD_IOCTL_PARMS)
246 #define BOARD_IOCTL_PSTNCALL \
247 _IOWR(BOARD_IOCTL_MAGIC, 42, BOARD_IOCTL_PARMS)
249 #define BOARD_IOCTL_OFFHOOK \
250 _IOWR(BOARD_IOCTL_MAGIC, 43, BOARD_IOCTL_PARMS)
253 #define BOARD_IOCTL_GET_SERIAL_NUMBER \
254 _IOWR(BOARD_IOCTL_MAGIC, 44, BOARD_IOCTL_PARMS)
256 #if DEFAULT_WLAN_WEP128
257 #define BOARD_IOCTL_GET_WEP128_KEY \
258 _IOWR(BOARD_IOCTL_MAGIC, 45, BOARD_IOCTL_PARMS)
262 #define BOARD_IOCTL_SET_LLL_TEST_LED \
263 _IOWR(BOARD_IOCTL_MAGIC, 46, BOARD_IOCTL_PARMS)
266 #if WLAN_ENABLE_CTRL_BUTTON
267 #define BOARD_IOCTL_WLAN_ENABLE_CTRL_BUTTON \
268 _IOWR(BOARD_IOCTL_MAGIC, 47, BOARD_IOCTL_PARMS)
271 #define BOARD_IOCTL_SET_VAR \
272 _IOWR(BOARD_IOCTL_MAGIC, 48, BOARD_IOCTL_PARMS)
275 // for the action in BOARD_IOCTL_PARMS for flash operation
278 /*==== add by Andrew (2004/09/14)====*/
279 #if defined(CFG_XFER_TO_FACDEFLT)
293 } BOARD_IOCTL_ACTION;
296 typedef struct boardIoctParms
302 BOARD_IOCTL_ACTION action; /* flash read/write: nvram, persistent, bcm image */
321 kLedEnd, // NOTE: Insert the new led name before this one. Alway stay at the end.
326 kLedStateOff, /* turn led off */
327 kLedStateOn, /* turn led on */
328 kLedStateFail, /* turn led on red */
329 kLedStateBlinkOnce, /* blink once, ~100ms and ignore the same call during the 100ms period */
330 kLedStateSlowBlinkContinues, /* slow blink continues at ~600ms interval */
331 kLedStateFastBlinkContinues, /* fast blink continues at ~200ms interval */
340 // virtual and physical map pair defined in board.c
341 typedef struct ledmappair
343 BOARD_LED_NAME ledName; // virtual led name
344 BOARD_LED_STATE ledInitState; // initial led state when the board boots.
345 unsigned long ledMask; // physical GPIO pin mask
346 unsigned short ledActiveLow; // reset bit to turn on LED
347 unsigned short ledSerial; // indicated that LED is driven via serial output
348 unsigned long ledMaskFail; // physical GPIO pin mask for state failure
349 unsigned short ledActiveLowFail;// reset bit to turn on LED
350 unsigned short ledSerialFail; // indicated that LED is driven via serial output
351 } LED_MAP_PAIR, *PLED_MAP_PAIR;
353 typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
355 /* Flash storage address information that is determined by the flash driver. */
356 typedef struct flashaddrinfo
358 int flash_persistent_start_blk;
359 int flash_persistent_number_blk;
360 int flash_persistent_length;
361 unsigned long flash_persistent_blk_offset;
362 int flash_scratch_pad_start_blk; // start before psi (SP_BUF_LEN)
363 int flash_scratch_pad_number_blk;
364 int flash_scratch_pad_length;
365 unsigned long flash_scratch_pad_blk_offset;
366 int flash_nvram_start_blk;
367 int flash_nvram_number_blk;
368 int flash_nvram_length;
369 unsigned long flash_nvram_blk_offset;
370 #if defined(CFG_XFER_TO_FACDEFLT)
371 int flash_factdeflt_start_blk;
372 int flash_factdeflt_number_blk;
373 int flash_factdeflt_length;
374 unsigned long flash_factdeflt_blk_offset;
376 } FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
378 // scratch pad defines
379 /* SP - Persisten Scratch Pad format:
382 tokenId-1 len : 4 bytes
386 tokenId-n len : 4 bytes
390 #define MAGIC_NUM_LEN 8
391 #define MAGIC_NUMBER "gOGoBrCm"
392 #define TOKEN_NAME_LEN 16
394 #define SP_MAX_LEN 8 * 1024 // 8k buf before psi
395 #define SP_RESERVERD 20
397 typedef struct _SP_HEADER
399 char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
400 int SPVersion; // version number
401 char SPReserved[SP_RESERVERD]; // reservied, total 32 bytes
402 } SP_HEADER, *PSP_HEADER;
404 typedef struct _TOKEN_DEF
406 char tokenName[TOKEN_NAME_LEN];
408 } SP_TOKEN, *PSP_TOKEN;
410 typedef struct cs_config_pars_tag
420 /*****************************************************************************/
421 /* Function Prototypes */
422 /*****************************************************************************/
423 #if !defined(__ASM_ASM_H)
424 void dumpaddr( unsigned char *pAddr, int nLen );
426 void kerSysFlashAddrInfoGet(PFLASH_ADDR_INFO pflash_addr_info);
427 int kerSysNvRamGet(char *string, int strLen, int offset);
428 int kerSysNvRamSet(char *string, int strLen, int offset);
429 int kerSysPersistentGet(char *string, int strLen, int offset);
430 int kerSysPersistentSet(char *string, int strLen, int offset);
431 int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
432 int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
433 int kerSysScratchPadClearAll(void);
434 int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
435 int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
436 int kerSysReleaseMacAddress( unsigned char *pucaAddr );
437 int kerSysGetSdramSize( void );
438 void kerSysGetBootline(char *string, int strLen);
439 void kerSysSetBootline(char *string, int strLen);
440 void kerSysMipsSoftReset(void);
441 void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
442 void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
443 int kerSysFlashSizeGet(void);
444 int kerSysMemoryMappedFlashSizeGet(void);
445 unsigned long kerSysReadFromFlash( void *toaddr, unsigned long fromaddr,
447 void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
448 void kerSysDeregisterDyingGaspHandler(char *devname);
449 void kerSysWakeupMonitorTask( void );
450 int kerConfigCs(BOARD_IOCTL_PARMS *parms);
451 void kerSetPll(int pll_mask, int pll_value);
452 void kerSetGpio(int gpio, GPIO_STATE_t state);
459 #endif /* _BOARD_H */