2 Madge Ambassador ATM Adapter driver.
3 Copyright (C) 1995-1999 Madge Networks Ltd.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
20 system and in the file COPYING in the Linux kernel source.
23 /* * dedicated to the memory of Graham Gordon 1971-1998 * */
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/ioport.h>
31 #include <linux/atmdev.h>
32 #include <linux/delay.h>
33 #include <linux/interrupt.h>
35 #include <asm/atomic.h>
37 #include <asm/byteorder.h>
39 #include "ambassador.h"
41 #define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
42 #define description_string "Madge ATM Ambassador driver"
43 #define version_string "1.2.4"
45 static inline void __init show_version (void) {
46 printk ("%s version %s\n", description_string, version_string);
53 I Hardware, detection, initialisation and shutdown.
57 This driver is for the PCI ATMizer-based Ambassador card (except
58 very early versions). It is not suitable for the similar EISA "TR7"
59 card. Commercially, both cards are known as Collage Server ATM
62 The loader supports image transfer to the card, image start and few
63 other miscellaneous commands.
65 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
67 The cards are big-endian.
71 Standard PCI stuff, the early cards are detected and rejected.
75 The cards are reset and the self-test results are checked. The
76 microcode image is then transferred and started. This waits for a
77 pointer to a descriptor containing details of the host-based queues
78 and buffers and various parameters etc. Once they are processed
79 normal operations may begin. The BIA is read using a microcode
84 This may be accomplished either by a card reset or via the microcode
85 shutdown command. Further investigation required.
89 The card reset does not affect PCI configuration (good) or the
90 contents of several other "shared run-time registers" (bad) which
91 include doorbell and interrupt control as well as EEPROM and PCI
92 control. The driver must be careful when modifying these registers
93 not to touch bits it does not use and to undo any changes at exit.
99 The adapter is quite intelligent (fast) and has a simple interface
100 (few features). VPI is always zero, 1024 VCIs are supported. There
101 is limited cell rate support. UBR channels can be capped and ABR
102 (explicit rate, but not EFCI) is supported. There is no CBR or VBR
105 1. Driver <-> Adapter Communication
107 Apart from the basic loader commands, the driver communicates
108 through three entities: the command queue (CQ), the transmit queue
109 pair (TXQ) and the receive queue pairs (RXQ). These three entities
110 are set up by the host and passed to the microcode just after it has
113 All queues are host-based circular queues. They are contiguous and
114 (due to hardware limitations) have some restrictions as to their
115 locations in (bus) memory. They are of the "full means the same as
116 empty so don't do that" variety since the adapter uses pointers
119 The queue pairs work as follows: one queue is for supply to the
120 adapter, items in it are pending and are owned by the adapter; the
121 other is the queue for return from the adapter, items in it have
122 been dealt with by the adapter. The host adds items to the supply
123 (TX descriptors and free RX buffer descriptors) and removes items
124 from the return (TX and RX completions). The adapter deals with out
125 of order completions.
127 Interrupts (card to host) and the doorbell (host to card) are used
132 This is to communicate "open VC", "close VC", "get stats" etc. to
133 the adapter. At most one command is retired every millisecond by the
134 card. There is no out of order completion or notification. The
135 driver needs to check the return code of the command, waiting as
140 TX supply items are of variable length (scatter gather support) and
141 so the queue items are (more or less) pointers to the real thing.
142 Each TX supply item contains a unique, host-supplied handle (the skb
143 bus address seems most sensible as this works for Alphas as well,
144 there is no need to do any endian conversions on the handles).
146 TX return items consist of just the handles above.
148 3. RXQ (up to 4 of these with different lengths and buffer sizes)
150 RX supply items consist of a unique, host-supplied handle (the skb
151 bus address again) and a pointer to the buffer data area.
153 RX return items consist of the handle above, the VC, length and a
154 status word. This just screams "oh so easy" doesn't it?
156 Note on RX pool sizes:
158 Each pool should have enough buffers to handle a back-to-back stream
159 of minimum sized frames on a single VC. For example:
161 frame spacing = 3us (about right)
163 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
165 min number of buffers for one VC = 1 + delay/spacing (buffers)
167 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
169 The 20us delay assumes that there is no need to sleep; if we need to
170 sleep to get buffers we are going to drop frames anyway.
172 In fact, each pool should have enough buffers to support the
173 simultaneous reassembly of a separate frame on each VC and cope with
174 the case in which frames complete in round robin cell fashion on
177 Only one frame can complete at each cell arrival, so if "n" VCs are
178 open, the worst case is to have them all complete frames together
179 followed by all starting new frames together.
181 desired number of buffers = n + delay/spacing
183 These are the extreme requirements, however, they are "n+k" for some
184 "k" so we have only the constant to choose. This is the argument
185 rx_lats which current defaults to 7.
187 Actually, "n ? n+k : 0" is better and this is what is implemented,
188 subject to the limit given by the pool size.
192 Simple spinlocks are used around the TX and RX queue mechanisms.
193 Anyone with a faster, working method is welcome to implement it.
195 The adapter command queue is protected with a spinlock. We always
196 wait for commands to complete.
198 A more complex form of locking is used around parts of the VC open
199 and close functions. There are three reasons for a lock: 1. we need
200 to do atomic rate reservation and release (not used yet), 2. Opening
201 sometimes involves two adapter commands which must not be separated
202 by another command on the same VC, 3. the changes to RX pool size
203 must be atomic. The lock needs to work over context switches, so we
206 III Hardware Features and Microcode Bugs
210 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
214 All structures that are not accessed using DMA must be 4-byte
215 aligned (not a problem) and must not cross 4MB boundaries.
217 There is a DMA memory hole at E0000000-E00000FF (groan).
219 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
220 but for a hardware bug).
222 RX buffers (DMA write) must not cross 16MB boundaries and must
223 include spare trailing bytes up to the next 4-byte boundary; they
224 will be written with rubbish.
226 The PLX likes to prefetch; if reading up to 4 u32 past the end of
227 each TX fragment is not a problem, then TX can be made to go a
228 little faster by passing a flag at init that disables a prefetch
229 workaround. We do not pass this flag. (new microcode only)
232 . Note that alloc_skb rounds up size to a 16byte boundary.
233 . Ensure all areas do not traverse 4MB boundaries.
234 . Ensure all areas do not start at a E00000xx bus address.
235 (I cannot be certain, but this may always hold with Linux)
236 . Make all failures cause a loud message.
237 . Discard non-conforming SKBs (causes TX failure or RX fill delay).
238 . Discard non-conforming TX fragment descriptors (the TX fails).
239 In the future we could:
240 . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
241 . Segment TX areas into some/more fragments, when necessary.
242 . Relax checks for non-DMA items (ignore hole).
243 . Give scatter-gather (iovec) requirements using ???. (?)
245 3. VC close is broken (only for new microcode)
247 The VC close adapter microcode command fails to do anything if any
248 frames have been received on the VC but none have been transmitted.
249 Frames continue to be reassembled and passed (with IRQ) to the
256 . Timer code may be broken.
258 . Deal with buggy VC close (somehow) in microcode 12.
260 . Handle interrupted and/or non-blocking writes - is this a job for
263 . Add code to break up TX fragments when they span 4MB boundaries.
265 . Add SUNI phy layer (need to know where SUNI lives on card).
267 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
268 leave extra headroom space for Ambassador TX descriptors.
270 . Understand these elements of struct atm_vcc: recvq (proto?),
271 sleep, callback, listenq, backlog_quota, reply and user_back.
273 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
275 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
277 . Decide whether RX buffer recycling is or can be made completely safe;
278 turn it back on. It looks like Werner is going to axe this.
280 . Implement QoS changes on open VCs (involves extracting parts of VC open
281 and close into separate functions and using them to make changes).
283 . Hack on command queue so that someone can issue multiple commands and wait
284 on the last one (OR only "no-op" or "wait" commands are waited for).
286 . Eliminate need for while-schedule around do_command.
290 /********** microcode **********/
292 #ifdef AMB_NEW_MICROCODE
293 #define UCODE(x) UCODE1(atmsar12.,x)
295 #define UCODE(x) UCODE1(atmsar11.,x)
298 #define UCODE1(x,y) UCODE2(x ## y)
300 static u32 __initdata ucode_start =
301 #include UCODE(start)
304 static region __initdata ucode_regions[] = {
305 #include UCODE(regions)
309 static u32 __initdata ucode_data[] = {
314 /********** globals **********/
316 static amb_dev * amb_devs = NULL;
317 static struct timer_list housekeeping;
319 static unsigned short debug = 0;
320 static unsigned int cmds = 8;
321 static unsigned int txs = 32;
322 static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
323 static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
324 static unsigned int rx_lats = 7;
325 static unsigned char pci_lat = 0;
327 static const unsigned long onegigmask = -1 << 30;
329 /********** access to adapter **********/
331 static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
332 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08x <- %08x", addr, data);
334 dev->membase[addr / sizeof(u32)] = data;
336 outl (data, dev->iobase + addr);
340 static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
342 u32 data = dev->membase[addr / sizeof(u32)];
344 u32 data = inl (dev->iobase + addr);
346 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08x -> %08x", addr, data);
350 static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
351 u32 be = cpu_to_be32 (data);
352 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08x <- %08x b[%08x]", addr, data, be);
354 dev->membase[addr / sizeof(u32)] = be;
356 outl (be, dev->iobase + addr);
360 static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
362 u32 be = dev->membase[addr / sizeof(u32)];
364 u32 be = inl (dev->iobase + addr);
366 u32 data = be32_to_cpu (be);
367 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08x -> %08x b[%08x]", addr, data, be);
371 /********** dump routines **********/
373 static inline void dump_registers (const amb_dev * dev) {
374 #ifdef DEBUG_AMBASSADOR
375 if (debug & DBG_REGS) {
377 PRINTD (DBG_REGS, "reading PLX control: ");
378 for (i = 0x00; i < 0x30; i += sizeof(u32))
380 PRINTD (DBG_REGS, "reading mailboxes: ");
381 for (i = 0x40; i < 0x60; i += sizeof(u32))
383 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
384 for (i = 0x60; i < 0x70; i += sizeof(u32))
393 static inline void dump_loader_block (volatile loader_block * lb) {
394 #ifdef DEBUG_AMBASSADOR
396 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
397 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
398 for (i = 0; i < MAX_COMMAND_DATA; ++i)
399 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
400 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
407 static inline void dump_command (command * cmd) {
408 #ifdef DEBUG_AMBASSADOR
410 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
411 cmd, /*be32_to_cpu*/ (cmd->request));
412 for (i = 0; i < 3; ++i)
413 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
414 PRINTDE (DBG_CMD, "");
421 static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
422 #ifdef DEBUG_AMBASSADOR
424 unsigned char * data = skb->data;
425 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
426 for (i=0; i<skb->len && i < 256;i++)
427 PRINTDM (DBG_DATA, "%02x ", data[i]);
428 PRINTDE (DBG_DATA,"");
437 /********** check memory areas for use by Ambassador **********/
439 /* see limitations under Hardware Features */
441 static inline int check_area (void * start, size_t length) {
442 // assumes length > 0
443 const u32 fourmegmask = -1 << 22;
444 const u32 twofivesixmask = -1 << 8;
445 const u32 starthole = 0xE0000000;
446 u32 startaddress = virt_to_bus (start);
447 u32 lastaddress = startaddress+length-1;
448 if ((startaddress ^ lastaddress) & fourmegmask ||
449 (startaddress & twofivesixmask) == starthole) {
450 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
451 startaddress, lastaddress);
458 /********** free an skb (as per ATM device driver documentation) **********/
460 static inline void amb_kfree_skb (struct sk_buff * skb) {
461 if (ATM_SKB(skb)->vcc->pop) {
462 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
464 dev_kfree_skb_any (skb);
468 /********** TX completion **********/
470 static inline void tx_complete (amb_dev * dev, tx_out * tx) {
471 tx_simple * tx_descr = bus_to_virt (tx->handle);
472 struct sk_buff * skb = tx_descr->skb;
474 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
477 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
479 // free the descriptor
489 /********** RX completion **********/
491 static void rx_complete (amb_dev * dev, rx_out * rx) {
492 struct sk_buff * skb = bus_to_virt (rx->handle);
493 u16 vc = be16_to_cpu (rx->vc);
494 // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
495 u16 status = be16_to_cpu (rx->status);
496 u16 rx_len = be16_to_cpu (rx->length);
498 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
500 // XXX move this in and add to VC stats ???
502 struct atm_vcc * atm_vcc = dev->rxer[vc];
507 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
509 if (atm_charge (atm_vcc, skb->truesize)) {
511 // prepare socket buffer
512 ATM_SKB(skb)->vcc = atm_vcc;
513 skb_put (skb, rx_len);
515 dump_skb ("<<<", vc, skb);
518 atomic_inc(&atm_vcc->stats->rx);
520 // end of our responsability
521 atm_vcc->push (atm_vcc, skb);
525 // someone fix this (message), please!
526 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
527 // drop stats incremented in atm_charge
531 PRINTK (KERN_INFO, "dropped over-size frame");
532 // should we count this?
533 atomic_inc(&atm_vcc->stats->rx_drop);
537 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
538 // this is an adapter bug, only in new version of microcode
542 dev->stats.rx.error++;
543 if (status & CRC_ERR)
544 dev->stats.rx.badcrc++;
545 if (status & LEN_ERR)
546 dev->stats.rx.toolong++;
547 if (status & ABORT_ERR)
548 dev->stats.rx.aborted++;
549 if (status & UNUSED_ERR)
550 dev->stats.rx.unused++;
553 dev_kfree_skb_any (skb);
559 Note on queue handling.
561 Here "give" and "take" refer to queue entries and a queue (pair)
562 rather than frames to or from the host or adapter. Empty frame
563 buffers are given to the RX queue pair and returned unused or
564 containing RX frames. TX frames (well, pointers to TX fragment
565 lists) are given to the TX queue pair, completions are returned.
569 /********** command queue **********/
571 // I really don't like this, but it's the best I can do at the moment
573 // also, the callers are responsible for byte order as the microcode
574 // sometimes does 16-bit accesses (yuk yuk yuk)
576 static int command_do (amb_dev * dev, command * cmd) {
577 amb_cq * cq = &dev->cq;
578 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
580 unsigned long timeout;
582 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
584 if (test_bit (dead, &dev->flags))
587 spin_lock (&cq->lock);
590 if (cq->pending < cq->maximum) {
591 // remember my slot for later
593 PRINTD (DBG_CMD, "command in slot %p", my_slot);
600 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
603 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
605 // prepare to wait for cq->pending milliseconds
606 // effectively one centisecond on i386
607 timeout = (cq->pending*HZ+999)/1000;
609 if (cq->pending > cq->high)
610 cq->high = cq->pending;
611 spin_unlock (&cq->lock);
615 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
616 set_current_state(TASK_UNINTERRUPTIBLE);
617 timeout = schedule_timeout (timeout);
620 // wait for my slot to be reached (all waiters are here or above, until...)
621 while (ptrs->out != my_slot) {
622 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
623 set_current_state(TASK_UNINTERRUPTIBLE);
627 // wait on my slot (... one gets to its slot, and... )
628 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
629 PRINTD (DBG_CMD, "wait: command slot completion");
630 set_current_state(TASK_UNINTERRUPTIBLE);
634 PRINTD (DBG_CMD, "command complete");
635 // update queue (... moves the queue along to the next slot)
636 spin_lock (&cq->lock);
640 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
641 spin_unlock (&cq->lock);
646 spin_unlock (&cq->lock);
652 /********** TX queue pair **********/
654 static inline int tx_give (amb_dev * dev, tx_in * tx) {
655 amb_txq * txq = &dev->txq;
658 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
660 if (test_bit (dead, &dev->flags))
663 spin_lock_irqsave (&txq->lock, flags);
665 if (txq->pending < txq->maximum) {
666 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
670 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
671 // hand over the TX and ring the bell
672 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
673 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
675 if (txq->pending > txq->high)
676 txq->high = txq->pending;
677 spin_unlock_irqrestore (&txq->lock, flags);
681 spin_unlock_irqrestore (&txq->lock, flags);
686 static inline int tx_take (amb_dev * dev) {
687 amb_txq * txq = &dev->txq;
690 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
692 spin_lock_irqsave (&txq->lock, flags);
694 if (txq->pending && txq->out.ptr->handle) {
695 // deal with TX completion
696 tx_complete (dev, txq->out.ptr);
698 txq->out.ptr->handle = 0;
701 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
703 spin_unlock_irqrestore (&txq->lock, flags);
707 spin_unlock_irqrestore (&txq->lock, flags);
712 /********** RX queue pairs **********/
714 static inline int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
715 amb_rxq * rxq = &dev->rxq[pool];
718 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
720 spin_lock_irqsave (&rxq->lock, flags);
722 if (rxq->pending < rxq->maximum) {
723 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
727 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
728 // hand over the RX buffer
729 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
731 spin_unlock_irqrestore (&rxq->lock, flags);
734 spin_unlock_irqrestore (&rxq->lock, flags);
739 static inline int rx_take (amb_dev * dev, unsigned char pool) {
740 amb_rxq * rxq = &dev->rxq[pool];
743 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
745 spin_lock_irqsave (&rxq->lock, flags);
747 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
748 // deal with RX completion
749 rx_complete (dev, rxq->out.ptr);
751 rxq->out.ptr->status = 0;
752 rxq->out.ptr->length = 0;
755 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
757 if (rxq->pending < rxq->low)
758 rxq->low = rxq->pending;
759 spin_unlock_irqrestore (&rxq->lock, flags);
762 if (!rxq->pending && rxq->buffers_wanted)
764 spin_unlock_irqrestore (&rxq->lock, flags);
769 /********** RX Pool handling **********/
771 /* pre: buffers_wanted = 0, post: pending = 0 */
772 static inline void drain_rx_pool (amb_dev * dev, unsigned char pool) {
773 amb_rxq * rxq = &dev->rxq[pool];
775 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
777 if (test_bit (dead, &dev->flags))
780 /* we are not quite like the fill pool routines as we cannot just
781 remove one buffer, we have to remove all of them, but we might as
783 if (rxq->pending > rxq->buffers_wanted) {
785 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
786 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
787 while (command_do (dev, &cmd))
789 /* the pool may also be emptied via the interrupt handler */
790 while (rxq->pending > rxq->buffers_wanted)
791 if (rx_take (dev, pool))
799 static void drain_rx_pools (amb_dev * dev) {
802 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
804 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
805 drain_rx_pool (dev, pool);
811 static inline void fill_rx_pool (amb_dev * dev, unsigned char pool, int priority) {
815 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
817 if (test_bit (dead, &dev->flags))
820 rxq = &dev->rxq[pool];
821 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
823 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
825 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
828 if (check_area (skb->data, skb->truesize)) {
829 dev_kfree_skb_any (skb);
832 // cast needed as there is no %? for pointer differences
833 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
834 skb, skb->head, (long) (skb->end - skb->head));
835 rx.handle = virt_to_bus (skb);
836 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
837 if (rx_give (dev, &rx, pool))
838 dev_kfree_skb_any (skb);
845 // top up all RX pools (can also be called as a bottom half)
846 static void fill_rx_pools (amb_dev * dev) {
849 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
851 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
852 fill_rx_pool (dev, pool, GFP_ATOMIC);
857 /********** enable host interrupts **********/
859 static inline void interrupts_on (amb_dev * dev) {
860 wr_plain (dev, offsetof(amb_mem, interrupt_control),
861 rd_plain (dev, offsetof(amb_mem, interrupt_control))
862 | AMB_INTERRUPT_BITS);
865 /********** disable host interrupts **********/
867 static inline void interrupts_off (amb_dev * dev) {
868 wr_plain (dev, offsetof(amb_mem, interrupt_control),
869 rd_plain (dev, offsetof(amb_mem, interrupt_control))
870 &~ AMB_INTERRUPT_BITS);
873 /********** interrupt handling **********/
875 static void interrupt_handler (int irq, void * dev_id, struct pt_regs * pt_regs) {
876 amb_dev * dev = amb_devs;
879 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
882 PRINTD (DBG_IRQ|DBG_ERR, "irq with NULL dev_id: %d", irq);
885 // Did one of our cards generate the interrupt?
891 // impossible - unless we add the device to our list after both
892 // registering the IRQ handler for it and enabling interrupts, AND
893 // the card generates an IRQ at startup - should not happen again
895 PRINTD (DBG_IRQ, "irq for unknown device: %d", irq);
898 // impossible - unless we have memory corruption of dev or kernel
899 if (irq != dev->irq) {
900 PRINTD (DBG_IRQ|DBG_ERR, "irq mismatch: %d", irq);
905 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
907 // for us or someone else sharing the same interrupt
909 PRINTD (DBG_IRQ, "irq not for me: %d", irq);
914 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
915 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
919 unsigned int irq_work = 0;
921 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
922 while (!rx_take (dev, pool))
924 while (!tx_take (dev))
928 #ifdef FILL_RX_POOLS_IN_BH
929 queue_task (&dev->bh, &tq_immediate);
930 mark_bh (IMMEDIATE_BH);
935 PRINTD (DBG_IRQ, "work done: %u", irq_work);
937 PRINTD (DBG_IRQ|DBG_WARN, "no work done");
941 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
945 /********** don't panic... yeah, right **********/
947 #ifdef DEBUG_AMBASSADOR
948 static void dont_panic (amb_dev * dev) {
949 amb_cq * cq = &dev->cq;
950 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
955 tx_simple * tx_descr;
963 PRINTK (KERN_INFO, "don't panic - putting adapter into reset");
964 wr_plain (dev, offsetof(amb_mem, reset_control),
965 rd_plain (dev, offsetof(amb_mem, reset_control)) | AMB_RESET_BITS);
967 PRINTK (KERN_INFO, "marking all commands complete");
968 for (cmd = ptrs->start; cmd < ptrs->limit; ++cmd)
969 cmd->request = cpu_to_be32 (SRB_COMPLETE);
971 PRINTK (KERN_INFO, "completing all TXs");
974 while (txq->pending--) {
975 if (tx == txq->in.start)
978 tx_descr = bus_to_virt (be32_to_cpu (tx->tx_descr_addr));
979 amb_kfree_skb (tx_descr->skb);
983 PRINTK (KERN_INFO, "freeing all RX buffers");
984 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
985 rxq = &dev->rxq[pool];
987 while (rxq->pending--) {
988 if (rx == rxq->in.start)
991 dev_kfree_skb_any (bus_to_virt (rx->handle));
995 PRINTK (KERN_INFO, "don't panic over - close all VCs and rmmod");
996 set_bit (dead, &dev->flags);
997 restore_flags (flags);
1002 /********** make rate (not quite as much fun as Horizon) **********/
1004 static unsigned int make_rate (unsigned int rate, rounding r,
1005 u16 * bits, unsigned int * actual) {
1006 unsigned char exp = -1; // hush gcc
1007 unsigned int man = -1; // hush gcc
1009 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
1011 // rates in cells per second, ITU format (nasty 16-bit floating-point)
1012 // given 5-bit e and 9-bit m:
1013 // rate = EITHER (1+m/2^9)*2^e OR 0
1014 // bits = EITHER 1<<14 | e<<9 | m OR 0
1015 // (bit 15 is "reserved", bit 14 "non-zero")
1016 // smallest rate is 0 (special representation)
1017 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
1018 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
1019 // simple algorithm:
1020 // find position of top bit, this gives e
1021 // remove top bit and shift (rounding if feeling clever) by 9-e
1023 // ucode bug: please don't set bit 14! so 0 rate not representable
1025 if (rate > 0xffc00000U) {
1026 // larger than largest representable rate
1028 if (r == round_up) {
1036 // representable rate
1041 // invariant: rate = man*2^(exp-31)
1042 while (!(man & (1<<31))) {
1047 // man has top bit set
1048 // rate = (2^31+(man-2^31))*2^(exp-31)
1049 // rate = (1+(man-2^31)/2^31)*2^exp
1051 man &= 0xffffffffU; // a nop on 32-bit systems
1052 // rate = (1+man/2^32)*2^exp
1054 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
1055 // time to lose significance... we want m in the range 0 to 2^9-1
1056 // rounding presents a minor problem... we first decide which way
1057 // we are rounding (based on given rounding direction and possibly
1058 // the bits of the mantissa that are to be discarded).
1067 // check all bits that we are discarding
1068 if (man & (-1>>9)) {
1069 man = (man>>(32-9)) + 1;
1070 if (man == (1<<9)) {
1071 // no need to check for round up outside of range
1076 man = (man>>(32-9));
1080 case round_nearest: {
1081 // check msb that we are discarding
1082 if (man & (1<<(32-9-1))) {
1083 man = (man>>(32-9)) + 1;
1084 if (man == (1<<9)) {
1085 // no need to check for round up outside of range
1090 man = (man>>(32-9));
1097 // zero rate - not representable
1099 if (r == round_down) {
1108 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
1111 *bits = /* (1<<14) | */ (exp<<9) | man;
1114 *actual = (exp >= 9)
1115 ? (1 << exp) + (man << (exp-9))
1116 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
1121 /********** Linux ATM Operations **********/
1123 // some are not yet implemented while others do not make sense for
1126 /********** Open a VC **********/
1128 static int amb_open (struct atm_vcc * atm_vcc, short vpi, int vci) {
1131 struct atm_qos * qos;
1132 struct atm_trafprm * txtp;
1133 struct atm_trafprm * rxtp;
1135 u16 tx_vc_bits = -1; // hush gcc
1136 u16 tx_frame_bits = -1; // hush gcc
1138 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1140 unsigned char pool = -1; // hush gcc
1142 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
1144 #ifdef ATM_VPI_UNSPEC
1145 // UNSPEC is deprecated, remove this code eventually
1146 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
1147 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
1152 // deal with possibly wildcarded VCs
1153 error = atm_find_ci (atm_vcc, &vpi, &vci);
1155 PRINTD (DBG_WARN|DBG_VCC, "atm_find_ci failed!");
1158 PRINTD (DBG_VCC, "atm_find_ci gives %x %x", vpi, vci);
1160 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
1161 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
1162 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
1166 qos = &atm_vcc->qos;
1168 if (qos->aal != ATM_AAL5) {
1169 PRINTD (DBG_QOS, "AAL not supported");
1173 // traffic parameters
1175 PRINTD (DBG_QOS, "TX:");
1177 if (txtp->traffic_class != ATM_NONE) {
1178 switch (txtp->traffic_class) {
1180 // we take "the PCR" as a rate-cap
1181 int pcr = atm_pcr_goal (txtp);
1185 tx_vc_bits = TX_UBR;
1186 tx_frame_bits = TX_FRAME_NOTCAP;
1195 error = make_rate (pcr, r, &tx_rate_bits, 0);
1196 tx_vc_bits = TX_UBR_CAPPED;
1197 tx_frame_bits = TX_FRAME_CAPPED;
1203 pcr = atm_pcr_goal (txtp);
1204 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1209 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1210 PRINTD (DBG_QOS, "request for non-UBR denied");
1214 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
1215 tx_rate_bits, tx_vc_bits);
1218 PRINTD (DBG_QOS, "RX:");
1220 if (rxtp->traffic_class == ATM_NONE) {
1223 // choose an RX pool (arranged in increasing size)
1224 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1225 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
1226 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
1227 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
1230 if (pool == NUM_RX_POOLS) {
1231 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
1232 "no pool suitable for VC (RX max_sdu %d is too large)",
1237 switch (rxtp->traffic_class) {
1243 pcr = atm_pcr_goal (rxtp);
1244 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1249 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1250 PRINTD (DBG_QOS, "request for non-UBR denied");
1256 // get space for our vcc stuff
1257 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
1259 PRINTK (KERN_ERR, "out of memory!");
1262 atm_vcc->dev_data = (void *) vcc;
1264 // no failures beyond this point
1266 // we are not really "immediately before allocating the connection
1267 // identifier in hardware", but it will just have to do!
1268 set_bit(ATM_VF_ADDR,&atm_vcc->flags);
1270 if (txtp->traffic_class != ATM_NONE) {
1273 vcc->tx_frame_bits = tx_frame_bits;
1275 down (&dev->vcc_sf);
1276 if (dev->rxer[vci]) {
1277 // RXer on the channel already, just modify rate...
1278 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1279 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1280 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1281 while (command_do (dev, &cmd))
1283 // ... and TX flags, preserving the RX pool
1284 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1285 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1286 cmd.args.modify_flags.flags = cpu_to_be32
1287 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
1288 | (tx_vc_bits << SRB_FLAGS_SHIFT) );
1289 while (command_do (dev, &cmd))
1292 // no RXer on the channel, just open (with pool zero)
1293 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1294 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1295 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
1296 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1297 while (command_do (dev, &cmd))
1300 dev->txer[vci].tx_present = 1;
1304 if (rxtp->traffic_class != ATM_NONE) {
1307 vcc->rx_info.pool = pool;
1309 down (&dev->vcc_sf);
1310 /* grow RX buffer pool */
1311 if (!dev->rxq[pool].buffers_wanted)
1312 dev->rxq[pool].buffers_wanted = rx_lats;
1313 dev->rxq[pool].buffers_wanted += 1;
1314 fill_rx_pool (dev, pool, GFP_KERNEL);
1316 if (dev->txer[vci].tx_present) {
1317 // TXer on the channel already
1318 // switch (from pool zero) to this pool, preserving the TX bits
1319 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1320 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1321 cmd.args.modify_flags.flags = cpu_to_be32
1322 ( (pool << SRB_POOL_SHIFT)
1323 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
1325 // no TXer on the channel, open the VC (with no rate info)
1326 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1327 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1328 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
1329 cmd.args.open.rate = cpu_to_be32 (0);
1331 while (command_do (dev, &cmd))
1333 // this link allows RX frames through
1334 dev->rxer[vci] = atm_vcc;
1338 // set elements of vcc
1339 atm_vcc->vpi = vpi; // 0
1342 // indicate readiness
1343 set_bit(ATM_VF_READY,&atm_vcc->flags);
1348 /********** Close a VC **********/
1350 static void amb_close (struct atm_vcc * atm_vcc) {
1351 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1352 amb_vcc * vcc = AMB_VCC (atm_vcc);
1353 u16 vci = atm_vcc->vci;
1355 PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
1357 // indicate unreadiness
1358 clear_bit(ATM_VF_READY,&atm_vcc->flags);
1361 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
1364 down (&dev->vcc_sf);
1365 if (dev->rxer[vci]) {
1366 // RXer still on the channel, just modify rate... XXX not really needed
1367 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1368 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1369 cmd.args.modify_rate.rate = cpu_to_be32 (0);
1370 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
1372 // no RXer on the channel, close channel
1373 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1374 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1376 dev->txer[vci].tx_present = 0;
1377 while (command_do (dev, &cmd))
1383 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
1386 // this is (the?) one reason why we need the amb_vcc struct
1387 unsigned char pool = vcc->rx_info.pool;
1389 down (&dev->vcc_sf);
1390 if (dev->txer[vci].tx_present) {
1391 // TXer still on the channel, just go to pool zero XXX not really needed
1392 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1393 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1394 cmd.args.modify_flags.flags = cpu_to_be32
1395 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
1397 // no TXer on the channel, close the VC
1398 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1399 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1401 // forget the rxer - no more skbs will be pushed
1402 if (atm_vcc != dev->rxer[vci])
1403 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
1404 "arghhh! we're going to die!",
1405 vcc, dev->rxer[vci]);
1407 while (command_do (dev, &cmd))
1410 /* shrink RX buffer pool */
1411 dev->rxq[pool].buffers_wanted -= 1;
1412 if (dev->rxq[pool].buffers_wanted == rx_lats) {
1413 dev->rxq[pool].buffers_wanted = 0;
1414 drain_rx_pool (dev, pool);
1419 // free our structure
1422 // say the VPI/VCI is free again
1423 clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
1428 /********** Debug
\17Ioctl **********/
1431 static int amb_ioctl (struct atm_dev * dev, unsigned int cmd, void * arg) {
1432 unsigned short newdebug;
1433 if (cmd == AMB_SETDEBUG) {
1434 if (!capable(CAP_NET_ADMIN))
1436 if (copy_from_user (&newdebug, arg, sizeof(newdebug))) {
1443 } else if (cmd == AMB_DONTPANIC) {
1444 if (!capable(CAP_NET_ADMIN))
1449 return -ENOIOCTLCMD;
1454 /********** Set socket options for a VC **********/
1456 // int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1458 /********** Set socket options for a VC **********/
1460 // int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1462 /********** Send **********/
1464 static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1465 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1466 amb_vcc * vcc = AMB_VCC(atm_vcc);
1467 u16 vc = atm_vcc->vci;
1468 unsigned int tx_len = skb->len;
1469 unsigned char * tx_data = skb->data;
1470 tx_simple * tx_descr;
1473 if (test_bit (dead, &dev->flags))
1476 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
1477 vc, tx_data, tx_len);
1479 dump_skb (">>>", vc, skb);
1481 if (!dev->txer[vc].tx_present) {
1482 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
1486 // this is a driver private field so we have to set it ourselves,
1487 // despite the fact that we are _required_ to use it to check for a
1489 ATM_SKB(skb)->vcc = atm_vcc;
1491 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
1492 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
1496 if (check_area (skb->data, skb->len)) {
1497 atomic_inc(&atm_vcc->stats->tx_err);
1498 return -ENOMEM; // ?
1501 // allocate memory for fragments
1502 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
1504 PRINTK (KERN_ERR, "could not allocate TX descriptor");
1507 if (check_area (tx_descr, sizeof(tx_simple))) {
1511 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
1513 tx_descr->skb = skb;
1515 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
1516 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
1518 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
1519 tx_descr->tx_frag_end.vc = 0;
1520 tx_descr->tx_frag_end.next_descriptor_length = 0;
1521 tx_descr->tx_frag_end.next_descriptor = 0;
1522 #ifdef AMB_NEW_MICROCODE
1523 tx_descr->tx_frag_end.cpcs_uu = 0;
1524 tx_descr->tx_frag_end.cpi = 0;
1525 tx_descr->tx_frag_end.pad = 0;
1528 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
1529 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
1530 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
1532 #ifdef DEBUG_AMBASSADOR
1536 unsigned short d = 0;
1537 char * s = skb->data;
1540 for (i = 0; i < 4; ++i) {
1541 d = (d<<4) | ((*s <= '9') ? (*s - '0') : (*s - 'a' + 10));
1544 PRINTK (KERN_INFO, "debug bitmap is now %hx", debug = d);
1548 if (*s++ == 'e' && *s++ == 's' && *s++ == 'e' && *s++ == 't')
1559 while (tx_give (dev, &tx))
1564 /********** Scatter Gather Send Capability **********/
1566 static int amb_sg_send (struct atm_vcc * atm_vcc,
1567 unsigned long start,
1568 unsigned long size) {
1569 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: never");
1571 if (atm_vcc->qos.aal == ATM_AAL5) {
1572 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: yes");
1575 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: no");
1578 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: always");
1582 /********** Send OAM **********/
1584 // static int amb_send_oam (struct atm_vcc * atm_vcc, void * cell, int flags);
1586 /********** Feedback to Driver **********/
1588 // void amb_feedback (struct atm_vcc * atm_vcc, struct sk_buff * skb,
1589 // unsigned long start, unsigned long dest, int len);
1591 /********** Change QoS on a VC **********/
1593 // int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
1595 /********** Free RX Socket Buffer **********/
1598 static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1599 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1600 amb_vcc * vcc = AMB_VCC (atm_vcc);
1601 unsigned char pool = vcc->rx_info.pool;
1604 // This may be unsafe for various reasons that I cannot really guess
1605 // at. However, I note that the ATM layer calls kfree_skb rather
1606 // than dev_kfree_skb at this point so we are least covered as far
1607 // as buffer locking goes. There may be bugs if pcap clones RX skbs.
1609 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
1612 rx.handle = virt_to_bus (skb);
1613 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
1615 skb->data = skb->head;
1616 skb->tail = skb->head;
1619 if (!rx_give (dev, &rx, pool)) {
1621 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
1625 // just do what the ATM layer would have done
1626 dev_kfree_skb_any (skb);
1632 /********** Proc File Output **********/
1634 static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
1635 amb_dev * dev = AMB_DEV (atm_dev);
1639 PRINTD (DBG_FLOW, "amb_proc_read");
1641 /* more diagnostics here? */
1644 amb_stats * s = &dev->stats;
1645 return sprintf (page,
1646 "frames: TX OK %lu, RX OK %lu, RX bad %lu "
1647 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
1648 s->tx_ok, s->rx.ok, s->rx.error,
1649 s->rx.badcrc, s->rx.toolong,
1650 s->rx.aborted, s->rx.unused);
1654 amb_cq * c = &dev->cq;
1655 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
1656 c->pending, c->high, c->maximum);
1660 amb_txq * t = &dev->txq;
1661 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
1662 t->pending, t->maximum, t->high, t->filled);
1666 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
1667 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1668 amb_rxq * r = &dev->rxq[pool];
1669 count += sprintf (page+count, " %u/%u/%u %u %u",
1670 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
1672 count += sprintf (page+count, ".\n");
1677 unsigned int count = sprintf (page, "RX buffer sizes:");
1678 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1679 amb_rxq * r = &dev->rxq[pool];
1680 count += sprintf (page+count, " %u", r->buffer_size);
1682 count += sprintf (page+count, ".\n");
1695 /********** Operation Structure **********/
1697 static const struct atmdev_ops amb_ops = {
1701 sg_send: amb_sg_send,
1702 proc_read: amb_proc_read,
1706 /********** housekeeping **********/
1708 static inline void set_timer (struct timer_list * timer, unsigned long delay) {
1709 timer->expires = jiffies + delay;
1714 static void do_housekeeping (unsigned long arg) {
1715 amb_dev * dev = amb_devs;
1716 // data is set to zero at module unload
1719 if (housekeeping.data) {
1722 // could collect device-specific (not driver/atm-linux) stats here
1724 // last resort refill once every ten seconds
1725 fill_rx_pools (dev);
1729 set_timer (&housekeeping, 10*HZ);
1735 /********** creation of communication queues **********/
1737 static int __init create_queues (amb_dev * dev, unsigned int cmds,
1738 unsigned int txs, unsigned int * rxs,
1739 unsigned int * rx_buffer_sizes) {
1745 PRINTD (DBG_FLOW, "create_queues %p", dev);
1747 total += cmds * sizeof(command);
1749 total += txs * (sizeof(tx_in) + sizeof(tx_out));
1751 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1752 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
1754 memory = kmalloc (total, GFP_KERNEL);
1756 PRINTK (KERN_ERR, "could not allocate queues");
1759 if (check_area (memory, total)) {
1760 PRINTK (KERN_ERR, "queues allocated in nasty area");
1765 limit = memory + total;
1766 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
1768 PRINTD (DBG_CMD, "command queue at %p", memory);
1771 command * cmd = memory;
1772 amb_cq * cq = &dev->cq;
1776 cq->maximum = cmds - 1;
1778 cq->ptrs.start = cmd;
1781 cq->ptrs.limit = cmd + cmds;
1783 memory = cq->ptrs.limit;
1786 PRINTD (DBG_TX, "TX queue pair at %p", memory);
1789 tx_in * in = memory;
1791 amb_txq * txq = &dev->txq;
1796 txq->maximum = txs - 1;
1800 txq->in.limit = in + txs;
1802 memory = txq->in.limit;
1805 txq->out.start = out;
1807 txq->out.limit = out + txs;
1809 memory = txq->out.limit;
1812 PRINTD (DBG_RX, "RX queue pairs at %p", memory);
1814 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1815 rx_in * in = memory;
1817 amb_rxq * rxq = &dev->rxq[pool];
1819 rxq->buffer_size = rx_buffer_sizes[pool];
1820 rxq->buffers_wanted = 0;
1823 rxq->low = rxs[pool] - 1;
1825 rxq->maximum = rxs[pool] - 1;
1829 rxq->in.limit = in + rxs[pool];
1831 memory = rxq->in.limit;
1834 rxq->out.start = out;
1836 rxq->out.limit = out + rxs[pool];
1838 memory = rxq->out.limit;
1841 if (memory == limit) {
1844 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
1845 kfree (limit - total);
1851 /********** destruction of communication queues **********/
1853 static void destroy_queues (amb_dev * dev) {
1854 // all queues assumed empty
1855 void * memory = dev->cq.ptrs.start;
1856 // includes txq.in, txq.out, rxq[].in and rxq[].out
1858 PRINTD (DBG_FLOW, "destroy_queues %p", dev);
1860 PRINTD (DBG_INIT, "freeing queues at %p", memory);
1866 /********** basic loader commands and error handling **********/
1868 static int __init do_loader_command (volatile loader_block * lb,
1869 const amb_dev * dev, loader_command cmd) {
1870 // centisecond timeouts - guessing away here
1871 unsigned int command_timeouts [] = {
1872 [host_memory_test] = 15,
1873 [read_adapter_memory] = 2,
1874 [write_adapter_memory] = 2,
1875 [adapter_start] = 50,
1876 [get_version_number] = 10,
1877 [interrupt_host] = 1,
1878 [flash_erase_sector] = 1,
1879 [adap_download_block] = 1,
1880 [adap_erase_flash] = 1,
1881 [adap_run_in_iram] = 1,
1882 [adap_end_download] = 1
1885 unsigned int command_successes [] = {
1886 [host_memory_test] = COMMAND_PASSED_TEST,
1887 [read_adapter_memory] = COMMAND_READ_DATA_OK,
1888 [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
1889 [adapter_start] = COMMAND_COMPLETE,
1890 [get_version_number] = COMMAND_COMPLETE,
1891 [interrupt_host] = COMMAND_COMPLETE,
1892 [flash_erase_sector] = COMMAND_COMPLETE,
1893 [adap_download_block] = COMMAND_COMPLETE,
1894 [adap_erase_flash] = COMMAND_COMPLETE,
1895 [adap_run_in_iram] = COMMAND_COMPLETE,
1896 [adap_end_download] = COMMAND_COMPLETE
1899 int decode_loader_result (loader_command cmd, u32 result) {
1903 if (result == command_successes[cmd])
1909 msg = "bad command";
1911 case COMMAND_IN_PROGRESS:
1913 msg = "command in progress";
1915 case COMMAND_PASSED_TEST:
1917 msg = "command passed test";
1919 case COMMAND_FAILED_TEST:
1921 msg = "command failed test";
1923 case COMMAND_READ_DATA_OK:
1925 msg = "command read data ok";
1927 case COMMAND_READ_BAD_ADDRESS:
1929 msg = "command read bad address";
1931 case COMMAND_WRITE_DATA_OK:
1933 msg = "command write data ok";
1935 case COMMAND_WRITE_BAD_ADDRESS:
1937 msg = "command write bad address";
1939 case COMMAND_WRITE_FLASH_FAILURE:
1941 msg = "command write flash failure";
1943 case COMMAND_COMPLETE:
1945 msg = "command complete";
1947 case COMMAND_FLASH_ERASE_FAILURE:
1949 msg = "command flash erase failure";
1951 case COMMAND_WRITE_BAD_DATA:
1953 msg = "command write bad data";
1957 msg = "unknown error";
1958 PRINTD (DBG_LOAD|DBG_ERR, "decode_loader_result got %d=%x !",
1963 PRINTK (KERN_ERR, "%s", msg);
1967 unsigned long timeout;
1969 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
1973 Set the return value to zero, set the command type and set the
1974 valid entry to the right magic value. The payload is already
1975 correctly byte-ordered so we leave it alone. Hit the doorbell
1976 with the bus address of this structure.
1981 lb->command = cpu_to_be32 (cmd);
1982 lb->valid = cpu_to_be32 (DMA_VALID);
1983 // dump_registers (dev);
1984 // dump_loader_block (lb);
1985 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
1987 timeout = command_timeouts[cmd] * HZ/100;
1989 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
1991 set_current_state(TASK_UNINTERRUPTIBLE);
1992 timeout = schedule_timeout (timeout);
1994 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
1995 dump_registers (dev);
1996 dump_loader_block (lb);
2000 if (cmd == adapter_start) {
2001 // wait for start command to acknowledge...
2003 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2005 timeout = schedule_timeout (timeout);
2007 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
2008 be32_to_cpu (lb->result));
2009 dump_registers (dev);
2014 return decode_loader_result (cmd, be32_to_cpu (lb->result));
2019 /* loader: determine loader version */
2021 static int __init get_loader_version (loader_block * lb,
2022 const amb_dev * dev, u32 * version) {
2025 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
2027 res = do_loader_command (lb, dev, get_version_number);
2031 *version = be32_to_cpu (lb->payload.version);
2035 /* loader: write memory data blocks */
2037 static int __init loader_write (loader_block * lb,
2038 const amb_dev * dev, const u32 * data,
2039 u32 address, unsigned int count) {
2041 transfer_block * tb = &lb->payload.transfer;
2043 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
2045 if (count > MAX_TRANSFER_DATA)
2047 tb->address = cpu_to_be32 (address);
2048 tb->count = cpu_to_be32 (count);
2049 for (i = 0; i < count; ++i)
2050 tb->data[i] = cpu_to_be32 (data[i]);
2051 return do_loader_command (lb, dev, write_adapter_memory);
2054 /* loader: verify memory data blocks */
2056 static int __init loader_verify (loader_block * lb,
2057 const amb_dev * dev, const u32 * data,
2058 u32 address, unsigned int count) {
2060 transfer_block * tb = &lb->payload.transfer;
2063 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
2065 if (count > MAX_TRANSFER_DATA)
2067 tb->address = cpu_to_be32 (address);
2068 tb->count = cpu_to_be32 (count);
2069 res = do_loader_command (lb, dev, read_adapter_memory);
2071 for (i = 0; i < count; ++i)
2072 if (tb->data[i] != cpu_to_be32 (data[i])) {
2079 /* loader: start microcode */
2081 static int __init loader_start (loader_block * lb,
2082 const amb_dev * dev, u32 address) {
2083 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
2085 lb->payload.start = cpu_to_be32 (address);
2086 return do_loader_command (lb, dev, adapter_start);
2089 /********** reset card **********/
2091 static int amb_reset (amb_dev * dev, int diags) {
2094 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
2096 word = rd_plain (dev, offsetof(amb_mem, reset_control));
2097 // put card into reset state
2098 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
2099 // wait a short while
2102 // put card into known good state
2103 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
2104 // clear all interrupts just in case
2105 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
2107 // clear self-test done flag
2108 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
2109 // take card out of reset state
2110 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
2113 unsigned long timeout;
2117 set_current_state(TASK_UNINTERRUPTIBLE);
2118 timeout = schedule_timeout (timeout);
2120 // half second time-out
2122 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
2124 set_current_state(TASK_UNINTERRUPTIBLE);
2125 timeout = schedule_timeout (timeout);
2127 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
2131 // get results of self-test
2132 // XXX double check byte-order
2133 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
2134 if (word & SELF_TEST_FAILURE) {
2135 void sf (const char * msg) {
2136 PRINTK (KERN_ERR, "self-test failed: %s", msg);
2138 if (word & GPINT_TST_FAILURE)
2140 if (word & SUNI_DATA_PATTERN_FAILURE)
2141 sf ("SUNI data pattern");
2142 if (word & SUNI_DATA_BITS_FAILURE)
2143 sf ("SUNI data bits");
2144 if (word & SUNI_UTOPIA_FAILURE)
2145 sf ("SUNI UTOPIA interface");
2146 if (word & SUNI_FIFO_FAILURE)
2147 sf ("SUNI cell buffer FIFO");
2148 if (word & SRAM_FAILURE)
2150 // better return value?
2158 /********** transfer and start the microcode **********/
2160 static int __init ucode_init (loader_block * lb, amb_dev * dev) {
2162 unsigned int total = 0;
2163 const u32 * pointer = ucode_data;
2168 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
2170 while (address = ucode_regions[i].start,
2171 count = ucode_regions[i].count) {
2172 PRINTD (DBG_LOAD, "starting region (%x, %u)", address, count);
2175 if (count <= MAX_TRANSFER_DATA)
2178 words = MAX_TRANSFER_DATA;
2180 res = loader_write (lb, dev, pointer, address, words);
2183 res = loader_verify (lb, dev, pointer, address, words);
2187 address += sizeof(u32) * words;
2192 if (*pointer == 0xdeadbeef) {
2193 return loader_start (lb, dev, ucode_start);
2195 // cast needed as there is no %? for pointer differnces
2196 PRINTD (DBG_LOAD|DBG_ERR,
2197 "offset=%li, *pointer=%x, address=%x, total=%u",
2198 (long) (pointer - ucode_data), *pointer, address, total);
2199 PRINTK (KERN_ERR, "incorrect microcode data");
2204 /********** give adapter parameters **********/
2206 static int __init amb_talk (amb_dev * dev) {
2209 unsigned long timeout;
2211 u32 x (void * addr) {
2212 return cpu_to_be32 (virt_to_bus (addr));
2215 PRINTD (DBG_FLOW, "amb_talk %p", dev);
2217 a.command_start = x (dev->cq.ptrs.start);
2218 a.command_end = x (dev->cq.ptrs.limit);
2219 a.tx_start = x (dev->txq.in.start);
2220 a.tx_end = x (dev->txq.in.limit);
2221 a.txcom_start = x (dev->txq.out.start);
2222 a.txcom_end = x (dev->txq.out.limit);
2224 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
2225 // the other "a" items are set up by the adapter
2226 a.rec_struct[pool].buffer_start = x (dev->rxq[pool].in.start);
2227 a.rec_struct[pool].buffer_end = x (dev->rxq[pool].in.limit);
2228 a.rec_struct[pool].rx_start = x (dev->rxq[pool].out.start);
2229 a.rec_struct[pool].rx_end = x (dev->rxq[pool].out.limit);
2230 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
2233 #ifdef AMB_NEW_MICROCODE
2234 // disable fast PLX prefetching
2238 // pass the structure
2239 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
2241 // 2.2 second wait (must not touch doorbell during 2 second DMA test)
2244 timeout = schedule_timeout (timeout);
2245 // give the adapter another half second?
2247 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2249 timeout = schedule_timeout (timeout);
2251 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
2258 // get microcode version
2259 static void __init amb_ucode_version (amb_dev * dev) {
2263 cmd.request = cpu_to_be32 (SRB_GET_VERSION);
2264 while (command_do (dev, &cmd)) {
2265 set_current_state(TASK_UNINTERRUPTIBLE);
2268 major = be32_to_cpu (cmd.args.version.major);
2269 minor = be32_to_cpu (cmd.args.version.minor);
2270 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
2273 // get end station address
2274 static void __init amb_esi (amb_dev * dev, u8 * esi) {
2279 // swap bits within byte to get Ethernet ordering
2280 u8 bit_swap (u8 byte) {
2287 return ((swap[byte & 0xf]<<4) | swap[byte>>4]);
2290 cmd.request = cpu_to_be32 (SRB_GET_BIA);
2291 while (command_do (dev, &cmd)) {
2292 set_current_state(TASK_UNINTERRUPTIBLE);
2295 lower4 = be32_to_cpu (cmd.args.bia.lower4);
2296 upper2 = be32_to_cpu (cmd.args.bia.upper2);
2297 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
2302 PRINTDB (DBG_INIT, "ESI:");
2303 for (i = 0; i < ESI_LEN; ++i) {
2305 esi[i] = bit_swap (lower4>>(8*i));
2307 esi[i] = bit_swap (upper2>>(8*(i-4)));
2308 PRINTDM (DBG_INIT, " %02x", esi[i]);
2311 PRINTDE (DBG_INIT, "");
2317 static int __init amb_init (amb_dev * dev) {
2320 void fixup_plx_window (void) {
2321 // fix up the PLX-mapped window base address to match the block
2324 blb = virt_to_bus (&lb);
2325 // the kernel stack had better not ever cross a 1Gb boundary!
2326 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
2327 mapreg &= ~onegigmask;
2328 mapreg |= blb & onegigmask;
2329 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
2335 if (amb_reset (dev, 1)) {
2336 PRINTK (KERN_ERR, "card reset failed!");
2338 fixup_plx_window ();
2340 if (get_loader_version (&lb, dev, &version)) {
2341 PRINTK (KERN_INFO, "failed to get loader version");
2343 PRINTK (KERN_INFO, "loader version is %08x", version);
2345 if (ucode_init (&lb, dev)) {
2346 PRINTK (KERN_ERR, "microcode failure");
2347 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
2348 PRINTK (KERN_ERR, "failed to get memory for queues");
2351 if (amb_talk (dev)) {
2352 PRINTK (KERN_ERR, "adapter did not accept queues");
2355 amb_ucode_version (dev);
2360 destroy_queues (dev);
2361 } /* create_queues, ucode_init */
2364 } /* get_loader_version */
2371 static int __init amb_probe (void) {
2372 struct pci_dev * pci_dev;
2375 void __init do_pci_device (void) {
2378 // read resources from PCI configuration space
2379 u8 irq = pci_dev->irq;
2380 u32 * membase = bus_to_virt (pci_resource_start (pci_dev, 0));
2381 u32 iobase = pci_resource_start (pci_dev, 1);
2383 void setup_dev (void) {
2385 memset (dev, 0, sizeof(amb_dev));
2387 // set up known dev items straight away
2388 dev->pci_dev = pci_dev;
2390 dev->iobase = iobase;
2392 dev->membase = membase;
2394 // flags (currently only dead)
2397 // Allocate cell rates (fibre)
2398 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
2399 // to be really pedantic, this should be ATM_OC3c_PCR
2400 dev->tx_avail = ATM_OC3_PCR;
2401 dev->rx_avail = ATM_OC3_PCR;
2403 #ifdef FILL_RX_POOLS_IN_BH
2404 // initialise bottom half
2405 INIT_LIST_HEAD(&dev->bh.list);
2407 dev->bh.routine = (void (*)(void *)) fill_rx_pools;
2411 // semaphore for txer/rxer modifications - we cannot use a
2412 // spinlock as the critical region needs to switch processes
2413 init_MUTEX (&dev->vcc_sf);
2414 // queue manipulation spinlocks; we want atomic reads and
2415 // writes to the queue descriptors (handles IRQ and SMP)
2416 // consider replacing "int pending" -> "atomic_t available"
2417 // => problem related to who gets to move queue pointers
2418 spin_lock_init (&dev->cq.lock);
2419 spin_lock_init (&dev->txq.lock);
2420 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2421 spin_lock_init (&dev->rxq[pool].lock);
2424 void setup_pci_dev (void) {
2427 /* XXX check return value */
2428 pci_enable_device (pci_dev);
2430 // enable bus master accesses
2431 pci_set_master (pci_dev);
2433 // frobnicate latency (upwards, usually)
2434 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
2436 PRINTD (DBG_INIT, "%s PCI latency timer from %hu to %hu",
2437 "changing", lat, pci_lat);
2438 pci_write_config_byte (pci_dev, PCI_LATENCY_TIMER, pci_lat);
2439 } else if (lat < MIN_PCI_LATENCY) {
2440 PRINTK (KERN_INFO, "%s PCI latency timer from %hu to %hu",
2441 "increasing", lat, MIN_PCI_LATENCY);
2442 pci_write_config_byte (pci_dev, PCI_LATENCY_TIMER, MIN_PCI_LATENCY);
2446 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
2447 " IO %x, IRQ %u, MEM %p", iobase, irq, membase);
2450 if (check_region (iobase, AMB_EXTENT)) {
2451 PRINTK (KERN_ERR, "IO range already in use!");
2455 dev = kmalloc (sizeof(amb_dev), GFP_KERNEL);
2457 // perhaps we should be nice: deregister all adapters and abort?
2458 PRINTK (KERN_ERR, "out of memory!");
2464 if (amb_init (dev)) {
2465 PRINTK (KERN_ERR, "adapter initialisation failure");
2470 // grab (but share) IRQ and install handler
2471 if (request_irq (irq, interrupt_handler, SA_SHIRQ, DEV_LABEL, dev)) {
2472 PRINTK (KERN_ERR, "request IRQ failed!");
2473 // free_irq is at "endif"
2476 // reserve IO region
2477 request_region (iobase, AMB_EXTENT, DEV_LABEL);
2479 dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL);
2480 if (!dev->atm_dev) {
2481 PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
2484 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
2485 dev->atm_dev->number, dev, dev->atm_dev);
2486 dev->atm_dev->dev_data = (void *) dev;
2488 // register our address
2489 amb_esi (dev, dev->atm_dev->esi);
2491 // 0 bits for vpi, 10 bits for vci
2492 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
2493 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
2495 // update count and linked list
2497 dev->prev = amb_devs;
2500 // enable host interrupts
2501 interrupts_on (dev);
2506 // not currently reached
2507 atm_dev_deregister (dev->atm_dev);
2508 } /* atm_dev_register */
2510 release_region (iobase, AMB_EXTENT);
2511 free_irq (irq, dev);
2512 } /* request_region, request_irq */
2518 } /* kmalloc, end-of-fn */
2520 PRINTD (DBG_FLOW, "amb_probe");
2527 while ((pci_dev = pci_find_device
2528 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, pci_dev)
2533 while ((pci_dev = pci_find_device
2534 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, pci_dev)
2536 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2541 static void __init amb_check_args (void) {
2543 unsigned int max_rx_size;
2545 #ifdef DEBUG_AMBASSADOR
2546 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
2549 PRINTK (KERN_NOTICE, "no debugging support");
2552 if (cmds < MIN_QUEUE_SIZE)
2553 PRINTK (KERN_NOTICE, "cmds has been raised to %u",
2554 cmds = MIN_QUEUE_SIZE);
2556 if (txs < MIN_QUEUE_SIZE)
2557 PRINTK (KERN_NOTICE, "txs has been raised to %u",
2558 txs = MIN_QUEUE_SIZE);
2560 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2561 if (rxs[pool] < MIN_QUEUE_SIZE)
2562 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
2563 pool, rxs[pool] = MIN_QUEUE_SIZE);
2565 // buffers sizes should be greater than zero and strictly increasing
2567 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2568 if (rxs_bs[pool] <= max_rx_size)
2569 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
2570 pool, rxs_bs[pool]);
2572 max_rx_size = rxs_bs[pool];
2574 if (rx_lats < MIN_RX_BUFFERS)
2575 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
2576 rx_lats = MIN_RX_BUFFERS);
2581 /********** module stuff **********/
2586 MODULE_AUTHOR(maintainer_string);
2587 MODULE_DESCRIPTION(description_string);
2588 MODULE_LICENSE("GPL");
2589 MODULE_PARM(debug, "h");
2590 MODULE_PARM(cmds, "i");
2591 MODULE_PARM(txs, "i");
2592 MODULE_PARM(rxs, __MODULE_STRING(NUM_RX_POOLS) "i");
2593 MODULE_PARM(rxs_bs, __MODULE_STRING(NUM_RX_POOLS) "i");
2594 MODULE_PARM(rx_lats, "i");
2595 MODULE_PARM(pci_lat, "b");
2596 MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
2597 MODULE_PARM_DESC(cmds, "number of command queue entries");
2598 MODULE_PARM_DESC(txs, "number of TX queue entries");
2599 MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
2600 MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
2601 MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
2602 MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2604 /********** module entry **********/
2606 int init_module (void) {
2609 PRINTD (DBG_FLOW|DBG_INIT, "init_module");
2611 // sanity check - cast needed as printk does not support %Zu
2612 if (sizeof(amb_mem) != 4*16 + 4*12) {
2613 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2614 (unsigned long) sizeof(amb_mem));
2626 init_timer (&housekeeping);
2627 housekeeping.function = do_housekeeping;
2629 housekeeping.data = 1;
2630 set_timer (&housekeeping, 0);
2632 PRINTK (KERN_INFO, "no (usable) adapters found");
2635 return devs ? 0 : -ENODEV;
2638 /********** module exit **********/
2640 void cleanup_module (void) {
2643 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
2646 housekeeping.data = 0;
2647 del_timer (&housekeeping);
2651 amb_devs = dev->prev;
2653 PRINTD (DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
2654 // the drain should not be necessary
2655 drain_rx_pools (dev);
2656 interrupts_off (dev);
2658 destroy_queues (dev);
2659 atm_dev_deregister (dev->atm_dev);
2660 free_irq (dev->irq, dev);
2661 release_region (dev->iobase, AMB_EXTENT);
2670 /********** monolithic entry **********/
2672 int __init amb_detect (void) {
2675 // sanity check - cast needed as printk does not support %Zu
2676 if (sizeof(amb_mem) != 4*16 + 4*12) {
2677 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2678 (unsigned long) sizeof(amb_mem));
2690 init_timer (&housekeeping);
2691 housekeeping.function = do_housekeeping;
2693 housekeeping.data = 1;
2694 set_timer (&housekeeping, 0);
2696 PRINTK (KERN_INFO, "no (usable) adapters found");