1 /* UART driver for Galileo/Marvell GT-642x0 MPSC
3 * Based upon the work of:
4 * Chris Zankel <chris@mvista.com>
5 * Troy Benjegerdes <tbenjegerdes@mvista.com>
6 * Mark Greer <mgreer@mvista.com>
7 * Dave Wilhardt <dwilhardt@xyterra.com
8 * Dan Malek (arch/ppc/8xx_io/uart.c)
9 * ??? (drivers/char/serial_21285.c)
11 * Maintained by: Rex Feany <rfeany@zumanetworks.com>
13 * In an ideal world, this driver will be used by both MIPS and PowerPC
14 * that use the gt64240 and gt64260 bridge chips. I need to either get a
15 * 64240 mips board or find someone to test this.. -- Troy
19 #include <linux/config.h>
20 #include <linux/version.h>
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/wait.h>
24 #include <linux/signal.h>
25 #include <linux/errno.h>
26 #include <linux/module.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/delay.h>
33 #include <linux/slab.h>
35 #include <linux/sched.h>
36 #include <linux/interrupt.h>
37 #include <linux/tty.h>
38 #include <linux/tty_driver.h>
39 #include <linux/tty_flip.h>
40 #include <linux/serial.h>
41 #include <linux/circ_buf.h>
43 #ifdef CONFIG_GT64260_CONSOLE
44 # include <linux/console.h>
46 #ifdef CONFIG_USE_PPCBOOT
47 # include <asm/ppcboot.h>
51 #include <asm/pgtable.h>
52 #include <asm/uaccess.h>
54 #include <asm/cache.h>
55 #include <asm/machdep.h>
57 #include <asm-ppc/gt64260.h>
59 #include "gt64260_mpsc.h"
61 /* Number of Tx descriptors */
62 #define NUM_TX_DESC 64
64 /* How much do we send in one tx */
65 #define TX_BUF_SIZE 64
67 /* How much per descriptor */
68 #define RX_BUF_SIZE 128
70 /* Number of Rx descriptors */
71 #define NUM_RX_DESC 32
73 /* Do explicit cache management, or allow snooping? */
74 #define SOFTWARE_CACHE_MGMT
76 /* Number of ports we handle. */
79 /* How long before a transmit timesout [ms] */
80 #define WAIT_FOR_TXD_TIME (30*1000)
82 /* Maximum Idle Register value */
83 #define DEFAULT_MIR 40
85 /* Which port is console? */
86 #ifdef CONFIG_GT64260_CONSOLE
87 # if defined(CONFIG_GT64260_CONSOLE_1)
88 # define CONFIG_SERIAL_CONSOLE_PORT 1
90 # define CONFIG_SERIAL_CONSOLE_PORT 0
94 /* I bet you can figure this one out */
97 #ifdef CONFIG_DEVFS_FS
98 # define GT_MPSC_DEVNAME "tts/%d"
99 # define GT_MPSC_AUXNAME "cua/%d"
101 # define GT_MPSC_DEVNAME "ttyS"
102 # define GT_MPSC_AUXNAME "cua"
105 #define GT_MPSC_MAJOR TTY_MAJOR
106 #define GT_MPSC_MINOR_START 64
107 #define GT_MPSC_AUXMAJOR TTYAUX_MAJOR
110 * We can do explicit cache management, or let
111 * the galileo snoop take care of it.
113 #ifdef SOFTWARE_CACHE_MGMT
114 # define FLUSH_DCACHE(st, en) flush_dcache_range(st, en)
115 # define INVALIDATE_DCACHE(st, en) invalidate_dcache_range(st, en)
116 # define CLEAN_DCACHE(st, en) clean_dcache_range(st, en)
117 # define WANT_SNOOP 0
119 # define FLUSH_DCACHE(st, en)
120 # define INVALIDATE_DCACHE(st, en)
121 # define CLEAN_DCACHE(st, en)
122 # define WANT_SNOOP 1
125 /* States for tx descriptors */
130 /* Gaps between ch0/ch1 registers */
131 #define GALMPSC_REG_GAP 0x1000
132 #define GALBRG_REG_GAP 0x0008
133 #define GALSDMA_REG_GAP 0x2000
135 #define MPSC_TX_ABORT (1 << 7)
136 #define MPSC_RX_ABORT (1 << 23)
137 #define MPSC_ENTER_HUNT (1 << 31)
141 * Transmit/Receive descriptors.
142 * 4 long word alignment
144 typedef struct mpsc_rx_desc {
150 } __attribute((aligned(256),packed)) rxd_t;
152 typedef struct mpsc_tx_desc {
158 } __attribute((aligned(256),packed)) txd_t;
164 struct tty_struct *tty;
166 long session; /* Session of opening process */
167 long pgrp; /* pgrp of opening process */
170 unsigned int rx_current;
171 volatile rxd_t rx_ring[NUM_RX_DESC];
172 volatile u8 rx_buffer[NUM_RX_DESC][RX_BUF_SIZE];
174 /* How full rx buffers get */
177 /* What we have set in the hardware */
178 struct termios termios;
180 /* Request that no more transmits are done */
183 /* How much stuff is queued to go out? */
186 /* Are we transmitting something now? */
189 /* High-water mark for tx queue */
192 /* Current descriptor for gt_write */
195 /* Current descriptor for transmit */
198 /* Status of each descriptor */
199 int tx_status[NUM_TX_DESC];
201 /* Transmit descriptor ring & buffers */
202 volatile txd_t tx_ring[NUM_TX_DESC];
203 volatile u8 tx_buffer[NUM_TX_DESC][TX_BUF_SIZE];
205 /* Statistics baby */
206 struct async_icount icount;
210 * GT64240A errata: cant read MPSC/BRG registers...
211 * so make mirrors in ram for read/modify write.
214 #define GT_REG_WRITE_MIRROR_G(a,d) {mh.a ## _M = d; gt_write(a,d);}
215 #define GT_REG_READ_MIRROR_G(a) (mh.a ## _M)
217 #define GT_REG_WRITE_MIRROR(a,i,g,d) {mh.a ## _M[i] = d; gt_write(a + (i*g),d);}
218 #define GT_REG_READ_MIRROR(a,i,g) (mh.a ## _M[i])
220 struct _tag_mirror_hack {
221 unsigned GT64260_BRG_0_BCR_M[2]; /* b200 */
222 unsigned GT64260_MPSC_0_CHR_1_M[2]; /* 800c */
223 unsigned GT64260_MPSC_0_CHR_2_M[2]; /* 8010 */
224 unsigned GT64260_MPSC_0_MPCR_M[2]; /* 8008 */
226 unsigned GT64260_MPSC_MRR_M; /* b400 */
227 unsigned GT64260_MPP_SERIAL_PORTS_MULTIPLEX_M; /* 0xf010 */
228 unsigned GT64260_MPSC_RCRR_M; /* b404 */
229 unsigned GT64260_MPSC_TCRR_M; /* b408 */
230 unsigned GT64260_SDMA_INTR_MASK_M; /* b880 */
233 static struct _tag_mirror_hack mh;
235 static struct tty_driver serial_driver;
236 static int gt_refcount;
237 static struct mpsc_port mpsc_ports[NR_PORTS];
238 static struct termios *gt_termios[NR_PORTS];
239 static struct termios *gt_termios_locked[NR_PORTS];
240 static struct tty_struct *gt_table[NR_PORTS];
243 /* used by gt_tty_write. no reason to have one per port (see comments in serial.c). */
244 static unsigned char *tmp_buf;
245 static DECLARE_MUTEX(tmp_buf_sem);
247 #ifdef CONFIG_GT64260_CONSOLE
248 extern struct console sercons;
251 #ifdef CONFIG_USE_PPCBOOT
252 extern bd_t ppcboot_bd;
253 extern int ppcboot_bd_valid;
256 static void gt_tty_send_xchar(struct tty_struct *tty, char ch);
258 static char serial_version[] = "%W%";
261 * This is used to figure out the divisor speeds and the timeouts,
262 * indexed by the termio value.
264 static int baud_table[] = {
265 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
266 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
275 while ((c = *s++) != 0) {
276 gt_tty_send_xchar(0, c);
278 gt_tty_send_xchar(0, '\r');
280 gt_tty_send_xchar(0, '\n');
281 gt_tty_send_xchar(0, '\r');
285 dump_tx(struct mpsc_port *info, const char *tag)
290 sprintf(str, "** TX DUMP LINE %1.1d <%s>", info->line, tag);
292 sprintf(str, "** %d tx, I am %c! %d bytes backlog! I am also %c!",
294 info->tx_running ? 'R' : 'W',
295 atomic_read(&info->tx_len),
296 info->tx_stop ? 'H' : 'N');
299 sprintf(str, "** Ring Dump");
301 sprintf(str, "### ptr < buf > C A F W A Bytecnt Shadow");
304 for (i = 0; i < NUM_TX_DESC; i++) {
305 sprintf(str, "%3.3d %lx <%lx> %c %c %c %c %c %.4d %.4d",
307 (unsigned long) &info->tx_ring[i],
308 (unsigned long) info->tx_buffer[i],
309 i == info->tx_current ? 'X' : '-',
310 i == info->tx_active ? 'X' : '-',
311 info->tx_status[i] == TX_FREE ? 'X' : '-',
312 info->tx_status[i] == TX_WAITING ? 'X' : '-',
313 info->tx_status[i] == TX_ACTIVE ? 'X' : '-',
314 info->tx_ring[i].bytecnt,
315 info->tx_ring[i].shadow);
321 /*************************************************************
322 * Setup routines for MPSC, BRG, and SDMA.
323 * Stolen from the ppcboot MPSC driver.
327 galbrg_set_CDV(int channel, int value)
331 temp = GT_REG_READ_MIRROR(GT64260_BRG_0_BCR, channel, GALBRG_REG_GAP);
333 temp |= (value & 0x0000FFFF);
334 GT_REG_WRITE_MIRROR(GT64260_BRG_0_BCR,channel,GALBRG_REG_GAP, temp);
338 galbrg_set_CUV(int channel, int value)
340 gt_write(GT64260_BRG_0_BTR + (channel * GALBRG_REG_GAP), value);
344 galbrg_set_clksrc(int channel, int value)
348 temp = GT_REG_READ_MIRROR(GT64260_BRG_0_BCR,channel, GALBRG_REG_GAP);
350 temp |= (value << 18);
351 GT_REG_WRITE_MIRROR(GT64260_BRG_0_BCR,channel, GALBRG_REG_GAP,temp);
355 galbrg_enable(int channel)
359 temp = GT_REG_READ_MIRROR(GT64260_BRG_0_BCR, channel, GALBRG_REG_GAP);
361 GT_REG_WRITE_MIRROR(GT64260_BRG_0_BCR, channel, GALBRG_REG_GAP,temp);
365 galbrg_disable(int channel)
369 temp = GT_REG_READ_MIRROR(GT64260_BRG_0_BCR, channel, GALBRG_REG_GAP);
371 GT_REG_WRITE_MIRROR(GT64260_BRG_0_BCR, channel, GALBRG_REG_GAP,temp);
375 galbrg_set_baudrate(int channel, int rate)
377 #ifdef CONFIG_GT64260_BRG_EQ_BUS
378 int clk = ppcboot_bd_valid?ppcboot_bd.bi_busfreq:100000000;
380 int clk = CONFIG_GT64260_BRG_CLK_RATE;
382 int clock = (clk/(16*rate)) - 1;
384 galbrg_disable(channel);
385 galbrg_set_CDV(channel, clock);
386 galbrg_enable(channel);
390 galmpsc_connect(int channel, int connect)
394 temp = GT_REG_READ_MIRROR_G(GT64260_MPSC_MRR);
395 if ((channel == 0) && connect)
397 else if ((channel == 1) && connect)
398 temp &= ~(0x00000007 << 6);
399 else if ((channel == 0) && !connect)
402 temp |= (0x00000007 << 6);
404 /* Just in case... */
406 GT_REG_WRITE_MIRROR_G(GT64260_MPSC_MRR, temp);
410 galmpsc_route_serial(int channel, int connect)
414 temp = gt_read(GT64260_MPP_SERIAL_PORTS_MULTIPLEX);
416 if ((channel == 0) && connect)
418 else if ((channel == 1) && connect)
420 else if ((channel == 0) && !connect)
425 gt_write(GT64260_MPP_SERIAL_PORTS_MULTIPLEX,temp);
429 galmpsc_route_rx_clock(int channel, int brg)
433 temp = GT_REG_READ_MIRROR_G(GT64260_MPSC_RCRR);
440 GT_REG_WRITE_MIRROR_G(GT64260_MPSC_RCRR,temp);
444 galmpsc_route_tx_clock(int channel, int brg)
448 temp = GT_REG_READ_MIRROR_G(GT64260_MPSC_TCRR);
455 GT_REG_WRITE_MIRROR_G(GT64260_MPSC_TCRR,temp);
459 galmpsc_write_config_regs(int mpsc)
461 /* Main config reg Low (Null modem, Enable Tx/Rx, UART mode) */
462 gt_write(GT64260_MPSC_0_MMCRL + (mpsc*GALMPSC_REG_GAP), 0x000004c4);
464 /* Main config reg High (32x Rx/Tx clock mode, width=8bits */
465 gt_write(GT64260_MPSC_0_MMCRH +(mpsc*GALMPSC_REG_GAP), 0x024003f8);
468 // 0000 0010 0000 0000
471 // 0000 0011 1111 1000
475 galmpsc_set_brkcnt(int mpsc, int value)
479 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_CHR_1,mpsc,GALMPSC_REG_GAP);
481 temp |= (value << 16);
482 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_CHR_1,mpsc,GALMPSC_REG_GAP, temp);
486 galmpsc_set_tcschar(int mpsc, int value)
490 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_CHR_1,mpsc,GALMPSC_REG_GAP);
493 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_CHR_1,mpsc,GALMPSC_REG_GAP, temp);
498 galmpsc_set_char_length(int mpsc, int value)
502 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_MPCR,mpsc,GALMPSC_REG_GAP);
504 temp |= (value << 12);
505 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_MPCR,mpsc,GALMPSC_REG_GAP, temp);
509 galmpsc_set_stop_bit_length(int mpsc, int value)
513 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_MPCR,mpsc,GALMPSC_REG_GAP);
514 temp |= (value << 14);
515 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_MPCR,mpsc,GALMPSC_REG_GAP,temp);
519 galmpsc_set_parity(int mpsc, int value)
523 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_CHR_2,mpsc,GALMPSC_REG_GAP);
525 if (value != GALMPSC_PARITY_NONE) {
527 temp |= ((value << 18) | (value << 2));
528 temp |= ((value << 17) | (value << 1));
532 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_CHR_2,mpsc,GALMPSC_REG_GAP, temp);
536 galmpsc_set_snoop(int mpsc, int value)
538 unsigned long reg = mpsc ? GT64260_MPSC_1_CNTL_LO : GT64260_MPSC_0_CNTL_LO;
543 temp |= (1<< 6) | (1<<14) | (1<<22) | (1<<30);
545 temp &= ~((1<< 6) | (1<<14) | (1<<22) | (1<<30));
550 galmpsc_enter_hunt(int mpsc)
554 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_CHR_2,mpsc,GALMPSC_REG_GAP);
556 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_CHR_2,mpsc,GALMPSC_REG_GAP, temp);
558 /* Should Poll on Enter Hunt bit, but the register is write-only.
559 Errata suggests pausing 100 system cycles. */
564 galmpsc_set_MIR(int mpsc, int value)
566 gt_write(GT64260_MPSC_0_CHR_3+(mpsc*GALMPSC_REG_GAP), value);
570 galmpsc_config_channel_regs(int mpsc)
572 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_CHR_1,mpsc,GALMPSC_REG_GAP, 0);
573 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_CHR_2,mpsc,GALMPSC_REG_GAP, 0);
575 gt_write(GT64260_MPSC_0_CHR_4+(mpsc*GALMPSC_REG_GAP), 0);
576 gt_write(GT64260_MPSC_0_CHR_5+(mpsc*GALMPSC_REG_GAP), 0);
577 gt_write(GT64260_MPSC_0_CHR_6+(mpsc*GALMPSC_REG_GAP), 0);
578 gt_write(GT64260_MPSC_0_CHR_7+(mpsc*GALMPSC_REG_GAP), 0);
579 gt_write(GT64260_MPSC_0_CHR_8+(mpsc*GALMPSC_REG_GAP), 0);
580 gt_write(GT64260_MPSC_0_CHR_9+(mpsc*GALMPSC_REG_GAP), 0);
581 gt_write(GT64260_MPSC_0_CHR_10+(mpsc*GALMPSC_REG_GAP), 0);
583 galmpsc_set_brkcnt(mpsc, 0x3);
584 galmpsc_set_tcschar(mpsc, 0xab);
588 galmpsc_freeze_tx(int mpsc, int onoff)
592 temp = GT_REG_READ_MIRROR(GT64260_MPSC_0_MPCR,mpsc,GALMPSC_REG_GAP);
593 if (onoff) temp |= (1<<9);
594 else temp &= ~(1<<9);
595 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_MPCR,mpsc,GALMPSC_REG_GAP, temp);
599 galsdma_set_RFT(int channel)
603 temp = gt_read(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP));
605 gt_write(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP), temp);
609 galsdma_set_SFM(int channel)
613 temp = gt_read(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP));
615 gt_write(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP), temp);
619 galsdma_set_rxbe(int channel)
623 temp = gt_read(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP));
625 gt_write(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP), temp);
629 galsdma_set_txbe(int channel)
633 temp = gt_read(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP));
635 gt_write(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP), temp);
639 galsdma_set_RC(int channel, unsigned int value)
643 temp = gt_read(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP));
645 temp |= (value << 2);
646 gt_write(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP), temp);
650 galsdma_intr_mask(int channel, unsigned int value)
655 old = temp = GT_REG_READ_MIRROR_G(GT64260_SDMA_INTR_MASK);
657 if (channel) value <<= 8;
659 GT_REG_WRITE_MIRROR_G(GT64260_SDMA_INTR_MASK, temp);
661 if (channel) old >>= 8;
666 galsdma_intr_unmask(int channel, unsigned int value)
670 temp = GT_REG_READ_MIRROR_G(GT64260_SDMA_INTR_MASK);
672 if (channel) value <<= 8;
674 GT_REG_WRITE_MIRROR_G(GT64260_SDMA_INTR_MASK, temp);
678 galsdma_intr_ack(void)
680 gt_write(GT64260_SDMA_INTR_CAUSE, 0);
684 galsdma_set_rx_ring(int chan, unsigned long val)
686 gt_write(GT64260_SDMA_0_SCRDP+(chan*GALSDMA_REG_GAP), val);
690 galsdma_set_tx_ring(int chan, unsigned long val)
692 gt_write(GT64260_SDMA_0_SFTDP+(chan*GALSDMA_REG_GAP), val);
693 gt_write(GT64260_SDMA_0_SCTDP+(chan*GALSDMA_REG_GAP), val);
697 galsdma_set_burstsize(int channel, unsigned int value)
701 temp = gt_read(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP));
705 case 8: temp |= 0x3 << 12; break;
706 case 4: temp |= 0x2 << 12; break;
707 case 2: temp |= 0x1 << 12; break;
708 case 1: temp |= 0x0 << 12; break;
710 gt_write(GT64260_SDMA_0_SDC+(channel*GALSDMA_REG_GAP), temp);
714 galsdma_request(int chan, unsigned int val)
718 temp = gt_read(GT64260_SDMA_0_SDCM+(chan*GALSDMA_REG_GAP));
723 gt_write(GT64260_SDMA_0_SDCM+(chan*GALSDMA_REG_GAP), temp);
727 gt_shutdown(int chan)
729 /* Abort any SDMA transfers */
730 galsdma_request(chan, 0);
731 galsdma_request(chan, SDMA_ABORT_TX|SDMA_ABORT_RX);
734 /* shut down the MPSC */
735 gt_write(GT64260_MPSC_0_MMCRL+(chan*GALMPSC_REG_GAP), 0);
736 gt_write(GT64260_MPSC_0_MMCRH+(chan*GALMPSC_REG_GAP), 0);
737 GT_REG_WRITE_MIRROR(GT64260_MPSC_0_MPCR, chan, GALMPSC_REG_GAP,0);
741 /* clear the SDMA current and first TX and RX pointers */
742 galsdma_set_tx_ring(chan, 0);
743 galsdma_set_rx_ring(chan, 0);
746 /* Disable interrupts */
747 galsdma_intr_mask(chan, 0xf);
753 galsdma_enable_rx(int chan)
755 galmpsc_enter_hunt(chan);
756 galsdma_request(chan, SDMA_ENABLE_RX);
760 ll_mpsc_init(int chan)
763 galbrg_set_clksrc(chan, CONFIG_GT64260_CLKSRC);
764 galbrg_set_CUV(chan, 0);
767 /* Set up clock routing */
768 galmpsc_connect(chan, GALMPSC_CONNECT);
769 galmpsc_route_serial(chan, GALMPSC_CONNECT);
770 galmpsc_route_rx_clock(chan, chan);
771 galmpsc_route_tx_clock(chan, chan);
774 galsdma_set_burstsize(chan, L1_CACHE_BYTES/8);
775 galsdma_set_txbe(chan);
776 galsdma_set_rxbe(chan);
777 galsdma_set_RC(chan, 0xf);
778 galsdma_set_SFM(chan);
779 galsdma_set_RFT(chan);
783 galmpsc_write_config_regs(chan);
784 galmpsc_config_channel_regs(chan);
785 galmpsc_set_MIR(chan, DEFAULT_MIR);
786 galmpsc_set_char_length(chan, GALMPSC_CHAR_LENGTH_8); /* 8 */
787 galmpsc_set_parity(chan, GALMPSC_PARITY_NONE); /* N */
788 galmpsc_set_stop_bit_length(chan, GALMPSC_STOP_BITS_1); /* 1 */
789 galmpsc_set_snoop(chan, WANT_SNOOP);
793 gt_set_cflag(int chan, int cflag)
799 switch (cflag & CSIZE) {
800 case CS5: arg = GALMPSC_CHAR_LENGTH_5; break;
801 case CS6: arg = GALMPSC_CHAR_LENGTH_6; break;
802 case CS7: arg = GALMPSC_CHAR_LENGTH_7; break;
803 case CS8: arg = GALMPSC_CHAR_LENGTH_8; break;
804 default: arg = GALMPSC_CHAR_LENGTH_8; break;
806 galmpsc_set_char_length(chan, arg);
809 arg = GALMPSC_STOP_BITS_1;
811 arg = GALMPSC_STOP_BITS_2;
812 galmpsc_set_stop_bit_length(chan, arg);
815 arg = GALMPSC_PARITY_NONE;
816 if (cflag & PARENB) {
817 arg = GALMPSC_PARITY_EVEN;
819 arg = GALMPSC_PARITY_ODD;
821 galmpsc_set_parity(chan, arg);
823 switch (cflag & CBAUD) {
824 case B200: baud = 200; break;
825 case B300: baud = 300; break;
826 case B1200: baud = 1200; break;
827 case B1800: baud = 1800; break;
828 case B2400: baud = 2400; break;
829 case B4800: baud = 4800; break;
831 case B9600: baud = 9600; break;
832 case B19200: baud = 19200; break;
833 case B38400: baud = 38400; break;
834 case B57600: baud = 57600; break;
835 case B115200: baud = 115200; break;
837 galbrg_set_baudrate(chan, baud);
840 /* gt_tx_sync - Wait for current transmit to finish */
846 /* ugh, the MVP seems to get stuck and needs to have transmit aborts for
847 * some unknown reason -- Troy */
848 /* we probably should do something nicer than udelay..
849 * is schedule_timeout safe here? */
851 while(gt_read(GT64260_SDMA_0_SDCM+(chan*GALSDMA_REG_GAP)) & SDMA_DEMAND_TX) {
852 if (i++ > WAIT_FOR_TXD_TIME) {
854 galsdma_request(chan, SDMA_ABORT_TX);
855 printk(KERN_ERR "chan %d: tx sync timeout\n", chan);
864 /**********************************************************
865 * Serial Driver Proper
868 /* restart_tx - start tx next buffer.
869 * Called from interrupt and task context */
871 restart_tx(struct mpsc_port *info)
873 volatile txd_t *txd = &info->tx_ring[info->tx_active];
875 if (!info->tx_stop && !info->tx_running && (info->tx_status[info->tx_active] == TX_WAITING)) {
876 info->tx_running = 1;
877 info->tx_status[info->tx_active] = TX_ACTIVE;
879 CLEAN_DCACHE((u32)phys_to_virt((u32)txd->buf_ptr),
880 (u32)(phys_to_virt((u32)txd->buf_ptr)+txd->bytecnt));
881 CLEAN_DCACHE((u32) txd, (u32)(txd+1));
883 galsdma_set_tx_ring(info->line, virt_to_phys((u32 *)txd));
884 galsdma_request(info->line, SDMA_STOP_TX|SDMA_DEMAND_TX);
888 /* Close this buffer and mark it to be sent out */
890 next_tx(struct mpsc_port *info)
892 volatile txd_t *txd = &info->tx_ring[info->tx_current];
894 txd->cmd_sts = STS_EI | STS_OWN | STS_FIRST | STS_LAST;
895 txd->shadow = txd->bytecnt;
897 info->tx_status[info->tx_current] = TX_WAITING;
898 info->tx_current = (info->tx_current + 1) % NUM_TX_DESC;
900 CLEAN_DCACHE((u32) txd, (u32)(txd+1));
904 tx_interrupt(struct mpsc_port *info)
906 struct tty_struct *tty = info->tty;
907 volatile txd_t *txd = &info->tx_ring[info->tx_active];
909 /* Not expecting anything */
910 if (!info->tx_running)
913 INVALIDATE_DCACHE((u32) txd, (u32)(txd+1));
914 if (txd->cmd_sts & STS_OWN)
918 if (info->tx_status[info->tx_active] != TX_ACTIVE)
919 panic("bad serial status");
921 info->icount.tx += txd->bytecnt;
922 atomic_sub(txd->bytecnt, &info->tx_len); txd->bytecnt = 0;
923 info->tx_status[info->tx_active] = TX_FREE;
924 info->tx_active = (info->tx_active + 1) % NUM_TX_DESC;
925 info->tx_running = 0;
927 /* Try and send some more */
931 /* Wake up any writers */
933 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
934 (tty->ldisc.write_wakeup)(tty);
935 wake_up_interruptible(&tty->write_wait);
940 rx_interrupt(struct mpsc_port *info)
942 volatile rxd_t *rxd = &info->rx_ring[info->rx_current];
943 struct async_icount *icount = &info->icount;
944 struct tty_struct *tty = info->tty;
948 INVALIDATE_DCACHE((u32)rxd, (u32)(rxd+1));
950 /* fooyah! An interrupt without a ready descriptor looks
951 * suspiciously like an error interrupt. So, we handle it that
953 if (rxd->cmd_sts & STS_OWN) {
955 /* galsdma_enable_rx(info->line); HA! can't do this blindly */
956 /* it randomly drops chars, and stuff if we do. SO,
957 * this means if we hit an RX error (such as overun) we are
963 /* Try and read as many done descriptors as we can. */
965 unsigned long sts = rxd->cmd_sts;
966 unsigned int cnt = rxd->bytecnt;
968 /* Clean up used descriptor */
969 rxd->cmd_sts = STS_OWN | STS_EI | STS_LAST | STS_FIRST;
971 CLEAN_DCACHE((u32)rxd, (u32)(rxd+1));
972 info->rx_current = (info->rx_current + 1) % NUM_RX_DESC;
974 if (cnt > info->rx_hiwater)
975 info->rx_hiwater = cnt;
979 tty_insert_flip_char(tty, 0, TTY_BREAK);
980 tty_schedule_flip(tty);
984 /* if there is nowhere to put the data, discard it */
988 /* RX anomoly -- galileo bug! */
992 /* Make sure there is enough room to store the chars */
993 /* which is more important? clearning out the rx ring or
994 * makeing every effort to not drop chars? */
995 if (tty->flip.count+cnt >= TTY_FLIPBUF_SIZE) {
996 tty->flip.tqueue.routine((void *) tty);
997 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
998 icount->buf_overrun++;
999 return; // if TTY_DONT_FLIP is set
1004 pp = phys_to_virt((u32) rxd->buf_ptr);
1005 INVALIDATE_DCACHE((u32)pp, (u32)(pp+RX_BUF_SIZE));
1007 if (tty->flip.count < TTY_FLIPBUF_SIZE) {
1008 int count = min_t(int, cnt, TTY_FLIPBUF_SIZE - tty->flip.count);
1010 memcpy(tty->flip.char_buf_ptr, pp, count);
1011 memset(tty->flip.flag_buf_ptr, TTY_NORMAL, count);
1013 tty->flip.count += count;
1014 tty->flip.char_buf_ptr += count;
1016 /* Allow for possible error flag below */
1017 tty->flip.flag_buf_ptr += count - 1;
1021 *tty->flip.flag_buf_ptr = TTY_PARITY;
1022 } else if (sts & STS_FR) {
1024 *tty->flip.flag_buf_ptr = TTY_FRAME;
1025 } else if (sts & STS_OR) {
1026 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
1030 tty->flip.flag_buf_ptr++;
1031 tty_flip_buffer_push(tty);
1033 /* Oops.. lost some chars */
1035 icount->buf_overrun++;
1039 icount->buf_overrun++;
1040 printk("gt64260_mpsc: buffer overrun\n");
1043 /* Advance to next descriptor */
1044 rxd = &info->rx_ring[info->rx_current];
1045 INVALIDATE_DCACHE((u32)rxd, (u32)(rxd+1));
1046 } while (! (rxd->cmd_sts & STS_OWN));
1048 /* If RX is disabled here, start it back up again */
1049 temp = gt_read(GT64260_SDMA_0_SDCM+(info->line*GALSDMA_REG_GAP));
1050 if ((temp & SDMA_ENABLE_RX) == 0)
1051 galsdma_enable_rx(info->line);
1055 gt_sdma_interrupt(int irq, void *dev_id, struct pt_regs *fp)
1060 for (i = 0; i < NR_PORTS; i++) {
1061 struct mpsc_port *info = mpsc_ports + i;
1063 if (! (info->flags & ASYNC_INITIALIZED))
1072 gt_sdma_write(struct mpsc_port *info, const char *data, size_t wlen)
1074 volatile txd_t *txd;
1075 unsigned long flags;
1082 save_flags(flags); cli();
1083 if (info->tx_status[info->tx_current] != TX_FREE)
1085 txd = &info->tx_ring[info->tx_current];
1087 max = min_t(int, TX_BUF_SIZE - txd->bytecnt, len);
1089 buffer = (u32)&info->tx_buffer[info->tx_current][txd->bytecnt];
1090 memcpy((void *)buffer, data, max);
1093 CLEAN_DCACHE(buffer, buffer + max);
1095 txd->bytecnt += max;
1099 if (txd->bytecnt >= TX_BUF_SIZE)
1101 restore_flags(flags);
1104 atomic_add((wlen - len), &info->tx_len);
1105 if ((max = atomic_read(&info->tx_len)) > info->tx_hiwater)
1106 info->tx_hiwater = max;
1112 setup_dma(struct mpsc_port *info)
1115 volatile rxd_t *rxd = info->rx_ring;
1117 /* Initialize the TX descriptor */
1118 memset(info->tx_status, TX_FREE, NUM_TX_DESC);
1119 memset((void *) info->tx_ring, 0, sizeof(txd_t) * NUM_TX_DESC);
1120 for (i = 0; i < NUM_TX_DESC; i++) {
1121 info->tx_ring[i].buf_ptr = virt_to_phys((u32 *) info->tx_buffer[i]);
1124 /* Initialize the RX descriptors */
1125 for (i = 0; i < NUM_RX_DESC; i++) {
1126 rxd[i].cmd_sts = STS_OWN | STS_EI | STS_LAST | STS_FIRST;
1127 rxd[i].buf_ptr = virt_to_phys((u32 *) info->rx_buffer[i]);
1128 rxd[i].bufsize = RX_BUF_SIZE;
1130 rxd[i].next_desc_ptr = virt_to_phys((u32 *) &rxd[i+1]);
1132 rxd[NUM_RX_DESC - 1].next_desc_ptr = virt_to_phys((u32 *) &rxd[0]);
1134 info->rx_current = 0;
1135 info->tx_current = 0;
1136 info->tx_active = 0;
1137 info->tx_running = 0;
1139 info->tx_hiwater = 0;
1140 atomic_set(&info->tx_len, 0);
1142 CLEAN_DCACHE((u32)&rxd[0], (u32)&rxd[NUM_RX_DESC]);
1143 CLEAN_DCACHE((u32)info->rx_buffer[0], (u32)info->rx_buffer[NUM_RX_DESC]);
1146 galsdma_set_rx_ring(info->line, virt_to_phys((u32 *) &rxd[0]));
1150 gt_startup(struct mpsc_port *info)
1152 unsigned long flags;
1154 /* return if already initialized */
1155 if (info->flags & ASYNC_INITIALIZED)
1158 save_flags(flags); cli();
1160 #ifdef SERIAL_DEBUG_OPEN
1161 printk("starting up ttys%d ...", info->line);
1165 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1166 ll_mpsc_init(info->line);
1169 /* clear and enable interrupt */
1171 galsdma_intr_unmask(info->line, 0xf);
1173 /* set flag that the uart is initialized */
1174 info->flags |= ASYNC_INITIALIZED;
1176 /* start receiver and go to 'hunt mode' */
1177 galsdma_enable_rx(info->line);
1179 restore_flags(flags);
1183 /* Is called once before things start running */
1187 /* Write-only register cache hack */
1188 memset(&mh, 0, sizeof(mh));
1189 mh.GT64260_MPSC_MRR_M=0x3fffffff;
1191 /* Setup the mpsc port state structure */
1192 memset(&mpsc_ports, 0, sizeof(struct mpsc_port) * NR_PORTS);
1193 mpsc_ports[0].line = 0;
1194 mpsc_ports[1].line = 1;
1198 /***********************************************************
1199 * Interface to upper layers
1203 gt_tty_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1205 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1206 struct async_icount cnow, icount;
1207 unsigned long flags;
1209 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1210 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1211 if (tty->flags & (1 << TTY_IO_ERROR))
1215 /* XXX Most of these are meaningless without modem control lines */
1225 case TIOCSERGSTRUCT:
1230 save_flags(flags); cli();
1231 cnow = info->icount;
1232 restore_flags(flags);
1234 icount.cts = cnow.cts;
1235 icount.dsr = cnow.dsr;
1236 icount.rng = cnow.rng;
1237 icount.dcd = cnow.dcd;
1238 icount.rx = cnow.rx;
1239 icount.tx = cnow.tx;
1240 icount.frame = cnow.frame;
1241 icount.overrun = cnow.overrun;
1242 icount.parity = cnow.parity;
1243 icount.brk = cnow.brk;
1244 icount.buf_overrun = cnow.buf_overrun;
1246 if (copy_to_user((void *)arg, &icount, sizeof(icount)))
1252 /* "setserial -W" is called in Debian boot */
1253 printk("TIOCSER?WILD ioctl obsolete, ignored.\n");
1257 return -ENOIOCTLCMD;
1263 gt_tty_wait_until_sent(struct tty_struct *tty, int timeout)
1265 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1266 int orig_jiffies = jiffies;
1268 while (atomic_read(&info->tx_len)) {
1269 current->state = TASK_INTERRUPTIBLE;
1270 schedule_timeout(1);
1271 if (signal_pending(current))
1273 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1276 current->state = TASK_RUNNING;
1279 /* called after lots of put_char's */
1281 gt_tty_flush_chars(struct tty_struct *tty)
1283 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1284 volatile txd_t *txd;
1285 unsigned long flags;
1287 save_flags(flags); cli();
1288 if (info->tx_status[info->tx_current] == TX_FREE) {
1289 txd = &info->tx_ring[info->tx_current];
1294 restore_flags(flags);
1298 gt_tty_write(struct tty_struct *tty, int from_user, const unsigned char *buf, int wlen)
1300 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1311 max = min_t(int, PAGE_SIZE, len);
1313 if (copy_from_user(tmp_buf, buf, max)) {
1318 max = gt_sdma_write(info, tmp_buf, max);
1322 } while ((len > 0) && (max > 0));
1325 ret = gt_sdma_write(info, buf, wlen);
1327 gt_tty_flush_chars(tty);
1332 /* remove pending data */
1334 gt_tty_flush_buffer(struct tty_struct *tty)
1336 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1337 unsigned long flags;
1338 int saved = info->tx_stop;
1341 if(info->line<0 || info->line>NR_PORTS) return;
1343 /* Wait for current TX to finish */
1345 gt_tx_sync(info->line);
1346 while (info->tx_running){
1347 schedule_timeout(1);
1350 save_flags(flags); cli();
1352 for (i = 0; i < NUM_TX_DESC ; i++) {
1353 info->tx_ring[i].bytecnt = 0;
1354 info->tx_ring[i].shadow = 0xfefe;
1355 info->tx_status[i] = TX_FREE;
1358 info->tx_active = info->tx_current = 0;
1359 info->tx_running = 0;
1360 atomic_set(&info->tx_len, 0);
1362 restore_flags(flags);
1364 info->tx_stop = saved;
1365 wake_up_interruptible(&tty->write_wait);
1366 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP))
1367 && tty->ldisc.write_wakeup)
1368 (tty->ldisc.write_wakeup) (tty);
1373 gt_tty_put_char(struct tty_struct *tty, unsigned char ch)
1375 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1376 gt_sdma_write(info, &ch, 1);
1380 gt_tty_write_room(struct tty_struct *tty)
1382 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1385 if (info->tx_status[info->tx_current] == TX_FREE) {
1386 cnt = info->tx_current < info->tx_active ?
1387 info->tx_active - info->tx_current :
1388 NUM_TX_DESC - info->tx_current + info->tx_active;
1390 /* we could be in the process of filling one up,
1394 return TX_BUF_SIZE * cnt;
1398 gt_tty_chars_in_buffer(struct tty_struct *tty)
1400 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1401 return atomic_read(&info->tx_len);
1405 gt_tty_send_xchar(struct tty_struct *tty, char ch)
1407 struct mpsc_port *info = &mpsc_ports[0];
1409 if (tty) info = (struct mpsc_port *)tty->driver_data;
1411 /* use TCS to send high priority chars */
1412 gt_write(GT64260_MPSC_0_CHR_1+(info->line*GALMPSC_REG_GAP), ch);
1414 gt_write(GT64260_MPSC_0_CHR_2+(info->line*GALMPSC_REG_GAP), 0x200);
1420 gt_tty_break(struct tty_struct *tty, int break_state)
1426 gt_tty_hangup(struct tty_struct *tty)
1428 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1431 gt_shutdown(info->line);
1433 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|ASYNC_INITIALIZED);
1439 gt_tty_stop(struct tty_struct *tty)
1441 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1443 galmpsc_freeze_tx(info->line, 1);
1447 gt_tty_start(struct tty_struct *tty)
1449 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1450 unsigned long flags;
1453 galmpsc_freeze_tx(info->line, 0);
1455 save_flags(flags); cli();
1457 restore_flags(flags);
1462 gt_tty_throttle(struct tty_struct *tty)
1465 gt_tty_send_xchar(tty, STOP_CHAR(tty));
1470 gt_tty_unthrottle(struct tty_struct *tty)
1473 gt_tty_send_xchar(tty, START_CHAR(tty));
1477 gt_tty_set_termios(struct tty_struct *tty, struct termios *old_termios)
1479 struct mpsc_port *info = (struct mpsc_port *)tty->driver_data;
1481 if (tty->termios->c_cflag == info->termios.c_cflag)
1484 info->termios.c_cflag = tty->termios->c_cflag;
1485 gt_set_cflag(info->line, tty->termios->c_cflag);
1489 gt_tty_open(struct tty_struct *tty, struct file *filp)
1491 struct mpsc_port *info;
1496 line = MINOR(tty->device) - tty->driver.minor_start;
1497 if (line < 0 || line >= NR_PORTS) {
1502 info = &mpsc_ports[line];
1503 tty->driver_data = info;
1505 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1507 /* Setup temp buffer for userspace writes */
1510 tmp_buf = (unsigned char *) get_zeroed_page(GFP_KERNEL);
1515 /* Start up serial port */
1516 if (++info->count == 1) {
1517 retval = gt_startup(info);
1519 printk("gt_tty_open statup <0\n");
1525 #ifdef CONFIG_GT64260_CONSOLE
1526 if (sercons.cflag && sercons.index == line) {
1527 tty->termios->c_cflag = sercons.cflag;
1529 gt_set_cflag(info->line, tty->termios->c_cflag);
1533 info->session = current->session;
1534 info->pgrp = current->pgrp;
1536 #ifdef SERIAL_DEBUG_OPEN
1537 printk("gt_tty_open ttys%d successful...", info->line);
1544 gt_tty_close(struct tty_struct *tty, struct file *filp)
1546 struct mpsc_port *info = (struct mpsc_port *) tty->driver_data;
1547 unsigned long flags;
1549 if(info->line<0 || info->line>NR_PORTS) return;
1553 if (--info->count > 0) {
1554 restore_flags(flags);
1558 info->flags |= ASYNC_CLOSING;
1559 restore_flags(flags);
1562 gt_tx_sync(info->line);
1563 gt_shutdown(info->line);
1565 set_bit(TTY_IO_ERROR, &tty->flags);
1566 if (tty->driver.flush_buffer)
1567 tty->driver.flush_buffer(tty);
1568 if (tty->ldisc.flush_buffer)
1569 tty->ldisc.flush_buffer(tty);
1573 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|
1574 ASYNC_INITIALIZED|ASYNC_CLOSING);
1580 line_info(char *buf, struct mpsc_port *info)
1582 struct async_icount *icount = &info->icount;
1585 ret = sprintf(buf, "port %d:\n", info->line);
1586 ret += sprintf(buf+ret, " tx: total:%d running:%d qlen:%d hi:%d\n",
1589 atomic_read(&info->tx_len),
1592 ret += sprintf(buf+ret, " rx: total:%d fe:%d pe:%d brk:%d oe:%d roe:%d hi:%d\n",
1598 icount->buf_overrun,
1604 gt_tty_read_proc(char *buf, char **start, off_t off, int count, int *eof, void *data)
1610 len = sprintf(buf, "gt64260_mpsc:%s\n", serial_version);
1611 for (i = 0; i < NR_PORTS; i++) {
1612 len += line_info(buf+len, mpsc_ports+i);
1613 if (len+begin > off+count)
1615 if (len+begin < off) {
1622 if (off >= len+begin)
1624 *start = buf + (off-begin);
1625 return ((count < begin+len-off) ? count : begin+len-off);
1628 /**********************************************************
1629 * Serial Driver Initilization
1637 #ifndef CONFIG_GT64260_CONSOLE
1641 serial_driver.magic = TTY_DRIVER_MAGIC;
1642 serial_driver.driver_name = "gt-serial";
1644 serial_driver.major = GT_MPSC_MAJOR;
1645 serial_driver.name = GT_MPSC_DEVNAME;
1646 serial_driver.minor_start = GT_MPSC_MINOR_START;
1647 serial_driver.name_base = 0;
1648 serial_driver.num = NR_PORTS;
1649 serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
1650 serial_driver.subtype = SERIAL_TYPE_NORMAL;
1651 serial_driver.init_termios = tty_std_termios;
1652 serial_driver.init_termios.c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL;
1653 serial_driver.flags = TTY_DRIVER_REAL_RAW;
1654 serial_driver.refcount = >_refcount;
1655 serial_driver.table = gt_table;
1656 serial_driver.termios = gt_termios;
1657 serial_driver.termios_locked = gt_termios_locked;
1659 serial_driver.open = gt_tty_open;
1660 serial_driver.close = gt_tty_close;
1661 serial_driver.write = gt_tty_write;
1662 serial_driver.put_char = gt_tty_put_char;
1663 serial_driver.flush_chars = gt_tty_flush_chars;
1664 serial_driver.write_room = gt_tty_write_room;
1665 serial_driver.chars_in_buffer = gt_tty_chars_in_buffer;
1666 serial_driver.flush_buffer = gt_tty_flush_buffer;
1667 serial_driver.ioctl = gt_tty_ioctl;
1668 serial_driver.throttle = gt_tty_throttle;
1669 serial_driver.unthrottle = gt_tty_unthrottle;
1670 serial_driver.set_termios = gt_tty_set_termios;
1671 serial_driver.stop = gt_tty_stop;
1672 serial_driver.start = gt_tty_start;
1673 serial_driver.hangup = gt_tty_hangup;
1674 serial_driver.break_ctl = gt_tty_break;
1675 serial_driver.send_xchar = gt_tty_send_xchar;
1676 serial_driver.wait_until_sent = gt_tty_wait_until_sent;
1677 serial_driver.read_proc = gt_tty_read_proc;
1679 if (tty_register_driver(&serial_driver))
1680 panic("Couldn't register GT64260 MPSC serial driver\n");
1682 /* Setup IRQ handler */
1684 galsdma_intr_mask(0, 0xf);
1685 galsdma_intr_mask(1, 0xf);
1687 retval = request_irq(SDMA_IRQ, gt_sdma_interrupt, 0, "GT64260 Serial DMA", 0);
1689 printk(KERN_ERR "Could't get GT64260 SDMA IRQ");
1690 if ( ppc_md.progress ) ppc_md.progress("Could't get GT64260 SDMA IRQ", 0x0);
1693 if ( ppc_md.progress ) ppc_md.progress("gt_mpsc_init: exit", 0x0);
1698 gt_mpsc_cleanup(void)
1700 unsigned long flags;
1706 ret = tty_unregister_driver(&serial_driver);
1708 printk(KERN_ERR "Unable to unregister GT64260 MPSC driver (%d)\n", ret);
1711 free_page((u32) tmp_buf);
1713 free_irq(SDMA_IRQ, NULL);
1714 restore_flags(flags);
1717 module_init(gt_mpsc_init);
1718 module_exit(gt_mpsc_cleanup);
1720 MODULE_DESCRIPTION("GT64260 MPSC UART driver");
1721 MODULE_AUTHOR("Rex Feany <rfeany@zumanetworks.com>");
1722 MODULE_LICENSE("GPL");
1724 /***************************************************************************
1725 * Serial console support
1728 #ifdef CONFIG_GT64260_CONSOLE
1730 /* Buffer descriptors for serial console */
1731 static char sercon_tx_buffer[PAGE_SIZE] __attribute__ ((aligned (PAGE_SIZE)));
1732 static volatile txd_t sercon_txd;
1735 gt_console_setup(struct console *co, char *options)
1740 int cflag = CREAD | HUPCL | CLOCAL;
1743 #ifdef CONFIG_USE_PPCBOOT
1744 if (ppcboot_bd_valid)
1745 baud = ppcboot_bd.bi_baudrate;
1746 #endif /* CONFIG_USE_PPCBOOT */
1748 if ( ppc_md.progress ) ppc_md.progress("gt_console_setup: enter", 0x0);
1750 /* Parse the 'options' string and configure console accordingly. */
1754 baud = simple_strtoul(options, NULL, 10);
1756 while (*s >= '0' && *s <= '9')
1768 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
1769 if (baud == baud_table[bidx])
1772 /* make sure we have a useful value */
1773 if (bidx == (sizeof(baud_table) / sizeof(int)))
1774 bidx = 13; /* B9600 */
1797 ll_mpsc_init(co->index);
1798 gt_set_cflag(co->index, cflag);
1800 co->flags |= CON_ENABLED;
1802 if ( ppc_md.progress ) ppc_md.progress("gt_console_setup: exit", 0x0);
1806 /* copy_convert - newline to cr/lf conversion and copy */
1808 copy_convert(char *dst, ssize_t dlen, const char *src, ssize_t *pslen)
1813 while(dlen && slen) {
1814 dlen--; slen--; copied++;
1815 if ((*dst++ = *src++) == '\n') {
1831 gt_console_write(struct console *co, const char *s, unsigned count)
1837 if(co->index<0 || co->index>NR_PORTS) return;
1839 mask=galsdma_intr_mask(co->index, 0xf);
1841 gt_tx_sync(co->index);
1844 int did = copy_convert(sercon_tx_buffer, PAGE_SIZE, s, &count);
1847 sercon_txd.cmd_sts = STS_LAST | STS_FIRST | STS_OWN;
1848 sercon_txd.shadow = did;
1849 sercon_txd.bytecnt = did;
1850 sercon_txd.buf_ptr = virt_to_phys(sercon_tx_buffer);
1851 sercon_txd.next_desc_ptr = 0;
1853 clean_dcache_range((u32)sercon_tx_buffer, (u32)(sercon_tx_buffer+did));
1854 clean_dcache_range((u32)&sercon_txd, (u32)(&sercon_txd+1));
1856 galsdma_set_tx_ring(co->index, virt_to_phys(&sercon_txd));
1857 galsdma_request(co->index, SDMA_STOP_TX|SDMA_DEMAND_TX);
1859 gt_tx_sync(co->index);
1860 } while (count > 0);
1862 galsdma_intr_unmask(co->index, mask);
1867 gt_console_wait_key(struct console *co)
1874 gt_console_unblank(void)
1879 gt_console_device(struct console *co)
1881 return MKDEV(TTY_MAJOR, co->index + 64);
1884 static struct console sercons = {
1886 write: gt_console_write,
1887 device: gt_console_device,
1888 /* wait_key: gt_console_wait_key, */
1889 unblank: gt_console_unblank,
1890 setup: gt_console_setup,
1891 flags: CON_PRINTBUFFER,
1892 index: CONFIG_SERIAL_CONSOLE_PORT,
1896 gt64260_mpsc_console_init(void)
1898 if ( ppc_md.progress ) ppc_md.progress("gt64260_mpsc_console_init: enter", 0x0);
1900 register_console(&sercons);
1901 if ( ppc_md.progress ) ppc_md.progress("gt64260_mpsc_console_init: exit", 0x0);
1905 #endif /* CONFIG_GT64260_CONSOLE */