drivers/i2c/i2c-algo-ite.c

   1 /*
   2    -------------------------------------------------------------------------
   3    i2c-algo-ite.c i2c driver algorithms for ITE adapters
   4
   5    Hai-Pao Fan, MontaVista Software, Inc.
   6    hpfan@mvista.com or source@mvista.com
   7
   8    Copyright 2000 MontaVista Software Inc.
   9
  10    ---------------------------------------------------------------------------
  11    This file was highly leveraged from i2c-algo-pcf.c, which was created
  12    by Simon G. Vogl and Hans Berglund:
  13
  14
  15      Copyright (C) 1995-1997 Simon G. Vogl
  16                    1998-2000 Hans Berglund
  17
  18     This program is free software; you can redistribute it and/or modify
  19     it under the terms of the GNU General Public License as published by
  20     the Free Software Foundation; either version 2 of the License, or
  21     (at your option) any later version.
  22
  23     This program is distributed in the hope that it will be useful,
  24     but WITHOUT ANY WARRANTY; without even the implied warranty of
  25     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26     GNU General Public License for more details.
  27
  28     You should have received a copy of the GNU General Public License
  29     along with this program; if not, write to the Free Software
  30     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.                */
  31 /* ------------------------------------------------------------------------- */
  32
  33 /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
  34    Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey
  35    <mbailey@littlefeet-inc.com> */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/delay.h>
  40 #include <linux/slab.h>
  41 #include <linux/version.h>
  42 #include <linux/init.h>
  43 #include <asm/uaccess.h>
  44 #include <linux/ioport.h>
  45 #include <linux/errno.h>
  46 #include <linux/sched.h>
  47
  48 #include <linux/i2c.h>
  49 #include <linux/i2c-algo-ite.h>
  50 #include "i2c-ite.h"
  51
  52 #define PM_DSR          IT8172_PCI_IO_BASE + IT_PM_DSR
  53 #define PM_IBSR         IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04
  54 #define GPIO_CCR        IT8172_PCI_IO_BASE + IT_GPCCR
  55
  56 /* ----- global defines ----------------------------------------------- */
  57 #define DEB(x) if (i2c_debug>=1) x
  58 #define DEB2(x) if (i2c_debug>=2) x
  59 #define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/
  60 #define DEBPROTO(x) if (i2c_debug>=9) x;
  61         /* debug the protocol by showing transferred bits */
  62 #define DEF_TIMEOUT 16
  63
  64 /* debugging - slow down transfer to have a look at the data ..         */
  65 /* I use this with two leds&resistors, each one connected to sda,scl    */
  66 /* respectively. This makes sure that the algorithm works. Some chips   */
  67 /* might not like this, as they have an internal timeout of some mils   */
  68 /*
  69 #define SLO_IO      jif=jiffies;while(jiffies<=jif+i2c_table[minor].veryslow)\
  70                         if (need_resched) schedule();
  71 */
  72
  73
  74 /* ----- global variables --------------------------------------------- */
  75
  76 #ifdef SLO_IO
  77         int jif;
  78 #endif
  79
  80 /* module parameters:
  81  */
  82 static int i2c_debug=1;
  83 static int iic_test=0;  /* see if the line-setting functions work       */
  84 static int iic_scan=0;  /* have a look at what's hanging 'round         */
  85
  86 /* --- setting states on the bus with the right timing: --------------- */
  87
  88 #define get_clock(adap) adap->getclock(adap->data)
  89 #define iic_outw(adap, reg, val) adap->setiic(adap->data, reg, val)
  90 #define iic_inw(adap, reg) adap->getiic(adap->data, reg)
  91
  92
  93 /* --- other auxiliary functions -------------------------------------- */
  94
  95 static void iic_start(struct i2c_algo_iic_data *adap)
  96 {
  97         iic_outw(adap,ITE_I2CHCR,ITE_CMD);
  98 }
  99
 100 static void iic_stop(struct i2c_algo_iic_data *adap)
 101 {
 102         iic_outw(adap,ITE_I2CHCR,0);
 103         iic_outw(adap,ITE_I2CHSR,ITE_I2CHSR_TDI);
 104 }
 105
 106 static void iic_reset(struct i2c_algo_iic_data *adap)
 107 {
 108         iic_outw(adap, PM_IBSR, iic_inw(adap, PM_IBSR) | 0x80);
 109 }
 110
 111
 112 static int wait_for_bb(struct i2c_algo_iic_data *adap)
 113 {
 114         int timeout = DEF_TIMEOUT;
 115         short status;
 116
 117         status = iic_inw(adap, ITE_I2CHSR);
 118 #ifndef STUB_I2C
 119         while (timeout-- && (status & ITE_I2CHSR_HB)) {
 120                 udelay(1000); /* How much is this? */
 121                 status = iic_inw(adap, ITE_I2CHSR);
 122         }
 123 #endif
 124         if (timeout<=0) {
 125                 printk(KERN_ERR "Timeout, host is busy\n");
 126                 iic_reset(adap);
 127         }
 128         return(timeout<=0);
 129 }
 130
 131 /*
 132  * Puts this process to sleep for a period equal to timeout
 133  */
 134 static inline void iic_sleep(unsigned long timeout)
 135 {
 136         schedule_timeout( timeout * HZ);
 137 }
 138
 139 /* After we issue a transaction on the IIC bus, this function
 140  * is called.  It puts this process to sleep until we get an interrupt from
 141  * from the controller telling us that the transaction we requested in complete.
 142  */
 143 static int wait_for_pin(struct i2c_algo_iic_data *adap, short *status) {
 144
 145         int timeout = DEF_TIMEOUT;
 146
 147         timeout = wait_for_bb(adap);
 148         if (timeout) {
 149                 DEB2(printk("Timeout waiting for host not busy\n");)
 150                 return -EIO;
 151         }
 152         timeout = DEF_TIMEOUT;
 153
 154         *status = iic_inw(adap, ITE_I2CHSR);
 155 #ifndef STUB_I2C
 156         while (timeout-- && !(*status & ITE_I2CHSR_TDI)) {
 157            adap->waitforpin();
 158            *status = iic_inw(adap, ITE_I2CHSR);
 159         }
 160 #endif
 161         if (timeout <= 0)
 162                 return(-1);
 163         else
 164                 return(0);
 165 }
 166
 167 static int wait_for_fe(struct i2c_algo_iic_data *adap, short *status)
 168 {
 169         int timeout = DEF_TIMEOUT;
 170
 171         *status = iic_inw(adap, ITE_I2CFSR);
 172 #ifndef STUB_I2C
 173         while (timeout-- && (*status & ITE_I2CFSR_FE)) {
 174                 udelay(1000);
 175                 iic_inw(adap, ITE_I2CFSR);
 176         }
 177 #endif
 178         if (timeout <= 0)
 179                 return(-1);
 180         else
 181                 return(0);
 182 }
 183
 184 static int iic_init (struct i2c_algo_iic_data *adap)
 185 {
 186         short i;
 187
 188         /* Clear bit 7 to set I2C to normal operation mode */
 189         i=iic_inw(adap, PM_DSR)& 0xff7f;
 190         iic_outw(adap, PM_DSR, i);
 191
 192         /* set IT_GPCCR port C bit 2&3 as function 2 */
 193         i = iic_inw(adap, GPIO_CCR) & 0xfc0f;
 194         iic_outw(adap,GPIO_CCR,i);
 195
 196         /* Clear slave address/sub-address */
 197         iic_outw(adap,ITE_I2CSAR, 0);
 198         iic_outw(adap,ITE_I2CSSAR, 0);
 199
 200         /* Set clock counter register */
 201         iic_outw(adap,ITE_I2CCKCNT, get_clock(adap));
 202
 203         /* Set START/reSTART/STOP time registers */
 204         iic_outw(adap,ITE_I2CSHDR, 0x0a);
 205         iic_outw(adap,ITE_I2CRSUR, 0x0a);
 206         iic_outw(adap,ITE_I2CPSUR, 0x0a);
 207
 208         /* Enable interrupts on completing the current transaction */
 209         iic_outw(adap,ITE_I2CHCR, ITE_I2CHCR_IE | ITE_I2CHCR_HCE);
 210
 211         /* Clear transfer count */
 212         iic_outw(adap,ITE_I2CFBCR, 0x0);
 213
 214         DEB2(printk("iic_init: Initialized IIC on ITE 0x%x\n",
 215                 iic_inw(adap, ITE_I2CHSR)));
 216         return 0;
 217 }
 218
 219
 220 /*
 221  * Sanity check for the adapter hardware - check the reaction of
 222  * the bus lines only if it seems to be idle.
 223  */
 224 static int test_bus(struct i2c_algo_iic_data *adap, char *name) {
 225 #if 0
 226         int scl,sda;
 227         sda=getsda(adap);
 228         if (adap->getscl==NULL) {
 229                 printk("test_bus: Warning: Adapter can't read from clock line - skipping test.\n");
 230                 return 0;
 231         }
 232         scl=getscl(adap);
 233         printk("test_bus: Adapter: %s scl: %d  sda: %d -- testing...\n",
 234         name,getscl(adap),getsda(adap));
 235         if (!scl || !sda ) {
 236                 printk("test_bus: %s seems to be busy.\n",adap->name);
 237                 goto bailout;
 238         }
 239         sdalo(adap);
 240         printk("test_bus:1 scl: %d  sda: %d \n",getscl(adap),
 241                getsda(adap));
 242         if ( 0 != getsda(adap) ) {
 243                 printk("test_bus: %s SDA stuck high!\n",name);
 244                 sdahi(adap);
 245                 goto bailout;
 246         }
 247         if ( 0 == getscl(adap) ) {
 248                 printk("test_bus: %s SCL unexpected low while pulling SDA low!\n",
 249                         name);
 250                 goto bailout;
 251         }
 252         sdahi(adap);
 253         printk("test_bus:2 scl: %d  sda: %d \n",getscl(adap),
 254                getsda(adap));
 255         if ( 0 == getsda(adap) ) {
 256                 printk("test_bus: %s SDA stuck low!\n",name);
 257                 sdahi(adap);
 258                 goto bailout;
 259         }
 260         if ( 0 == getscl(adap) ) {
 261                 printk("test_bus: %s SCL unexpected low while SDA high!\n",
 262                        adap->name);
 263         goto bailout;
 264         }
 265         scllo(adap);
 266         printk("test_bus:3 scl: %d  sda: %d \n",getscl(adap),
 267                getsda(adap));
 268         if ( 0 != getscl(adap) ) {
 269
 270                 sclhi(adap);
 271                 goto bailout;
 272         }
 273         if ( 0 == getsda(adap) ) {
 274                 printk("test_bus: %s SDA unexpected low while pulling SCL low!\n",
 275                         name);
 276                 goto bailout;
 277         }
 278         sclhi(adap);
 279         printk("test_bus:4 scl: %d  sda: %d \n",getscl(adap),
 280                getsda(adap));
 281         if ( 0 == getscl(adap) ) {
 282                 printk("test_bus: %s SCL stuck low!\n",name);
 283                 sclhi(adap);
 284                 goto bailout;
 285         }
 286         if ( 0 == getsda(adap) ) {
 287                 printk("test_bus: %s SDA unexpected low while SCL high!\n",
 288                         name);
 289                 goto bailout;
 290         }
 291         printk("test_bus: %s passed test.\n",name);
 292         return 0;
 293 bailout:
 294         sdahi(adap);
 295         sclhi(adap);
 296         return -ENODEV;
 297 #endif
 298         return (0);
 299 }
 300
 301 /* ----- Utility functions
 302  */
 303
 304
 305 /* Verify the device we want to talk to on the IIC bus really exists. */
 306 static inline int try_address(struct i2c_algo_iic_data *adap,
 307                        unsigned int addr, int retries)
 308 {
 309         int i, ret = -1;
 310         short status;
 311
 312         for (i=0;i<retries;i++) {
 313                 iic_outw(adap, ITE_I2CSAR, addr);
 314                 iic_start(adap);
 315                 if (wait_for_pin(adap, &status) == 0) {
 316                         if ((status & ITE_I2CHSR_DNE) == 0) {
 317                                 iic_stop(adap);
 318                                 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
 319                                 ret=1;
 320                                 break;  /* success! */
 321                         }
 322                 }
 323                 iic_stop(adap);
 324                 udelay(adap->udelay);
 325         }
 326         DEB2(if (i) printk("try_address: needed %d retries for 0x%x\n",i,
 327                            addr));
 328         return ret;
 329 }
 330
 331
 332 static int iic_sendbytes(struct i2c_adapter *i2c_adap,const char *buf,
 333                          int count)
 334 {
 335         struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
 336         int wrcount=0, timeout;
 337         short status;
 338         int loops, remainder, i, j;
 339         union {
 340                 char byte[2];
 341                 unsigned short word;
 342         } tmp;
 343
 344         iic_outw(adap, ITE_I2CSSAR, (unsigned short)buf[wrcount++]);
 345         count--;
 346         if (count == 0)
 347                 return -EIO;
 348
 349         loops =  count / 32;            /* 32-byte FIFO */
 350         remainder = count % 32;
 351
 352         if(loops) {
 353                 for(i=0; i<loops; i++) {
 354
 355                         iic_outw(adap, ITE_I2CFBCR, 32);
 356                         for(j=0; j<32/2; j++) {
 357                                 tmp.byte[1] = buf[wrcount++];
 358                                 tmp.byte[0] = buf[wrcount++];
 359                                 iic_outw(adap, ITE_I2CFDR, tmp.word);
 360                         }
 361
 362                         /* status FIFO overrun */
 363                         iic_inw(adap, ITE_I2CFSR);
 364                         iic_inw(adap, ITE_I2CFBCR);
 365
 366                         iic_outw(adap, ITE_I2CHCR, ITE_WRITE);  /* Issue WRITE command */
 367
 368                         /* Wait for transmission to complete */
 369                         timeout = wait_for_pin(adap, &status);
 370                         if(timeout) {
 371                                 iic_stop(adap);
 372                                 printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
 373                                 return -EREMOTEIO; /* got a better one ?? */
 374         }
 375                         if (status & ITE_I2CHSR_DB) {
 376                                 iic_stop(adap);
 377                                 printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
 378                                 return -EREMOTEIO; /* got a better one ?? */
 379                         }
 380                 }
 381         }
 382         if(remainder) {
 383                 iic_outw(adap, ITE_I2CFBCR, remainder);
 384                 for(i=0; i<remainder/2; i++) {
 385                         tmp.byte[1] = buf[wrcount++];
 386                         tmp.byte[0] = buf[wrcount++];
 387                         iic_outw(adap, ITE_I2CFDR, tmp.word);
 388                 }
 389
 390                 /* status FIFO overrun */
 391                 iic_inw(adap, ITE_I2CFSR);
 392                 iic_inw(adap, ITE_I2CFBCR);
 393
 394                 iic_outw(adap, ITE_I2CHCR, ITE_WRITE);  /* Issue WRITE command */
 395
 396                 timeout = wait_for_pin(adap, &status);
 397                 if(timeout) {
 398                         iic_stop(adap);
 399                         printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
 400                         return -EREMOTEIO; /* got a better one ?? */
 401                 }
 402 #ifndef STUB_I2C
 403                 if (status & ITE_I2CHSR_DB) {
 404                         iic_stop(adap);
 405                         printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
 406                         return -EREMOTEIO; /* got a better one ?? */
 407                 }
 408 #endif
 409         }
 410         iic_stop(adap);
 411         return wrcount;
 412 }
 413
 414
 415 static int iic_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count,
 416         int sread)
 417 {
 418         int rdcount=0, i, timeout;
 419         short status;
 420         struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
 421         int loops, remainder, j;
 422         union {
 423                 char byte[2];
 424                 unsigned short word;
 425         } tmp;
 426
 427         loops = count / 32;                             /* 32-byte FIFO */
 428         remainder = count % 32;
 429
 430         if(loops) {
 431                 for(i=0; i<loops; i++) {
 432                         iic_outw(adap, ITE_I2CFBCR, 32);
 433                         if (sread)
 434                                 iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
 435                         else
 436                                 iic_outw(adap, ITE_I2CHCR, ITE_READ);           /* Issue READ command */
 437
 438                         timeout = wait_for_pin(adap, &status);
 439                         if(timeout) {
 440                                 iic_stop(adap);
 441                                 printk("iic_readbytes:  %s read timeout.\n", i2c_adap->name);
 442                                 return (-1);
 443                         }
 444 #ifndef STUB_I2C
 445                         if (status & ITE_I2CHSR_DB) {
 446                                 iic_stop(adap);
 447                                 printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
 448                                 return (-1);
 449                         }
 450 #endif
 451
 452                         timeout = wait_for_fe(adap, &status);
 453                         if(timeout) {
 454                                 iic_stop(adap);
 455                                 printk("iic_readbytes:  %s FIFO is empty\n", i2c_adap->name);
 456                                 return (-1);
 457                         }
 458
 459                         for(j=0; j<32/2; j++) {
 460                                 tmp.word = iic_inw(adap, ITE_I2CFDR);
 461                                 buf[rdcount++] = tmp.byte[1];
 462                                 buf[rdcount++] = tmp.byte[0];
 463                         }
 464
 465                         /* status FIFO underrun */
 466                         iic_inw(adap, ITE_I2CFSR);
 467
 468                 }
 469         }
 470
 471
 472         if(remainder) {
 473                 remainder=(remainder+1)/2 * 2;
 474                 iic_outw(adap, ITE_I2CFBCR, remainder);
 475                 if (sread)
 476                         iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
 477                 else
 478                 iic_outw(adap, ITE_I2CHCR, ITE_READ);           /* Issue READ command */
 479
 480                 timeout = wait_for_pin(adap, &status);
 481                 if(timeout) {
 482                         iic_stop(adap);
 483                         printk("iic_readbytes:  %s read timeout.\n", i2c_adap->name);
 484                         return (-1);
 485                 }
 486 #ifndef STUB_I2C
 487                 if (status & ITE_I2CHSR_DB) {
 488                         iic_stop(adap);
 489                         printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
 490                         return (-1);
 491                 }
 492 #endif
 493                 timeout = wait_for_fe(adap, &status);
 494                 if(timeout) {
 495                         iic_stop(adap);
 496                         printk("iic_readbytes:  %s FIFO is empty\n", i2c_adap->name);
 497                         return (-1);
 498                 }
 499
 500                 for(i=0; i<(remainder+1)/2; i++) {
 501                         tmp.word = iic_inw(adap, ITE_I2CFDR);
 502                         buf[rdcount++] = tmp.byte[1];
 503                         buf[rdcount++] = tmp.byte[0];
 504                 }
 505
 506                 /* status FIFO underrun */
 507                 iic_inw(adap, ITE_I2CFSR);
 508
 509         }
 510
 511         iic_stop(adap);
 512         return rdcount;
 513 }
 514
 515
 516 /* This function implements combined transactions.  Combined
 517  * transactions consist of combinations of reading and writing blocks of data.
 518  * Each transfer (i.e. a read or a write) is separated by a repeated start
 519  * condition.
 520  */
 521 #if 0
 522 static int iic_combined_transaction(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
 523 {
 524    int i;
 525    struct i2c_msg *pmsg;
 526    int ret;
 527
 528    DEB2(printk("Beginning combined transaction\n"));
 529
 530    for(i=0; i<(num-1); i++) {
 531       pmsg = &msgs[i];
 532       if(pmsg->flags & I2C_M_RD) {
 533          DEB2(printk("  This one is a read\n"));
 534          ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
 535       }
 536       else if(!(pmsg->flags & I2C_M_RD)) {
 537          DEB2(printk("This one is a write\n"));
 538          ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
 539       }
 540    }
 541    /* Last read or write segment needs to be terminated with a stop */
 542    pmsg = &msgs[i];
 543
 544    if(pmsg->flags & I2C_M_RD) {
 545       DEB2(printk("Doing the last read\n"));
 546       ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
 547    }
 548    else if(!(pmsg->flags & I2C_M_RD)) {
 549       DEB2(printk("Doing the last write\n"));
 550       ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
 551    }
 552
 553    return ret;
 554 }
 555 #endif
 556
 557
 558 /* Whenever we initiate a transaction, the first byte clocked
 559  * onto the bus after the start condition is the address (7 bit) of the
 560  * device we want to talk to.  This function manipulates the address specified
 561  * so that it makes sense to the hardware when written to the IIC peripheral.
 562  *
 563  * Note: 10 bit addresses are not supported in this driver, although they are
 564  * supported by the hardware.  This functionality needs to be implemented.
 565  */
 566 static inline int iic_doAddress(struct i2c_algo_iic_data *adap,
 567                                 struct i2c_msg *msg, int retries)
 568 {
 569         unsigned short flags = msg->flags;
 570         unsigned int addr;
 571         int ret;
 572
 573 /* Ten bit addresses not supported right now */
 574         if ( (flags & I2C_M_TEN)  ) {
 575 #if 0
 576                 addr = 0xf0 | (( msg->addr >> 7) & 0x03);
 577                 DEB2(printk("addr0: %d\n",addr));
 578                 ret = try_address(adap, addr, retries);
 579                 if (ret!=1) {
 580                         printk("iic_doAddress: died at extended address code.\n");
 581                         return -EREMOTEIO;
 582                 }
 583                 iic_outw(adap,msg->addr & 0x7f);
 584                 if (ret != 1) {
 585                         printk("iic_doAddress: died at 2nd address code.\n");
 586                         return -EREMOTEIO;
 587                 }
 588                 if ( flags & I2C_M_RD ) {
 589                         i2c_repstart(adap);
 590                         addr |= 0x01;
 591                         ret = try_address(adap, addr, retries);
 592                         if (ret!=1) {
 593                                 printk("iic_doAddress: died at extended address code.\n");
 594                                 return -EREMOTEIO;
 595                         }
 596                 }
 597 #endif
 598         } else {
 599
 600                 addr = ( msg->addr << 1 );
 601
 602 #if 0
 603                 if (flags & I2C_M_RD )
 604                         addr |= 1;
 605                 if (flags & I2C_M_REV_DIR_ADDR )
 606                         addr ^= 1;
 607 #endif
 608
 609                 if (iic_inw(adap, ITE_I2CSAR) != addr) {
 610                         iic_outw(adap, ITE_I2CSAR, addr);
 611                         ret = try_address(adap, addr, retries);
 612                         if (ret!=1) {
 613                                 printk("iic_doAddress: died at address code.\n");
 614                                 return -EREMOTEIO;
 615                         }
 616                 }
 617
 618   }
 619
 620         return 0;
 621 }
 622
 623
 624 /* Description: Prepares the controller for a transaction (clearing status
 625  * registers, data buffers, etc), and then calls either iic_readbytes or
 626  * iic_sendbytes to do the actual transaction.
 627  *
 628  * still to be done: Before we issue a transaction, we should
 629  * verify that the bus is not busy or in some unknown state.
 630  */
 631 static int iic_xfer(struct i2c_adapter *i2c_adap,
 632                     struct i2c_msg msgs[],
 633                     int num)
 634 {
 635         struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
 636         struct i2c_msg *pmsg;
 637         int i = 0;
 638         int ret, timeout;
 639
 640         pmsg = &msgs[i];
 641
 642         if(!pmsg->len) {
 643                 DEB2(printk("iic_xfer: read/write length is 0\n");)
 644                 return -EIO;
 645         }
 646         if(!(pmsg->flags & I2C_M_RD) && (!(pmsg->len)%2) ) {
 647                 DEB2(printk("iic_xfer: write buffer length is not odd\n");)
 648                 return -EIO;
 649         }
 650
 651         /* Wait for any pending transfers to complete */
 652         timeout = wait_for_bb(adap);
 653         if (timeout) {
 654                 DEB2(printk("iic_xfer: Timeout waiting for host not busy\n");)
 655                 return -EIO;
 656         }
 657
 658         /* Flush FIFO */
 659         iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
 660
 661         /* Load address */
 662         ret = iic_doAddress(adap, pmsg, i2c_adap->retries);
 663         if (ret)
 664                 return -EIO;
 665
 666 #if 0
 667         /* Combined transaction (read and write) */
 668         if(num > 1) {
 669            DEB2(printk("iic_xfer: Call combined transaction\n"));
 670            ret = iic_combined_transaction(i2c_adap, msgs, num);
 671   }
 672 #endif
 673
 674         DEB3(printk("iic_xfer: Msg %d, addr=0x%x, flags=0x%x, len=%d\n",
 675                 i, msgs[i].addr, msgs[i].flags, msgs[i].len);)
 676
 677         if(pmsg->flags & I2C_M_RD)              /* Read */
 678                 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, 0);
 679         else {                                                                                                  /* Write */
 680                 udelay(1000);
 681                 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len);
 682         }
 683
 684         if (ret != pmsg->len)
 685                 DEB3(printk("iic_xfer: error or fail on read/write %d bytes.\n",ret));
 686         else
 687                 DEB3(printk("iic_xfer: read/write %d bytes.\n",ret));
 688
 689         return ret;
 690 }
 691
 692
 693 /* Implements device specific ioctls.  Higher level ioctls can
 694  * be found in i2c-core.c and are typical of any i2c controller (specifying
 695  * slave address, timeouts, etc).  These ioctls take advantage of any hardware
 696  * features built into the controller for which this algorithm-adapter set
 697  * was written.  These ioctls allow you to take control of the data and clock
 698  * lines and set the either high or low,
 699  * similar to a GPIO pin.
 700  */
 701 static int algo_control(struct i2c_adapter *adapter,
 702         unsigned int cmd, unsigned long arg)
 703 {
 704
 705   struct i2c_algo_iic_data *adap = adapter->algo_data;
 706   struct i2c_iic_msg s_msg;
 707   char *buf;
 708         int ret;
 709
 710   if (cmd == I2C_SREAD) {
 711                 if(copy_from_user(&s_msg, (struct i2c_iic_msg *)arg,
 712                                 sizeof(struct i2c_iic_msg)))
 713                         return -EFAULT;
 714                 buf = kmalloc(s_msg.len, GFP_KERNEL);
 715                 if (buf== NULL)
 716                         return -ENOMEM;
 717
 718                 /* Flush FIFO */
 719                 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
 720
 721                 /* Load address */
 722                 iic_outw(adap, ITE_I2CSAR,s_msg.addr<<1);
 723                 iic_outw(adap, ITE_I2CSSAR,s_msg.waddr & 0xff);
 724
 725                 ret = iic_readbytes(adapter, buf, s_msg.len, 1);
 726                 if (ret>=0) {
 727                         if(copy_to_user( s_msg.buf, buf, s_msg.len) )
 728                                 ret = -EFAULT;
 729                 }
 730                 kfree(buf);
 731         }
 732         return 0;
 733 }
 734
 735
 736 static u32 iic_func(struct i2c_adapter *adap)
 737 {
 738         return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
 739                I2C_FUNC_PROTOCOL_MANGLING;
 740 }
 741
 742 /* -----exported algorithm data: -------------------------------------  */
 743
 744 static struct i2c_algorithm iic_algo = {
 745         "ITE IIC algorithm",
 746         I2C_ALGO_IIC,
 747         iic_xfer,               /* master_xfer  */
 748         NULL,                           /* smbus_xfer   */
 749         NULL,                           /* slave_xmit           */
 750         NULL,                           /* slave_recv           */
 751         algo_control,                   /* ioctl                */
 752         iic_func,                       /* functionality        */
 753 };
 754
 755
 756 /*
 757  * registering functions to load algorithms at runtime
 758  */
 759 int i2c_iic_add_bus(struct i2c_adapter *adap)
 760 {
 761         int i;
 762         short status;
 763         struct i2c_algo_iic_data *iic_adap = adap->algo_data;
 764
 765         if (iic_test) {
 766                 int ret = test_bus(iic_adap, adap->name);
 767                 if (ret<0)
 768                         return -ENODEV;
 769         }
 770
 771         DEB2(printk("i2c-algo-ite: hw routines for %s registered.\n",
 772                     adap->name));
 773
 774         /* register new adapter to i2c module... */
 775
 776         adap->id |= iic_algo.id;
 777         adap->algo = &iic_algo;
 778
 779         adap->timeout = 100;    /* default values, should       */
 780         adap->retries = 3;              /* be replaced by defines       */
 781         adap->flags = 0;
 782
 783 #ifdef MODULE
 784         MOD_INC_USE_COUNT;
 785 #endif
 786
 787         i2c_add_adapter(adap);
 788         iic_init(iic_adap);
 789
 790         /* scan bus */
 791         /* By default scanning the bus is turned off. */
 792         if (iic_scan) {
 793                 printk(KERN_INFO " i2c-algo-ite: scanning bus %s.\n",
 794                        adap->name);
 795                 for (i = 0x00; i < 0xff; i+=2) {
 796                         iic_outw(iic_adap, ITE_I2CSAR, i);
 797                         iic_start(iic_adap);
 798                         if ( (wait_for_pin(iic_adap, &status) == 0) &&
 799                             ((status & ITE_I2CHSR_DNE) == 0) ) {
 800                                 printk(KERN_INFO "\n(%02x)\n",i>>1);
 801                         } else {
 802                                 printk(KERN_INFO ".");
 803                                 iic_reset(iic_adap);
 804                         }
 805                         udelay(iic_adap->udelay);
 806                 }
 807         }
 808         return 0;
 809 }
 810
 811
 812 int i2c_iic_del_bus(struct i2c_adapter *adap)
 813 {
 814         int res;
 815         if ((res = i2c_del_adapter(adap)) < 0)
 816                 return res;
 817         DEB2(printk("i2c-algo-ite: adapter unregistered: %s\n",adap->name));
 818
 819 #ifdef MODULE
 820         MOD_DEC_USE_COUNT;
 821 #endif
 822         return 0;
 823 }
 824
 825
 826 int __init i2c_algo_iic_init (void)
 827 {
 828         printk(KERN_INFO "ITE iic (i2c) algorithm module\n");
 829         return 0;
 830 }
 831
 832
 833 void i2c_algo_iic_exit(void)
 834 {
 835         return;
 836 }
 837
 838
 839 EXPORT_SYMBOL(i2c_iic_add_bus);
 840 EXPORT_SYMBOL(i2c_iic_del_bus);
 841
 842 /* The MODULE_* macros resolve to nothing if MODULES is not defined
 843  * when this file is compiled.
 844  */
 845 MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
 846 MODULE_DESCRIPTION("ITE iic algorithm");
 847 MODULE_LICENSE("GPL");
 848
 849 MODULE_PARM(iic_test, "i");
 850 MODULE_PARM(iic_scan, "i");
 851 MODULE_PARM(i2c_debug,"i");
 852
 853 MODULE_PARM_DESC(iic_test, "Test if the I2C bus is available");
 854 MODULE_PARM_DESC(iic_scan, "Scan for active chips on the bus");
 855 MODULE_PARM_DESC(i2c_debug,
 856         "debug level - 0 off; 1 normal; 2,3 more verbose; 9 iic-protocol");
 857
 858
 859 /* This function resolves to init_module (the function invoked when a module
 860  * is loaded via insmod) when this file is compiled with MODULES defined.
 861  * Otherwise (i.e. if you want this driver statically linked to the kernel),
 862  * a pointer to this function is stored in a table and called
 863  * during the intialization of the kernel (in do_basic_setup in /init/main.c)
 864  *
 865  * All this functionality is complements of the macros defined in linux/init.h
 866  */
 867 module_init(i2c_algo_iic_init);
 868
 869
 870 /* If MODULES is defined when this file is compiled, then this function will
 871  * resolved to cleanup_module.
 872  */
 873 module_exit(i2c_algo_iic_exit);