2 * linux/drivers/ide/icside.c
4 * Copyright (c) 1996,1997 Russell King.
7 * 08-Jun-1996 RMK Created
8 * 12-Sep-1997 RMK Added interrupt enable/disable
9 * 17-Apr-1999 RMK Added support for V6 EASI
10 * 22-May-1999 RMK Added support for V6 DMA
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/slab.h>
18 #include <linux/blkdev.h>
19 #include <linux/errno.h>
20 #include <linux/hdreg.h>
21 #include <linux/ide.h>
22 #include <linux/pci.h>
23 #include <linux/init.h>
26 #include <asm/ecard.h>
29 #include "ide-noise.h"
32 * FIXME: We want to drop the the MACRO CRAP!
35 * ec->iops->in{b/w/l}_p
36 * ec->iops->out{b/w/l}
37 * ec->iops->out{b/w/l}_p
39 * the new core supports clean MMIO calls and other goodies
43 * Maximum number of interfaces per card
47 #define ICS_IDENT_OFFSET 0x8a0
49 #define ICS_ARCIN_V5_INTRSTAT 0x000
50 #define ICS_ARCIN_V5_INTROFFSET 0x001
51 #define ICS_ARCIN_V5_IDEOFFSET 0xa00
52 #define ICS_ARCIN_V5_IDEALTOFFSET 0xae0
53 #define ICS_ARCIN_V5_IDESTEPPING 4
55 #define ICS_ARCIN_V6_IDEOFFSET_1 0x800
56 #define ICS_ARCIN_V6_INTROFFSET_1 0x880
57 #define ICS_ARCIN_V6_INTRSTAT_1 0x8a4
58 #define ICS_ARCIN_V6_IDEALTOFFSET_1 0x8e0
59 #define ICS_ARCIN_V6_IDEOFFSET_2 0xc00
60 #define ICS_ARCIN_V6_INTROFFSET_2 0xc80
61 #define ICS_ARCIN_V6_INTRSTAT_2 0xca4
62 #define ICS_ARCIN_V6_IDEALTOFFSET_2 0xce0
63 #define ICS_ARCIN_V6_IDESTEPPING 4
66 unsigned int dataoffset;
67 unsigned int ctrloffset;
68 unsigned int stepping;
71 static struct cardinfo icside_cardinfo_v5 = {
72 ICS_ARCIN_V5_IDEOFFSET,
73 ICS_ARCIN_V5_IDEALTOFFSET,
74 ICS_ARCIN_V5_IDESTEPPING
77 static struct cardinfo icside_cardinfo_v6_1 = {
78 ICS_ARCIN_V6_IDEOFFSET_1,
79 ICS_ARCIN_V6_IDEALTOFFSET_1,
80 ICS_ARCIN_V6_IDESTEPPING
83 static struct cardinfo icside_cardinfo_v6_2 = {
84 ICS_ARCIN_V6_IDEOFFSET_2,
85 ICS_ARCIN_V6_IDEALTOFFSET_2,
86 ICS_ARCIN_V6_IDESTEPPING
89 static const card_ids icside_cids[] = {
90 { MANU_ICS, PROD_ICS_IDE },
91 { MANU_ICS2, PROD_ICS2_IDE },
101 /* ---------------- Version 5 PCB Support Functions --------------------- */
102 /* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
103 * Purpose : enable interrupts from card
105 static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
107 unsigned int memc_port = (unsigned int)ec->irq_data;
108 outb(0, memc_port + ICS_ARCIN_V5_INTROFFSET);
111 /* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
112 * Purpose : disable interrupts from card
114 static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
116 unsigned int memc_port = (unsigned int)ec->irq_data;
117 inb(memc_port + ICS_ARCIN_V5_INTROFFSET);
120 static const expansioncard_ops_t icside_ops_arcin_v5 = {
121 icside_irqenable_arcin_v5,
122 icside_irqdisable_arcin_v5,
130 /* ---------------- Version 6 PCB Support Functions --------------------- */
131 /* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
132 * Purpose : enable interrupts from card
134 static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
136 unsigned int ide_base_port = (unsigned int)ec->irq_data;
138 outb(0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_1);
139 outb(0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_2);
142 /* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
143 * Purpose : disable interrupts from card
145 static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
147 unsigned int ide_base_port = (unsigned int)ec->irq_data;
149 inb(ide_base_port + ICS_ARCIN_V6_INTROFFSET_1);
150 inb(ide_base_port + ICS_ARCIN_V6_INTROFFSET_2);
153 /* Prototype: icside_irqprobe(struct expansion_card *ec)
154 * Purpose : detect an active interrupt from card
156 static int icside_irqpending_arcin_v6(struct expansion_card *ec)
158 unsigned int ide_base_port = (unsigned int)ec->irq_data;
160 return inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
161 inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
164 static const expansioncard_ops_t icside_ops_arcin_v6 = {
165 icside_irqenable_arcin_v6,
166 icside_irqdisable_arcin_v6,
167 icside_irqpending_arcin_v6,
173 /* Prototype: icside_identifyif (struct expansion_card *ec)
174 * Purpose : identify IDE interface type
175 * Notes : checks the description string
177 static iftype_t __init icside_identifyif (struct expansion_card *ec)
183 iftype = ics_if_unknown;
185 addr = ecard_address (ec, ECARD_IOC, ECARD_FAST) + ICS_IDENT_OFFSET;
188 id |= (inb(addr + 1) & 1) << 1;
189 id |= (inb(addr + 2) & 1) << 2;
190 id |= (inb(addr + 3) & 1) << 3;
194 printk("icside: A3IN unsupported\n");
198 printk("icside: A3USER unsupported\n");
201 case 3: /* ARCIN V6 */
202 printk(KERN_DEBUG "icside: detected ARCIN V6 in slot %d\n", ec->slot_no);
203 iftype = ics_if_arcin_v6;
206 case 15:/* ARCIN V5 (no id) */
207 printk(KERN_DEBUG "icside: detected ARCIN V5 in slot %d\n", ec->slot_no);
208 iftype = ics_if_arcin_v5;
211 default:/* we don't know - complain very loudly */
212 printk("icside: ***********************************\n");
213 printk("icside: *** UNKNOWN ICS INTERFACE id=%d ***\n", id);
214 printk("icside: ***********************************\n");
215 printk("icside: please report this to linux@arm.linux.org.uk\n");
216 printk("icside: defaulting to ARCIN V5\n");
217 iftype = ics_if_arcin_v5;
224 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
228 * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
229 * There is only one DMA controller per card, which means that only
230 * one drive can be accessed at one time. NOTE! We do not enforce that
231 * here, but we rely on the main IDE driver spotting that both
232 * interfaces use the same IRQ, which should guarantee this.
234 #define NR_ENTRIES 256
235 #define TABLE_SIZE (NR_ENTRIES * 8)
237 static int ide_build_sglist(ide_hwif_t *hwif, struct request *rq)
239 struct buffer_head *bh;
240 struct scatterlist *sg = hwif->sg_table;
244 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
246 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
249 unsigned char *virt_addr = bh->b_data;
250 unsigned int size = bh->b_size;
252 while ((bh = bh->b_reqnext) != NULL) {
253 if ((virt_addr + size) != (unsigned char *)bh->b_data)
257 memset(&sg[nents], 0, sizeof(*sg));
258 sg[nents].address = virt_addr;
259 sg[nents].length = size;
261 } while (bh != NULL);
263 return pci_map_sg(NULL, sg, nents, hwif->sg_dma_direction);
267 icside_build_dmatable(ide_drive_t *drive, int ddir)
269 return HWIF(drive)->sg_nents = ide_build_sglist(HWIF(drive), HWGROUP(drive)->rq, ddir);
272 /* Teardown mappings after DMA has completed. */
273 static void icside_destroy_dmatable(ide_drive_t *drive)
275 struct scatterlist *sg = HWIF(drive)->sg_table;
276 int nents = HWIF(drive)->sg_nents;
278 pci_unmap_sg(NULL, sg, nents, HWIF(drive)->sg_dma_direction);
282 icside_config_if(ide_drive_t *drive, int xfer_mode)
284 int func = ide_dma_off;
289 * The cycle time is limited to 250ns by the r/w
290 * pulse width (90ns), however we should still
291 * have a maximum burst transfer rate of 8MB/s.
293 drive->drive_data = 250;
297 drive->drive_data = 250;
301 drive->drive_data = 480;
305 drive->drive_data = 0;
309 if (!drive->init_speed)
310 drive->init_speed = (u8) xfer_mode;
312 if (drive->drive_data &&
313 ide_config_drive_speed(drive, (u8) xfer_mode) == 0)
316 drive->drive_data = 480;
318 printk("%s: %s selected (peak %dMB/s)\n", drive->name,
319 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
321 drive->current_speed = (u8) xfer_mode;
327 icside_set_speed(ide_drive_t *drive, u8 speed)
329 return icside_config_if(drive, speed);
333 * dma_intr() is the handler for disk read/write DMA interrupts
335 static ide_startstop_t icside_dmaintr(ide_drive_t *drive)
337 u8 dma_stat = HWIF(drive)->ide_dma_end(drive);
338 /* get drive status */
339 u8 stat = HWIF(drive)->INB(IDE_STATUS_REG);
342 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
344 struct request *rq = HWGROUP(drive)->rq;
345 rq = HWGROUP(drive)->rq;
346 for (i = rq->nr_sectors; i > 0;) {
347 i -= rq->current_nr_sectors;
348 DRIVER(drive)->end_request(drive, 1);
352 printk("%s: dma_intr: bad DMA status (dma_stat=%x)\n",
353 drive->name, dma_stat);
355 return DRIVER(drive)->error(drive, "dma_intr", stat);
359 * The following is a sick duplication from ide-dma.c ;(
361 * This should be defined in one place only.
363 struct drive_list_entry {
368 static struct drive_list_entry drive_whitelist [] = {
369 { "Micropolis 2112A", "ALL" },
370 { "CONNER CTMA 4000", "ALL" },
371 { "CONNER CTT8000-A", "ALL" },
372 { "ST34342A", "ALL" },
376 static struct drive_list_entry drive_blacklist [] = {
377 { "WDC AC11000H", "ALL" },
378 { "WDC AC22100H", "ALL" },
379 { "WDC AC32500H", "ALL" },
380 { "WDC AC33100H", "ALL" },
381 { "WDC AC31600H", "ALL" },
382 { "WDC AC32100H", "24.09P07" },
383 { "WDC AC23200L", "21.10N21" },
384 { "Compaq CRD-8241B", "ALL" },
385 { "CRD-8400B", "ALL" },
386 { "CRD-8480B", "ALL" },
387 { "CRD-8480C", "ALL" },
388 { "CRD-8482B", "ALL" },
390 { "SanDisk SDP3B", "ALL" },
391 { "SanDisk SDP3B-64", "ALL" },
392 { "SANYO CD-ROM CRD", "ALL" },
393 { "HITACHI CDR-8", "ALL" },
394 { "HITACHI CDR-8335", "ALL" },
395 { "HITACHI CDR-8435", "ALL" },
396 { "Toshiba CD-ROM XM-6202B", "ALL" },
397 { "CD-532E-A", "ALL" },
398 { "E-IDE CD-ROM CR-840", "ALL" },
399 { "CD-ROM Drive/F5A", "ALL" },
400 { "RICOH CD-R/RW MP7083A", "ALL" },
401 { "WPI CDD-820", "ALL" },
402 { "SAMSUNG CD-ROM SC-148C", "ALL" },
403 { "SAMSUNG CD-ROM SC-148F", "ALL" },
404 { "SAMSUNG CD-ROM SC", "ALL" },
405 { "SanDisk SDP3B-64", "ALL" },
406 { "SAMSUNG CD-ROM SN-124", "ALL" },
407 { "PLEXTOR CD-R PX-W8432T", "ALL" },
408 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
409 { "_NEC DV5800A", "ALL" },
413 static int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
415 for ( ; drive_table->id_model ; drive_table++)
416 if ((!strcmp(drive_table->id_model, id->model)) &&
417 ((!strstr(drive_table->id_firmware, id->fw_rev)) ||
418 (!strcmp(drive_table->id_firmware, "ALL"))))
424 * For both Blacklisted and Whitelisted drives.
425 * This is setup to be called as an extern for future support
426 * to other special driver code.
428 int check_drive_good_lists (ide_drive_t *drive)
430 struct hd_driveid *id = drive->id;
431 return in_drive_list(id, drive_whitelist);
434 int check_drive_bad_lists (ide_drive_t *drive)
436 struct hd_driveid *id = drive->id;
437 int blacklist = in_drive_list(id, drive_blacklist);
439 printk("%s: Disabling DMA for %s\n", drive->name, id->model);
443 int icside_dma_check(ide_drive_t *drive)
445 struct hd_driveid *id = drive->id;
446 ide_hwif_t *hwif = HWIF(drive);
447 int autodma = hwif->autodma;
448 int xfer_mode = XFER_PIO_2;
450 if (!id || !(id->capability & 1) || !autodma)
451 return hwif->ide_dma_off_quietly(drive);
454 * Consult the list of known "bad" drives
456 if (check_drive_bad_lists(drive))
457 return hwif->ide_dma_off(drive);
460 * Enable DMA on any drive that has multiword DMA
462 if (id->field_valid & 2) {
463 if (id->dma_mword & 4) {
464 xfer_mode = XFER_MW_DMA_2;
465 } else if (id->dma_mword & 2) {
466 xfer_mode = XFER_MW_DMA_1;
467 } else if (id->dma_mword & 1) {
468 xfer_mode = XFER_MW_DMA_0;
474 * Consult the list of known "good" drives
476 if (check_drive_good_lists(drive)) {
477 if (id->eide_dma_time > 150)
479 xfer_mode = XFER_MW_DMA_1;
483 if (icside_config_if(drive, xfer_mode))
484 return hwif->ide_dma_on(drive);
485 return hwif->ide_dma_off(drive);
488 int icside_dma_verbose(ide_drive_t *drive)
494 int icside_dma_test_irq(ide_drive_t *drive)
496 ide_hwif_t *hwif = HWIF(drive);
497 return inb((unsigned long)hwif->hw.priv) & 1;
500 int icside_dma_host_off(ide_drive_t *drive)
505 int icside_dma_off_quietly(ide_drive_t *drive)
507 drive->using_dma = 0;
508 return icside_dma_host_off(drive);
511 int icside_dma_off(ide_drive_t *drive)
513 printk("%s: DMA disabled\n", drive->name);
514 return icside_dma_off_quietly(drive);
517 int icside_dma_host_on(ide_drive_t *drive)
522 int icside_dma_on(ide_drive_t *drive)
524 drive->using_dma = 1;
525 return icside_dma_host_on(drive);
528 int icside_dma_begin(ide_drive_t *drive)
530 ide_hwif_t *hwif = HWIF(drive);
532 enable_dma(hwif->hw.dma);
536 int icside_dma_end(ide_drive_t *drive)
538 ide_hwif_t *hwif = HWIF(drive);
540 drive->waiting_for_dma = 0;
541 disable_dma(hwif->hw.dma);
542 icside_destroy_dmatable(drive);
543 return get_dma_residue(hwif->hw.dma) != 0;
546 int icside_dma_count (ide_drive_t *drive)
548 return icside_dma_begin(drive);
551 int icside_dma_read(ide_drive_t *drive)
553 ide_hwif_t *hwif = HWIF(drive);
554 // ide_task_t *args = HWGROUP(drive)->rq->special;
556 u8 lba48 = (drive->addressing == 1) ? 1 : 0;
557 task_ioreg_t command = WIN_NOP;
559 count = icside_build_dmatable(drive, PCI_DMA_FROMDEVICE);
562 disable_dma(hwif->hw.dma);
564 /* Route the DMA signals to
565 * to the correct interface.
567 HWIF(drive)->OUTB(hwif->select_data, hwif->config_data);
569 /* Select the correct timing
572 set_dma_speed(hwif->hw.dma, drive->drive_data);
574 set_dma_sg(hwif->hw.dma, HWIF(drive)->sg_table, count);
575 set_dma_mode(hwif->hw.dma, DMA_MODE_READ);
577 drive->waiting_for_dma = 1;
578 if (drive->media != ide_disk)
581 if (HWGROUP(drive)->handler != NULL) /* paranoia check */
583 ide_set_handler(drive, &icside_dmaintr, WAIT_CMD, NULL);
585 * FIX ME to use only ACB ide_task_t args Struct
589 ide_task_t *args = HWGROUP(drive)->rq->special;
590 command = args->tfRegister[IDE_COMMAND_OFFSET];
593 command = (lba48) ? WIN_READDMA_EXT : WIN_READDMA;
594 if (HWGROUP(drive)->rq->flags & REQ_DRIVE_TASKFILE) {
595 ide_task_t *args = HWGROUP(drive)->rq->special;
596 command = args->tfRegister[IDE_COMMAND_OFFSET];
599 /* issue cmd to drive */
600 HWIF(drive)->OUTB(command, IDE_COMMAND_REG);
602 return icside_dma_count(drive);
605 int icside_dma_write(ide_drive_t *drive)
607 ide_hwif_t *hwif = HWIF(drive);
608 // ide_task_t *args = HWGROUP(drive)->rq->special;
610 u8 lba48 = (drive->addressing == 1) ? 1 : 0;
611 task_ioreg_t command = WIN_NOP;
613 count = icside_build_dmatable(drive, PCI_DMA_TODEVICE);
616 disable_dma(hwif->hw.dma);
618 /* Route the DMA signals to
619 * to the correct interface.
621 HWIF(drive)->OUTB(hwif->select_data, hwif->config_data);
623 /* Select the correct timing
626 set_dma_speed(hwif->hw.dma, drive->drive_data);
628 set_dma_sg(hwif->hw.dma, HWIF(drive)->sg_table, count);
629 set_dma_mode(hwif->hw.dma, DMA_MODE_WRITE);
631 drive->waiting_for_dma = 1;
632 if (drive->media != ide_disk)
635 if (HWGROUP(drive)->handler != NULL)
637 ide_set_handler(drive, &icside_dmaintr, WAIT_CMD, NULL);
639 * FIX ME to use only ACB ide_task_t args Struct
643 ide_task_t *args = HWGROUP(drive)->rq->special;
644 command = args->tfRegister[IDE_COMMAND_OFFSET];
647 command = (lba48) ? WIN_WRITEDMA_EXT : WIN_WRITEDMA;
648 if (HWGROUP(drive)->rq->flags & REQ_DRIVE_TASKFILE) {
649 ide_task_t *args = HWGROUP(drive)->rq->special;
650 command = args->tfRegister[IDE_COMMAND_OFFSET];
653 /* issue cmd to drive */
654 HWIF(drive)->OUTB(command, IDE_COMMAND_REG);
656 return icside_dma_count(drive);
660 icside_setup_dma(ide_hwif_t *hwif, int autodma)
662 printk(" %s: SG-DMA", hwif->name);
664 hwif->sg_table = kmalloc(sizeof(struct scatterlist) * NR_ENTRIES,
669 hwif->dmatable_cpu = NULL;
670 hwif->dmatable_dma = 0;
671 hwif->speedproc = icside_set_speed;
672 hwif->autodma = autodma;
674 hwif->ide_dma_check = icside_dma_check;
675 hwif->ide_dma_host_off = icside_dma_host_off;
676 hwif->ide_dma_off_quietly = icside_dma_off_quietly;
677 hwif->ide_dma_off = icside_dma_off;
678 hwif->ide_dma_host_on = icside_dma_host_on;
679 hwif->ide_dma_on = icside_dma_on;
680 hwif->ide_dma_read = icside_dma_read;
681 hwif->ide_dma_write = icside_dma_write;
682 hwif->ide_dma_count = icside_dma_count;
683 hwif->ide_dma_begin = icside_dma_begin;
684 hwif->ide_dma_end = icside_dma_end;
685 hwif->ide_dma_verbose = icside_dma_verbose;
686 hwif->ide_dma_bad_drive = check_drive_bad_lists;
687 hwif->ide_dma_good_drive = check_drive_good_lists;
688 hwif->ide_dma_test_irq = icside_dma_test_irq;
690 printk(" capable%s\n", autodma ?
691 ", auto-enable" : "");
696 printk(" -- ERROR, unable to allocate DMA table\n");
702 icside_find_hwif(unsigned long dataport)
707 for (index = 0; index < MAX_HWIFS; ++index) {
708 hwif = &ide_hwifs[index];
709 if (hwif->io_ports[IDE_DATA_OFFSET] == (ide_ioreg_t)dataport)
713 for (index = 0; index < MAX_HWIFS; ++index) {
714 hwif = &ide_hwifs[index];
715 if (!hwif->io_ports[IDE_DATA_OFFSET])
725 icside_setup(unsigned long base, struct cardinfo *info, int irq)
727 unsigned long port = base + info->dataoffset;
730 hwif = icside_find_hwif(base);
734 memset(&hwif->hw, 0, sizeof(hw_regs_t));
736 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
737 hwif->hw.io_ports[i] = (ide_ioreg_t)port;
738 hwif->io_ports[i] = (ide_ioreg_t)port;
739 port += 1 << info->stepping;
741 hwif->hw.io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset;
742 hwif->io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset;
745 hwif->hw.dma = NO_DMA;
747 hwif->chipset = ide_acorn;
753 static int __init icside_register_v5(struct expansion_card *ec, int autodma)
755 unsigned long slot_port;
758 slot_port = ecard_address(ec, ECARD_MEMC, 0);
760 ec->irqaddr = (unsigned char *)ioaddr(slot_port + ICS_ARCIN_V5_INTRSTAT);
762 ec->irq_data = (void *)slot_port;
763 ec->ops = (expansioncard_ops_t *)&icside_ops_arcin_v5;
766 * Be on the safe side - disable interrupts
768 inb(slot_port + ICS_ARCIN_V5_INTROFFSET);
770 hwif = icside_setup(slot_port, &icside_cardinfo_v5, ec->irq);
772 return hwif ? 0 : -1;
775 static int __init icside_register_v6(struct expansion_card *ec, int autodma)
777 unsigned long slot_port, port;
778 ide_hwif_t *hwif, *mate;
781 slot_port = ecard_address(ec, ECARD_IOC, ECARD_FAST);
782 port = ecard_address(ec, ECARD_EASI, ECARD_FAST);
789 outb(sel, slot_port);
791 ec->irq_data = (void *)port;
792 ec->ops = (expansioncard_ops_t *)&icside_ops_arcin_v6;
795 * Be on the safe side - disable interrupts
797 inb(port + ICS_ARCIN_V6_INTROFFSET_1);
798 inb(port + ICS_ARCIN_V6_INTROFFSET_2);
800 hwif = icside_setup(port, &icside_cardinfo_v6_1, ec->irq);
801 mate = icside_setup(port, &icside_cardinfo_v6_2, ec->irq);
803 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
804 if (ec->dma != NO_DMA) {
805 if (request_dma(ec->dma, hwif->name))
809 hwif->config_data = slot_port;
810 hwif->select_data = sel;
811 hwif->hw.dma = ec->dma;
812 hwif->hw.priv = (void *)
813 (port + ICS_ARCIN_V6_INTRSTAT_1);
815 icside_setup_dma(hwif, autodma);
816 hwif->drives[0].autodma = autodma;
817 hwif->drives[1].autodma = autodma;
820 mate->config_data = slot_port;
821 mate->select_data = sel | 1;
822 mate->hw.dma = ec->dma;
823 mate->hw.priv = (void *)
824 (port + ICS_ARCIN_V6_INTRSTAT_2);
826 icside_setup_dma(mate, autodma);
827 mate->drives[0].autodma = autodma;
828 mate->drives[1].autodma = autodma;
833 return hwif || mate ? 0 : -1;
836 int __init icside_init(void)
840 #ifdef CONFIG_IDEDMA_ICS_AUTO
847 struct expansion_card *ec;
850 ec = ecard_find(0, icside_cids);
856 switch (icside_identifyif(ec)) {
857 case ics_if_arcin_v5:
858 result = icside_register_v5(ec, autodma);
861 case ics_if_arcin_v6:
862 result = icside_register_v6(ec, autodma);