drivers/ide/pci/pdc202xx_new.h

   1 #ifndef PDC202XX_H
   2 #define PDC202XX_H
   3
   4 #include <linux/config.h>
   5 #include <linux/pci.h>
   6 #include <linux/ide.h>
   7
   8 #define DISPLAY_PDC202XX_TIMINGS
   9
  10 #ifndef SPLIT_BYTE
  11 #define SPLIT_BYTE(B,H,L)       ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
  12 #endif
  13
  14 #define PDC202XX_DEBUG_DRIVE_INFO               0
  15 #define PDC202XX_DECODE_REGISTER_INFO           0
  16
  17 const static char *pdc_quirk_drives[] = {
  18         "QUANTUM FIREBALLlct08 08",
  19         "QUANTUM FIREBALLP KA6.4",
  20         "QUANTUM FIREBALLP KA9.1",
  21         "QUANTUM FIREBALLP LM20.4",
  22         "QUANTUM FIREBALLP KX13.6",
  23         "QUANTUM FIREBALLP KX20.5",
  24         "QUANTUM FIREBALLP KX27.3",
  25         "QUANTUM FIREBALLP LM20.5",
  26         NULL
  27 };
  28
  29 /* A Register */
  30 #define SYNC_ERRDY_EN   0xC0
  31
  32 #define SYNC_IN         0x80    /* control bit, different for master vs. slave drives */
  33 #define ERRDY_EN        0x40    /* control bit, different for master vs. slave drives */
  34 #define IORDY_EN        0x20    /* PIO: IOREADY */
  35 #define PREFETCH_EN     0x10    /* PIO: PREFETCH */
  36
  37 #define PA3             0x08    /* PIO"A" timing */
  38 #define PA2             0x04    /* PIO"A" timing */
  39 #define PA1             0x02    /* PIO"A" timing */
  40 #define PA0             0x01    /* PIO"A" timing */
  41
  42 /* B Register */
  43
  44 #define MB2             0x80    /* DMA"B" timing */
  45 #define MB1             0x40    /* DMA"B" timing */
  46 #define MB0             0x20    /* DMA"B" timing */
  47
  48 #define PB4             0x10    /* PIO_FORCE 1:0 */
  49
  50 #define PB3             0x08    /* PIO"B" timing */     /* PIO flow Control mode */
  51 #define PB2             0x04    /* PIO"B" timing */     /* PIO 4 */
  52 #define PB1             0x02    /* PIO"B" timing */     /* PIO 3 half */
  53 #define PB0             0x01    /* PIO"B" timing */     /* PIO 3 other half */
  54
  55 /* C Register */
  56 #define IORDYp_NO_SPEED 0x4F
  57 #define SPEED_DIS       0x0F
  58
  59 #define DMARQp          0x80
  60 #define IORDYp          0x40
  61 #define DMAR_EN         0x20
  62 #define DMAW_EN         0x10
  63
  64 #define MC3             0x08    /* DMA"C" timing */
  65 #define MC2             0x04    /* DMA"C" timing */
  66 #define MC1             0x02    /* DMA"C" timing */
  67 #define MC0             0x01    /* DMA"C" timing */
  68
  69 #if PDC202XX_DECODE_REGISTER_INFO
  70
  71 #define REG_A           0x01
  72 #define REG_B           0x02
  73 #define REG_C           0x04
  74 #define REG_D           0x08
  75
  76 static void decode_registers (u8 registers, u8 value)
  77 {
  78         u8      bit = 0, bit1 = 0, bit2 = 0;
  79
  80         switch(registers) {
  81                 case REG_A:
  82                         bit2 = 0;
  83                         printk("A Register ");
  84                         if (value & 0x80) printk("SYNC_IN ");
  85                         if (value & 0x40) printk("ERRDY_EN ");
  86                         if (value & 0x20) printk("IORDY_EN ");
  87                         if (value & 0x10) printk("PREFETCH_EN ");
  88                         if (value & 0x08) { printk("PA3 ");bit2 |= 0x08; }
  89                         if (value & 0x04) { printk("PA2 ");bit2 |= 0x04; }
  90                         if (value & 0x02) { printk("PA1 ");bit2 |= 0x02; }
  91                         if (value & 0x01) { printk("PA0 ");bit2 |= 0x01; }
  92                         printk("PIO(A) = %d ", bit2);
  93                         break;
  94                 case REG_B:
  95                         bit1 = 0;bit2 = 0;
  96                         printk("B Register ");
  97                         if (value & 0x80) { printk("MB2 ");bit1 |= 0x80; }
  98                         if (value & 0x40) { printk("MB1 ");bit1 |= 0x40; }
  99                         if (value & 0x20) { printk("MB0 ");bit1 |= 0x20; }
 100                         printk("DMA(B) = %d ", bit1 >> 5);
 101                         if (value & 0x10) printk("PIO_FORCED/PB4 ");
 102                         if (value & 0x08) { printk("PB3 ");bit2 |= 0x08; }
 103                         if (value & 0x04) { printk("PB2 ");bit2 |= 0x04; }
 104                         if (value & 0x02) { printk("PB1 ");bit2 |= 0x02; }
 105                         if (value & 0x01) { printk("PB0 ");bit2 |= 0x01; }
 106                         printk("PIO(B) = %d ", bit2);
 107                         break;
 108                 case REG_C:
 109                         bit2 = 0;
 110                         printk("C Register ");
 111                         if (value & 0x80) printk("DMARQp ");
 112                         if (value & 0x40) printk("IORDYp ");
 113                         if (value & 0x20) printk("DMAR_EN ");
 114                         if (value & 0x10) printk("DMAW_EN ");
 115
 116                         if (value & 0x08) { printk("MC3 ");bit2 |= 0x08; }
 117                         if (value & 0x04) { printk("MC2 ");bit2 |= 0x04; }
 118                         if (value & 0x02) { printk("MC1 ");bit2 |= 0x02; }
 119                         if (value & 0x01) { printk("MC0 ");bit2 |= 0x01; }
 120                         printk("DMA(C) = %d ", bit2);
 121                         break;
 122                 case REG_D:
 123                         printk("D Register ");
 124                         break;
 125                 default:
 126                         return;
 127         }
 128         printk("\n        %s ", (registers & REG_D) ? "DP" :
 129                                 (registers & REG_C) ? "CP" :
 130                                 (registers & REG_B) ? "BP" :
 131                                 (registers & REG_A) ? "AP" : "ERROR");
 132         for (bit=128;bit>0;bit/=2)
 133                 printk("%s", (value & bit) ? "1" : "0");
 134         printk("\n");
 135 }
 136
 137 #endif /* PDC202XX_DECODE_REGISTER_INFO */
 138
 139 #define set_2regs(a, b)                                 \
 140         do {                                            \
 141                 hwif->OUTB((a + adj), indexreg);        \
 142                 hwif->OUTB(b, datareg);                 \
 143         } while(0)
 144
 145 #define set_ultra(a, b, c)                              \
 146         do {                                            \
 147                 set_2regs(0x10,(a));                    \
 148                 set_2regs(0x11,(b));                    \
 149                 set_2regs(0x12,(c));                    \
 150         } while(0)
 151
 152 #define set_ata2(a, b)                                  \
 153         do {                                            \
 154                 set_2regs(0x0e,(a));                    \
 155                 set_2regs(0x0f,(b));                    \
 156         } while(0)
 157
 158 #define set_pio(a, b, c)                                \
 159         do {                                            \
 160                 set_2regs(0x0c,(a));                    \
 161                 set_2regs(0x0d,(b));                    \
 162                 set_2regs(0x13,(c));                    \
 163         } while(0)
 164
 165 #define DISPLAY_PDC202XX_TIMINGS
 166
 167 #if defined(DISPLAY_PDC202XX_TIMINGS) && defined(CONFIG_PROC_FS)
 168 #include <linux/stat.h>
 169 #include <linux/proc_fs.h>
 170
 171 static u8 pdcnew_proc;
 172
 173 static int pdcnew_get_info(char *, char **, off_t, int);
 174
 175 static ide_pci_host_proc_t pdcnew_procs[] __initdata = {
 176         {
 177                 .name           = "pdcnew",
 178                 .set            = 1,
 179                 .get_info       = pdcnew_get_info,
 180                 .parent         = NULL,
 181         },
 182 };
 183 #endif /* DISPLAY_PDC202XX_TIMINGS && CONFIG_PROC_FS */
 184
 185
 186 static void init_setup_pdcnew(struct pci_dev *, ide_pci_device_t *);
 187 static void init_setup_pdc20270(struct pci_dev *, ide_pci_device_t *);
 188 static void init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d);
 189 static unsigned int init_chipset_pdcnew(struct pci_dev *, const char *);
 190 static void init_hwif_pdc202new(ide_hwif_t *);
 191 static void init_dma_pdc202new(ide_hwif_t *, unsigned long);
 192
 193 static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
 194         {       /* 0 */
 195                 .vendor         = PCI_VENDOR_ID_PROMISE,
 196                 .device         = PCI_DEVICE_ID_PROMISE_20268,
 197                 .name           = "PDC20268",
 198                 .init_setup     = init_setup_pdcnew,
 199                 .init_chipset   = init_chipset_pdcnew,
 200                 .init_iops      = NULL,
 201                 .init_hwif      = init_hwif_pdc202new,
 202                 .init_dma       = init_dma_pdc202new,
 203                 .channels       = 2,
 204                 .autodma        = AUTODMA,
 205                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 206                 .bootable       = OFF_BOARD,
 207                 .extra          = 0,
 208         },{     /* 1 */
 209                 .vendor         = PCI_VENDOR_ID_PROMISE,
 210                 .device         = PCI_DEVICE_ID_PROMISE_20269,
 211                 .name           = "PDC20269",
 212                 .init_setup     = init_setup_pdcnew,
 213                 .init_chipset   = init_chipset_pdcnew,
 214                 .init_iops      = NULL,
 215                 .init_hwif      = init_hwif_pdc202new,
 216                 .init_dma       = init_dma_pdc202new,
 217                 .channels       = 2,
 218                 .autodma        = AUTODMA,
 219                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 220                 .bootable       = OFF_BOARD,
 221                 .extra          = 0,
 222         },{     /* 2 */
 223                 .vendor         = PCI_VENDOR_ID_PROMISE,
 224                 .device         = PCI_DEVICE_ID_PROMISE_20270,
 225                 .name           = "PDC20270",
 226                 .init_setup     = init_setup_pdc20270,
 227                 .init_chipset   = init_chipset_pdcnew,
 228                 .init_iops      = NULL,
 229                 .init_hwif      = init_hwif_pdc202new,
 230                 .init_dma       = init_dma_pdc202new,
 231                 .channels       = 2,
 232                 .autodma        = AUTODMA,
 233 #ifdef CONFIG_PDC202XX_FORCE
 234                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 235 #else /* !CONFIG_PDC202XX_FORCE */
 236                 .enablebits     = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
 237 #endif
 238                 .bootable       = OFF_BOARD,
 239                 .extra          = 0,
 240         },{     /* 3 */
 241                 .vendor         = PCI_VENDOR_ID_PROMISE,
 242                 .device         = PCI_DEVICE_ID_PROMISE_20271,
 243                 .name           = "PDC20271",
 244                 .init_setup     = init_setup_pdcnew,
 245                 .init_chipset   = init_chipset_pdcnew,
 246                 .init_iops      = NULL,
 247                 .init_hwif      = init_hwif_pdc202new,
 248                 .init_dma       = init_dma_pdc202new,
 249                 .channels       = 2,
 250                 .autodma        = AUTODMA,
 251                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 252                 .bootable       = OFF_BOARD,
 253                 .extra          = 0,
 254         },{     /* 4 */
 255                 .vendor         = PCI_VENDOR_ID_PROMISE,
 256                 .device         = PCI_DEVICE_ID_PROMISE_20275,
 257                 .name           = "PDC20275",
 258                 .init_setup     = init_setup_pdc20276,
 259                 .init_chipset   = init_chipset_pdcnew,
 260                 .init_iops      = NULL,
 261                 .init_hwif      = init_hwif_pdc202new,
 262                 .init_dma       = init_dma_pdc202new,
 263                 .channels       = 2,
 264                 .autodma        = AUTODMA,
 265                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 266                 .bootable       = OFF_BOARD,
 267                 .extra          = 0,
 268         },{     /* 5 */
 269                 .vendor         = PCI_VENDOR_ID_PROMISE,
 270                 .device         = PCI_DEVICE_ID_PROMISE_20276,
 271                 .name           = "PDC20276",
 272                 .init_setup     = init_setup_pdc20276,
 273                 .init_chipset   = init_chipset_pdcnew,
 274                 .init_iops      = NULL,
 275                 .init_hwif      = init_hwif_pdc202new,
 276                 .init_dma       = init_dma_pdc202new,
 277                 .channels       = 2,
 278                 .autodma        = AUTODMA,
 279 #ifdef CONFIG_PDC202XX_FORCE
 280                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 281 #else /* !CONFIG_PDC202XX_FORCE */
 282                 .enablebits     = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
 283 #endif
 284                 .bootable       = OFF_BOARD,
 285                 .extra          = 0,
 286         },{     /* 6 */
 287                 .vendor         = PCI_VENDOR_ID_PROMISE,
 288                 .device         = PCI_DEVICE_ID_PROMISE_20277,
 289                 .name           = "PDC20277",
 290                 .init_setup     = init_setup_pdc20276,
 291                 .init_chipset   = init_chipset_pdcnew,
 292                 .init_iops      = NULL,
 293                 .init_hwif      = init_hwif_pdc202new,
 294                 .init_dma       = init_dma_pdc202new,
 295                 .channels       = 2,
 296                 .autodma        = AUTODMA,
 297                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 298                 .bootable       = OFF_BOARD,
 299                 .extra          = 0,
 300         },{
 301                 .vendor         = 0,
 302                 .device         = 0,
 303                 .channels       = 0,
 304                 .bootable       = EOL,
 305         }
 306 };
 307
 308 #endif /* PDC202XX_H */