2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
10 * Split the set up function into multiple functions
12 * Fix misreporting of I/O v MMIO problems
13 * Initial fixups for simplex devices
17 * This module provides support for automatic detection and
18 * configuration of all PCI IDE interfaces present in a system.
21 #include <linux/config.h>
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/ide.h>
37 * ide_match_hwif - match a PCI IDE against an ide_hwif
38 * @io_base: I/O base of device
39 * @bootable: set if its bootable
40 * @name: name of device
42 * Match a PCI IDE port against an entry in ide_hwifs[],
43 * based on io_base port if possible. Return the matching hwif,
44 * or a new hwif. If we find an error (clashing, out of devices, etc)
47 * FIXME: we need to handle mmio matches here too
50 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
56 * Look for a hwif with matching io_base specified using
57 * parameters to ide_setup().
59 for (h = 0; h < MAX_HWIFS; ++h) {
61 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
62 if (hwif->chipset == ide_generic)
63 return hwif; /* a perfect match */
67 * Look for a hwif with matching io_base default value.
68 * If chipset is "ide_unknown", then claim that hwif slot.
69 * Otherwise, some other chipset has already claimed it.. :(
71 for (h = 0; h < MAX_HWIFS; ++h) {
73 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
74 if (hwif->chipset == ide_unknown)
75 return hwif; /* match */
76 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
77 name, io_base, hwif->name);
78 return NULL; /* already claimed */
82 * Okay, there is no hwif matching our io_base,
83 * so we'll just claim an unassigned slot.
84 * Give preference to claiming other slots before claiming ide0/ide1,
85 * just in case there's another interface yet-to-be-scanned
86 * which uses ports 1f0/170 (the ide0/ide1 defaults).
88 * Unless there is a bootable card that does not use the standard
89 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
92 for (h = 0; h < MAX_HWIFS; ++h) {
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
98 for (h = 2; h < MAX_HWIFS; ++h) {
100 if (hwif->chipset == ide_unknown)
101 return hwif; /* pick an unused entry */
104 for (h = 0; h < 2; ++h) {
105 hwif = ide_hwifs + h;
106 if (hwif->chipset == ide_unknown)
107 return hwif; /* pick an unused entry */
109 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
114 * ide_setup_pci_baseregs - place a PCI IDE controller native
115 * @dev: PCI device of interface to switch native
116 * @name: Name of interface
118 * We attempt to place the PCI interface into PCI native mode. If
119 * we succeed the BARs are ok and the controller is in PCI mode.
120 * Returns 0 on success or an errno code.
122 * FIXME: if we program the interface and then fail to set the BARS
123 * we don't switch it back to legacy mode. Do we actually care ??
126 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
131 * Place both IDE interfaces into PCI "native" mode:
133 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
135 if ((progif & 0xa) != 0xa) {
136 printk(KERN_INFO "%s: device not capable of full "
137 "native PCI mode\n", name);
140 printk("%s: placing both ports into native PCI mode\n", name);
141 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
142 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
144 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
145 "0x%04x, got 0x%04x\n",
146 name, progif|5, progif);
153 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
155 * Long lost data from 2.0.34 that is now in 2.0.39
157 * This was used in ./drivers/block/triton.c to do DMA Base address setup
158 * when PnP failed. Oh the things we forget. I believe this was part
159 * of SFF-8038i that has been withdrawn from public access... :-((
161 #define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */
162 #define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */
163 #define DEFAULT_BMALIBA 0xd400 /* ALI's default value */
164 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
167 * ide_get_or_set_dma_base - setup BMIBA
170 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
171 * If need be we set up the DMA base. Where a device has a partner that
172 * is already in DMA mode we check and enforce IDE simplex rules.
175 static unsigned long __init ide_get_or_set_dma_base (ide_hwif_t *hwif)
177 unsigned long dma_base = 0;
178 struct pci_dev *dev = hwif->pci_dev;
180 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
181 int second_chance = 0;
183 second_chance_to_dma:
184 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
186 if ((hwif->mmio) && (hwif->dma_base))
187 return hwif->dma_base;
189 if (hwif->mate && hwif->mate->dma_base) {
190 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
192 dma_base = (hwif->mmio) ?
193 ((unsigned long) hwif->hwif_data) :
194 (pci_resource_start(dev, 4));
196 printk(KERN_ERR "%s: dma_base is invalid (0x%04lx)\n",
197 hwif->cds->name, dma_base);
202 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
203 /* FIXME - should use pci_assign_resource surely */
204 if ((!dma_base) && (!second_chance)) {
205 unsigned long set_bmiba = 0;
207 switch(dev->vendor) {
208 case PCI_VENDOR_ID_AL:
209 set_bmiba = DEFAULT_BMALIBA; break;
210 case PCI_VENDOR_ID_VIA:
211 set_bmiba = DEFAULT_BMCRBA; break;
212 case PCI_VENDOR_ID_INTEL:
213 set_bmiba = DEFAULT_BMIBA; break;
217 pci_write_config_dword(dev, 0x20, set_bmiba|1);
218 goto second_chance_to_dma;
220 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
224 dma_base += hwif->channel ? 8 : 0;
226 switch(dev->device) {
227 case PCI_DEVICE_ID_AL_M5219:
228 case PCI_DEVICE_ID_AL_M5229:
229 case PCI_DEVICE_ID_AMD_VIPER_7409:
230 case PCI_DEVICE_ID_CMD_643:
231 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
232 simplex_stat = hwif->INB(dma_base + 2);
233 hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
234 simplex_stat = hwif->INB(dma_base + 2);
235 if (simplex_stat & 0x80) {
236 printk(KERN_INFO "%s: simplex device: "
243 * If the device claims "simplex" DMA,
244 * this means only one of the two interfaces
245 * can be trusted with DMA at any point in time.
246 * So we should enable DMA only on one of the
249 simplex_stat = hwif->INB(dma_base + 2);
250 if (simplex_stat & 0x80) {
251 /* simplex device? */
254 * At this point we haven't probed the drives so we can't make the
255 * appropriate decision. Really we should defer this problem
256 * until we tune the drive then try to grab DMA ownership if we want
257 * to be the DMA end. This has to be become dynamic to handle hot
260 /* Don't enable DMA on a simplex channel with no drives */
261 if (!hwif->drives[0].present && !hwif->drives[1].present)
263 printk(KERN_INFO "%s: simplex device with no drives: DMA disabled\n",
267 /* If our other channel has DMA then we cannot */
270 if(hwif->mate && hwif->mate->dma_base)
272 printk(KERN_INFO "%s: simplex device: "
283 static void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
285 if ((d->vendor != dev->vendor) && (d->device != dev->device)) {
286 printk(KERN_INFO "%s: unknown IDE controller at PCI slot "
287 "%s, VID=%04x, DID=%04x\n",
288 d->name, dev->slot_name, dev->vendor, dev->device);
290 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
291 d->name, dev->slot_name);
296 * ide_pci_enable - do PCI enables
298 * @d: IDE pci device data
300 * Enable the IDE PCI device. We attempt to enable the device in full
301 * but if that fails then we only need BAR4 so we will enable that.
303 * Returns zero on success or an error code
306 static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
309 if (pci_enable_device(dev)) {
310 if (pci_enable_device_bars(dev, 1 << 4)) {
311 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
312 "Could not enable device.\n", d->name);
315 printk(KERN_WARNING "%s: Not fully BIOS configured!\n", d->name);
319 * assume all devices can do 32-bit dma for now. we can add a
320 * dma mask field to the ide_pci_device_t if we need it (or let
321 * lower level driver set the dma mask)
323 if (pci_set_dma_mask(dev, 0xffffffff)) {
324 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
328 /* FIXME: Temporary - until we put in the hotplug interface logic
329 Check that the bits we want are not in use by someone else */
330 if (pci_request_region(dev, 4, "ide_tmp"))
332 pci_release_region(dev, 4);
338 * ide_pci_configure - configure an unconfigured device
340 * @d: IDE pci device data
342 * Enable and configure the PCI device we have been passed.
343 * Returns zero on success or an error code.
346 static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
350 * PnP BIOS was *supposed* to have setup this device, but we
351 * can do it ourselves, so long as the BIOS has assigned an IRQ
352 * (or possibly the device is using a "legacy header" for IRQs).
353 * Maybe the user deliberately *disabled* the device,
354 * but we'll eventually ignore it again if no drives respond.
356 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
358 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
361 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
362 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
365 if (!(pcicmd & PCI_COMMAND_IO)) {
366 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
373 * ide_pci_check_iomem - check a register is I/O
378 * Checks if a BAR is configured and points to MMIO space. If so
379 * print an error and return an error code. Otherwise return 0
382 static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
384 ulong flags = pci_resource_flags(dev, bar);
387 if (!flags || pci_resource_len(dev, bar) == 0)
391 if(flags & PCI_BASE_ADDRESS_IO_MASK)
395 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
397 "<andre@linux-ide.org>.\n", d->name);
403 * ide_hwif_configure - configure an IDE interface
404 * @dev: PCI device holding interface
406 * @mate: Paired interface if any
408 * Perform the initial set up for the hardware interface structure. This
409 * is done per interface port rather than per PCI device. There may be
410 * more than one port per device.
412 * Returns the new hardware interface structure, or NULL on a failure
415 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
417 unsigned long ctl = 0, base = 0;
420 /* Possibly we should fail if these checks report true */
421 ide_pci_check_iomem(dev, d, 2*port);
422 ide_pci_check_iomem(dev, d, 2*port+1);
424 ctl = pci_resource_start(dev, 2*port+1);
425 base = pci_resource_start(dev, 2*port);
426 if ((ctl && !base) || (base && !ctl)) {
427 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
428 "for port %d, skipping\n", d->name, port);
433 /* Use default values */
434 ctl = port ? 0x374 : 0x3f4;
435 base = port ? 0x170 : 0x1f0;
437 if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL)
438 return NULL; /* no room in ide_hwifs[] */
439 if (hwif->io_ports[IDE_DATA_OFFSET] != base) {
441 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
442 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
443 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
444 } else if (hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
447 hwif->chipset = ide_pci;
449 hwif->cds = (struct ide_pci_device_s *) d;
450 hwif->channel = port;
462 * ide_hwif_setup_dma - configure DMA interface
465 * @hwif: Hardware interface we are configuring
467 * Set up the DMA base for the interface. Enable the master bits as
468 * neccessary and attempt to bring the device DMA into a ready to use
472 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
475 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
477 if ((d->autodma == AUTODMA) ||
478 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
479 (dev->class & 0x80))) {
480 unsigned long dma_base = ide_get_or_set_dma_base(hwif);
481 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
483 * Set up BM-DMA capability
484 * (PnP BIOS should have done this)
486 if (!((d->device == PCI_DEVICE_ID_CYRIX_5530_IDE && d->vendor == PCI_VENDOR_ID_CYRIX)
487 ||(d->device == PCI_DEVICE_ID_NS_SCx200_IDE && d->vendor == PCI_VENDOR_ID_NS)))
490 * default DMA off if we had to
496 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
497 printk(KERN_ERR "%s: %s error updating PCICMD\n",
498 hwif->name, d->name);
504 d->init_dma(hwif, dma_base);
506 ide_setup_dma(hwif, dma_base, 8);
509 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
510 "(BIOS)\n", hwif->name, d->name);
516 * ide_setup_pci_controller - set up IDE PCI
519 * @noisy: verbose flag
520 * @config: returned as 1 if we configured the hardware
522 * Set up the PCI and controller side of the IDE interface. This brings
523 * up the PCI side of the device, checks that the device is enabled
524 * and enables it if need be
527 static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
537 ide_setup_pci_noise(dev, d);
539 if (ide_pci_enable(dev, d))
542 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
543 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
546 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
547 if (ide_pci_configure(dev, d))
549 /* default DMA off if we had to configure it here */
552 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
555 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
558 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev);
563 * ide_setup_pci_device() looks at the primary/secondary interfaces
564 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
565 * for use with them. This generic code works for most PCI chipsets.
567 * One thing that is not standardized is the location of the
568 * primary/secondary interface "enable/disable" bits. For chipsets that
569 * we "know" about, this information is in the ide_pci_device_t struct;
570 * for all other chipsets, we just assume both interfaces are enabled.
572 static ata_index_t do_ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d, u8 noisy)
574 u32 port, at_least_one_hwif_enabled = 0, autodma = 0;
576 int tried_config = 0;
577 int drive0_tune, drive1_tune;
580 ide_hwif_t *hwif, *mate = NULL;
581 static int secondpdc = 0;
585 if((autodma = ide_setup_pci_controller(dev, d, noisy, &tried_config)) < 0)
589 * Can we trust the reported IRQ?
593 if ((dev->class & ~(0xfa)) != ((PCI_CLASS_STORAGE_IDE << 8) | 5)) {
595 printk(KERN_INFO "%s: not 100%% native mode: "
596 "will probe irqs later\n", d->name);
598 * This allows offboard ide-pci cards the enable a BIOS,
599 * verify interrupt settings of split-mirror pci-config
600 * space, place chipset into init-mode, and/or preserve
601 * an interrupt if the card is not native ide support.
603 pciirq = (d->init_chipset) ? d->init_chipset(dev, d->name) : 0;
604 } else if (tried_config) {
606 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
608 } else if (!pciirq) {
610 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
616 if(d->init_chipset(dev, d->name) < 0)
621 printk(KERN_INFO "%s: 100%% native mode on irq %s\n",
622 d->name, __irq_itoa(pciirq));
624 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
629 if(pciirq < 0) /* Error not an IRQ */
633 * Set up the IDE ports
636 for (port = 0; port <= 1; ++port) {
637 ide_pci_enablebit_t *e = &(d->enablebits[port]);
640 * If this is a Promise FakeRaid controller,
641 * the 2nd controller will be marked as
642 * disabled while it is actually there and enabled
643 * by the bios for raid purposes.
644 * Skip the normal "is it enabled" test for those.
646 if (((d->vendor == PCI_VENDOR_ID_PROMISE) &&
647 ((d->device == PCI_DEVICE_ID_PROMISE_20262) ||
648 (d->device == PCI_DEVICE_ID_PROMISE_20265))) &&
649 (secondpdc++==1) && (port==1))
652 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
653 (tmp & e->mask) != e->val))
654 continue; /* port not enabled */
657 if (d->channels <= port)
660 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
663 /* setup proper ancestral information */
664 // 2.5 only hwif->gendev.parent = &dev->dev;
667 index.b.high = hwif->index;
669 index.b.low = hwif->index;
676 if (d->autodma == NODMA)
677 goto bypass_legacy_dma;
678 if (d->autodma == NOAUTODMA)
682 ide_hwif_setup_dma(dev, d, hwif);
685 drive0_tune = hwif->drives[0].autotune;
686 drive1_tune = hwif->drives[1].autotune;
689 /* Call chipset-specific routine
690 * for each enabled hwif
695 at_least_one_hwif_enabled = 1;
697 if (!at_least_one_hwif_enabled)
698 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
702 void ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d)
704 do_ide_setup_pci_device(dev, d, 1);
707 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
709 void ide_setup_pci_devices (struct pci_dev *dev, struct pci_dev *dev2, ide_pci_device_t *d)
711 do_ide_setup_pci_device(dev, d, 1);
712 do_ide_setup_pci_device(dev2, d, 0);
715 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
721 static int pre_init = 1; /* Before first ordered IDE scan */
722 static LIST_HEAD(ide_pci_drivers);
725 * ide_register_pci_driver - attach IDE driver
726 * @driver: pci driver
728 * Registers a driver with the IDE layer. The IDE layer arranges that
729 * boot time setup is done in the expected device order and then
730 * hands the controllers off to the core PCI code to do the rest of
733 * The driver_data of the driver table must point to an ide_pci_device_t
734 * describing the interface.
736 * Returns are the same as for pci_register_driver
739 int ide_pci_register_driver(struct pci_driver *driver)
742 return pci_module_init(driver);
743 list_add_tail(&driver->node, &ide_pci_drivers);
747 EXPORT_SYMBOL_GPL(ide_pci_register_driver);
750 * ide_unregister_pci_driver - unregister an IDE driver
751 * @driver: driver to remove
753 * Unregister a currently installed IDE driver. Returns are the same
754 * as for pci_unregister_driver
757 void ide_pci_unregister_driver(struct pci_driver *driver)
760 pci_unregister_driver(driver);
762 list_del(&driver->node);
765 EXPORT_SYMBOL_GPL(ide_pci_unregister_driver);
768 * ide_scan_pcidev - find an IDE driver for a device
769 * @dev: PCI device to check
771 * Look for an IDE driver to handle the device we are considering.
772 * This is only used during boot up to get the ordering correct. After
773 * boot up the pci layer takes over the job.
776 static int __init ide_scan_pcidev(struct pci_dev *dev)
779 struct pci_driver *d;
781 list_for_each(l, &ide_pci_drivers)
783 d = list_entry(l, struct pci_driver, node);
786 const struct pci_device_id *id = pci_match_device(d->id_table, dev);
789 if(d->probe(dev, id) >= 0)
801 * ide_scan_pcibus - perform the initial IDE driver scan
802 * @scan_direction: set for reverse order scanning
804 * Perform the initial bus rather than driver ordered scan of the
805 * PCI drivers. After this all IDE pci handling becomes standard
806 * module ordering not traditionally ordered.
809 void __init ide_scan_pcibus (int scan_direction)
812 struct pci_driver *d;
813 struct list_head *l, *n;
816 if (!scan_direction) {
817 pci_for_each_dev(dev) {
818 ide_scan_pcidev(dev);
821 pci_for_each_dev_reverse(dev) {
822 ide_scan_pcidev(dev);
827 * Hand the drivers over to the PCI layer now we
831 list_for_each_safe(l, n, &ide_pci_drivers)
834 d = list_entry(l, struct pci_driver, node);
835 pci_register_driver(d);