fix to allow loader.o to boot kernel with parametars
[linux-2.4.21-pre4.git] / drivers / ieee1394 / pcilynx.c
1 /*
2  * ti_pcilynx.c - Texas Instruments PCILynx driver
3  * Copyright (C) 1999,2000 Andreas Bombe <andreas.bombe@munich.netsurf.de>,
4  *                         Stephan Linz <linz@mazet.de>
5  *                         Manfred Weihs <weihs@ict.tuwien.ac.at>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software Foundation,
19  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20  */
21
22 #include <linux/config.h>
23 #include <linux/kernel.h>
24 #include <linux/slab.h>
25 #include <linux/interrupt.h>
26 #include <linux/wait.h>
27 #include <linux/errno.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/fs.h>
32 #include <linux/poll.h>
33 #include <asm/byteorder.h>
34 #include <asm/atomic.h>
35 #include <asm/io.h>
36 #include <asm/uaccess.h>
37
38 #include "ieee1394.h"
39 #include "ieee1394_types.h"
40 #include "hosts.h"
41 #include "ieee1394_core.h"
42 #include "highlevel.h"
43 #include "pcilynx.h"
44
45 #include <linux/i2c.h>
46 #include <linux/i2c-algo-bit.h>
47
48 /* print general (card independent) information */
49 #define PRINT_G(level, fmt, args...) printk(level "pcilynx: " fmt "\n" , ## args)
50 /* print card specific information */
51 #define PRINT(level, card, fmt, args...) printk(level "pcilynx%d: " fmt "\n" , card , ## args)
52
53 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
54 #define PRINT_GD(level, fmt, args...) printk(level "pcilynx: " fmt "\n" , ## args)
55 #define PRINTD(level, card, fmt, args...) printk(level "pcilynx%d: " fmt "\n" , card , ## args)
56 #else
57 #define PRINT_GD(level, fmt, args...) do {} while (0)
58 #define PRINTD(level, card, fmt, args...) do {} while (0)
59 #endif
60
61
62 /* Module Parameters */
63 MODULE_PARM(skip_eeprom,"i");
64 MODULE_PARM_DESC(skip_eeprom, "Do not try to read bus info block from serial eeprom, but user generic one (default = 0).");
65 static int skip_eeprom = 0;
66
67
68 static struct hpsb_host_driver lynx_driver;
69 static unsigned int card_id;
70
71
72
73 /*
74  * I2C stuff
75  */
76
77 /* the i2c stuff was inspired by i2c-philips-par.c */
78
79 static void bit_setscl(void *data, int state)
80 {
81         if (state) {
82                   ((struct ti_lynx *) data)->i2c_driven_state |= 0x00000040;
83         } else {
84                   ((struct ti_lynx *) data)->i2c_driven_state &= ~0x00000040;
85         }
86         reg_write((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL, ((struct ti_lynx *) data)->i2c_driven_state);
87 }
88
89 static void bit_setsda(void *data, int state)
90 {
91         if (state) {
92                   ((struct ti_lynx *) data)->i2c_driven_state |= 0x00000010;
93         } else {
94                   ((struct ti_lynx *) data)->i2c_driven_state &= ~0x00000010;
95         }
96         reg_write((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL, ((struct ti_lynx *) data)->i2c_driven_state);
97 }
98
99 static int bit_getscl(void *data)
100 {
101         return reg_read((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL) & 0x00000040;
102 }
103
104 static int bit_getsda(void *data)
105 {
106         return reg_read((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL) & 0x00000010;
107 }
108
109 static int bit_reg(struct i2c_client *client)
110 {
111         return 0;
112 }
113
114 static int bit_unreg(struct i2c_client *client)
115 {
116         return 0;
117 }
118
119 static struct i2c_algo_bit_data bit_data = {
120         NULL,
121         bit_setsda,
122         bit_setscl,
123         bit_getsda,
124         bit_getscl,
125         5, 5, 100,              /*      waits, timeout */
126 }; 
127
128 static struct i2c_adapter bit_ops = {
129         "PCILynx I2C adapter",
130         0xAA, //FIXME: probably we should get an id in i2c-id.h
131         NULL,
132         NULL,
133         NULL,
134         NULL,
135         bit_reg,
136         bit_unreg,
137 };
138
139
140
141 /*
142  * PCL handling functions.
143  */
144
145 static pcl_t alloc_pcl(struct ti_lynx *lynx)
146 {
147         u8 m;
148         int i, j;
149
150         spin_lock(&lynx->lock);
151         /* FIXME - use ffz() to make this readable */
152         for (i = 0; i < (LOCALRAM_SIZE / 1024); i++) {
153                 m = lynx->pcl_bmap[i];
154                 for (j = 0; j < 8; j++) {
155                         if (m & 1<<j) {
156                                 continue;
157                         }
158                         m |= 1<<j;
159                         lynx->pcl_bmap[i] = m;
160                         spin_unlock(&lynx->lock);
161                         return 8 * i + j;
162                 }
163         }
164         spin_unlock(&lynx->lock);
165
166         return -1;
167 }
168
169
170 #if 0
171 static void free_pcl(struct ti_lynx *lynx, pcl_t pclid)
172 {
173         int off, bit;
174
175         off = pclid / 8;
176         bit = pclid % 8;
177
178         if (pclid < 0) {
179                 return;
180         }
181
182         spin_lock(&lynx->lock);
183         if (lynx->pcl_bmap[off] & 1<<bit) {
184                 lynx->pcl_bmap[off] &= ~(1<<bit);
185         } else {
186                 PRINT(KERN_ERR, lynx->id, 
187                       "attempted to free unallocated PCL %d", pclid);
188         }
189         spin_unlock(&lynx->lock);
190 }
191
192 /* functions useful for debugging */        
193 static void pretty_print_pcl(const struct ti_pcl *pcl)
194 {
195         int i;
196
197         printk("PCL next %08x, userdata %08x, status %08x, remtrans %08x, nextbuf %08x\n",
198                pcl->next, pcl->user_data, pcl->pcl_status, 
199                pcl->remaining_transfer_count, pcl->next_data_buffer);
200
201         printk("PCL");
202         for (i=0; i<13; i++) {
203                 printk(" c%x:%08x d%x:%08x",
204                        i, pcl->buffer[i].control, i, pcl->buffer[i].pointer);
205                 if (!(i & 0x3) && (i != 12)) printk("\nPCL");
206         }
207         printk("\n");
208 }
209         
210 static void print_pcl(const struct ti_lynx *lynx, pcl_t pclid)
211 {
212         struct ti_pcl pcl;
213
214         get_pcl(lynx, pclid, &pcl);
215         pretty_print_pcl(&pcl);
216 }
217 #endif
218
219
220
221 /***********************************
222  * IEEE-1394 functionality section *
223  ***********************************/
224
225
226 static int get_phy_reg(struct ti_lynx *lynx, int addr)
227 {
228         int retval;
229         int i = 0;
230
231         unsigned long flags;
232
233         if (addr > 15) {
234                 PRINT(KERN_ERR, lynx->id,
235                       "%s: PHY register address %d out of range",
236                       __FUNCTION__, addr);
237                 return -1;
238         }
239
240         spin_lock_irqsave(&lynx->phy_reg_lock, flags);
241
242         reg_write(lynx, LINK_PHY, LINK_PHY_READ | LINK_PHY_ADDR(addr));
243         do {
244                 retval = reg_read(lynx, LINK_PHY);
245
246                 if (i > 10000) {
247                         PRINT(KERN_ERR, lynx->id, "%s: runaway loop, aborting",
248                               __FUNCTION__);
249                         retval = -1;
250                         break;
251                 }
252                 i++;
253         } while ((retval & 0xf00) != LINK_PHY_RADDR(addr));
254
255         reg_write(lynx, LINK_INT_STATUS, LINK_INT_PHY_REG_RCVD);
256         spin_unlock_irqrestore(&lynx->phy_reg_lock, flags);
257
258         if (retval != -1) {
259                 return retval & 0xff;
260         } else {
261                 return -1;
262         }
263 }
264
265 static int set_phy_reg(struct ti_lynx *lynx, int addr, int val)
266 {
267         unsigned long flags;
268
269         if (addr > 15) {
270                 PRINT(KERN_ERR, lynx->id,
271                       "%s: PHY register address %d out of range", __FUNCTION__, addr);
272                 return -1;
273         }
274
275         if (val > 0xff) {
276                 PRINT(KERN_ERR, lynx->id,
277                       "%s: PHY register value %d out of range", __FUNCTION__, val);
278                 return -1;
279         }
280
281         spin_lock_irqsave(&lynx->phy_reg_lock, flags);
282
283         reg_write(lynx, LINK_PHY, LINK_PHY_WRITE | LINK_PHY_ADDR(addr)
284                   | LINK_PHY_WDATA(val));
285
286         spin_unlock_irqrestore(&lynx->phy_reg_lock, flags);
287
288         return 0;
289 }
290
291 static int sel_phy_reg_page(struct ti_lynx *lynx, int page)
292 {
293         int reg;
294
295         if (page > 7) {
296                 PRINT(KERN_ERR, lynx->id,
297                       "%s: PHY page %d out of range", __FUNCTION__, page);
298                 return -1;
299         }
300
301         reg = get_phy_reg(lynx, 7);
302         if (reg != -1) {
303                 reg &= 0x1f;
304                 reg |= (page << 5);
305                 set_phy_reg(lynx, 7, reg);
306                 return 0;
307         } else {
308                 return -1;
309         }
310 }
311
312 #if 0 /* not needed at this time */
313 static int sel_phy_reg_port(struct ti_lynx *lynx, int port)
314 {
315         int reg;
316
317         if (port > 15) {
318                 PRINT(KERN_ERR, lynx->id,
319                       "%s: PHY port %d out of range", __FUNCTION__, port);
320                 return -1;
321         }
322
323         reg = get_phy_reg(lynx, 7);
324         if (reg != -1) {
325                 reg &= 0xf0;
326                 reg |= port;
327                 set_phy_reg(lynx, 7, reg);
328                 return 0;
329         } else {
330                 return -1;
331         }
332 }
333 #endif
334
335 static u32 get_phy_vendorid(struct ti_lynx *lynx)
336 {
337         u32 pvid = 0;
338         sel_phy_reg_page(lynx, 1);
339         pvid |= (get_phy_reg(lynx, 10) << 16);
340         pvid |= (get_phy_reg(lynx, 11) << 8);
341         pvid |= get_phy_reg(lynx, 12);
342         PRINT(KERN_INFO, lynx->id, "PHY vendor id 0x%06x", pvid);
343         return pvid;
344 }
345
346 static u32 get_phy_productid(struct ti_lynx *lynx)
347 {
348         u32 id = 0;
349         sel_phy_reg_page(lynx, 1);
350         id |= (get_phy_reg(lynx, 13) << 16);
351         id |= (get_phy_reg(lynx, 14) << 8);
352         id |= get_phy_reg(lynx, 15);
353         PRINT(KERN_INFO, lynx->id, "PHY product id 0x%06x", id);
354         return id;
355 }
356
357 static quadlet_t generate_own_selfid(struct ti_lynx *lynx,
358                                      struct hpsb_host *host)
359 {
360         quadlet_t lsid;
361         char phyreg[7];
362         int i;
363
364         phyreg[0] = lynx->phy_reg0;
365         for (i = 1; i < 7; i++) {
366                 phyreg[i] = get_phy_reg(lynx, i);
367         }
368
369         /* FIXME? We assume a TSB21LV03A phy here.  This code doesn't support
370            more than 3 ports on the PHY anyway. */
371
372         lsid = 0x80400000 | ((phyreg[0] & 0xfc) << 22);
373         lsid |= (phyreg[1] & 0x3f) << 16; /* gap count */
374         lsid |= (phyreg[2] & 0xc0) << 8; /* max speed */
375         lsid |= (phyreg[6] & 0x01) << 11; /* contender (phy dependent) */
376         /* lsid |= 1 << 11; *//* set contender (hack) */
377         lsid |= (phyreg[6] & 0x10) >> 3; /* initiated reset */
378
379         for (i = 0; i < (phyreg[2] & 0xf); i++) { /* ports */
380                 if (phyreg[3 + i] & 0x4) {
381                         lsid |= (((phyreg[3 + i] & 0x8) | 0x10) >> 3)
382                                 << (6 - i*2);
383                 } else {
384                         lsid |= 1 << (6 - i*2);
385                 }
386         }
387
388         cpu_to_be32s(&lsid);
389         PRINT(KERN_DEBUG, lynx->id, "generated own selfid 0x%x", lsid);
390         return lsid;
391 }
392
393 static void handle_selfid(struct ti_lynx *lynx, struct hpsb_host *host)
394 {
395         quadlet_t *q = lynx->rcv_page;
396         int phyid, isroot, size;
397         quadlet_t lsid = 0;
398         int i;
399
400         if (lynx->phy_reg0 == -1 || lynx->selfid_size == -1) return;
401
402         size = lynx->selfid_size;
403         phyid = lynx->phy_reg0;
404
405         i = (size > 16 ? 16 : size) / 4 - 1;
406         while (i >= 0) {
407                 cpu_to_be32s(&q[i]);
408                 i--;
409         }
410         
411         if (!lynx->phyic.reg_1394a) {
412                 lsid = generate_own_selfid(lynx, host);
413         }
414
415         isroot = (phyid & 2) != 0;
416         phyid >>= 2;
417         PRINT(KERN_INFO, lynx->id, "SelfID process finished (phyid %d, %s)",
418               phyid, (isroot ? "root" : "not root"));
419         reg_write(lynx, LINK_ID, (0xffc0 | phyid) << 16);
420
421         if (!lynx->phyic.reg_1394a && !size) {
422                 hpsb_selfid_received(host, lsid);
423         }
424
425         while (size > 0) {
426                 struct selfid *sid = (struct selfid *)q;
427
428                 if (!lynx->phyic.reg_1394a && !sid->extended 
429                     && (sid->phy_id == (phyid + 1))) {
430                         hpsb_selfid_received(host, lsid);
431                 }
432
433                 if (q[0] == ~q[1]) {
434                         PRINT(KERN_DEBUG, lynx->id, "SelfID packet 0x%x rcvd",
435                               q[0]);
436                         hpsb_selfid_received(host, q[0]);
437                 } else {
438                         PRINT(KERN_INFO, lynx->id,
439                               "inconsistent selfid 0x%x/0x%x", q[0], q[1]);
440                 }
441                 q += 2;
442                 size -= 8;
443         }
444
445         if (!lynx->phyic.reg_1394a && isroot && phyid != 0) {
446                 hpsb_selfid_received(host, lsid);
447         }
448
449         hpsb_selfid_complete(host, phyid, isroot);
450
451         if (host->in_bus_reset) return; /* in bus reset again */
452
453         if (isroot) reg_set_bits(lynx, LINK_CONTROL, LINK_CONTROL_CYCMASTER);
454         reg_set_bits(lynx, LINK_CONTROL,
455                      LINK_CONTROL_RCV_CMP_VALID | LINK_CONTROL_TX_ASYNC_EN
456                      | LINK_CONTROL_RX_ASYNC_EN | LINK_CONTROL_CYCTIMEREN);
457 }
458
459
460
461 /* This must be called with the respective queue_lock held. */
462 static void send_next(struct ti_lynx *lynx, int what)
463 {
464         struct ti_pcl pcl;
465         struct lynx_send_data *d;
466         struct hpsb_packet *packet;
467
468         d = (what == hpsb_iso ? &lynx->iso_send : &lynx->async);
469         packet = driver_packet(d->queue.next);
470
471         d->header_dma = pci_map_single(lynx->dev, packet->header,
472                                        packet->header_size, PCI_DMA_TODEVICE);
473         if (packet->data_size) {
474                 d->data_dma = pci_map_single(lynx->dev, packet->data,
475                                              packet->data_size,
476                                              PCI_DMA_TODEVICE);
477         } else {
478                 d->data_dma = 0;
479         }
480
481         pcl.next = PCL_NEXT_INVALID;
482         pcl.async_error_next = PCL_NEXT_INVALID;
483 #ifdef __BIG_ENDIAN
484         pcl.buffer[0].control = packet->speed_code << 14 | packet->header_size;
485 #else
486         pcl.buffer[0].control = packet->speed_code << 14 | packet->header_size 
487                 | PCL_BIGENDIAN;
488 #endif
489         pcl.buffer[0].pointer = d->header_dma;
490         pcl.buffer[1].control = PCL_LAST_BUFF | packet->data_size;
491         pcl.buffer[1].pointer = d->data_dma;
492
493         switch (packet->type) {
494         case hpsb_async:
495                 pcl.buffer[0].control |= PCL_CMD_XMT;
496                 break;
497         case hpsb_iso:
498                 pcl.buffer[0].control |= PCL_CMD_XMT | PCL_ISOMODE;
499                 break;
500         case hpsb_raw:
501                 pcl.buffer[0].control |= PCL_CMD_UNFXMT;
502                 break;
503         }                
504
505         if (!packet->data_be) {
506                 pcl.buffer[1].control |= PCL_BIGENDIAN;
507         }
508
509         put_pcl(lynx, d->pcl, &pcl);
510         run_pcl(lynx, d->pcl_start, d->channel);
511 }
512
513
514 /* called from subsystem core */
515 static int lynx_transmit(struct hpsb_host *host, struct hpsb_packet *packet)
516 {
517         struct ti_lynx *lynx = host->hostdata;
518         struct lynx_send_data *d;
519         unsigned long flags;
520
521         if (packet->data_size >= 4096) {
522                 PRINT(KERN_ERR, lynx->id, "transmit packet data too big (%Zd)",
523                       packet->data_size);
524                 return 0;
525         }
526
527         switch (packet->type) {
528         case hpsb_async:
529         case hpsb_raw:
530                 d = &lynx->async;
531                 break;
532         case hpsb_iso:
533                 d = &lynx->iso_send;
534                 break;
535         default:
536                 PRINT(KERN_ERR, lynx->id, "invalid packet type %d",
537                       packet->type);
538                 return 0;
539         }
540
541         if (packet->tcode == TCODE_WRITEQ
542             || packet->tcode == TCODE_READQ_RESPONSE) {
543                 cpu_to_be32s(&packet->header[3]);
544         }
545
546         spin_lock_irqsave(&d->queue_lock, flags);
547
548         list_add_tail(&packet->driver_list, &d->queue);
549         if (d->queue.next == &packet->driver_list)
550                 send_next(lynx, packet->type);
551
552         spin_unlock_irqrestore(&d->queue_lock, flags);
553
554         return 1;
555 }
556
557
558 /* called from subsystem core */
559 static int lynx_devctl(struct hpsb_host *host, enum devctl_cmd cmd, int arg)
560 {
561         struct ti_lynx *lynx = host->hostdata;
562         int retval = 0;
563         struct hpsb_packet *packet;
564         LIST_HEAD(packet_list);
565         unsigned long flags;
566
567         switch (cmd) {
568         case RESET_BUS:
569                 if (reg_read(lynx, LINK_INT_STATUS) & LINK_INT_PHY_BUSRESET) {
570                         retval = 0;
571                         break;
572                 }
573
574                 if (arg) {
575                         arg = 3 << 6;
576                 } else {
577                         arg = 1 << 6;
578                 }
579
580                 retval = get_phy_reg(lynx, 1);
581                 arg |= (retval == -1 ? 63 : retval);
582                 retval = 0;
583
584                 PRINT(KERN_INFO, lynx->id, "resetting bus on request");
585
586                 lynx->selfid_size = -1;
587                 lynx->phy_reg0 = -1;
588                 set_phy_reg(lynx, 1, arg);
589                 break;
590
591         case GET_CYCLE_COUNTER:
592                 retval = reg_read(lynx, CYCLE_TIMER);
593                 break;
594                 
595         case SET_CYCLE_COUNTER:
596                 reg_write(lynx, CYCLE_TIMER, arg);
597                 break;
598
599         case SET_BUS_ID:
600                 reg_write(lynx, LINK_ID, 
601                           (arg << 22) | (reg_read(lynx, LINK_ID) & 0x003f0000));
602                 break;
603                 
604         case ACT_CYCLE_MASTER:
605                 if (arg) {
606                         reg_set_bits(lynx, LINK_CONTROL,
607                                      LINK_CONTROL_CYCMASTER);
608                 } else {
609                         reg_clear_bits(lynx, LINK_CONTROL,
610                                        LINK_CONTROL_CYCMASTER);
611                 }
612                 break;
613
614         case CANCEL_REQUESTS:
615                 spin_lock_irqsave(&lynx->async.queue_lock, flags);
616
617                 reg_write(lynx, DMA_CHAN_CTRL(CHANNEL_ASYNC_SEND), 0);
618                 list_splice(&lynx->async.queue, &packet_list);
619                 INIT_LIST_HEAD(&lynx->async.queue);
620
621                 spin_unlock_irqrestore(&lynx->async.queue_lock, flags);
622
623                 while (!list_empty(&packet_list)) {
624                         packet = driver_packet(packet_list.next);
625                         list_del(&packet->driver_list);
626                         hpsb_packet_sent(host, packet, ACKX_ABORTED);
627                 }
628
629                 break;
630
631         case MODIFY_USAGE:
632                 if (arg) {
633                         MOD_INC_USE_COUNT;
634                 } else {
635                         MOD_DEC_USE_COUNT;
636                 }
637
638                 retval = 1;
639                 break;
640
641         case ISO_LISTEN_CHANNEL:
642                 spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
643                 
644                 if (lynx->iso_rcv.chan_count++ == 0) {
645                         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV),
646                                   DMA_WORD1_CMP_ENABLE_MASTER);
647                 }
648
649                 spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
650                 break;
651
652         case ISO_UNLISTEN_CHANNEL:
653                 spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
654
655                 if (--lynx->iso_rcv.chan_count == 0) {
656                         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV),
657                                   0);
658                 }
659
660                 spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
661                 break;
662
663         default:
664                 PRINT(KERN_ERR, lynx->id, "unknown devctl command %d", cmd);
665                 retval = -1;
666         }
667
668         return retval;
669 }
670
671
672 /***************************************
673  * IEEE-1394 functionality section END *
674  ***************************************/
675
676 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
677 /* VFS functions for local bus / aux device access.  Access to those
678  * is implemented as a character device instead of block devices
679  * because buffers are not wanted for this.  Therefore llseek (from
680  * VFS) can be used for these char devices with obvious effects.
681  */
682 static int mem_open(struct inode*, struct file*);
683 static int mem_release(struct inode*, struct file*);
684 static unsigned int aux_poll(struct file*, struct poll_table_struct*);
685 static loff_t mem_llseek(struct file*, loff_t, int);
686 static ssize_t mem_read (struct file*, char*, size_t, loff_t*);
687 static ssize_t mem_write(struct file*, const char*, size_t, loff_t*);
688
689
690 static struct file_operations aux_ops = {
691         .owner =        THIS_MODULE,
692         .read =         mem_read,
693         .write =        mem_write,
694         .poll =         aux_poll,
695         .llseek =       mem_llseek,
696         .open =         mem_open,
697         .release =      mem_release,
698 };
699
700
701 static void aux_setup_pcls(struct ti_lynx *lynx)
702 {
703         struct ti_pcl pcl;
704
705         pcl.next = PCL_NEXT_INVALID;
706         pcl.user_data = pcl_bus(lynx, lynx->dmem_pcl);
707         put_pcl(lynx, lynx->dmem_pcl, &pcl);
708 }
709
710 static int mem_open(struct inode *inode, struct file *file)
711 {
712         int cid = minor(inode->i_rdev);
713         enum { t_rom, t_aux, t_ram } type;
714         struct memdata *md;
715         
716         if (cid < PCILYNX_MINOR_AUX_START) {
717                 /* just for completeness */
718                 return -ENXIO;
719         } else if (cid < PCILYNX_MINOR_ROM_START) {
720                 cid -= PCILYNX_MINOR_AUX_START;
721                 if (cid >= num_of_cards || !cards[cid].aux_port)
722                         return -ENXIO;
723                 type = t_aux;
724         } else if (cid < PCILYNX_MINOR_RAM_START) {
725                 cid -= PCILYNX_MINOR_ROM_START;
726                 if (cid >= num_of_cards || !cards[cid].local_rom)
727                         return -ENXIO;
728                 type = t_rom;
729         } else {
730                 /* WARNING: Know what you are doing when opening RAM.
731                  * It is currently used inside the driver! */
732                 cid -= PCILYNX_MINOR_RAM_START;
733                 if (cid >= num_of_cards || !cards[cid].local_ram)
734                         return -ENXIO;
735                 type = t_ram;
736         }
737
738         md = (struct memdata *)kmalloc(sizeof(struct memdata), SLAB_KERNEL);
739         if (md == NULL)
740                 return -ENOMEM;
741
742         md->lynx = &cards[cid];
743         md->cid = cid;
744
745         switch (type) {
746         case t_rom:
747                 md->type = rom;
748                 break;
749         case t_ram:
750                 md->type = ram;
751                 break;
752         case t_aux:
753                 atomic_set(&md->aux_intr_last_seen,
754                            atomic_read(&cards[cid].aux_intr_seen));
755                 md->type = aux;
756                 break;
757         }
758
759         file->private_data = md;
760
761         return 0;
762 }
763
764 static int mem_release(struct inode *inode, struct file *file)
765 {
766         kfree(file->private_data);
767         return 0;
768 }
769
770 static unsigned int aux_poll(struct file *file, poll_table *pt)
771 {
772         struct memdata *md = (struct memdata *)file->private_data;
773         int cid = md->cid;
774         unsigned int mask;
775
776         /* reading and writing is always allowed */
777         mask = POLLIN | POLLRDNORM | POLLOUT | POLLWRNORM;
778
779         if (md->type == aux) {
780                 poll_wait(file, &cards[cid].aux_intr_wait, pt);
781
782                 if (atomic_read(&md->aux_intr_last_seen)
783                     != atomic_read(&cards[cid].aux_intr_seen)) {
784                         mask |= POLLPRI;
785                         atomic_inc(&md->aux_intr_last_seen);
786                 }
787         }
788
789         return mask;
790 }
791
792 loff_t mem_llseek(struct file *file, loff_t offs, int orig)
793 {
794         loff_t newoffs;
795
796         switch (orig) {
797         case 0:
798                 newoffs = offs;
799                 break;
800         case 1:
801                 newoffs = offs + file->f_pos;
802                 break;
803         case 2:
804                 newoffs = PCILYNX_MAX_MEMORY + 1 + offs;
805                 break;
806         default:
807                 return -EINVAL;
808         }
809
810         if (newoffs < 0 || newoffs > PCILYNX_MAX_MEMORY + 1) return -EINVAL;
811
812         file->f_pos = newoffs;
813         return newoffs;
814 }
815
816 /* 
817  * do not DMA if count is too small because this will have a serious impact 
818  * on performance - the value 2400 was found by experiment and may not work
819  * everywhere as good as here - use mem_mindma option for modules to change 
820  */
821 short mem_mindma = 2400;
822 MODULE_PARM(mem_mindma, "h");
823
824 static ssize_t mem_dmaread(struct memdata *md, u32 physbuf, ssize_t count,
825                            int offset)
826 {
827         pcltmp_t pcltmp;
828         struct ti_pcl *pcl;
829         size_t retval;
830         int i;
831         DECLARE_WAITQUEUE(wait, current);
832
833         count &= ~3;
834         count = MIN(count, 53196);
835         retval = count;
836
837         if (reg_read(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS))
838             & DMA_CHAN_CTRL_BUSY) {
839                 PRINT(KERN_WARNING, md->lynx->id, "DMA ALREADY ACTIVE!");
840         }
841
842         reg_write(md->lynx, LBUS_ADDR, md->type | offset);
843
844         pcl = edit_pcl(md->lynx, md->lynx->dmem_pcl, &pcltmp);
845         pcl->buffer[0].control = PCL_CMD_LBUS_TO_PCI | MIN(count, 4092);
846         pcl->buffer[0].pointer = physbuf;
847         count -= 4092;
848
849         i = 0;
850         while (count > 0) {
851                 i++;
852                 pcl->buffer[i].control = MIN(count, 4092);
853                 pcl->buffer[i].pointer = physbuf + i * 4092;
854                 count -= 4092;
855         }
856         pcl->buffer[i].control |= PCL_LAST_BUFF;
857         commit_pcl(md->lynx, md->lynx->dmem_pcl, &pcltmp);
858
859         set_current_state(TASK_INTERRUPTIBLE);
860         add_wait_queue(&md->lynx->mem_dma_intr_wait, &wait);
861         run_sub_pcl(md->lynx, md->lynx->dmem_pcl, 2, CHANNEL_LOCALBUS);
862
863         schedule();
864         while (reg_read(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS))
865                & DMA_CHAN_CTRL_BUSY) {
866                 if (signal_pending(current)) {
867                         retval = -EINTR;
868                         break;
869                 }
870                 schedule();
871         }
872
873         reg_write(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS), 0);
874         remove_wait_queue(&md->lynx->mem_dma_intr_wait, &wait);
875
876         if (reg_read(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS))
877             & DMA_CHAN_CTRL_BUSY) {
878                 PRINT(KERN_ERR, md->lynx->id, "DMA STILL ACTIVE!");
879         }
880
881         return retval;
882 }
883
884 static ssize_t mem_read(struct file *file, char *buffer, size_t count,
885                         loff_t *offset)
886 {
887         struct memdata *md = (struct memdata *)file->private_data;
888         ssize_t bcount;
889         size_t alignfix;
890         loff_t off = *offset; /* avoid useless 64bit-arithmetic */
891         ssize_t retval;
892         void *membase;
893
894         if (*offset != off)     /* Check for EOF before we trust wrap */
895                 return 0;
896         
897         /* FIXME: Signed wrap is undefined in C - wants fixing up */
898         if (off + count > off)
899                 return 0;
900                 
901         if ((off + count) > PCILYNX_MAX_MEMORY + 1) {
902                 count = PCILYNX_MAX_MEMORY + 1 - off;
903         }
904         if (count == 0) {
905                 return 0;
906         }
907
908
909         switch (md->type) {
910         case rom:
911                 membase = md->lynx->local_rom;
912                 break;
913         case ram:
914                 membase = md->lynx->local_ram;
915                 break;
916         case aux:
917                 membase = md->lynx->aux_port;
918                 break;
919         default:
920                 panic("pcilynx%d: unsupported md->type %d in %s",
921                       md->lynx->id, md->type, __FUNCTION__);
922         }
923
924         down(&md->lynx->mem_dma_mutex);
925
926         if (count < mem_mindma) {
927                 memcpy_fromio(md->lynx->mem_dma_buffer, membase+off, count);
928                 goto out;
929         }
930
931         bcount = count;
932         alignfix = 4 - (off % 4);
933         if (alignfix != 4) {
934                 if (bcount < alignfix) {
935                         alignfix = bcount;
936                 }
937                 memcpy_fromio(md->lynx->mem_dma_buffer, membase+off,
938                               alignfix);
939                 if (bcount == alignfix) {
940                         goto out;
941                 }
942                 bcount -= alignfix;
943                 off += alignfix;
944         }
945
946         while (bcount >= 4) {
947                 retval = mem_dmaread(md, md->lynx->mem_dma_buffer_dma
948                                      + count - bcount, bcount, off);
949                 if (retval < 0) return retval;
950
951                 bcount -= retval;
952                 off += retval;
953         }
954
955         if (bcount) {
956                 memcpy_fromio(md->lynx->mem_dma_buffer + count - bcount,
957                               membase+off, bcount);
958         }
959
960  out:
961         retval = copy_to_user(buffer, md->lynx->mem_dma_buffer, count);
962         up(&md->lynx->mem_dma_mutex);
963
964         if (retval < 0) return retval;
965         *offset += count;
966         return count;
967 }
968
969
970 static ssize_t mem_write(struct file *file, const char *buffer, size_t count, 
971                          loff_t *offset)
972 {
973         struct memdata *md = (struct memdata *)file->private_data;
974
975         if (((*offset) + count) > PCILYNX_MAX_MEMORY+1) {
976                 count = PCILYNX_MAX_MEMORY+1 - *offset;
977         }
978         if (count == 0 || *offset > PCILYNX_MAX_MEMORY) {
979                 return -ENOSPC;
980         }
981
982         /* FIXME: dereferencing pointers to PCI mem doesn't work everywhere */
983         switch (md->type) {
984         case aux:
985                 copy_from_user(md->lynx->aux_port+(*offset), buffer, count);
986                 break;
987         case ram:
988                 copy_from_user(md->lynx->local_ram+(*offset), buffer, count);
989                 break;
990         case rom:
991                 /* the ROM may be writeable */
992                 copy_from_user(md->lynx->local_rom+(*offset), buffer, count);
993                 break;
994         }
995
996         file->f_pos += count;
997         return count;
998 }
999 #endif /* CONFIG_IEEE1394_PCILYNX_PORTS */
1000
1001
1002 /********************************************************
1003  * Global stuff (interrupt handler, init/shutdown code) *
1004  ********************************************************/
1005
1006
1007 static void lynx_irq_handler(int irq, void *dev_id,
1008                              struct pt_regs *regs_are_unused)
1009 {
1010         struct ti_lynx *lynx = (struct ti_lynx *)dev_id;
1011         struct hpsb_host *host = lynx->host;
1012         u32 intmask;
1013         u32 linkint;
1014
1015         linkint = reg_read(lynx, LINK_INT_STATUS);
1016         intmask = reg_read(lynx, PCI_INT_STATUS);
1017
1018         PRINTD(KERN_DEBUG, lynx->id, "interrupt: 0x%08x / 0x%08x", intmask,
1019                linkint);
1020
1021         if (!(intmask & PCI_INT_INT_PEND)) return;
1022
1023         reg_write(lynx, LINK_INT_STATUS, linkint);
1024         reg_write(lynx, PCI_INT_STATUS, intmask);
1025
1026 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1027         if (intmask & PCI_INT_AUX_INT) {
1028                 atomic_inc(&lynx->aux_intr_seen);
1029                 wake_up_interruptible(&lynx->aux_intr_wait);
1030         }
1031
1032         if (intmask & PCI_INT_DMA_HLT(CHANNEL_LOCALBUS)) {
1033                 wake_up_interruptible(&lynx->mem_dma_intr_wait);
1034         }
1035 #endif
1036
1037
1038         if (intmask & PCI_INT_1394) {
1039                 if (linkint & LINK_INT_PHY_TIMEOUT) {
1040                         PRINT(KERN_INFO, lynx->id, "PHY timeout occurred");
1041                 }
1042                 if (linkint & LINK_INT_PHY_BUSRESET) {
1043                         PRINT(KERN_INFO, lynx->id, "bus reset interrupt");
1044                         lynx->selfid_size = -1;
1045                         lynx->phy_reg0 = -1;
1046                         if (!host->in_bus_reset)
1047                                 hpsb_bus_reset(host);
1048                 }
1049                 if (linkint & LINK_INT_PHY_REG_RCVD) {
1050                         u32 reg;
1051
1052                         spin_lock(&lynx->phy_reg_lock);
1053                         reg = reg_read(lynx, LINK_PHY);
1054                         spin_unlock(&lynx->phy_reg_lock);
1055
1056                         if (!host->in_bus_reset) {
1057                                 PRINT(KERN_INFO, lynx->id,
1058                                       "phy reg received without reset");
1059                         } else if (reg & 0xf00) {
1060                                 PRINT(KERN_INFO, lynx->id,
1061                                       "unsolicited phy reg %d received",
1062                                       (reg >> 8) & 0xf);
1063                         } else {
1064                                 lynx->phy_reg0 = reg & 0xff;
1065                                 handle_selfid(lynx, host);
1066                         }
1067                 }
1068                 if (linkint & LINK_INT_ISO_STUCK) {
1069                         PRINT(KERN_INFO, lynx->id, "isochronous transmitter stuck");
1070                 }
1071                 if (linkint & LINK_INT_ASYNC_STUCK) {
1072                         PRINT(KERN_INFO, lynx->id, "asynchronous transmitter stuck");
1073                 }
1074                 if (linkint & LINK_INT_SENT_REJECT) {
1075                         PRINT(KERN_INFO, lynx->id, "sent reject");
1076                 }
1077                 if (linkint & LINK_INT_TX_INVALID_TC) {
1078                         PRINT(KERN_INFO, lynx->id, "invalid transaction code");
1079                 }
1080                 if (linkint & LINK_INT_GRF_OVERFLOW) {
1081                         /* flush FIFO if overflow happens during reset */
1082                         if (host->in_bus_reset)
1083                                 reg_write(lynx, FIFO_CONTROL,
1084                                           FIFO_CONTROL_GRF_FLUSH);
1085                         PRINT(KERN_INFO, lynx->id, "GRF overflow");
1086                 }
1087                 if (linkint & LINK_INT_ITF_UNDERFLOW) {
1088                         PRINT(KERN_INFO, lynx->id, "ITF underflow");
1089                 }
1090                 if (linkint & LINK_INT_ATF_UNDERFLOW) {
1091                         PRINT(KERN_INFO, lynx->id, "ATF underflow");
1092                 }
1093         }
1094
1095         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ISO_RCV)) {
1096                 PRINTD(KERN_DEBUG, lynx->id, "iso receive");
1097
1098                 spin_lock(&lynx->iso_rcv.lock);
1099
1100                 lynx->iso_rcv.stat[lynx->iso_rcv.next] =
1101                         reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ISO_RCV));
1102
1103                 lynx->iso_rcv.used++;
1104                 lynx->iso_rcv.next = (lynx->iso_rcv.next + 1) % NUM_ISORCV_PCL;
1105
1106                 if ((lynx->iso_rcv.next == lynx->iso_rcv.last)
1107                     || !lynx->iso_rcv.chan_count) {
1108                         PRINTD(KERN_DEBUG, lynx->id, "stopped");
1109                         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0);
1110                 }
1111
1112                 run_sub_pcl(lynx, lynx->iso_rcv.pcl_start, lynx->iso_rcv.next,
1113                             CHANNEL_ISO_RCV);
1114
1115                 spin_unlock(&lynx->iso_rcv.lock);
1116
1117                 tasklet_schedule(&lynx->iso_rcv.tq);
1118         }
1119
1120         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ASYNC_SEND)) {
1121                 u32 ack;
1122                 struct hpsb_packet *packet;
1123                 
1124                 spin_lock(&lynx->async.queue_lock);
1125
1126                 ack = reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ASYNC_SEND));
1127
1128                 packet = driver_packet(lynx->async.queue.next);
1129                 list_del(&packet->driver_list);
1130
1131                 pci_unmap_single(lynx->dev, lynx->async.header_dma,
1132                                  packet->header_size, PCI_DMA_TODEVICE);
1133                 if (packet->data_size) {
1134                         pci_unmap_single(lynx->dev, lynx->async.data_dma,
1135                                          packet->data_size, PCI_DMA_TODEVICE);
1136                 }
1137
1138                 if (!list_empty(&lynx->async.queue)) {
1139                         send_next(lynx, hpsb_async);
1140                 }
1141
1142                 spin_unlock(&lynx->async.queue_lock);
1143
1144                 if (ack & DMA_CHAN_STAT_SPECIALACK) {
1145                         ack = (ack >> 15) & 0xf;
1146                         PRINTD(KERN_INFO, lynx->id, "special ack %d", ack);
1147                         ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR);
1148                 } else {
1149                         ack = (ack >> 15) & 0xf;
1150                 }
1151                 
1152                 hpsb_packet_sent(host, packet, ack);
1153         }
1154
1155         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ISO_SEND)) {
1156                 struct hpsb_packet *packet;
1157
1158                 spin_lock(&lynx->iso_send.queue_lock);
1159
1160                 packet = driver_packet(lynx->iso_send.queue.next);
1161                 list_del(&packet->driver_list);
1162
1163                 pci_unmap_single(lynx->dev, lynx->iso_send.header_dma,
1164                                  packet->header_size, PCI_DMA_TODEVICE);
1165                 if (packet->data_size) {
1166                         pci_unmap_single(lynx->dev, lynx->iso_send.data_dma,
1167                                          packet->data_size, PCI_DMA_TODEVICE);
1168                 }
1169
1170                 if (!list_empty(&lynx->iso_send.queue)) {
1171                         send_next(lynx, hpsb_iso);
1172                 }
1173
1174                 spin_unlock(&lynx->iso_send.queue_lock);
1175
1176                 hpsb_packet_sent(host, packet, ACK_COMPLETE);
1177         }
1178
1179         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ASYNC_RCV)) {
1180                 /* general receive DMA completed */
1181                 int stat = reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ASYNC_RCV));
1182
1183                 PRINTD(KERN_DEBUG, lynx->id, "received packet size %d",
1184                        stat & 0x1fff); 
1185
1186                 if (stat & DMA_CHAN_STAT_SELFID) {
1187                         lynx->selfid_size = stat & 0x1fff;
1188                         handle_selfid(lynx, host);
1189                 } else {
1190                         quadlet_t *q_data = lynx->rcv_page;
1191                         if ((*q_data >> 4 & 0xf) == TCODE_READQ_RESPONSE
1192                             || (*q_data >> 4 & 0xf) == TCODE_WRITEQ) {
1193                                 cpu_to_be32s(q_data + 3);
1194                         }
1195                         hpsb_packet_received(host, q_data, stat & 0x1fff, 0);
1196                 }
1197
1198                 run_pcl(lynx, lynx->rcv_pcl_start, CHANNEL_ASYNC_RCV);
1199         }
1200 }
1201
1202
1203 static void iso_rcv_bh(struct ti_lynx *lynx)
1204 {
1205         unsigned int idx;
1206         quadlet_t *data;
1207         unsigned long flags;
1208
1209         spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
1210
1211         while (lynx->iso_rcv.used) {
1212                 idx = lynx->iso_rcv.last;
1213                 spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
1214
1215                 data = lynx->iso_rcv.page[idx / ISORCV_PER_PAGE]
1216                         + (idx % ISORCV_PER_PAGE) * MAX_ISORCV_SIZE;
1217
1218                 if ((*data >> 16) + 4 != (lynx->iso_rcv.stat[idx] & 0x1fff)) {
1219                         PRINT(KERN_ERR, lynx->id,
1220                               "iso length mismatch 0x%08x/0x%08x", *data,
1221                               lynx->iso_rcv.stat[idx]);
1222                 }
1223
1224                 if (lynx->iso_rcv.stat[idx] 
1225                     & (DMA_CHAN_STAT_PCIERR | DMA_CHAN_STAT_PKTERR)) {
1226                         PRINT(KERN_INFO, lynx->id,
1227                               "iso receive error on %d to 0x%p", idx, data);
1228                 } else {
1229                         hpsb_packet_received(lynx->host, data,
1230                                              lynx->iso_rcv.stat[idx] & 0x1fff,
1231                                              0);
1232                 }
1233
1234                 spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
1235                 lynx->iso_rcv.last = (idx + 1) % NUM_ISORCV_PCL;
1236                 lynx->iso_rcv.used--;
1237         }
1238
1239         if (lynx->iso_rcv.chan_count) {
1240                 reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV),
1241                           DMA_WORD1_CMP_ENABLE_MASTER);
1242         }
1243         spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
1244 }
1245
1246
1247 static void remove_card(struct pci_dev *dev)
1248 {
1249         struct ti_lynx *lynx;
1250         int i;
1251
1252         lynx = pci_get_drvdata(dev);
1253         if (!lynx) return;
1254         pci_set_drvdata(dev, NULL);
1255
1256         switch (lynx->state) {
1257         case is_host:
1258                 reg_write(lynx, PCI_INT_ENABLE, 0);
1259                 hpsb_remove_host(lynx->host);
1260         case have_intr:
1261                 reg_write(lynx, PCI_INT_ENABLE, 0);
1262                 free_irq(lynx->dev->irq, lynx);
1263         case have_iomappings:
1264                 reg_set_bits(lynx, MISC_CONTROL, MISC_CONTROL_SWRESET);
1265                 /* Fix buggy cards with autoboot pin not tied low: */
1266                 reg_write(lynx, DMA0_CHAN_CTRL, 0);
1267                 iounmap(lynx->registers);
1268                 iounmap(lynx->local_rom);
1269                 iounmap(lynx->local_ram);
1270                 iounmap(lynx->aux_port);
1271         case have_1394_buffers:
1272                 for (i = 0; i < ISORCV_PAGES; i++) {
1273                         if (lynx->iso_rcv.page[i]) {
1274                                 pci_free_consistent(lynx->dev, PAGE_SIZE,
1275                                                     lynx->iso_rcv.page[i],
1276                                                     lynx->iso_rcv.page_dma[i]);
1277                         }
1278                 }
1279                 pci_free_consistent(lynx->dev, PAGE_SIZE, lynx->rcv_page,
1280                                     lynx->rcv_page_dma);
1281         case have_aux_buf:
1282 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1283                 pci_free_consistent(lynx->dev, 65536, lynx->mem_dma_buffer,
1284                                     lynx->mem_dma_buffer_dma);
1285 #endif
1286         case have_pcl_mem:
1287 #ifndef CONFIG_IEEE1394_PCILYNX_LOCALRAM
1288                 pci_free_consistent(lynx->dev, LOCALRAM_SIZE, lynx->pcl_mem,
1289                                     lynx->pcl_mem_dma);
1290 #endif
1291         case clear:
1292                 /* do nothing - already freed */
1293                 ;
1294         }
1295
1296         tasklet_kill(&lynx->iso_rcv.tq);
1297         hpsb_unref_host(lynx->host);
1298 }
1299
1300
1301 static int __devinit add_card(struct pci_dev *dev,
1302                               const struct pci_device_id *devid_is_unused)
1303 {
1304 #define FAIL(fmt, args...) do { \
1305         PRINT_G(KERN_ERR, fmt , ## args); \
1306         remove_card(dev); \
1307         return error; \
1308         } while (0)
1309
1310         struct hpsb_host *host;
1311         struct ti_lynx *lynx; /* shortcut to currently handled device */
1312         struct ti_pcl pcl;
1313         u32 *pcli;
1314         int i;
1315         int error;
1316
1317         /* needed for i2c communication with serial eeprom */
1318         struct i2c_adapter i2c_adapter;
1319         struct i2c_algo_bit_data i2c_adapter_data;
1320
1321         int got_valid_bus_info_block = 0; /* set to 1, if we were able to get a valid bus info block from serial eeprom */
1322
1323         error = -ENXIO;
1324
1325         if (pci_set_dma_mask(dev, 0xffffffff))
1326                 FAIL("DMA address limits not supported for PCILynx hardware");
1327         if (pci_enable_device(dev))
1328                 FAIL("failed to enable PCILynx hardware");
1329         pci_set_master(dev);
1330
1331         error = -ENOMEM;
1332
1333         host = hpsb_alloc_host(&lynx_driver, sizeof(struct ti_lynx));
1334         if (!host) FAIL("failed to allocate control structure memory");
1335
1336         lynx = host->hostdata;
1337         lynx->id = card_id++;
1338         lynx->dev = dev;
1339         lynx->state = clear;
1340         lynx->host = host;
1341         host->pdev = dev;
1342         pci_set_drvdata(dev, lynx);
1343
1344         lynx->lock = SPIN_LOCK_UNLOCKED;
1345         lynx->phy_reg_lock = SPIN_LOCK_UNLOCKED;
1346
1347 #ifndef CONFIG_IEEE1394_PCILYNX_LOCALRAM
1348         lynx->pcl_mem = pci_alloc_consistent(dev, LOCALRAM_SIZE,
1349                                              &lynx->pcl_mem_dma);
1350
1351         if (lynx->pcl_mem != NULL) {
1352                 lynx->state = have_pcl_mem;
1353                 PRINT(KERN_INFO, lynx->id, 
1354                       "allocated PCL memory %d Bytes @ 0x%p", LOCALRAM_SIZE,
1355                       lynx->pcl_mem);
1356         } else {
1357                 FAIL("failed to allocate PCL memory area");
1358         }
1359 #endif
1360
1361 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1362         lynx->mem_dma_buffer = pci_alloc_consistent(dev, 65536,
1363                                                     &lynx->mem_dma_buffer_dma);
1364         if (lynx->mem_dma_buffer == NULL) {
1365                 FAIL("failed to allocate DMA buffer for aux");
1366         }
1367         lynx->state = have_aux_buf;
1368 #endif
1369
1370         lynx->rcv_page = pci_alloc_consistent(dev, PAGE_SIZE,
1371                                               &lynx->rcv_page_dma);
1372         if (lynx->rcv_page == NULL) {
1373                 FAIL("failed to allocate receive buffer");
1374         }
1375         lynx->state = have_1394_buffers;
1376
1377         for (i = 0; i < ISORCV_PAGES; i++) {
1378                 lynx->iso_rcv.page[i] =
1379                         pci_alloc_consistent(dev, PAGE_SIZE,
1380                                              &lynx->iso_rcv.page_dma[i]);
1381                 if (lynx->iso_rcv.page[i] == NULL) {
1382                         FAIL("failed to allocate iso receive buffers");
1383                 }
1384         }
1385
1386         lynx->registers = ioremap_nocache(pci_resource_start(dev,0),
1387                                           PCILYNX_MAX_REGISTER);
1388         lynx->local_ram = ioremap(pci_resource_start(dev,1), PCILYNX_MAX_MEMORY);
1389         lynx->aux_port  = ioremap(pci_resource_start(dev,2), PCILYNX_MAX_MEMORY);
1390         lynx->local_rom = ioremap(pci_resource_start(dev,PCI_ROM_RESOURCE),
1391                                   PCILYNX_MAX_MEMORY);
1392         lynx->state = have_iomappings;
1393
1394         if (lynx->registers == NULL) {
1395                 FAIL("failed to remap registers - card not accessible");
1396         }
1397
1398 #ifdef CONFIG_IEEE1394_PCILYNX_LOCALRAM
1399         if (lynx->local_ram == NULL) {
1400                 FAIL("failed to remap local RAM which is required for "
1401                      "operation");
1402         }
1403 #endif
1404
1405         reg_set_bits(lynx, MISC_CONTROL, MISC_CONTROL_SWRESET);
1406         /* Fix buggy cards with autoboot pin not tied low: */
1407         reg_write(lynx, DMA0_CHAN_CTRL, 0);
1408
1409         if (!request_irq(dev->irq, lynx_irq_handler, SA_SHIRQ,
1410                          PCILYNX_DRIVER_NAME, lynx)) {
1411                 PRINT(KERN_INFO, lynx->id, "allocated interrupt %d", dev->irq);
1412                 lynx->state = have_intr;
1413         } else {
1414                 FAIL("failed to allocate shared interrupt %d", dev->irq);
1415         }
1416
1417         /* alloc_pcl return values are not checked, it is expected that the
1418          * provided PCL space is sufficient for the initial allocations */
1419 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1420         if (lynx->aux_port != NULL) {
1421                 lynx->dmem_pcl = alloc_pcl(lynx);
1422                 aux_setup_pcls(lynx);
1423                 sema_init(&lynx->mem_dma_mutex, 1);
1424         }
1425 #endif
1426         lynx->rcv_pcl = alloc_pcl(lynx);
1427         lynx->rcv_pcl_start = alloc_pcl(lynx);
1428         lynx->async.pcl = alloc_pcl(lynx);
1429         lynx->async.pcl_start = alloc_pcl(lynx);
1430         lynx->iso_send.pcl = alloc_pcl(lynx);
1431         lynx->iso_send.pcl_start = alloc_pcl(lynx);
1432
1433         for (i = 0; i < NUM_ISORCV_PCL; i++) {
1434                 lynx->iso_rcv.pcl[i] = alloc_pcl(lynx);
1435         }
1436         lynx->iso_rcv.pcl_start = alloc_pcl(lynx);
1437
1438         /* all allocations successful - simple init stuff follows */
1439
1440         reg_write(lynx, PCI_INT_ENABLE, PCI_INT_DMA_ALL);
1441
1442 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1443         reg_set_bits(lynx, PCI_INT_ENABLE, PCI_INT_AUX_INT);
1444         init_waitqueue_head(&lynx->mem_dma_intr_wait);
1445         init_waitqueue_head(&lynx->aux_intr_wait);
1446 #endif
1447
1448         tasklet_init(&lynx->iso_rcv.tq, (void (*)(unsigned long))iso_rcv_bh,
1449                      (unsigned long)lynx);
1450
1451         lynx->iso_rcv.lock = SPIN_LOCK_UNLOCKED;
1452
1453         lynx->async.queue_lock = SPIN_LOCK_UNLOCKED;
1454         lynx->async.channel = CHANNEL_ASYNC_SEND;
1455         lynx->iso_send.queue_lock = SPIN_LOCK_UNLOCKED;
1456         lynx->iso_send.channel = CHANNEL_ISO_SEND;
1457         
1458         PRINT(KERN_INFO, lynx->id, "remapped memory spaces reg 0x%p, rom 0x%p, "
1459               "ram 0x%p, aux 0x%p", lynx->registers, lynx->local_rom,
1460               lynx->local_ram, lynx->aux_port);
1461
1462         /* now, looking for PHY register set */
1463         if ((get_phy_reg(lynx, 2) & 0xe0) == 0xe0) {
1464                 lynx->phyic.reg_1394a = 1;
1465                 PRINT(KERN_INFO, lynx->id,
1466                       "found 1394a conform PHY (using extended register set)");
1467                 lynx->phyic.vendor = get_phy_vendorid(lynx);
1468                 lynx->phyic.product = get_phy_productid(lynx);
1469         } else {
1470                 lynx->phyic.reg_1394a = 0;
1471                 PRINT(KERN_INFO, lynx->id, "found old 1394 PHY");
1472         }
1473
1474         lynx->selfid_size = -1;
1475         lynx->phy_reg0 = -1;
1476
1477         INIT_LIST_HEAD(&lynx->async.queue);
1478         INIT_LIST_HEAD(&lynx->iso_send.queue);
1479
1480         pcl.next = pcl_bus(lynx, lynx->rcv_pcl);
1481         put_pcl(lynx, lynx->rcv_pcl_start, &pcl);
1482
1483         pcl.next = PCL_NEXT_INVALID;
1484         pcl.async_error_next = PCL_NEXT_INVALID;
1485 #ifdef __BIG_ENDIAN
1486         pcl.buffer[0].control = PCL_CMD_RCV | 16;
1487         pcl.buffer[1].control = PCL_LAST_BUFF | 4080;
1488 #else
1489         pcl.buffer[0].control = PCL_CMD_RCV | PCL_BIGENDIAN | 16;
1490         pcl.buffer[1].control = PCL_LAST_BUFF | 4080;
1491 #endif
1492         pcl.buffer[0].pointer = lynx->rcv_page_dma;
1493         pcl.buffer[1].pointer = lynx->rcv_page_dma + 16;
1494         put_pcl(lynx, lynx->rcv_pcl, &pcl);
1495         
1496         pcl.next = pcl_bus(lynx, lynx->async.pcl);
1497         pcl.async_error_next = pcl_bus(lynx, lynx->async.pcl);
1498         put_pcl(lynx, lynx->async.pcl_start, &pcl);
1499
1500         pcl.next = pcl_bus(lynx, lynx->iso_send.pcl);
1501         pcl.async_error_next = PCL_NEXT_INVALID;
1502         put_pcl(lynx, lynx->iso_send.pcl_start, &pcl);
1503
1504         pcl.next = PCL_NEXT_INVALID;
1505         pcl.async_error_next = PCL_NEXT_INVALID;
1506         pcl.buffer[0].control = PCL_CMD_RCV | 4;
1507 #ifndef __BIG_ENDIAN
1508         pcl.buffer[0].control |= PCL_BIGENDIAN;
1509 #endif
1510         pcl.buffer[1].control = PCL_LAST_BUFF | 2044;
1511
1512         for (i = 0; i < NUM_ISORCV_PCL; i++) {
1513                 int page = i / ISORCV_PER_PAGE;
1514                 int sec = i % ISORCV_PER_PAGE;
1515
1516                 pcl.buffer[0].pointer = lynx->iso_rcv.page_dma[page] 
1517                         + sec * MAX_ISORCV_SIZE;
1518                 pcl.buffer[1].pointer = pcl.buffer[0].pointer + 4;
1519                 put_pcl(lynx, lynx->iso_rcv.pcl[i], &pcl);
1520         }
1521
1522         pcli = (u32 *)&pcl;
1523         for (i = 0; i < NUM_ISORCV_PCL; i++) {
1524                 pcli[i] = pcl_bus(lynx, lynx->iso_rcv.pcl[i]);
1525         }
1526         put_pcl(lynx, lynx->iso_rcv.pcl_start, &pcl);
1527
1528         /* FIFO sizes from left to right: ITF=48 ATF=48 GRF=160 */
1529         reg_write(lynx, FIFO_SIZES, 0x003030a0);
1530         /* 20 byte threshold before triggering PCI transfer */
1531         reg_write(lynx, DMA_GLOBAL_REGISTER, 0x2<<24);
1532         /* threshold on both send FIFOs before transmitting:
1533            FIFO size - cache line size - 1 */
1534         i = reg_read(lynx, PCI_LATENCY_CACHELINE) & 0xff;
1535         i = 0x30 - i - 1;
1536         reg_write(lynx, FIFO_XMIT_THRESHOLD, (i << 8) | i);
1537
1538         reg_set_bits(lynx, PCI_INT_ENABLE, PCI_INT_1394);
1539
1540         reg_write(lynx, LINK_INT_ENABLE, LINK_INT_PHY_TIMEOUT
1541                   | LINK_INT_PHY_REG_RCVD  | LINK_INT_PHY_BUSRESET
1542                   | LINK_INT_ISO_STUCK     | LINK_INT_ASYNC_STUCK 
1543                   | LINK_INT_SENT_REJECT   | LINK_INT_TX_INVALID_TC
1544                   | LINK_INT_GRF_OVERFLOW  | LINK_INT_ITF_UNDERFLOW
1545                   | LINK_INT_ATF_UNDERFLOW);
1546         
1547         reg_write(lynx, DMA_WORD0_CMP_VALUE(CHANNEL_ASYNC_RCV), 0);
1548         reg_write(lynx, DMA_WORD0_CMP_ENABLE(CHANNEL_ASYNC_RCV), 0xa<<4);
1549         reg_write(lynx, DMA_WORD1_CMP_VALUE(CHANNEL_ASYNC_RCV), 0);
1550         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ASYNC_RCV),
1551                   DMA_WORD1_CMP_MATCH_LOCAL_NODE | DMA_WORD1_CMP_MATCH_BROADCAST
1552                   | DMA_WORD1_CMP_MATCH_EXACT    | DMA_WORD1_CMP_MATCH_BUS_BCAST
1553                   | DMA_WORD1_CMP_ENABLE_SELF_ID | DMA_WORD1_CMP_ENABLE_MASTER);
1554
1555         run_pcl(lynx, lynx->rcv_pcl_start, CHANNEL_ASYNC_RCV);
1556
1557         reg_write(lynx, DMA_WORD0_CMP_VALUE(CHANNEL_ISO_RCV), 0);
1558         reg_write(lynx, DMA_WORD0_CMP_ENABLE(CHANNEL_ISO_RCV), 0x9<<4);
1559         reg_write(lynx, DMA_WORD1_CMP_VALUE(CHANNEL_ISO_RCV), 0);
1560         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0);
1561
1562         run_sub_pcl(lynx, lynx->iso_rcv.pcl_start, 0, CHANNEL_ISO_RCV);
1563
1564         reg_write(lynx, LINK_CONTROL, LINK_CONTROL_RCV_CMP_VALID
1565                   | LINK_CONTROL_TX_ISO_EN   | LINK_CONTROL_RX_ISO_EN
1566                   | LINK_CONTROL_TX_ASYNC_EN | LINK_CONTROL_RX_ASYNC_EN
1567                   | LINK_CONTROL_RESET_TX    | LINK_CONTROL_RESET_RX);
1568
1569         if (!lynx->phyic.reg_1394a) {
1570                 /* attempt to enable contender bit -FIXME- would this work
1571                  * elsewhere? */
1572                 reg_set_bits(lynx, GPIO_CTRL_A, 0x1);
1573                 reg_write(lynx, GPIO_DATA_BASE + 0x3c, 0x1); 
1574         } else {
1575                 /* set the contender bit in the extended PHY register
1576                  * set. (Should check that bis 0,1,2 (=0xE0) is set
1577                  * in register 2?)
1578                  */
1579                 i = get_phy_reg(lynx, 4);
1580                 if (i != -1) set_phy_reg(lynx, 4, i | 0x40);
1581         }
1582
1583
1584         if (!skip_eeprom)
1585         {
1586                 i2c_adapter = bit_ops;
1587                 i2c_adapter_data = bit_data;
1588                 i2c_adapter.algo_data = &i2c_adapter_data;
1589                 i2c_adapter_data.data = lynx;
1590
1591 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
1592                 PRINT(KERN_DEBUG, lynx->id,"original eeprom control: %d",reg_read(lynx,SERIAL_EEPROM_CONTROL));
1593 #endif
1594
1595                 /* reset hardware to sane state */
1596                 lynx->i2c_driven_state = 0x00000070;
1597                 reg_write(lynx, SERIAL_EEPROM_CONTROL, lynx->i2c_driven_state);
1598
1599                 if (i2c_bit_add_bus(&i2c_adapter) < 0)
1600                 {
1601                         PRINT(KERN_ERR, lynx->id,  "unable to register i2c");
1602                 }
1603                 else
1604                 {
1605                         /* do i2c stuff */
1606                         unsigned char i2c_cmd = 0x10;
1607                         struct i2c_msg msg[2] = { { 0x50, 0, 1, &i2c_cmd }, 
1608                                                   { 0x50, I2C_M_RD, 20, (unsigned char*) lynx->config_rom }
1609                                                 };
1610
1611
1612 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
1613                         union i2c_smbus_data data;
1614
1615                         if (i2c_smbus_xfer(&i2c_adapter, 80, 0, I2C_SMBUS_WRITE, 0, I2C_SMBUS_BYTE,NULL))
1616                                 PRINT(KERN_ERR, lynx->id,"eeprom read start has failed");
1617                         else
1618                         {
1619                                 u16 addr;
1620                                 for (addr=0x00; addr < 0x100; addr++) {
1621                                         if (i2c_smbus_xfer(&i2c_adapter, 80, 0, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE,& data)) {
1622                                                 PRINT(KERN_ERR, lynx->id, "unable to read i2c %x", addr);
1623                                                 break;
1624                                         }
1625                                         else
1626                                                 PRINT(KERN_DEBUG, lynx->id,"got serial eeprom data at %x: %x",addr, data.byte);
1627                                 }
1628                         }
1629 #endif
1630
1631                         /* we use i2c_transfer, because i2c_smbus_read_block_data does not work properly and we
1632                            do it more efficiently in one transaction rather then using several reads */
1633                         if (i2c_transfer(&i2c_adapter, msg, 2) < 0) {
1634                                 PRINT(KERN_ERR, lynx->id, "unable to read bus info block from i2c");
1635                         } else {
1636 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
1637                                 int i;
1638 #endif
1639                                 PRINT(KERN_INFO, lynx->id, "got bus info block from serial eeprom");
1640                                 /* FIXME: probably we shoud rewrite the max_rec, max_ROM(1394a), generation(1394a) and link_spd(1394a) field
1641                                    and recalculate the CRC */
1642
1643 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
1644                                 for (i=0; i < 5 ; i++)
1645                                         PRINT(KERN_DEBUG, lynx->id, "Businfo block quadlet %i: %08x",i, be32_to_cpu(lynx->config_rom[i]));
1646 #endif
1647
1648                                 /* info_length, crc_length and 1394 magic number to check, if it is really a bus info block */
1649                                 if (((be32_to_cpu(lynx->config_rom[0]) & 0xffff0000) == 0x04040000) &&
1650                                     (lynx->config_rom[1] == __constant_cpu_to_be32(0x31333934)))
1651                                 {
1652                                         PRINT(KERN_DEBUG, lynx->id, "read a valid bus info block from");
1653                                         got_valid_bus_info_block = 1;
1654                                 } else {
1655                                         PRINT(KERN_WARNING, lynx->id, "read something from serial eeprom, but it does not seem to be a valid bus info block");
1656                                 }
1657
1658                         }
1659
1660                         i2c_bit_del_bus(&i2c_adapter);
1661                 }
1662         }
1663
1664         if (got_valid_bus_info_block) {
1665                 memcpy(lynx->config_rom+5,lynx_csr_rom+5,sizeof(lynx_csr_rom)-20);
1666         } else {
1667                 PRINT(KERN_INFO, lynx->id, "since we did not get a bus info block from serial eeprom, we use a generic one with a hard coded GUID");
1668                 memcpy(lynx->config_rom,lynx_csr_rom,sizeof(lynx_csr_rom));
1669         }
1670
1671         hpsb_add_host(host);
1672         lynx->state = is_host;
1673
1674         return 0;
1675 #undef FAIL
1676 }
1677
1678
1679
1680 static size_t get_lynx_rom(struct hpsb_host *host, quadlet_t **ptr)
1681 {
1682         struct ti_lynx *lynx = host->hostdata;
1683         *ptr = lynx->config_rom;
1684         return sizeof(lynx_csr_rom);
1685 }
1686
1687 static struct pci_device_id pci_table[] __devinitdata = {
1688         {
1689                 .vendor =    PCI_VENDOR_ID_TI,
1690                 .device =    PCI_DEVICE_ID_TI_PCILYNX,
1691                 .subvendor = PCI_ANY_ID,
1692                 .subdevice = PCI_ANY_ID,
1693         },
1694         { }                     /* Terminating entry */
1695 };
1696
1697 static struct pci_driver lynx_pci_driver = {
1698         .name =     PCILYNX_DRIVER_NAME,
1699         .id_table = pci_table,
1700         .probe =    add_card,
1701         .remove =   __devexit_p(remove_card),
1702 };
1703
1704 static struct hpsb_host_driver lynx_driver = {
1705         .name =            PCILYNX_DRIVER_NAME,
1706         .get_rom =         get_lynx_rom,
1707         .transmit_packet = lynx_transmit,
1708         .devctl =          lynx_devctl,
1709 };
1710
1711 MODULE_AUTHOR("Andreas E. Bombe <andreas.bombe@munich.netsurf.de>");
1712 MODULE_DESCRIPTION("driver for Texas Instruments PCI Lynx IEEE-1394 controller");
1713 MODULE_LICENSE("GPL");
1714 MODULE_SUPPORTED_DEVICE("pcilynx");
1715 MODULE_DEVICE_TABLE(pci, pci_table);
1716
1717 static int __init pcilynx_init(void)
1718 {
1719         int ret;
1720
1721 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1722         if (register_chrdev(PCILYNX_MAJOR, PCILYNX_DRIVER_NAME, &aux_ops)) {
1723                 PRINT_G(KERN_ERR, "allocation of char major number %d failed",
1724                         PCILYNX_MAJOR);
1725                 return -EBUSY;
1726         }
1727 #endif
1728
1729         ret = pci_module_init(&lynx_pci_driver);
1730         if (ret < 0) {
1731                 PRINT_G(KERN_ERR, "PCI module init failed");
1732                 goto free_char_dev;
1733         }
1734
1735         return 0;
1736
1737  free_char_dev:
1738 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1739         unregister_chrdev(PCILYNX_MAJOR, PCILYNX_DRIVER_NAME);
1740 #endif
1741
1742         return ret;
1743 }
1744
1745 static void __exit pcilynx_cleanup(void)
1746 {
1747         pci_unregister_driver(&lynx_pci_driver);
1748
1749 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1750         unregister_chrdev(PCILYNX_MAJOR, PCILYNX_DRIVER_NAME);
1751 #endif
1752 }
1753
1754
1755 module_init(pcilynx_init);
1756 module_exit(pcilynx_cleanup);