2 * $Id: pmc551.c,v 1.22 2003/01/24 13:34:30 dwmw2 Exp $
4 * PMC551 PCI Mezzanine Ram Device
7 * Mark Ferrell <mferrell@mvista.com>
8 * Copyright 1999,2000 Nortel Networks
11 * As part of this driver was derived from the slram.c driver it
12 * falls under the same license, which is GNU General Public
16 * This driver is intended to support the PMC551 PCI Ram device
17 * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
18 * cPCI embedded systems. The device contains a single SROM
19 * that initially programs the V370PDC chipset onboard the
20 * device, and various banks of DRAM/SDRAM onboard. This driver
21 * implements this PCI Ram device as an MTD (Memory Technology
22 * Device) so that it can be used to hold a file system, or for
23 * added swap space in embedded systems. Since the memory on
24 * this board isn't as fast as main memory we do not try to hook
25 * it into main memory as that would simply reduce performance
26 * on the system. Using it as a block device allows us to use
27 * it as high speed swap or for a high speed disk device of some
28 * sort. Which becomes very useful on diskless systems in the
29 * embedded market I might add.
32 * Due to what I assume is more buggy SROM, the 64M PMC551 I
33 * have available claims that all 4 of it's DRAM banks have 64M
34 * of ram configured (making a grand total of 256M onboard).
35 * This is slightly annoying since the BAR0 size reflects the
36 * aperture size, not the dram size, and the V370PDC supplies no
37 * other method for memory size discovery. This problem is
38 * mostly only relevant when compiled as a module, as the
39 * unloading of the module with an aperture size smaller then
40 * the ram will cause the driver to detect the onboard memory
41 * size to be equal to the aperture size when the module is
42 * reloaded. Soooo, to help, the module supports an msize
43 * option to allow the specification of the onboard memory, and
44 * an asize option, to allow the specification of the aperture
45 * size. The aperture must be equal to or less then the memory
46 * size, the driver will correct this if you screw it up. This
47 * problem is not relevant for compiled in drivers as compiled
48 * in drivers only init once.
51 * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
52 * initial example code of how to initialize this device and for
53 * help with questions I had concerning operation of the device.
55 * Most of the MTD code for this driver was originally written
56 * for the slram.o module in the MTD drivers package which
57 * allows the mapping of system memory into an MTD device.
58 * Since the PMC551 memory module is accessed in the same
59 * fashion as system memory, the slram.c code became a very nice
60 * fit to the needs of this driver. All we added was PCI
61 * detection/initialization to the driver and automatically figure
62 * out the size via the PCI detection.o, later changes by Corey
63 * Minyard set up the card to utilize a 1M sliding apature.
65 * Corey Minyard <minyard@nortelnetworks.com>
66 * * Modified driver to utilize a sliding aperture instead of
67 * mapping all memory into kernel space which turned out to
69 * * Located a bug in the SROM's initialization sequence that
70 * made the memory unusable, added a fix to code to touch up
74 * * MUST fix the init function to not spin on a register
75 * waiting for it to set .. this does not safely handle busted
76 * devices that never reset the register correctly which will
77 * cause the system to hang w/ a reboot being the only chance at
78 * recover. [sort of fixed, could be better]
79 * * Add I2C handling of the SROM so we can read the SROM's information
80 * about the aperture size. This should always accurately reflect the
81 * onboard memory size.
82 * * Comb the init routine. It's still a bit cludgy on a few things.
85 #include <linux/config.h>
86 #include <linux/kernel.h>
87 #include <linux/module.h>
88 #include <asm/uaccess.h>
89 #include <linux/types.h>
90 #include <linux/sched.h>
91 #include <linux/init.h>
92 #include <linux/ptrace.h>
93 #include <linux/slab.h>
94 #include <linux/string.h>
95 #include <linux/timer.h>
96 #include <linux/major.h>
98 #include <linux/ioctl.h>
100 #include <asm/system.h>
101 #include <linux/pci.h>
104 #error Enable PCI in your kernel config
107 #include <linux/mtd/mtd.h>
108 #include <linux/mtd/pmc551.h>
109 #include <linux/mtd/compatmac.h>
111 #if LINUX_VERSION_CODE > 0x20300
112 #define PCI_BASE_ADDRESS(dev) (dev->resource[0].start)
114 #define PCI_BASE_ADDRESS(dev) (dev->base_address[0])
117 static struct mtd_info *pmc551list;
119 static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
121 struct mypriv *priv = (struct mypriv *)mtd->priv;
122 u32 soff_hi, soff_lo; /* start address offset hi/lo */
123 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
128 #ifdef CONFIG_MTD_PMC551_DEBUG
129 printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
132 end = instr->addr + instr->len - 1;
134 /* Is it past the end? */
135 if ( end > mtd->size ) {
136 #ifdef CONFIG_MTD_PMC551_DEBUG
137 printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size);
142 eoff_hi = end & ~(priv->asize - 1);
143 soff_hi = instr->addr & ~(priv->asize - 1);
144 eoff_lo = end & (priv->asize - 1);
145 soff_lo = instr->addr & (priv->asize - 1);
147 pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr);
149 if ( soff_hi == eoff_hi || mtd->size == priv->asize) {
150 /* The whole thing fits within one access, so just one shot
152 memset(ptr, 0xff, instr->len);
154 /* We have to do multiple writes to get all the data
156 while (soff_hi != eoff_hi) {
157 #ifdef CONFIG_MTD_PMC551_DEBUG
158 printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
160 memset(ptr, 0xff, priv->asize);
161 if (soff_hi + priv->asize >= mtd->size) {
164 soff_hi += priv->asize;
165 pmc551_point (mtd,(priv->base_map0|soff_hi),
166 priv->asize, &retlen, &ptr);
168 memset (ptr, 0xff, eoff_lo);
172 instr->state = MTD_ERASE_DONE;
173 #ifdef CONFIG_MTD_PMC551_DEBUG
174 printk(KERN_DEBUG "pmc551_erase() done\n");
177 if (instr->callback) {
178 (*(instr->callback))(instr);
184 static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
186 struct mypriv *priv = (struct mypriv *)mtd->priv;
190 #ifdef CONFIG_MTD_PMC551_DEBUG
191 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
194 if (from + len > mtd->size) {
195 #ifdef CONFIG_MTD_PMC551_DEBUG
196 printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size);
201 soff_hi = from & ~(priv->asize - 1);
202 soff_lo = from & (priv->asize - 1);
204 /* Cheap hack optimization */
205 if( priv->curr_map0 != from ) {
206 pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
207 (priv->base_map0 | soff_hi) );
208 priv->curr_map0 = soff_hi;
211 *mtdbuf = priv->start + soff_lo;
217 static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
219 #ifdef CONFIG_MTD_PMC551_DEBUG
220 printk(KERN_DEBUG "pmc551_unpoint()\n");
225 static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
227 struct mypriv *priv = (struct mypriv *)mtd->priv;
228 u32 soff_hi, soff_lo; /* start address offset hi/lo */
229 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
232 u_char *copyto = buf;
234 #ifdef CONFIG_MTD_PMC551_DEBUG
235 printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize);
238 end = from + len - 1;
240 /* Is it past the end? */
241 if (end > mtd->size) {
242 #ifdef CONFIG_MTD_PMC551_DEBUG
243 printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size);
248 soff_hi = from & ~(priv->asize - 1);
249 eoff_hi = end & ~(priv->asize - 1);
250 soff_lo = from & (priv->asize - 1);
251 eoff_lo = end & (priv->asize - 1);
253 pmc551_point (mtd, from, len, retlen, &ptr);
255 if (soff_hi == eoff_hi) {
256 /* The whole thing fits within one access, so just one shot
258 memcpy(copyto, ptr, len);
261 /* We have to do multiple writes to get all the data
263 while (soff_hi != eoff_hi) {
264 #ifdef CONFIG_MTD_PMC551_DEBUG
265 printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
267 memcpy(copyto, ptr, priv->asize);
268 copyto += priv->asize;
269 if (soff_hi + priv->asize >= mtd->size) {
272 soff_hi += priv->asize;
273 pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
275 memcpy(copyto, ptr, eoff_lo);
280 #ifdef CONFIG_MTD_PMC551_DEBUG
281 printk(KERN_DEBUG "pmc551_read() done\n");
283 *retlen = copyto - buf;
287 static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
289 struct mypriv *priv = (struct mypriv *)mtd->priv;
290 u32 soff_hi, soff_lo; /* start address offset hi/lo */
291 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
294 const u_char *copyfrom = buf;
297 #ifdef CONFIG_MTD_PMC551_DEBUG
298 printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize);
302 /* Is it past the end? or did the u32 wrap? */
303 if (end > mtd->size ) {
304 #ifdef CONFIG_MTD_PMC551_DEBUG
305 printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to);
310 soff_hi = to & ~(priv->asize - 1);
311 eoff_hi = end & ~(priv->asize - 1);
312 soff_lo = to & (priv->asize - 1);
313 eoff_lo = end & (priv->asize - 1);
315 pmc551_point (mtd, to, len, retlen, &ptr);
317 if (soff_hi == eoff_hi) {
318 /* The whole thing fits within one access, so just one shot
320 memcpy(ptr, copyfrom, len);
323 /* We have to do multiple writes to get all the data
325 while (soff_hi != eoff_hi) {
326 #ifdef CONFIG_MTD_PMC551_DEBUG
327 printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
329 memcpy(ptr, copyfrom, priv->asize);
330 copyfrom += priv->asize;
331 if (soff_hi >= mtd->size) {
334 soff_hi += priv->asize;
335 pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
337 memcpy(ptr, copyfrom, eoff_lo);
342 #ifdef CONFIG_MTD_PMC551_DEBUG
343 printk(KERN_DEBUG "pmc551_write() done\n");
345 *retlen = copyfrom - buf;
350 * Fixup routines for the V370PDC
351 * PCI device ID 0x020011b0
353 * This function basicly kick starts the DRAM oboard the card and gets it
354 * ready to be used. Before this is done the device reads VERY erratic, so
355 * much that it can crash the Linux 2.2.x series kernels when a user cat's
356 * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
357 * register. FIXME: stop spinning on registers .. must implement a timeout
359 * returns the size of the memory region found.
361 static u32 fixup_pmc551 (struct pci_dev *dev)
363 #ifdef CONFIG_MTD_PMC551_BUGFIX
366 u32 size, dcmd, cfg, dtmp;
376 * Attempt to reset the card
377 * FIXME: Stop Spinning registers
380 /* unlock registers */
381 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 );
382 /* read in old data */
383 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
384 /* bang the reset line up and down for a few */
388 while(counter++ < 100) {
389 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
393 while(counter++ < 100) {
394 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
398 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
401 * Take care and turn off the memory on the device while we
402 * tweak the configurations
404 pci_read_config_word(dev, PCI_COMMAND, &cmd);
405 tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
406 pci_write_config_word(dev, PCI_COMMAND, tmp);
409 * Disable existing aperture before probing memory size
411 pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
412 dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN);
413 pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
415 * Grab old BAR0 config so that we can figure out memory size
416 * This is another bit of kludge going on. The reason for the
417 * redundancy is I am hoping to retain the original configuration
418 * previously assigned to the card by the BIOS or some previous
419 * fixup routine in the kernel. So we read the old config into cfg,
420 * then write all 1's to the memory space, read back the result into
421 * "size", and then write back all the old config.
423 pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg );
424 #ifndef CONFIG_MTD_PMC551_BUGFIX
425 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 );
426 pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size );
427 size = (size&PCI_BASE_ADDRESS_MEM_MASK);
429 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
432 * Get the size of the memory by reading all the DRAM size values
433 * and adding them up.
435 * KLUDGE ALERT: the boards we are using have invalid column and
436 * row mux values. We fix them here, but this will break other
437 * memory configurations.
439 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
440 size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
441 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
442 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
443 pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
445 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
446 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
447 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
448 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
449 pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
451 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
452 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
453 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
454 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
455 pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
457 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
458 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
459 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
460 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
461 pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
464 * Oops .. something went wrong
466 if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
469 #endif /* CONFIG_MTD_PMC551_BUGFIX */
471 if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
478 pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 );
479 pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf );
482 * Wait until command has gone through
483 * FIXME: register spinning issue
485 do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd );
486 if(counter++ > 100)break;
487 } while ( (PCI_COMMAND_IO) & cmd );
490 * Turn on auto refresh
491 * The loop is taken directly from Ramix's example code. I assume that
492 * this must be held high for some duration of time, but I can find no
493 * documentation refrencing the reasons why.
495 for ( i = 1; i<=8 ; i++) {
496 pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df);
499 * Make certain command has gone through
500 * FIXME: register spinning issue
503 do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
504 if(counter++ > 100)break;
505 } while ( (PCI_COMMAND_IO) & cmd );
508 pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020);
509 pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff);
512 * Wait until command completes
513 * FIXME: register spinning issue
516 do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd);
517 if(counter++ > 100)break;
518 } while ( (PCI_COMMAND_IO) & cmd );
520 pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd);
522 pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd);
525 * Check to make certain fast back-to-back, if not
528 pci_read_config_word( dev, PCI_STATUS, &cmd);
529 if((cmd&PCI_COMMAND_FAST_BACK) == 0) {
530 cmd |= PCI_COMMAND_FAST_BACK;
531 pci_write_config_word( dev, PCI_STATUS, cmd);
535 * Check to make certain the DEVSEL is set correctly, this device
536 * has a tendancy to assert DEVSEL and TRDY when a write is performed
537 * to the memory when memory is read-only
539 if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) {
540 cmd &= ~PCI_STATUS_DEVSEL_MASK;
541 pci_write_config_word( dev, PCI_STATUS, cmd );
544 * Set to be prefetchable and put everything back based on old cfg.
545 * it's possible that the reset of the V370PDC nuked the original
549 cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
550 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
554 * Turn PCI memory and I/O bus access back on
556 pci_write_config_word( dev, PCI_COMMAND,
557 PCI_COMMAND_MEMORY | PCI_COMMAND_IO );
558 #ifdef CONFIG_MTD_PMC551_DEBUG
562 printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%lx\n",
563 (size<1024)?size:(size<1048576)?size>>10:size>>20,
564 (size<1024)?'B':(size<1048576)?'K':'M',
565 size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
566 PCI_BASE_ADDRESS(dev)&PCI_BASE_ADDRESS_MEM_MASK );
569 * Check to see the state of the memory
571 pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd );
572 printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
573 "pmc551: DRAM_BLK0 Size: %d at %d\n"
574 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
575 (((0x1<<1)&dcmd) == 0)?"RW":"RO",
576 (((0x1<<0)&dcmd) == 0)?"Off":"On",
577 PMC551_DRAM_BLK_GET_SIZE(dcmd),
578 ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
580 pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd );
581 printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
582 "pmc551: DRAM_BLK1 Size: %d at %d\n"
583 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
584 (((0x1<<1)&dcmd) == 0)?"RW":"RO",
585 (((0x1<<0)&dcmd) == 0)?"Off":"On",
586 PMC551_DRAM_BLK_GET_SIZE(dcmd),
587 ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
589 pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd );
590 printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
591 "pmc551: DRAM_BLK2 Size: %d at %d\n"
592 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
593 (((0x1<<1)&dcmd) == 0)?"RW":"RO",
594 (((0x1<<0)&dcmd) == 0)?"Off":"On",
595 PMC551_DRAM_BLK_GET_SIZE(dcmd),
596 ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
598 pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd );
599 printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
600 "pmc551: DRAM_BLK3 Size: %d at %d\n"
601 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
602 (((0x1<<1)&dcmd) == 0)?"RW":"RO",
603 (((0x1<<0)&dcmd) == 0)?"Off":"On",
604 PMC551_DRAM_BLK_GET_SIZE(dcmd),
605 ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
607 pci_read_config_word( dev, PCI_COMMAND, &cmd );
608 printk( KERN_DEBUG "pmc551: Memory Access %s\n",
609 (((0x1<<1)&cmd) == 0)?"off":"on" );
610 printk( KERN_DEBUG "pmc551: I/O Access %s\n",
611 (((0x1<<0)&cmd) == 0)?"off":"on" );
613 pci_read_config_word( dev, PCI_STATUS, &cmd );
614 printk( KERN_DEBUG "pmc551: Devsel %s\n",
615 ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast":
616 ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium":
617 ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" );
619 printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
620 ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" );
622 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
623 printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n"
624 "pmc551: System Control Register is %slocked to PCI access\n"
625 "pmc551: System Control Register is %slocked to EEPROM access\n",
626 (bcmd&0x1)?"software":"hardware",
627 (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un");
633 * Kernel version specific module stuffages
637 MODULE_LICENSE("GPL");
638 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
639 MODULE_DESCRIPTION(PMC551_VERSION);
640 MODULE_PARM(msize, "i");
641 MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
642 MODULE_PARM(asize, "i");
643 MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
646 * Stuff these outside the ifdef so as to not bust compiled in driver support
649 #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
650 static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
656 * PMC551 Card Initialization
658 int __init init_pmc551(void)
660 struct pci_dev *PCI_Device = NULL;
663 struct mtd_info *mtd;
667 msize = (1 << (ffs(msize) - 1))<<20;
668 if (msize > (1<<30)) {
669 printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize);
675 asize = (1 << (ffs(asize) - 1))<<20;
676 if (asize > (1<<30) ) {
677 printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize);
682 printk(KERN_INFO PMC551_VERSION);
685 printk(KERN_NOTICE "pmc551: PCI not enabled.\n");
690 * PCU-bus chipset probe.
692 for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
694 if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI,
695 PCI_DEVICE_ID_V3_SEMI_V370PDC,
696 PCI_Device ) ) == NULL) {
700 printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n",
701 PCI_BASE_ADDRESS(PCI_Device));
704 * The PMC551 device acts VERY weird if you don't init it
705 * first. i.e. it will not correctly report devsel. If for
706 * some reason the sdram is in a wrote-protected state the
707 * device will DEVSEL when it is written to causing problems
708 * with the oldproc.c driver in
709 * some kernels (2.2.*)
711 if((length = fixup_pmc551(PCI_Device)) <= 0) {
712 printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
717 * This is needed until the driver is capable of reading the
718 * onboard I2C SROM to discover the "real" memory size.
722 printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length);
727 mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
729 printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
733 memset(mtd, 0, sizeof(struct mtd_info));
735 priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL);
737 printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
741 memset(priv, 0, sizeof(*priv));
743 priv->dev = PCI_Device;
746 printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20);
747 priv->asize = asize = length;
748 } else if (asize == 0 || asize == length) {
749 printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20);
750 priv->asize = asize = length;
752 printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
755 priv->start = ioremap((PCI_BASE_ADDRESS(PCI_Device)
756 & PCI_BASE_ADDRESS_MEM_MASK),
760 printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
766 #ifdef CONFIG_MTD_PMC551_DEBUG
767 printk( KERN_DEBUG "pmc551: setting aperture to %d\n",
768 ffs(priv->asize>>20)-1);
771 priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN
772 | PMC551_PCI_MEM_MAP_ENABLE
773 | (ffs(priv->asize>>20)-1)<<4 );
774 priv->curr_map0 = priv->base_map0;
775 pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
778 #ifdef CONFIG_MTD_PMC551_DEBUG
779 printk( KERN_DEBUG "pmc551: aperture set to %d\n",
780 (priv->base_map0 & 0xF0)>>4 );
784 mtd->flags = MTD_CAP_RAM;
785 mtd->erase = pmc551_erase;
786 mtd->read = pmc551_read;
787 mtd->write = pmc551_write;
788 mtd->point = pmc551_point;
789 mtd->unpoint = pmc551_unpoint;
790 mtd->module = THIS_MODULE;
792 mtd->name = "PMC551 RAM board";
793 mtd->erasesize = 0x10000;
795 if (add_mtd_device(mtd)) {
796 printk(KERN_NOTICE "pmc551: Failed to register new device\n");
797 iounmap(priv->start);
802 printk(KERN_NOTICE "Registered pmc551 memory device.\n");
803 printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
806 priv->start + priv->asize);
807 printk(KERN_NOTICE "Total memory is %d%c\n",
808 (length<1024)?length:
809 (length<1048576)?length>>10:length>>20,
810 (length<1024)?'B':(length<1048576)?'K':'M');
811 priv->nextpmc551 = pmc551list;
817 printk(KERN_NOTICE "pmc551: not detected\n");
820 printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
826 * PMC551 Card Cleanup
828 static void __exit cleanup_pmc551(void)
831 struct mtd_info *mtd;
834 while((mtd=pmc551list)) {
835 priv = (struct mypriv *)mtd->priv;
836 pmc551list = priv->nextpmc551;
839 printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n",
840 priv->asize>>20, priv->start);
841 iounmap (priv->start);
845 del_mtd_device (mtd);
850 printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
853 module_init(init_pmc551);
854 module_exit(cleanup_pmc551);