2 * Network device driver for the MACE ethernet controller on
3 * Apple Powermacs. Assumes it's under a DBDMA controller.
5 * Copyright (C) 1996 Paul Mackerras.
8 #include <linux/config.h>
9 #include <linux/module.h>
10 #include <linux/version.h>
11 #include <linux/kernel.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/delay.h>
15 #include <linux/string.h>
16 #include <linux/timer.h>
17 #include <linux/init.h>
18 #include <linux/crc32.h>
20 #include <asm/dbdma.h>
22 #include <asm/pgtable.h>
25 static struct net_device *mace_devs;
26 static int port_aaui = -1;
30 #define MAX_TX_ACTIVE 1
31 #define NCMDS_TX 1 /* dma commands per element in tx ring */
32 #define RX_BUFLEN (ETH_FRAME_LEN + 8)
33 #define TX_TIMEOUT HZ /* 1 second */
35 /* Chip rev needs workaround on HW & multicast addr change */
36 #define BROKEN_ADDRCHG_REV 0x0941
38 /* Bits in transmit DMA status */
39 #define TX_DMA_ERR 0x80
42 volatile struct mace *mace;
43 volatile struct dbdma_regs *tx_dma;
45 volatile struct dbdma_regs *rx_dma;
47 volatile struct dbdma_cmd *tx_cmds; /* xmit dma command list */
48 volatile struct dbdma_cmd *rx_cmds; /* recv dma command list */
49 struct sk_buff *rx_bufs[N_RX_RING];
52 struct sk_buff *tx_bufs[N_TX_RING];
56 unsigned char tx_fullup;
57 unsigned char tx_active;
58 unsigned char tx_bad_runt;
59 struct net_device_stats stats;
60 struct timer_list tx_timeout;
64 struct device_node* of_node;
65 struct net_device *next_mace;
69 * Number of bytes of private data per MACE: allow enough for
70 * the rx and tx dma commands plus a branch dma command each,
71 * and another 16 bytes to allow us to align the dma command
72 * buffers on a 16 byte boundary.
74 #define PRIV_BYTES (sizeof(struct mace_data) \
75 + (N_RX_RING + NCMDS_TX * N_TX_RING + 3) * sizeof(struct dbdma_cmd))
77 static int bitrev(int);
78 static int mace_probe(void);
79 static void mace_probe1(struct device_node *mace);
80 static int mace_open(struct net_device *dev);
81 static int mace_close(struct net_device *dev);
82 static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev);
83 static struct net_device_stats *mace_stats(struct net_device *dev);
84 static void mace_set_multicast(struct net_device *dev);
85 static void mace_reset(struct net_device *dev);
86 static int mace_set_address(struct net_device *dev, void *addr);
87 static void mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
88 static void mace_txdma_intr(int irq, void *dev_id, struct pt_regs *regs);
89 static void mace_rxdma_intr(int irq, void *dev_id, struct pt_regs *regs);
90 static void mace_set_timeout(struct net_device *dev);
91 static void mace_tx_timeout(unsigned long data);
92 static inline void dbdma_reset(volatile struct dbdma_regs *dma);
93 static inline void mace_clean_rings(struct mace_data *mp);
94 static void __mace_set_address(struct net_device *dev, void *addr);
97 * If we can't get a skbuff when we need it, we use this area for DMA.
99 static unsigned char *dummy_buf;
101 /* Bit-reverse one byte of an ethernet hardware address. */
107 for (i = 0; i < 8; ++i, b >>= 1)
108 d = (d << 1) | (b & 1);
112 static int __init mace_probe(void)
114 struct device_node *mace;
116 for (mace = find_devices("mace"); mace != NULL; mace = mace->next)
118 return mace_devs? 0: -ENODEV;
121 static void __init mace_probe1(struct device_node *mace)
124 struct net_device *dev;
125 struct mace_data *mp;
128 if (mace->n_addrs != 3 || mace->n_intrs != 3) {
129 printk(KERN_ERR "can't use MACE %s: need 3 addrs and 3 irqs\n",
134 addr = get_property(mace, "mac-address", NULL);
136 addr = get_property(mace, "local-mac-address", NULL);
138 printk(KERN_ERR "Can't get mac-address for MACE %s\n",
144 if (dummy_buf == NULL) {
145 dummy_buf = kmalloc(RX_BUFLEN+2, GFP_KERNEL);
146 if (dummy_buf == NULL) {
147 printk(KERN_ERR "MACE: couldn't allocate dummy buffer\n");
152 dev = init_etherdev(0, PRIV_BYTES);
155 SET_MODULE_OWNER(dev);
160 if (!request_OF_resource(mace, 0, " (mace)")) {
161 printk(KERN_ERR "MACE: can't request IO resource !\n");
164 if (!request_OF_resource(mace, 1, " (mace tx dma)")) {
165 printk(KERN_ERR "MACE: can't request TX DMA resource !\n");
169 if (!request_OF_resource(mace, 2, " (mace tx dma)")) {
170 printk(KERN_ERR "MACE: can't request RX DMA resource !\n");
174 dev->base_addr = mace->addrs[0].address;
175 mp->mace = (volatile struct mace *)
176 ioremap(mace->addrs[0].address, 0x1000);
177 dev->irq = mace->intrs[0].line;
179 printk(KERN_INFO "%s: MACE at", dev->name);
180 rev = addr[0] == 0 && addr[1] == 0xA0;
181 for (j = 0; j < 6; ++j) {
182 dev->dev_addr[j] = rev? bitrev(addr[j]): addr[j];
183 printk("%c%.2x", (j? ':': ' '), dev->dev_addr[j]);
185 mp->chipid = (in_8(&mp->mace->chipid_hi) << 8) |
186 in_8(&mp->mace->chipid_lo);
187 printk(", chip revision %d.%d\n", mp->chipid >> 8, mp->chipid & 0xff);
190 mp = (struct mace_data *) dev->priv;
191 mp->maccc = ENXMT | ENRCV;
192 mp->tx_dma = (volatile struct dbdma_regs *)
193 ioremap(mace->addrs[1].address, 0x1000);
194 mp->tx_dma_intr = mace->intrs[1].line;
195 mp->rx_dma = (volatile struct dbdma_regs *)
196 ioremap(mace->addrs[2].address, 0x1000);
197 mp->rx_dma_intr = mace->intrs[2].line;
199 mp->tx_cmds = (volatile struct dbdma_cmd *) DBDMA_ALIGN(mp + 1);
200 mp->rx_cmds = mp->tx_cmds + NCMDS_TX * N_TX_RING + 1;
202 memset(&mp->stats, 0, sizeof(mp->stats));
203 memset((char *) mp->tx_cmds, 0,
204 (NCMDS_TX*N_TX_RING + N_RX_RING + 2) * sizeof(struct dbdma_cmd));
205 init_timer(&mp->tx_timeout);
206 mp->timeout_active = 0;
209 mp->port_aaui = port_aaui;
211 /* Apple Network Server uses the AAUI port */
212 if (machine_is_compatible("AAPL,ShinerESB"))
215 #ifdef CONFIG_MACE_AAUI_PORT
223 dev->open = mace_open;
224 dev->stop = mace_close;
225 dev->hard_start_xmit = mace_xmit_start;
226 dev->get_stats = mace_stats;
227 dev->set_multicast_list = mace_set_multicast;
228 dev->set_mac_address = mace_set_address;
234 if (request_irq(dev->irq, mace_interrupt, 0, "MACE", dev))
235 printk(KERN_ERR "MACE: can't get irq %d\n", dev->irq);
236 if (request_irq(mace->intrs[1].line, mace_txdma_intr, 0, "MACE-txdma",
238 printk(KERN_ERR "MACE: can't get irq %d\n", mace->intrs[1].line);
239 if (request_irq(mace->intrs[2].line, mace_rxdma_intr, 0, "MACE-rxdma",
241 printk(KERN_ERR "MACE: can't get irq %d\n", mace->intrs[2].line);
243 mp->next_mace = mace_devs;
248 unregister_netdev(dev);
250 release_OF_resource(mp->of_node, 0);
251 release_OF_resource(mp->of_node, 1);
252 release_OF_resource(mp->of_node, 2);
257 static void dbdma_reset(volatile struct dbdma_regs *dma)
261 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16);
264 * Yes this looks peculiar, but apparently it needs to be this
265 * way on some machines.
267 for (i = 200; i > 0; --i)
268 if (ld_le32(&dma->control) & RUN)
272 static void mace_reset(struct net_device *dev)
274 struct mace_data *mp = (struct mace_data *) dev->priv;
275 volatile struct mace *mb = mp->mace;
278 /* soft-reset the chip */
281 out_8(&mb->biucc, SWRST);
282 if (in_8(&mb->biucc) & SWRST) {
289 printk(KERN_ERR "mace: cannot reset chip!\n");
293 out_8(&mb->imr, 0xff); /* disable all intrs for now */
295 out_8(&mb->maccc, 0); /* turn off tx, rx */
297 out_8(&mb->biucc, XMTSP_64);
298 out_8(&mb->utr, RTRD);
299 out_8(&mb->fifocc, RCVFW_32 | XMTFW_16 | XMTFWU | RCVFWU | XMTBRST);
300 out_8(&mb->xmtfc, AUTO_PAD_XMIT); /* auto-pad short frames */
301 out_8(&mb->rcvfc, 0);
303 /* load up the hardware address */
304 __mace_set_address(dev, dev->dev_addr);
306 /* clear the multicast filter */
307 if (mp->chipid == BROKEN_ADDRCHG_REV)
308 out_8(&mb->iac, LOGADDR);
310 out_8(&mb->iac, ADDRCHG | LOGADDR);
311 while ((in_8(&mb->iac) & ADDRCHG) != 0)
314 for (i = 0; i < 8; ++i)
315 out_8(&mb->ladrf, 0);
317 /* done changing address */
318 if (mp->chipid != BROKEN_ADDRCHG_REV)
322 out_8(&mb->plscc, PORTSEL_AUI + ENPLSIO);
324 out_8(&mb->plscc, PORTSEL_GPSI + ENPLSIO);
327 static void __mace_set_address(struct net_device *dev, void *addr)
329 struct mace_data *mp = (struct mace_data *) dev->priv;
330 volatile struct mace *mb = mp->mace;
331 unsigned char *p = addr;
334 /* load up the hardware address */
335 if (mp->chipid == BROKEN_ADDRCHG_REV)
336 out_8(&mb->iac, PHYADDR);
338 out_8(&mb->iac, ADDRCHG | PHYADDR);
339 while ((in_8(&mb->iac) & ADDRCHG) != 0)
342 for (i = 0; i < 6; ++i)
343 out_8(&mb->padr, dev->dev_addr[i] = p[i]);
344 if (mp->chipid != BROKEN_ADDRCHG_REV)
348 static int mace_set_address(struct net_device *dev, void *addr)
350 struct mace_data *mp = (struct mace_data *) dev->priv;
351 volatile struct mace *mb = mp->mace;
354 save_flags(flags); cli();
356 __mace_set_address(dev, addr);
358 /* note: setting ADDRCHG clears ENRCV */
359 out_8(&mb->maccc, mp->maccc);
361 restore_flags(flags);
365 static int mace_open(struct net_device *dev)
367 struct mace_data *mp = (struct mace_data *) dev->priv;
368 volatile struct mace *mb = mp->mace;
369 volatile struct dbdma_regs *rd = mp->rx_dma;
370 volatile struct dbdma_regs *td = mp->tx_dma;
371 volatile struct dbdma_cmd *cp;
379 /* initialize list of sk_buffs for receiving and set up recv dma */
380 mace_clean_rings(mp);
381 memset((char *)mp->rx_cmds, 0, N_RX_RING * sizeof(struct dbdma_cmd));
383 for (i = 0; i < N_RX_RING - 1; ++i) {
384 skb = dev_alloc_skb(RX_BUFLEN + 2);
388 skb_reserve(skb, 2); /* so IP header lands on 4-byte bdry */
391 mp->rx_bufs[i] = skb;
392 st_le16(&cp->req_count, RX_BUFLEN);
393 st_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
394 st_le32(&cp->phy_addr, virt_to_bus(data));
399 st_le16(&cp->command, DBDMA_STOP);
403 /* Put a branch back to the beginning of the receive command list */
405 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
406 st_le32(&cp->cmd_dep, virt_to_bus(mp->rx_cmds));
409 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
410 out_le32(&rd->cmdptr, virt_to_bus(mp->rx_cmds));
411 out_le32(&rd->control, (RUN << 16) | RUN);
413 /* put a branch at the end of the tx command list */
414 cp = mp->tx_cmds + NCMDS_TX * N_TX_RING;
415 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
416 st_le32(&cp->cmd_dep, virt_to_bus(mp->tx_cmds));
419 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
420 out_le32(&td->cmdptr, virt_to_bus(mp->tx_cmds));
428 out_8(&mb->maccc, mp->maccc);
429 /* enable all interrupts except receive interrupts */
430 out_8(&mb->imr, RCVINT);
435 static inline void mace_clean_rings(struct mace_data *mp)
439 /* free some skb's */
440 for (i = 0; i < N_RX_RING; ++i) {
441 if (mp->rx_bufs[i] != 0) {
442 dev_kfree_skb(mp->rx_bufs[i]);
446 for (i = mp->tx_empty; i != mp->tx_fill; ) {
447 dev_kfree_skb(mp->tx_bufs[i]);
448 if (++i >= N_TX_RING)
453 static int mace_close(struct net_device *dev)
455 struct mace_data *mp = (struct mace_data *) dev->priv;
456 volatile struct mace *mb = mp->mace;
457 volatile struct dbdma_regs *rd = mp->rx_dma;
458 volatile struct dbdma_regs *td = mp->tx_dma;
460 /* disable rx and tx */
461 out_8(&mb->maccc, 0);
462 out_8(&mb->imr, 0xff); /* disable all intrs */
464 /* disable rx and tx dma */
465 st_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
466 st_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
468 mace_clean_rings(mp);
473 static inline void mace_set_timeout(struct net_device *dev)
475 struct mace_data *mp = (struct mace_data *) dev->priv;
480 if (mp->timeout_active)
481 del_timer(&mp->tx_timeout);
482 mp->tx_timeout.expires = jiffies + TX_TIMEOUT;
483 mp->tx_timeout.function = mace_tx_timeout;
484 mp->tx_timeout.data = (unsigned long) dev;
485 add_timer(&mp->tx_timeout);
486 mp->timeout_active = 1;
487 restore_flags(flags);
490 static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)
492 struct mace_data *mp = (struct mace_data *) dev->priv;
493 volatile struct dbdma_regs *td = mp->tx_dma;
494 volatile struct dbdma_cmd *cp, *np;
498 /* see if there's a free slot in the tx ring */
499 save_flags(flags); cli();
502 if (next >= N_TX_RING)
504 if (next == mp->tx_empty) {
505 netif_stop_queue(dev);
507 restore_flags(flags);
508 return 1; /* can't take it at the moment */
510 restore_flags(flags);
512 /* partially fill in the dma command block */
514 if (len > ETH_FRAME_LEN) {
515 printk(KERN_DEBUG "mace: xmit frame too long (%d)\n", len);
518 mp->tx_bufs[fill] = skb;
519 cp = mp->tx_cmds + NCMDS_TX * fill;
520 st_le16(&cp->req_count, len);
521 st_le32(&cp->phy_addr, virt_to_bus(skb->data));
523 np = mp->tx_cmds + NCMDS_TX * next;
524 out_le16(&np->command, DBDMA_STOP);
526 /* poke the tx dma channel */
530 if (!mp->tx_bad_runt && mp->tx_active < MAX_TX_ACTIVE) {
531 out_le16(&cp->xfer_status, 0);
532 out_le16(&cp->command, OUTPUT_LAST);
533 out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
535 mace_set_timeout(dev);
537 if (++next >= N_TX_RING)
539 if (next == mp->tx_empty)
540 netif_stop_queue(dev);
541 restore_flags(flags);
546 static struct net_device_stats *mace_stats(struct net_device *dev)
548 struct mace_data *p = (struct mace_data *) dev->priv;
553 static void mace_set_multicast(struct net_device *dev)
555 struct mace_data *mp = (struct mace_data *) dev->priv;
556 volatile struct mace *mb = mp->mace;
561 if (dev->flags & IFF_PROMISC) {
564 unsigned char multicast_filter[8];
565 struct dev_mc_list *dmi = dev->mc_list;
567 if (dev->flags & IFF_ALLMULTI) {
568 for (i = 0; i < 8; i++)
569 multicast_filter[i] = 0xff;
571 for (i = 0; i < 8; i++)
572 multicast_filter[i] = 0;
573 for (i = 0; i < dev->mc_count; i++) {
574 crc = ether_crc_le(6, dmi->dmi_addr);
575 j = crc >> 26; /* bit number in multicast_filter */
576 multicast_filter[j >> 3] |= 1 << (j & 7);
581 printk("Multicast filter :");
582 for (i = 0; i < 8; i++)
583 printk("%02x ", multicast_filter[i]);
587 if (mp->chipid == BROKEN_ADDRCHG_REV)
588 out_8(&mb->iac, LOGADDR);
590 out_8(&mb->iac, ADDRCHG | LOGADDR);
591 while ((in_8(&mb->iac) & ADDRCHG) != 0)
594 for (i = 0; i < 8; ++i)
595 out_8(&mb->ladrf, multicast_filter[i]);
596 if (mp->chipid != BROKEN_ADDRCHG_REV)
600 out_8(&mb->maccc, mp->maccc);
603 static void mace_handle_misc_intrs(struct mace_data *mp, int intr)
605 volatile struct mace *mb = mp->mace;
606 static int mace_babbles, mace_jabbers;
609 mp->stats.rx_missed_errors += 256;
610 mp->stats.rx_missed_errors += in_8(&mb->mpc); /* reading clears it */
612 mp->stats.rx_length_errors += 256;
613 mp->stats.rx_length_errors += in_8(&mb->rntpc); /* reading clears it */
615 ++mp->stats.tx_heartbeat_errors;
617 if (mace_babbles++ < 4)
618 printk(KERN_DEBUG "mace: babbling transmitter\n");
620 if (mace_jabbers++ < 4)
621 printk(KERN_DEBUG "mace: jabbering transceiver\n");
624 static void mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
626 struct net_device *dev = (struct net_device *) dev_id;
627 struct mace_data *mp = (struct mace_data *) dev->priv;
628 volatile struct mace *mb = mp->mace;
629 volatile struct dbdma_regs *td = mp->tx_dma;
630 volatile struct dbdma_cmd *cp;
631 int intr, fs, i, stat, x;
633 /* static int mace_last_fs, mace_last_xcount; */
635 intr = in_8(&mb->ir); /* read interrupt register */
636 in_8(&mb->xmtrc); /* get retries */
637 mace_handle_misc_intrs(mp, intr);
640 while (in_8(&mb->pr) & XMTSV) {
641 del_timer(&mp->tx_timeout);
642 mp->timeout_active = 0;
644 * Clear any interrupt indication associated with this status
645 * word. This appears to unlatch any error indication from
646 * the DMA controller.
648 intr = in_8(&mb->ir);
650 mace_handle_misc_intrs(mp, intr);
651 if (mp->tx_bad_runt) {
652 fs = in_8(&mb->xmtfs);
654 out_8(&mb->xmtfc, AUTO_PAD_XMIT);
657 dstat = ld_le32(&td->status);
658 /* stop DMA controller */
659 out_le32(&td->control, RUN << 16);
661 * xcount is the number of complete frames which have been
662 * written to the fifo but for which status has not been read.
664 xcount = (in_8(&mb->fifofc) >> XMTFC_SH) & XMTFC_MASK;
665 if (xcount == 0 || (dstat & DEAD)) {
667 * If a packet was aborted before the DMA controller has
668 * finished transferring it, it seems that there are 2 bytes
669 * which are stuck in some buffer somewhere. These will get
670 * transmitted as soon as we read the frame status (which
671 * reenables the transmit data transfer request). Turning
672 * off the DMA controller and/or resetting the MACE doesn't
673 * help. So we disable auto-padding and FCS transmission
674 * so the two bytes will only be a runt packet which should
675 * be ignored by other stations.
677 out_8(&mb->xmtfc, DXMTFCS);
679 fs = in_8(&mb->xmtfs);
680 if ((fs & XMTSV) == 0) {
681 printk(KERN_ERR "mace: xmtfs not valid! (fs=%x xc=%d ds=%x)\n",
685 * XXX mace likes to hang the machine after a xmtfs error.
686 * This is hard to reproduce, reseting *may* help
689 cp = mp->tx_cmds + NCMDS_TX * i;
690 stat = ld_le16(&cp->xfer_status);
691 if ((fs & (UFLO|LCOL|LCAR|RTRY)) || (dstat & DEAD) || xcount == 0) {
693 * Check whether there were in fact 2 bytes written to
697 x = (in_8(&mb->fifofc) >> XMTFC_SH) & XMTFC_MASK;
699 /* there were two bytes with an end-of-packet indication */
701 mace_set_timeout(dev);
704 * Either there weren't the two bytes buffered up, or they
705 * didn't have an end-of-packet indication.
706 * We flush the transmit FIFO just in case (by setting the
707 * XMTFWU bit with the transmitter disabled).
709 out_8(&mb->maccc, in_8(&mb->maccc) & ~ENXMT);
710 out_8(&mb->fifocc, in_8(&mb->fifocc) | XMTFWU);
712 out_8(&mb->maccc, in_8(&mb->maccc) | ENXMT);
713 out_8(&mb->xmtfc, AUTO_PAD_XMIT);
716 /* dma should have finished */
717 if (i == mp->tx_fill) {
718 printk(KERN_DEBUG "mace: tx ring ran out? (fs=%x xc=%d ds=%x)\n",
723 if (fs & (UFLO|LCOL|LCAR|RTRY)) {
724 ++mp->stats.tx_errors;
726 ++mp->stats.tx_carrier_errors;
727 if (fs & (UFLO|LCOL|RTRY))
728 ++mp->stats.tx_aborted_errors;
730 mp->stats.tx_bytes += mp->tx_bufs[i]->len;
731 ++mp->stats.tx_packets;
733 dev_kfree_skb_irq(mp->tx_bufs[i]);
735 if (++i >= N_TX_RING)
739 mace_last_xcount = xcount;
743 if (i != mp->tx_empty) {
745 netif_wake_queue(dev);
751 if (!mp->tx_bad_runt && i != mp->tx_fill && mp->tx_active < MAX_TX_ACTIVE) {
753 /* set up the next one */
754 cp = mp->tx_cmds + NCMDS_TX * i;
755 out_le16(&cp->xfer_status, 0);
756 out_le16(&cp->command, OUTPUT_LAST);
758 if (++i >= N_TX_RING)
760 } while (i != mp->tx_fill && mp->tx_active < MAX_TX_ACTIVE);
761 out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
762 mace_set_timeout(dev);
766 static void mace_tx_timeout(unsigned long data)
768 struct net_device *dev = (struct net_device *) data;
769 struct mace_data *mp = (struct mace_data *) dev->priv;
770 volatile struct mace *mb = mp->mace;
771 volatile struct dbdma_regs *td = mp->tx_dma;
772 volatile struct dbdma_regs *rd = mp->rx_dma;
773 volatile struct dbdma_cmd *cp;
779 mp->timeout_active = 0;
780 if (mp->tx_active == 0 && !mp->tx_bad_runt)
783 /* update various counters */
784 mace_handle_misc_intrs(mp, in_8(&mb->ir));
786 cp = mp->tx_cmds + NCMDS_TX * mp->tx_empty;
788 /* turn off both tx and rx and reset the chip */
789 out_8(&mb->maccc, 0);
790 printk(KERN_ERR "mace: transmit timeout - resetting\n");
795 cp = bus_to_virt(ld_le32(&rd->cmdptr));
797 out_le16(&cp->xfer_status, 0);
798 out_le32(&rd->cmdptr, virt_to_bus(cp));
799 out_le32(&rd->control, (RUN << 16) | RUN);
801 /* fix up the transmit side */
804 ++mp->stats.tx_errors;
805 if (mp->tx_bad_runt) {
807 } else if (i != mp->tx_fill) {
808 dev_kfree_skb(mp->tx_bufs[i]);
809 if (++i >= N_TX_RING)
814 netif_wake_queue(dev);
815 if (i != mp->tx_fill) {
816 cp = mp->tx_cmds + NCMDS_TX * i;
817 out_le16(&cp->xfer_status, 0);
818 out_le16(&cp->command, OUTPUT_LAST);
819 out_le32(&td->cmdptr, virt_to_bus(cp));
820 out_le32(&td->control, (RUN << 16) | RUN);
822 mace_set_timeout(dev);
825 /* turn it back on */
826 out_8(&mb->imr, RCVINT);
827 out_8(&mb->maccc, mp->maccc);
830 restore_flags(flags);
833 static void mace_txdma_intr(int irq, void *dev_id, struct pt_regs *regs)
837 static void mace_rxdma_intr(int irq, void *dev_id, struct pt_regs *regs)
839 struct net_device *dev = (struct net_device *) dev_id;
840 struct mace_data *mp = (struct mace_data *) dev->priv;
841 volatile struct dbdma_regs *rd = mp->rx_dma;
842 volatile struct dbdma_cmd *cp, *np;
843 int i, nb, stat, next;
845 unsigned frame_status;
846 static int mace_lost_status;
849 for (i = mp->rx_empty; i != mp->rx_fill; ) {
850 cp = mp->rx_cmds + i;
851 stat = ld_le16(&cp->xfer_status);
852 if ((stat & ACTIVE) == 0) {
854 if (next >= N_RX_RING)
856 np = mp->rx_cmds + next;
857 if (next != mp->rx_fill
858 && (ld_le16(&np->xfer_status) & ACTIVE) != 0) {
859 printk(KERN_DEBUG "mace: lost a status word\n");
864 nb = ld_le16(&cp->req_count) - ld_le16(&cp->res_count);
865 out_le16(&cp->command, DBDMA_STOP);
866 /* got a packet, have a look at it */
867 skb = mp->rx_bufs[i];
869 ++mp->stats.rx_dropped;
872 frame_status = (data[nb-3] << 8) + data[nb-4];
873 if (frame_status & (RS_OFLO|RS_CLSN|RS_FRAMERR|RS_FCSERR)) {
874 ++mp->stats.rx_errors;
875 if (frame_status & RS_OFLO)
876 ++mp->stats.rx_over_errors;
877 if (frame_status & RS_FRAMERR)
878 ++mp->stats.rx_frame_errors;
879 if (frame_status & RS_FCSERR)
880 ++mp->stats.rx_crc_errors;
882 /* Mace feature AUTO_STRIP_RCV is on by default, dropping the
883 * FCS on frames with 802.3 headers. This means that Ethernet
884 * frames have 8 extra octets at the end, while 802.3 frames
885 * have only 4. We need to correctly account for this. */
886 if (*(unsigned short *)(data+12) < 1536) /* 802.3 header */
888 else /* Ethernet header; mace includes FCS */
892 skb->protocol = eth_type_trans(skb, dev);
893 mp->stats.rx_bytes += skb->len;
895 dev->last_rx = jiffies;
897 ++mp->stats.rx_packets;
900 ++mp->stats.rx_errors;
901 ++mp->stats.rx_length_errors;
904 /* advance to next */
905 if (++i >= N_RX_RING)
913 if (next >= N_RX_RING)
915 if (next == mp->rx_empty)
917 cp = mp->rx_cmds + i;
918 skb = mp->rx_bufs[i];
920 skb = dev_alloc_skb(RX_BUFLEN + 2);
923 mp->rx_bufs[i] = skb;
926 st_le16(&cp->req_count, RX_BUFLEN);
927 data = skb? skb->data: dummy_buf;
928 st_le32(&cp->phy_addr, virt_to_bus(data));
929 out_le16(&cp->xfer_status, 0);
930 out_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
932 if ((ld_le32(&rd->status) & ACTIVE) != 0) {
933 out_le32(&rd->control, (PAUSE << 16) | PAUSE);
934 while ((in_le32(&rd->status) & ACTIVE) != 0)
940 if (i != mp->rx_fill) {
941 out_le32(&rd->control, ((RUN|WAKE) << 16) | (RUN|WAKE));
946 MODULE_AUTHOR("Paul Mackerras");
947 MODULE_DESCRIPTION("PowerMac MACE driver.");
948 MODULE_PARM(port_aaui, "i");
949 MODULE_PARM_DESC(port_aaui, "MACE uses AAUI port (0-1)");
950 MODULE_LICENSE("GPL");
953 static void __exit mace_cleanup (void)
955 struct net_device *dev;
956 struct mace_data *mp;
958 while ((dev = mace_devs) != 0) {
959 mp = (struct mace_data *) mace_devs->priv;
960 mace_devs = mp->next_mace;
962 unregister_netdev(dev);
963 free_irq(dev->irq, dev);
964 free_irq(mp->tx_dma_intr, dev);
965 free_irq(mp->rx_dma_intr, dev);
967 release_OF_resource(mp->of_node, 0);
968 release_OF_resource(mp->of_node, 1);
969 release_OF_resource(mp->of_node, 2);
973 if (dummy_buf != NULL) {
979 module_init(mace_probe);
980 module_exit(mace_cleanup);