2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 =========================================================================
10 1. The media can be forced in 5 modes.
11 Command: 'insmod r8169 media = SET_MEDIA'
12 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
22 =========================================================================
23 VERSION 1.1 <2002/10/4>
25 The bit4:0 of MII register 4 is called "selector field", and have to be
26 00001b to indicate support of IEEE std 802.3 during NWay process of
27 exchanging Link Code Word (FLP).
29 VERSION 1.2 <2002/11/30>
32 - Use ether_crc in stock kernel (linux/crc32.h)
33 - Copy mc_filter setup code from 8139cp
34 (includes an optimization, and avoids set_bit use)
38 #include <linux/module.h>
39 #include <linux/pci.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/delay.h>
43 #include <linux/crc32.h>
45 #define RTL8169_VERSION "1.2"
46 #define MODULENAME "r8169"
47 #define RTL8169_DRIVER_NAME MODULENAME " Gigabit Ethernet driver " RTL8169_VERSION
48 #define PFX MODULENAME ": "
51 #define assert(expr) \
53 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
54 #expr,__FILE__,__FUNCTION__,__LINE__); \
57 #define assert(expr) do {} while (0)
62 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
64 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
65 static int max_interrupt_work = 20;
67 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
68 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
69 static int multicast_filter_limit = 32;
71 /* MAC address length*/
72 #define MAC_ADDR_LEN 6
74 /* max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4).*/
75 #define MAX_ETH_FRAME_SIZE 1536
77 #define TX_FIFO_THRESH 256 /* In bytes */
79 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
80 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
81 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
82 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
83 #define RxPacketMaxSize 0x0800 /* Maximum size supported is 16K-1 */
84 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
86 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
87 #define NUM_RX_DESC 64 /* Number of Rx descriptor registers */
88 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
90 #define RTL_MIN_IO_SIZE 0x80
91 #define TX_TIMEOUT (6*HZ)
93 /* write/read MMIO register */
94 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
95 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
96 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
97 #define RTL_R8(reg) readb (ioaddr + (reg))
98 #define RTL_R16(reg) readw (ioaddr + (reg))
99 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
103 } board_info[] __devinitdata = {
105 "RealTek RTL8169 Gigabit Ethernet"},};
107 static struct pci_device_id rtl8169_pci_tbl[] __devinitdata = {
108 {0x10ec, 0x8169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
112 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
114 enum RTL8169_registers {
115 MAC0 = 0, /* Ethernet hardware address. */
116 MAR0 = 8, /* Multicast filter. */
117 TxDescStartAddr = 0x20,
118 TxHDescStartAddr = 0x28,
143 RxDescStartAddr = 0xE4,
146 FuncEventMask = 0xF4,
147 FuncPresetState = 0xF8,
148 FuncForceEvent = 0xFC,
151 enum RTL8169_register_content {
152 /*InterruptStatusBits */
156 TxDescUnavail = 0x80,
179 Cfg9346_Unlock = 0xC0,
184 AcceptBroadcast = 0x08,
185 AcceptMulticast = 0x04,
187 AcceptAllPhys = 0x01,
194 TxInterFrameGapShift = 24,
195 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
197 /*rtl8169_PHYstatus */
207 /*GIGABIT_PHY_registers */
210 PHY_AUTO_NEGO_REG = 4,
211 PHY_1000_CTRL_REG = 9,
213 /*GIGABIT_PHY_REG_BIT */
214 PHY_Restart_Auto_Nego = 0x0200,
215 PHY_Enable_Auto_Nego = 0x1000,
218 PHY_Auto_Neco_Comp = 0x0020,
220 //PHY_AUTO_NEGO_REG = 4;
221 PHY_Cap_10_Half = 0x0020,
222 PHY_Cap_10_Full = 0x0040,
223 PHY_Cap_100_Half = 0x0080,
224 PHY_Cap_100_Full = 0x0100,
226 //PHY_1000_CTRL_REG = 9;
227 PHY_Cap_1000_Full = 0x0200,
239 TBILinkOK = 0x02000000,
242 const static struct {
244 u8 version; /* depend on RTL8169 docs */
245 u32 RxConfigMask; /* should clear the bits supported by this chip */
246 } rtl_chip_info[] = {
248 "RTL-8169", 0x00, 0xff7e1880,},};
250 enum _DescStatusBit {
271 struct rtl8169_private {
272 void *mmio_addr; /* memory map physical address */
273 struct pci_dev *pci_dev; /* Index of PCI device */
274 struct net_device_stats stats; /* statistics of net device */
275 spinlock_t lock; /* spin lock flag */
277 unsigned long cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
278 unsigned long cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
279 unsigned long dirty_tx;
280 unsigned char *TxDescArrays; /* Index of Tx Descriptor buffer */
281 unsigned char *RxDescArrays; /* Index of Rx Descriptor buffer */
282 struct TxDesc *TxDescArray; /* Index of 256-alignment Tx Descriptor buffer */
283 struct RxDesc *RxDescArray; /* Index of 256-alignment Rx Descriptor buffer */
284 unsigned char *RxBufferRings; /* Index of Rx Buffer */
285 unsigned char *RxBufferRing[NUM_RX_DESC]; /* Index of Rx Buffer array */
286 struct sk_buff *Tx_skbuff[NUM_TX_DESC]; /* Index of Transmit data buffer */
289 MODULE_AUTHOR("Realtek");
290 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
291 MODULE_PARM(media, "1-" __MODULE_STRING(MAX_UNITS) "i");
293 static int rtl8169_open(struct net_device *dev);
294 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
295 static void rtl8169_interrupt(int irq, void *dev_instance,
296 struct pt_regs *regs);
297 static void rtl8169_init_ring(struct net_device *dev);
298 static void rtl8169_hw_start(struct net_device *dev);
299 static int rtl8169_close(struct net_device *dev);
300 static void rtl8169_set_rx_mode(struct net_device *dev);
301 static void rtl8169_tx_timeout(struct net_device *dev);
302 static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev);
304 static const u16 rtl8169_intr_mask =
305 SYSErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | TxErr | TxOK |
307 static const unsigned int rtl8169_rx_config =
308 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
311 mdio_write(void *ioaddr, int RegAddr, int value)
315 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
318 for (i = 2000; i > 0; i--) {
319 // Check if the RTL8169 has completed writing to the specified MII register
320 if (!(RTL_R32(PHYAR) & 0x80000000)) {
329 mdio_read(void *ioaddr, int RegAddr)
333 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
336 for (i = 2000; i > 0; i--) {
337 // Check if the RTL8169 has completed retrieving data from the specified MII register
338 if (RTL_R32(PHYAR) & 0x80000000) {
339 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
349 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
353 struct net_device *dev;
354 struct rtl8169_private *tp;
356 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
359 assert(pdev != NULL);
360 assert(ioaddr_out != NULL);
365 // dev zeroed in init_etherdev
366 dev = init_etherdev(NULL, sizeof (*tp));
368 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
372 SET_MODULE_OWNER(dev);
375 // enable device (incl. PCI PM wakeup and hotplug setup)
376 rc = pci_enable_device(pdev);
380 mmio_start = pci_resource_start(pdev, 1);
381 mmio_end = pci_resource_end(pdev, 1);
382 mmio_flags = pci_resource_flags(pdev, 1);
383 mmio_len = pci_resource_len(pdev, 1);
385 // make sure PCI base addr 1 is MMIO
386 if (!(mmio_flags & IORESOURCE_MEM)) {
388 "region #1 not an MMIO resource, aborting\n");
392 // check for weird/broken PCI region reporting
393 if (mmio_len < RTL_MIN_IO_SIZE) {
394 printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n");
399 rc = pci_request_regions(pdev, dev->name);
403 // enable PCI bus-mastering
404 pci_set_master(pdev);
406 // ioremap MMIO region
407 ioaddr = ioremap(mmio_start, mmio_len);
408 if (ioaddr == NULL) {
409 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
411 goto err_out_free_res;
414 // Soft reset the chip.
415 RTL_W8(ChipCmd, CmdReset);
417 // Check that the chip has finished the reset.
418 for (i = 1000; i > 0; i--)
419 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
424 // identify chip attached to board
425 tmp = RTL_R32(TxConfig);
426 tmp = ((tmp & 0x7c000000) + ((tmp & 0x00800000) << 2)) >> 24;
428 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--)
429 if (tmp == rtl_chip_info[i].version) {
433 //if unknown chip, assume array element #0, original RTL-8169 in this case
434 printk(KERN_DEBUG PFX
435 "PCI device %s: unknown chip version, assuming RTL-8169\n",
437 printk(KERN_DEBUG PFX "PCI device %s: TxConfig = 0x%lx\n",
438 pdev->slot_name, (unsigned long) RTL_R32(TxConfig));
442 *ioaddr_out = ioaddr;
447 pci_release_regions(pdev);
450 unregister_netdev(dev);
456 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
458 struct net_device *dev = NULL;
459 struct rtl8169_private *tp = NULL;
461 static int board_idx = -1;
462 static int printed_version = 0;
464 int option = -1, Cap10_100 = 0, Cap1000 = 0;
466 assert(pdev != NULL);
471 if (!printed_version) {
472 printk(KERN_INFO RTL8169_DRIVER_NAME " loaded\n");
476 i = rtl8169_init_board(pdev, &dev, &ioaddr);
482 assert(ioaddr != NULL);
486 // Get MAC address //
487 for (i = 0; i < MAC_ADDR_LEN; i++) {
488 dev->dev_addr[i] = RTL_R8(MAC0 + i);
491 dev->open = rtl8169_open;
492 dev->hard_start_xmit = rtl8169_start_xmit;
493 dev->get_stats = rtl8169_get_stats;
494 dev->stop = rtl8169_close;
495 dev->tx_timeout = rtl8169_tx_timeout;
496 dev->set_multicast_list = rtl8169_set_rx_mode;
497 dev->watchdog_timeo = TX_TIMEOUT;
498 dev->irq = pdev->irq;
499 dev->base_addr = (unsigned long) ioaddr;
500 // dev->do_ioctl = mii_ioctl;
502 tp = dev->priv; // private data //
504 tp->mmio_addr = ioaddr;
506 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name,
507 rtl_chip_info[tp->chipset].name);
509 spin_lock_init(&tp->lock);
511 pci_set_drvdata(pdev, dev);
513 printk(KERN_INFO "%s: %s at 0x%lx, "
514 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
517 board_info[ent->driver_data].name,
519 dev->dev_addr[0], dev->dev_addr[1],
520 dev->dev_addr[2], dev->dev_addr[3],
521 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
523 // if TBI is not endbled
524 if (!(RTL_R8(PHYstatus) & TBI_Enable)) {
525 int val = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
527 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
528 // Force RTL8169 in 10/100/1000 Full/Half mode.
530 printk(KERN_INFO "%s: Force-mode Enabled.\n",
532 Cap10_100 = 0, Cap1000 = 0;
535 Cap10_100 = PHY_Cap_10_Half;
536 Cap1000 = PHY_Cap_Null;
539 Cap10_100 = PHY_Cap_10_Full;
540 Cap1000 = PHY_Cap_Null;
543 Cap10_100 = PHY_Cap_100_Half;
544 Cap1000 = PHY_Cap_Null;
547 Cap10_100 = PHY_Cap_100_Full;
548 Cap1000 = PHY_Cap_Null;
551 Cap10_100 = PHY_Cap_Null;
552 Cap1000 = PHY_Cap_1000_Full;
557 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, Cap10_100 | (val & 0x1F)); //leave PHY_AUTO_NEGO_REG bit4:0 unchanged
558 mdio_write(ioaddr, PHY_1000_CTRL_REG, Cap1000);
560 printk(KERN_INFO "%s: Auto-negotiation Enabled.\n",
563 // enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged
564 mdio_write(ioaddr, PHY_AUTO_NEGO_REG,
565 PHY_Cap_10_Half | PHY_Cap_10_Full |
566 PHY_Cap_100_Half | PHY_Cap_100_Full | (val &
569 // enable 1000 Full Mode
570 mdio_write(ioaddr, PHY_1000_CTRL_REG,
575 // Enable auto-negotiation and restart auto-nigotiation
576 mdio_write(ioaddr, PHY_CTRL_REG,
577 PHY_Enable_Auto_Nego | PHY_Restart_Auto_Nego);
580 // wait for auto-negotiation process
581 for (i = 10000; i > 0; i--) {
582 //check if auto-negotiation complete
583 if (mdio_read(ioaddr, PHY_STAT_REG) &
584 PHY_Auto_Neco_Comp) {
586 option = RTL_R8(PHYstatus);
587 if (option & _1000bpsF) {
589 "%s: 1000Mbps Full-duplex operation.\n",
593 "%s: %sMbps %s-duplex operation.\n",
595 (option & _100bps) ? "100" :
597 (option & FullDup) ? "Full" :
604 } // end for-loop to wait for auto-negotiation process
609 "%s: 1000Mbps Full-duplex operation, TBI Link %s!\n",
611 (RTL_R32(TBICSR) & TBILinkOK) ? "OK" : "Failed");
618 static void __devexit
619 rtl8169_remove_one(struct pci_dev *pdev)
621 struct net_device *dev = pci_get_drvdata(pdev);
622 struct rtl8169_private *tp = (struct rtl8169_private *) (dev->priv);
627 unregister_netdev(dev);
628 iounmap(tp->mmio_addr);
629 pci_release_regions(pdev);
631 // poison memory before freeing
633 sizeof (struct net_device) + sizeof (struct rtl8169_private));
636 pci_set_drvdata(pdev, NULL);
640 rtl8169_open(struct net_device *dev)
642 struct rtl8169_private *tp = dev->priv;
645 u32 TxPhyAddr, RxPhyAddr;
648 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
654 kmalloc(NUM_TX_DESC * sizeof (struct TxDesc) + 256, GFP_KERNEL);
655 // Tx Desscriptor needs 256 bytes alignment;
656 TxPhyAddr = virt_to_bus(tp->TxDescArrays);
657 diff = 256 - (TxPhyAddr - ((TxPhyAddr >> 8) << 8));
659 tp->TxDescArray = (struct TxDesc *) (tp->TxDescArrays + diff);
662 kmalloc(NUM_RX_DESC * sizeof (struct RxDesc) + 256, GFP_KERNEL);
663 // Rx Desscriptor needs 256 bytes alignment;
664 RxPhyAddr = virt_to_bus(tp->RxDescArrays);
665 diff = 256 - (RxPhyAddr - ((RxPhyAddr >> 8) << 8));
667 tp->RxDescArray = (struct RxDesc *) (tp->RxDescArrays + diff);
669 if (tp->TxDescArrays == NULL || tp->RxDescArrays == NULL) {
671 "Allocate RxDescArray or TxDescArray failed\n");
672 free_irq(dev->irq, dev);
673 if (tp->TxDescArrays)
674 kfree(tp->TxDescArrays);
675 if (tp->RxDescArrays)
676 kfree(tp->RxDescArrays);
679 tp->RxBufferRings = kmalloc(RX_BUF_SIZE * NUM_RX_DESC, GFP_KERNEL);
680 if (tp->RxBufferRings == NULL) {
681 printk(KERN_INFO "Allocate RxBufferRing failed\n");
684 rtl8169_init_ring(dev);
685 rtl8169_hw_start(dev);
692 rtl8169_hw_start(struct net_device *dev)
694 struct rtl8169_private *tp = dev->priv;
695 void *ioaddr = tp->mmio_addr;
698 /* Soft reset the chip. */
699 RTL_W8(ChipCmd, CmdReset);
701 /* Check that the chip has finished the reset. */
702 for (i = 1000; i > 0; i--) {
703 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
709 RTL_W8(Cfg9346, Cfg9346_Unlock);
710 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
711 RTL_W8(EarlyTxThres, EarlyTxThld);
713 // For gigabit rtl8169
714 RTL_W16(RxMaxSize, RxPacketMaxSize);
716 // Set Rx Config register
717 i = rtl8169_rx_config | (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].
719 RTL_W32(RxConfig, i);
721 /* Set DMA burst size and Interframe Gap Time */
723 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
724 TxInterFrameGapShift));
728 RTL_W32(TxDescStartAddr, virt_to_bus(tp->TxDescArray));
729 RTL_W32(RxDescStartAddr, virt_to_bus(tp->RxDescArray));
730 RTL_W8(Cfg9346, Cfg9346_Lock);
733 RTL_W32(RxMissed, 0);
735 rtl8169_set_rx_mode(dev);
737 /* no early-rx interrupts */
738 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
740 /* Enable all known interrupts by setting the interrupt mask. */
741 RTL_W16(IntrMask, rtl8169_intr_mask);
743 netif_start_queue(dev);
748 rtl8169_init_ring(struct net_device *dev)
750 struct rtl8169_private *tp = dev->priv;
756 memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof (struct TxDesc));
757 memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof (struct RxDesc));
759 for (i = 0; i < NUM_TX_DESC; i++) {
760 tp->Tx_skbuff[i] = NULL;
762 for (i = 0; i < NUM_RX_DESC; i++) {
763 if (i == (NUM_RX_DESC - 1))
764 tp->RxDescArray[i].status =
765 (OWNbit | EORbit) + RX_BUF_SIZE;
767 tp->RxDescArray[i].status = OWNbit + RX_BUF_SIZE;
769 tp->RxBufferRing[i] = &(tp->RxBufferRings[i * RX_BUF_SIZE]);
770 tp->RxDescArray[i].buf_addr = virt_to_bus(tp->RxBufferRing[i]);
775 rtl8169_tx_clear(struct rtl8169_private *tp)
780 for (i = 0; i < NUM_TX_DESC; i++) {
781 if (tp->Tx_skbuff[i] != NULL) {
782 dev_kfree_skb(tp->Tx_skbuff[i]);
783 tp->Tx_skbuff[i] = NULL;
784 tp->stats.tx_dropped++;
790 rtl8169_tx_timeout(struct net_device *dev)
792 struct rtl8169_private *tp = dev->priv;
793 void *ioaddr = tp->mmio_addr;
796 /* disable Tx, if not already */
797 tmp8 = RTL_R8(ChipCmd);
799 RTL_W8(ChipCmd, tmp8 & ~CmdTxEnb);
801 /* Disable interrupts by clearing the interrupt mask. */
802 RTL_W16(IntrMask, 0x0000);
804 /* Stop a shared interrupt from scavenging while we are. */
805 spin_lock_irq(&tp->lock);
806 rtl8169_tx_clear(tp);
807 spin_unlock_irq(&tp->lock);
809 /* ...and finally, reset everything */
810 rtl8169_hw_start(dev);
812 netif_wake_queue(dev);
816 rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
818 struct rtl8169_private *tp = dev->priv;
819 void *ioaddr = tp->mmio_addr;
820 int entry = tp->cur_tx % NUM_TX_DESC;
822 spin_lock_irq(&tp->lock);
824 if ((tp->TxDescArray[entry].status & OWNbit) == 0) {
825 tp->Tx_skbuff[entry] = skb;
826 tp->TxDescArray[entry].buf_addr = virt_to_bus(skb->data);
827 if (entry != (NUM_TX_DESC - 1))
828 tp->TxDescArray[entry].status =
829 (OWNbit | FSbit | LSbit) | ((skb->len > ETH_ZLEN) ?
830 skb->len : ETH_ZLEN);
832 tp->TxDescArray[entry].status =
833 (OWNbit | EORbit | FSbit | LSbit) |
834 ((skb->len > ETH_ZLEN) ? skb->len : ETH_ZLEN);
836 RTL_W8(TxPoll, 0x40); //set polling bit
838 dev->trans_start = jiffies;
843 spin_unlock_irq(&tp->lock);
845 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) {
846 netif_stop_queue(dev);
853 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
856 unsigned long dirty_tx, tx_left = 0;
857 int entry = tp->cur_tx % NUM_TX_DESC;
861 assert(ioaddr != NULL);
863 dirty_tx = tp->dirty_tx;
864 tx_left = tp->cur_tx - dirty_tx;
866 while (tx_left > 0) {
867 if ((tp->TxDescArray[entry].status & OWNbit) == 0) {
868 dev_kfree_skb_irq(tp->
869 Tx_skbuff[dirty_tx % NUM_TX_DESC]);
870 tp->Tx_skbuff[dirty_tx % NUM_TX_DESC] = NULL;
871 tp->stats.tx_packets++;
878 if (tp->dirty_tx != dirty_tx) {
879 tp->dirty_tx = dirty_tx;
880 if (netif_queue_stopped(dev))
881 netif_wake_queue(dev);
886 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
895 assert(ioaddr != NULL);
899 while ((tp->RxDescArray[cur_rx].status & OWNbit) == 0) {
901 if (tp->RxDescArray[cur_rx].status & RxRES) {
902 printk(KERN_INFO "%s: Rx ERROR!!!\n", dev->name);
903 tp->stats.rx_errors++;
904 if (tp->RxDescArray[cur_rx].status & (RxRWT | RxRUNT))
905 tp->stats.rx_length_errors++;
906 if (tp->RxDescArray[cur_rx].status & RxCRC)
907 tp->stats.rx_crc_errors++;
910 (int) (tp->RxDescArray[cur_rx].
911 status & 0x00001FFF) - 4;
912 skb = dev_alloc_skb(pkt_size + 2);
915 skb_reserve(skb, 2); // 16 byte align the IP fields. //
916 eth_copy_and_sum(skb, tp->RxBufferRing[cur_rx],
918 skb_put(skb, pkt_size);
919 skb->protocol = eth_type_trans(skb, dev);
922 if (cur_rx == (NUM_RX_DESC - 1))
923 tp->RxDescArray[cur_rx].status =
924 (OWNbit | EORbit) + RX_BUF_SIZE;
926 tp->RxDescArray[cur_rx].status =
927 OWNbit + RX_BUF_SIZE;
929 tp->RxDescArray[cur_rx].buf_addr =
930 virt_to_bus(tp->RxBufferRing[cur_rx]);
931 dev->last_rx = jiffies;
932 tp->stats.rx_bytes += pkt_size;
933 tp->stats.rx_packets++;
936 "%s: Memory squeeze, deferring packet.\n",
938 /* We should check that some rx space is free.
939 If not, free one and mark stats->rx_dropped++. */
940 tp->stats.rx_dropped++;
944 cur_rx = (cur_rx + 1) % NUM_RX_DESC;
951 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
953 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
955 struct net_device *dev = (struct net_device *) dev_instance;
956 struct rtl8169_private *tp = dev->priv;
957 int boguscnt = max_interrupt_work;
958 void *ioaddr = tp->mmio_addr;
962 status = RTL_R16(IntrStatus);
964 /* h/w no longer present (hotplug?) or major error, bail */
965 if (status == 0xFFFF)
969 if (status & RxUnderrun)
970 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
973 (status & RxFIFOOver) ? (status | RxOverflow) : status);
976 (SYSErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver
977 | TxErr | TxOK | RxErr | RxOK)) == 0)
981 if (status & (RxOK | RxUnderrun | RxOverflow | RxFIFOOver)) {
982 rtl8169_rx_interrupt(dev, tp, ioaddr);
985 if (status & (TxOK | TxErr)) {
986 spin_lock(&tp->lock);
987 rtl8169_tx_interrupt(dev, tp, ioaddr);
988 spin_unlock(&tp->lock);
992 } while (boguscnt > 0);
995 printk(KERN_WARNING "%s: Too much work at interrupt!\n",
997 /* Clear all interrupt sources. */
998 RTL_W16(IntrStatus, 0xffff);
1003 rtl8169_close(struct net_device *dev)
1005 struct rtl8169_private *tp = dev->priv;
1006 void *ioaddr = tp->mmio_addr;
1009 netif_stop_queue(dev);
1011 spin_lock_irq(&tp->lock);
1013 /* Stop the chip's Tx and Rx DMA processes. */
1014 RTL_W8(ChipCmd, 0x00);
1016 /* Disable interrupts by clearing the interrupt mask. */
1017 RTL_W16(IntrMask, 0x0000);
1019 /* Update the error counts. */
1020 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1021 RTL_W32(RxMissed, 0);
1023 spin_unlock_irq(&tp->lock);
1026 free_irq(dev->irq, dev);
1028 rtl8169_tx_clear(tp);
1029 kfree(tp->TxDescArrays);
1030 kfree(tp->RxDescArrays);
1031 tp->TxDescArrays = NULL;
1032 tp->RxDescArrays = NULL;
1033 tp->TxDescArray = NULL;
1034 tp->RxDescArray = NULL;
1035 kfree(tp->RxBufferRings);
1036 for (i = 0; i < NUM_RX_DESC; i++) {
1037 tp->RxBufferRing[i] = NULL;
1044 rtl8169_set_rx_mode(struct net_device *dev)
1046 struct rtl8169_private *tp = dev->priv;
1047 void *ioaddr = tp->mmio_addr;
1048 unsigned long flags;
1049 u32 mc_filter[2]; /* Multicast hash filter */
1053 if (dev->flags & IFF_PROMISC) {
1054 /* Unconditionally log net taps. */
1055 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
1058 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
1060 mc_filter[1] = mc_filter[0] = 0xffffffff;
1061 } else if ((dev->mc_count > multicast_filter_limit)
1062 || (dev->flags & IFF_ALLMULTI)) {
1063 /* Too many to filter perfectly -- accept all multicasts. */
1064 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1065 mc_filter[1] = mc_filter[0] = 0xffffffff;
1067 struct dev_mc_list *mclist;
1068 rx_mode = AcceptBroadcast | AcceptMyPhys;
1069 mc_filter[1] = mc_filter[0] = 0;
1070 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1071 i++, mclist = mclist->next) {
1072 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1073 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1074 rx_mode |= AcceptMulticast;
1078 spin_lock_irqsave(&tp->lock, flags);
1081 rtl8169_rx_config | rx_mode | (RTL_R32(RxConfig) &
1082 rtl_chip_info[tp->chipset].
1085 RTL_W32(RxConfig, tmp);
1086 RTL_W32(MAR0 + 0, mc_filter[0]);
1087 RTL_W32(MAR0 + 4, mc_filter[1]);
1089 spin_unlock_irqrestore(&tp->lock, flags);
1092 struct net_device_stats *
1093 rtl8169_get_stats(struct net_device *dev)
1095 struct rtl8169_private *tp = dev->priv;
1100 static struct pci_driver rtl8169_pci_driver = {
1102 .id_table = rtl8169_pci_tbl,
1103 .probe = rtl8169_init_one,
1104 .remove = rtl8169_remove_one,
1110 rtl8169_init_module(void)
1112 return pci_module_init(&rtl8169_pci_driver);
1116 rtl8169_cleanup_module(void)
1118 pci_unregister_driver(&rtl8169_pci_driver);
1121 module_init(rtl8169_init_module);
1122 module_exit(rtl8169_cleanup_module);