1 /*------------------------------------------------------------------------
3 . This is a driver for SMSC's 91C111 single-chip Ethernet device.
5 . Copyright (C) 2001 Standard Microsystems Corporation (SMSC)
6 . Developed by Simple Network Magic Corporation (SNMC)
7 . Copyright (C) 1996 by Erik Stahlman (ES)
9 . This program is free software; you can redistribute it and/or modify
10 . it under the terms of the GNU General Public License as published by
11 . the Free Software Foundation; either version 2 of the License, or
12 . (at your option) any later version.
14 . This program is distributed in the hope that it will be useful,
15 . but WITHOUT ANY WARRANTY; without even the implied warranty of
16 . MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 . GNU General Public License for more details.
19 . You should have received a copy of the GNU General Public License
20 . along with this program; if not, write to the Free Software
21 . Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 . Information contained in this file was obtained from the LAN91C111
24 . manual from SMC. To get a copy, if you really want one, you can find
25 . information under www.smsc.com.
28 . "Features" of the SMC chip:
29 . Integrated PHY/MAC for 10/100BaseT Operation
30 . Supports internal and external MII
31 . Integrated 8K packet memory
32 . EEPROM interface for configuration
35 . io = for the base address
37 . nowait = 0 for normal wait states, 1 eliminates additional wait states
40 . Erik Stahlman ( erik@vt.edu )
41 . Daris A Nevil ( dnevil@snmc.com )
43 . Arnaldo Carvalho de Melo <acme@conectiva.com.br>
45 . Hardware multicast code from Peter Cammaert ( pc@denkart.be )
48 . o SMSC LAN91C111 databook (www.smsc.com)
49 . o smc9194.c by Erik Stahlman
50 . o skeleton.c by Donald Becker ( becker@scyld.com )
53 . 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
54 . 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
55 . 04/25/01 Daris A Nevil Initial public release through SMSC
56 . 03/16/01 Daris A Nevil Modified smc9194.c for use with LAN91C111
57 . 08/22/01 Scott Anderson Merge changes from smc9194 to smc91111
58 ----------------------------------------------------------------------------*/
60 // Use power-down feature of the chip
66 . 0 for normal operation
67 . 1 for slightly more details
68 . >2 for various levels of increasingly useless information
69 . 2 for interrupt tracking, status flags
71 . 4 for complete packet dumps
77 static const char version[] =
78 "smc91111.c:v1.0saa 08/22/01 by Daris A Nevil (dnevil@snmc.com)\n";
80 #include <linux/module.h>
81 #include <linux/version.h>
82 #include <linux/kernel.h>
83 #include <linux/sched.h>
84 #include <linux/types.h>
85 #include <linux/fcntl.h>
86 #include <linux/interrupt.h>
87 #include <linux/ptrace.h>
88 #include <linux/ioport.h>
90 #include <linux/slab.h>
91 #include <linux/string.h>
92 #include <linux/init.h>
93 #include <asm/bitops.h>
95 #include <linux/errno.h>
96 #include <linux/delay.h>
98 #include <linux/netdevice.h>
99 #include <linux/etherdevice.h>
100 #include <linux/skbuff.h>
103 #include <linux/proc_fs.h>
104 #include <linux/sysctl.h>
107 #include "smc91111.h"
112 .the LAN91C111 can be at any of the following port addresses. To change,
113 .for a slightly different card, you can add it to the array. Keep in
114 .mind that the array must end in zero.
116 static unsigned int smc_portlist[] __initdata = {
117 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
118 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
121 #endif /* CONFIG_ISA */
123 static struct net_device *global_dev = NULL;
124 #ifndef SMC91111_BASE_ADDR
125 # define SMC91111_BASE_ADDR -1
127 static int io = SMC91111_BASE_ADDR;
129 # define SMC91111_IRQ -1
131 static int irq = SMC91111_IRQ;
132 static int nowait = 0;
134 MODULE_PARM(io, "i");
135 MODULE_PARM(irq, "i");
136 MODULE_PARM(nowait, "i");
137 MODULE_PARM_DESC(io, "SMC 91111 I/O base address");
138 MODULE_PARM_DESC(irq, "SMC 91111 IRQ number");
141 . Wait time for memory to be free. This probably shouldn't be
142 . tuned that much, as waiting for this means nothing else happens
145 #define MEMORY_WAIT_TIME 16
148 #define PRINTK3(args...) printk(args)
150 #define PRINTK3(args...)
154 #define PRINTK2(args...) printk(args)
156 #define PRINTK2(args...)
160 #define PRINTK(args...) printk(args)
162 #define PRINTK(args...)
166 /*------------------------------------------------------------------------
168 . The internal workings of the driver. If you are changing anything
169 . here with the SMC stuff, you should have the datasheet and know
170 . what you are doing.
172 -------------------------------------------------------------------------*/
173 #define CARDNAME "LAN91C111"
175 // Memory sizing constant
176 #define LAN91C111_MEMORY_MULTIPLIER (1024*2)
178 /* store this information for the driver.. */
181 // these are things that the kernel wants me to keep, so users
182 // can find out semi-useless statistics of how well the card is
184 struct net_device_stats stats;
186 // If I have to wait until memory is available to send
187 // a packet, I will store the skbuff here, until I get the
188 // desired memory. Then, I'll send it out and free it.
189 struct sk_buff * saved_skb;
191 // This keeps track of how many packets that I have
192 // sent out. When an TX_EMPTY interrupt comes, I know
193 // that all of these have been sent.
196 // Set to true during the auto-negotiation sequence
199 // Address of our PHY port
205 // Last contents of PHY Register 18
208 // Contains the current active transmission mode
211 // Contains the current active receive mode
214 // Contains the current active receive/phy mode
220 // Root directory /proc/sys/dev
221 // Second entry must be null to terminate the table
222 ctl_table root_table[2];
224 // Directory for this device /proc/sys/dev/ethX
225 // Again the second entry must be zero to terminate
226 ctl_table eth_table[2];
228 // This is the parameters (file) table
229 ctl_table param_table[CTL_SMC_LAST_ENTRY];
231 // Saves the sysctl header returned by register_sysctl_table()
232 // we send this to unregister_sysctl_table()
233 struct ctl_table_header *sysctl_header;
235 // Parameter variables (files) go here
292 #endif // SMC_DEBUG > 0
295 #endif // CONFIG_SYSCTL
300 /*-----------------------------------------------------------------
302 . The driver can be entered at any of the following entry points.
304 .------------------------------------------------------------------ */
307 . The kernel calls this function when someone wants to use the device,
308 . typically 'ifconfig ethX up'.
310 static int smc_open(struct net_device *dev);
313 . Our watchdog timed out. Called by the networking layer
315 static void smc_timeout(struct net_device *dev);
318 . This is called by the kernel in response to 'ifconfig ethX down'. It
319 . is responsible for cleaning up everything that the open routine
320 . does, and maybe putting the card into a powerdown state.
322 static int smc_close(struct net_device *dev);
325 . This routine allows the proc file system to query the driver's
328 static struct net_device_stats * smc_query_statistics( struct net_device *dev);
331 . Finally, a call to set promiscuous mode ( for TCPDUMP and related
332 . programs ) and multicast modes.
334 static void smc_set_multicast_list(struct net_device *dev);
339 static int crc32( char * s, int length );
342 . Configures the PHY through the MII Management interface
344 static void smc_phy_configure(struct net_device* dev);
346 /*---------------------------------------------------------------
348 . Interrupt level calls..
350 ----------------------------------------------------------------*/
353 . Handles the actual interrupt
355 static void smc_interrupt(int irq, void *, struct pt_regs *regs);
357 . This is a separate procedure to handle the receipt of a packet, to
358 . leave the interrupt code looking slightly cleaner
360 inline static void smc_rcv( struct net_device *dev );
362 . This handles a TX interrupt, which is only called when an error
363 . relating to a packet is sent.
365 inline static void smc_tx( struct net_device * dev );
368 . This handles interrupts generated from PHY register 18
370 static void smc_phy_interrupt(struct net_device* dev);
373 ------------------------------------------------------------
377 ------------------------------------------------------------
381 . Test if a given location contains a chip, trying to cause as
382 . little damage as possible if it's not a SMC chip.
384 static int smc_probe(struct net_device *dev, unsigned long ioaddr);
387 . A rather simple routine to print out a packet for debugging purposes.
390 static void print_packet( byte *, int );
393 #define tx_done(dev) 1
395 /* this is called to actually send the packet to the chip */
396 static void smc_hardware_send_packet( struct net_device * dev );
398 /* Since I am not sure if I will have enough room in the chip's ram
399 . to store the packet, I call this routine, which either sends it
400 . now, or generates an interrupt when the card is ready for the
402 static int smc_wait_to_send_packet( struct sk_buff * skb, struct net_device *dev );
404 /* this does a soft reset on the device */
405 static void smc_reset( struct net_device* dev );
407 /* Enable Interrupts, Receive, and Transmit */
408 static void smc_enable( struct net_device *dev );
410 /* this puts the device in an inactive state */
411 static void smc_shutdown( unsigned long ioaddr );
413 /* This routine will find the IRQ of the driver if one is not
414 . specified in the input to the device. */
415 static int smc_findirq( unsigned long ioaddr );
417 /* Routines to Read and Write the PHY Registers across the
418 MII Management Interface
421 static word smc_read_phy_register(unsigned long ioaddr,
422 byte phyaddr, byte phyreg);
423 static void smc_write_phy_register(unsigned long ioaddr,
424 byte phyaddr, byte phyreg, word phydata);
427 Initilizes our device's sysctl proc filesystem
431 static void smc_sysctl_register(struct net_device *dev);
432 static void smc_sysctl_unregister(struct net_device *dev);
433 #endif /* CONFIG_SYSCTL */
436 . Function: smc_reset( struct net_device* dev )
438 . This sets the SMC91111 chip to its normal state, hopefully from whatever
439 . mess that any other DOS driver has put it in.
441 . Maybe I should reset more registers to defaults in here? SOFTRST should
445 . 1. send a SOFT RESET
446 . 2. wait for it to finish
447 . 3. enable autorelease mode
448 . 4. reset the memory management unit
449 . 5. clear all interrupts
452 static void smc_reset( struct net_device* dev )
454 //struct smc_local *lp = (struct smc_local *)dev->priv;
455 unsigned long ioaddr = dev->base_addr;
457 PRINTK2("%s:smc_reset\n", dev->name);
459 /* This resets the registers mostly to defaults, but doesn't
460 affect EEPROM. That seems unnecessary */
461 SMC_SELECT_BANK( 0 );
462 SMC_SET_RCR( RCR_SOFTRST );
464 /* Setup the Configuration Register */
465 /* This is necessary because the CONFIG_REG is not affected */
466 /* by a soft reset */
468 SMC_SELECT_BANK( 1 );
469 SMC_SET_CONFIG( CONFIG_DEFAULT );
471 /* Setup for fast accesses if requested */
472 /* If the card/system can't handle it then there will */
473 /* be no recovery except for a hard reset or power cycle */
476 SMC_SET_CONFIG( SMC_GET_CONFIG() | CONFIG_NO_WAIT );
479 /* Release from possible power-down state */
480 /* Configuration register is not affected by Soft Reset */
481 SMC_SELECT_BANK( 1 );
482 SMC_SET_CONFIG( SMC_GET_CONFIG() | CONFIG_EPH_POWER_EN );
485 SMC_SELECT_BANK( 0 );
487 /* this should pause enough for the chip to be happy */
490 /* Disable transmit and receive functionality */
491 SMC_SET_RCR( RCR_CLEAR );
492 SMC_SET_TCR( TCR_CLEAR );
494 /* set the control register to automatically
495 release successfully transmitted packets, to make the best
496 use out of our limited memory */
497 SMC_SELECT_BANK( 1 );
498 SMC_SET_CTL( SMC_GET_CTL() | CTL_AUTO_RELEASE );
501 SMC_SELECT_BANK( 2 );
502 SMC_SET_MMU_CMD( MC_RESET );
504 /* Note: It doesn't seem that waiting for the MMU busy is needed here,
505 but this is a place where future chipsets _COULD_ break. Be wary
506 of issuing another MMU command right after this */
508 /* Disable all interrupts */
509 SMC_SET_INT_MASK( 0 );
513 . Function: smc_enable
514 . Purpose: let the chip talk to the outside work
516 . 1. Enable the transmitter
517 . 2. Enable the receiver
518 . 3. Enable interrupts
520 static void smc_enable( struct net_device *dev )
522 unsigned long ioaddr = dev->base_addr;
523 struct smc_local *lp = (struct smc_local *)dev->priv;
525 PRINTK2("%s:smc_enable\n", dev->name);
527 SMC_SELECT_BANK( 0 );
528 /* see the header file for options in TCR/RCR DEFAULT*/
529 SMC_SET_TCR( lp->tcr_cur_mode );
530 SMC_SET_RCR( lp->rcr_cur_mode );
532 /* now, enable interrupts */
533 SMC_SELECT_BANK( 2 );
534 SMC_SET_INT_MASK( SMC_INTERRUPT_MASK );
538 . Function: smc_shutdown
539 . Purpose: closes down the SMC91xxx chip.
541 . 1. zero the interrupt mask
542 . 2. clear the enable receive flag
543 . 3. clear the enable xmit flags
546 . (1) maybe utilize power down mode.
547 . Why not yet? Because while the chip will go into power down mode,
548 . the manual says that it will wake up in response to any I/O requests
549 . in the register space. Empirical results do not show this working.
551 static void smc_shutdown( unsigned long ioaddr )
553 PRINTK2(CARDNAME ":smc_shutdown\n");
555 /* no more interrupts for me */
556 SMC_SELECT_BANK( 2 );
557 SMC_SET_INT_MASK( 0 );
559 /* and tell the card to stay away from that nasty outside world */
560 SMC_SELECT_BANK( 0 );
561 SMC_SET_RCR( RCR_CLEAR );
562 SMC_SET_TCR( TCR_CLEAR );
565 /* finally, shut the chip down */
566 SMC_SELECT_BANK( 1 );
567 SMC_SET_CONFIG( SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN );
573 . Function: smc_setmulticast( int ioaddr, int count, dev_mc_list * adds )
575 . This sets the internal hardware table to filter out unwanted multicast
576 . packets before they take up memory.
578 . The SMC chip uses a hash table where the high 6 bits of the CRC of
579 . address are the offset into the table. If that bit is 1, then the
580 . multicast packet is accepted. Otherwise, it's dropped silently.
582 . To use the 6 bits as an offset into the table, the high 3 bits are the
583 . number of the 8 bit register, while the low 3 bits are the bit within
586 . This routine is based very heavily on the one provided by Peter Cammaert.
590 static void smc_setmulticast( unsigned long ioaddr, int count,
591 struct dev_mc_list * addrs ) {
593 unsigned char multicast_table[ 8 ];
594 struct dev_mc_list * cur_addr;
595 /* table for flipping the order of 3 bits */
596 unsigned char invert3[] = { 0, 4, 2, 6, 1, 5, 3, 7 };
598 PRINTK2(CARDNAME ":smc_setmulticast\n");
600 /* start with a table of all zeros: reject all */
601 memset( multicast_table, 0, sizeof( multicast_table ) );
604 for ( i = 0; i < count ; i ++, cur_addr = cur_addr->next ) {
607 /* do we have a pointer here? */
610 /* make sure this is a multicast address - shouldn't this
611 be a given if we have it here ? */
612 if ( !( *cur_addr->dmi_addr & 1 ) )
615 /* only use the low order bits */
616 position = crc32( cur_addr->dmi_addr, 6 ) & 0x3f;
618 /* do some messy swapping to put the bit in the right spot */
619 multicast_table[invert3[position&7]] |=
620 (1<<invert3[(position>>3)&7]);
623 /* now, the table can be loaded into the chipset */
624 SMC_SELECT_BANK( 3 );
625 SMC_SET_MCAST( multicast_table );
629 Finds the CRC32 of a set of bytes.
630 Again, from Peter Cammaert's code.
632 static int crc32( char * s, int length ) {
636 /* crc polynomial for Ethernet */
637 const unsigned long poly = 0xedb88320;
638 /* crc value - preinitialized to all 1's */
639 unsigned long crc_value = 0xffffffff;
641 for ( perByte = 0; perByte < length; perByte ++ ) {
645 for ( perBit = 0; perBit < 8; perBit++ ) {
646 crc_value = (crc_value>>1)^
647 (((crc_value^c)&0x01)?poly:0);
656 . Function: smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * )
658 . Attempt to allocate memory for a packet, if chip-memory is not
659 . available, then tell the card to generate an interrupt when it
664 . o if the saved_skb is not currently null, then drop this packet
665 . on the floor. This should never happen, because of TBUSY.
666 . o if the saved_skb is null, then replace it with the current packet,
667 . o See if I can sending it now.
668 . o (NO): Enable interrupts and let the interrupt handler deal with it.
669 . o (YES):Send it now.
671 static int smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * dev )
673 struct smc_local *lp = (struct smc_local *)dev->priv;
674 unsigned long ioaddr = dev->base_addr;
676 unsigned short numPages;
680 PRINTK3("%s:smc_wait_to_send_packet\n", dev->name);
682 netif_stop_queue(dev);
683 /* Well, I want to send the packet.. but I don't know
684 if I can send it right now... */
686 if ( lp->saved_skb) {
687 /* THIS SHOULD NEVER HAPPEN. */
688 lp->stats.tx_aborted_errors++;
689 printk("%s: Bad Craziness - sent packet while busy.\n",
695 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
699 ** The MMU wants the number of pages to be the number of 256 bytes
700 ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) )
702 ** The 91C111 ignores the size bits, but the code is left intact
703 ** for backwards and future compatibility.
705 ** Pkt size for allocating is data length +6 (for additional status
706 ** words, length and ctl!)
708 ** If odd size then last byte is included in this header.
710 numPages = ((length & 0xfffe) + 6);
711 numPages >>= 8; // Divide by 256
714 printk("%s: Far too big packet error. \n", dev->name);
715 /* freeing the packet is a good thing here... but should
716 . any packets of this size get down here? */
718 lp->saved_skb = NULL;
719 /* this IS an error, but, i don't want the skb saved */
720 netif_wake_queue(dev);
723 /* either way, a packet is waiting now */
724 lp->packets_waiting++;
726 /* now, try to allocate the memory */
727 SMC_SELECT_BANK( 2 );
728 SMC_SET_MMU_CMD( MC_ALLOC | numPages );
732 . wait a short amount of time.. if I can send a packet now, I send
733 . it now. Otherwise, I enable an interrupt and wait for one to be
736 . I could have handled this a slightly different way, by checking to
737 . see if any memory was available in the FREE MEMORY register. However,
738 . either way, I need to generate an allocation, and the allocation works
739 . no matter what, so I saw no point in checking free memory.
741 time_out = MEMORY_WAIT_TIME;
743 status = SMC_GET_INT();
744 if ( status & IM_ALLOC_INT ) {
745 /* acknowledge the interrupt */
746 SMC_ACK_INT( IM_ALLOC_INT );
749 } while ( -- time_out );
752 /* oh well, wait until the chip finds memory later */
753 SMC_ENABLE_INT( IM_ALLOC_INT );
755 /* Check the status bit one more time just in case */
756 /* it snuk in between the time we last checked it */
757 /* and when we set the interrupt bit */
758 status = SMC_GET_INT();
759 if ( !(status & IM_ALLOC_INT) ) {
760 PRINTK2("%s: memory allocation deferred. \n",
762 /* it's deferred, but I'll handle it later */
766 /* Looks like it did sneak in, so disable */
768 SMC_DISABLE_INT( IM_ALLOC_INT );
770 /* or YES! I can send the packet now.. */
771 smc_hardware_send_packet(dev);
772 netif_wake_queue(dev);
777 . Function: smc_hardware_send_packet(struct net_device * )
779 . This sends the actual packet to the SMC9xxx chip.
782 . First, see if a saved_skb is available.
783 . ( this should NOT be called if there is no 'saved_skb'
784 . Now, find the packet number that the chip allocated
785 . Point the data pointers at it in memory
786 . Set the length word in the chip's memory
787 . Dump the packet to chip memory
788 . Check if a last byte is needed ( odd length packet )
789 . if so, set the control flag right
790 . Tell the card to send it
791 . Enable the transmit interrupt, so I know if it failed
792 . Free the kernel data if I actually sent it.
794 static void smc_hardware_send_packet( struct net_device * dev )
796 struct smc_local *lp = (struct smc_local *)dev->priv;
798 struct sk_buff * skb = lp->saved_skb;
800 unsigned long ioaddr;
803 PRINTK3("%s:smc_hardware_send_packet\n", dev->name);
805 ioaddr = dev->base_addr;
808 PRINTK("%s: In XMIT with no packet to send \n", dev->name);
811 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
814 /* If I get here, I _know_ there is a packet slot waiting for me */
815 packet_no = SMC_GET_AR();
816 if ( packet_no & AR_FAILED ) {
817 /* or isn't there? BAD CHIP! */
818 printk(KERN_DEBUG "%s: Memory allocation failed. \n",
820 dev_kfree_skb_any(skb);
821 lp->saved_skb = NULL;
822 netif_wake_queue(dev);
826 /* we have a packet address, so tell the card to use it */
827 SMC_SET_PN( packet_no );
829 /* point to the beginning of the packet */
830 SMC_SET_PTR( PTR_AUTOINC );
832 PRINTK3("%s: Trying to xmit packet of length %x\n",
836 printk("Transmitting Packet\n");
837 print_packet( buf, length );
840 /* send the packet length ( +6 for status, length and ctl byte )
841 and the status word ( set to zeros ) */
842 #ifdef CONFIG_SMC91111_USE_32_BIT
843 SMC_outl( (length +6 ) << 16 , ioaddr + DATA_REG );
845 SMC_outw( 0, ioaddr + DATA_REG );
846 /* send the packet length ( +6 for status words, length, and ctl*/
847 SMC_outw( (length+6), ioaddr + DATA_REG );
850 /* send the actual data
851 . I _think_ it's faster to send the longs first, and then
852 . mop up by sending the last word. It depends heavily
853 . on alignment, at least on the 486. Maybe it would be
854 . a good idea to check which is optimal? But that could take
855 . almost as much time as is saved?
857 #ifdef CONFIG_SMC91111_USE_32_BIT
858 SMC_outsl(ioaddr + DATA_REG, buf, length >> 2 );
860 SMC_outw(*((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +
863 SMC_outsw(ioaddr + DATA_REG , buf, (length ) >> 1);
864 #endif // CONFIG_SMC91111_USE_32_BIT
866 /* Send the last byte, if there is one. */
867 if ( (length & 1) == 0 ) {
868 SMC_outw( 0, ioaddr + DATA_REG );
870 SMC_outw( 0x2000 | buf[length -1 ], ioaddr + DATA_REG );
873 /* enable the interrupts */
874 SMC_ENABLE_INT( (IM_TX_INT | IM_TX_EMPTY_INT) );
876 /* and let the chipset deal with it */
877 SMC_SET_MMU_CMD( MC_ENQUEUE );
879 PRINTK2("%s: Sent packet of length %d \n", dev->name, length);
881 lp->saved_skb = NULL;
882 dev_kfree_skb_any (skb);
884 dev->trans_start = jiffies;
886 /* we can send another packet */
887 netif_wake_queue(dev);
892 /*-------------------------------------------------------------------------
896 | dev->base_addr == 0, try to find all possible locations
897 | dev->base_addr > 0x1ff, this is the address to check
898 | dev->base_addr == <anything else>, return failure code
901 | 0 --> there is a device
902 | anything else, error
904 ---------------------------------------------------------------------------
906 static int __init smc_init( void )
910 PRINTK2(CARDNAME ":smc_init\n");
915 CARDNAME": You shouldn't use auto-probing with insmod!\n" );
919 printk(CARDNAME ": already initialized.\n");
923 global_dev = init_etherdev(0, sizeof(struct smc_local));
925 printk(CARDNAME ": could not allocate device.\n");
928 SET_MODULE_OWNER(global_dev);
930 /* copy the parameters from insmod into the device structure */
932 global_dev->base_addr = io;
934 global_dev->irq = irq;
935 global_dev->dma = nowait; // Use DMA field for nowait
938 /* try a specific location */
939 if (global_dev->base_addr > 0x1ff)
940 rtn = smc_probe(global_dev, global_dev->base_addr);
941 else if (global_dev->base_addr != 0)
946 /* check every ethernet address */
947 for (i = 0; smc_portlist[i]; i++) {
948 rtn = smc_probe(global_dev, smc_portlist[i]);
954 if (global_dev->base_addr == -1) {
956 CARDNAME": SMC91111_BASE_ADDR not set!\n" );
960 rtn = smc_probe(global_dev,
961 (int)ioremap(global_dev->base_addr,
966 printk(CARDNAME ": not found.\n");
967 /* couldn't find anything */
969 iounmap((void *)global_dev->base_addr);
971 kfree(global_dev->priv);
972 unregister_netdev(global_dev);
979 /*----------------------------------------------------------------------
982 . This routine has a simple purpose -- make the SMC chip generate an
983 . interrupt, so an auto-detect routine can detect it, and find the IRQ,
984 ------------------------------------------------------------------------
986 int __init smc_findirq( unsigned long ioaddr )
989 unsigned long cookie;
991 PRINTK2(CARDNAME ":smc_findirq\n");
993 /* I have to do a STI() here, because this is called from
994 a routine that does an CLI during this process, making it
995 rather difficult to get interrupts for auto detection */
998 cookie = probe_irq_on();
1001 * What I try to do here is trigger an ALLOC_INT. This is done
1002 * by allocating a small chunk of memory, which will give an interrupt
1008 /* enable ALLOCation interrupts ONLY */
1009 SMC_SET_INT_MASK( IM_ALLOC_INT );
1012 . Allocate 512 bytes of memory. Note that the chip was just
1013 . reset so all the memory is available
1015 SMC_SET_MMU_CMD( MC_ALLOC | 1 );
1018 . Wait until positive that the interrupt has been generated
1023 int_status = SMC_GET_INT();
1025 if ( int_status & IM_ALLOC_INT )
1026 break; /* got the interrupt */
1030 /* there is really nothing that I can do here if timeout fails,
1031 as autoirq_report will return a 0 anyway, which is what I
1032 want in this case. Plus, the clean up is needed in both
1036 On a fast machine, the status might change before the interrupt
1037 is given to the processor. This means that the interrupt was
1038 never detected, and autoirq_report fails to report anything.
1039 This should fix autoirq_* problems.
1043 /* and disable all interrupts again */
1044 SMC_SET_INT_MASK( 0 );
1046 /* clear hardware interrupts again, because that's how it
1047 was when I was called... */
1050 /* and return what I found */
1051 return probe_irq_off(cookie);
1054 /*----------------------------------------------------------------------
1055 . Function: smc_probe( unsigned long ioaddr )
1058 . Tests to see if a given ioaddr points to an SMC91111 chip.
1059 . Returns a 0 on success
1062 . (1) see if the high byte of BANK_SELECT is 0x33
1063 . (2) compare the ioaddr with the base register's address
1064 . (3) see if I recognize the chip ID in the appropriate register
1066 .---------------------------------------------------------------------
1068 /*---------------------------------------------------------------
1069 . Here I do typical initialization tasks.
1071 . o Initialize the structure if needed
1072 . o print out my vanity message if not done so already
1073 . o print out what type of hardware is detected
1074 . o print out the ethernet address
1076 . o set up my private data
1077 . o configure the dev structure with my subroutines
1078 . o actually GRAB the irq.
1080 .-----------------------------------------------------------------
1082 static int __init smc_probe(struct net_device *dev, unsigned long ioaddr)
1084 int i, memory, retval;
1085 static unsigned version_printed;
1088 const char *version_string;
1089 const char *if_string;
1092 word revision_register;
1093 word base_address_register;
1094 word memory_info_register;
1096 PRINTK2(CARDNAME ":smc_probe\n");
1098 /* Grab the region so that no one else tries to probe our ioports. */
1099 if (!request_region(ioaddr, SMC_IO_EXTENT, dev->name))
1102 /* First, see if the high byte is 0x33 */
1103 bank = SMC_CURRENT_BANK();
1104 if ( (bank & 0xFF00) != 0x3300 ) {
1105 if ( (bank & 0xFF) == 0x33 ) {
1107 ": Detected possible byte-swapped interface"
1108 " at IOADDR %lx\n", ioaddr);
1113 /* The above MIGHT indicate a device, but I need to write to further
1116 bank = SMC_CURRENT_BANK();
1117 if ( (bank & 0xFF00 ) != 0x3300 ) {
1121 /* well, we've already written once, so hopefully another time won't
1122 hurt. This time, I need to switch the bank register to bank 1,
1123 so I can access the base address register */
1125 base_address_register = SMC_GET_BASE();
1126 base_address_register = ((base_address_register & 0xE000)
1127 | ((base_address_register & 0x1F00) >> 3));
1128 if ( (ioaddr & (PAGE_SIZE-1)) != base_address_register ) {
1129 printk(CARDNAME ": IOADDR %lx doesn't match configuration (%x)."
1130 "Probably not a SMC chip\n",
1131 ioaddr, base_address_register );
1132 /* well, the base address register didn't match. Must not have
1133 been a SMC chip after all. */
1138 /* check if the revision register is something that I recognize.
1139 These might need to be added to later, as future revisions
1142 revision_register = SMC_GET_REV();
1143 if ( !chip_ids[ ( revision_register >> 4 ) & 0xF ] ) {
1144 /* I don't recognize this chip, so... */
1145 printk(CARDNAME ": IO %lx: Unrecognized revision register:"
1146 " %x, Contact author. \n",
1147 ioaddr, revision_register );
1153 /* at this point I'll assume that the chip is an SMC9xxx.
1154 It might be prudent to check a listing of MAC addresses
1155 against the hardware address, or do some other tests. */
1157 if (version_printed++ == 0)
1158 printk("%s", version);
1160 /* fill in some of the fields */
1161 dev->base_addr = ioaddr;
1164 . Get the MAC address ( bank 1, regs 4 - 9 )
1166 SMC_SELECT_BANK( 1 );
1167 for ( i = 0; i < 6; i += 2 ) {
1170 address = SMC_inw( ioaddr + ADDR0_REG + i );
1171 dev->dev_addr[ i + 1] = address >> 8;
1172 dev->dev_addr[ i ] = address & 0xFF;
1175 /* get the memory information */
1177 SMC_SELECT_BANK( 0 );
1178 memory_info_register = SMC_GET_MIR();
1179 memory = memory_info_register & (word)0x00ff;
1180 memory *= LAN91C111_MEMORY_MULTIPLIER;
1183 Now, I want to find out more about the chip. This is sort of
1184 redundant, but it's cleaner to have it in both, rather than having
1185 one VERY long probe procedure.
1188 revision_register = SMC_GET_REV();
1189 version_string = chip_ids[ ( revision_register >> 4 ) & 0xF ];
1190 if ( !version_string ) {
1191 /* I shouldn't get here because this call was done before.... */
1197 /* now, reset the chip, and put it into a known state */
1201 . If dev->irq is 0, then the device has to be banged on to see
1204 . This banging doesn't always detect the IRQ, for unknown reasons.
1205 . a workaround is to reset the chip and try again.
1207 . Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1208 . be what is requested on the command line. I don't do that, mostly
1209 . because the card that I have uses a non-standard method of accessing
1210 . the IRQs, and because this _should_ work in most configurations.
1212 . Specifying an IRQ is done with the assumption that the user knows
1213 . what (s)he is doing. No checking is done!!!!
1216 if ( dev->irq < 2 ) {
1220 while ( trials-- ) {
1221 dev->irq = smc_findirq( ioaddr );
1224 /* kick the card and try again */
1228 if (dev->irq == 0 ) {
1229 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1234 if (dev->irq == 2) {
1235 /* Fixup for users that don't know that IRQ 2 is really IRQ 9,
1236 * or don't know which one to set.
1241 /* now, print out the card info, in a short format.. */
1243 printk("%s: %s(r:%d) at %#lx IRQ:%d\n", dev->name,
1244 version_string, revision_register & 0xF, ioaddr, dev->irq );
1245 printk(" INTF:%s MEM:%db NOWAIT:%d", if_string, memory, dev->dma );
1247 . Print the Ethernet address
1250 for (i = 0; i < 5; i++)
1251 printk("%2.2x:", dev->dev_addr[i] );
1252 printk("%2.2x \n", dev->dev_addr[5] );
1254 /* set the private data to zero by default */
1255 memset(dev->priv, 0, sizeof(struct smc_local));
1257 /* Fill in the fields of the device structure with ethernet values. */
1261 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1266 dev->open = smc_open;
1267 dev->stop = smc_close;
1268 dev->hard_start_xmit = smc_wait_to_send_packet;
1269 dev->tx_timeout = smc_timeout;
1270 dev->watchdog_timeo = HZ/20;
1271 dev->get_stats = smc_query_statistics;
1272 dev->set_multicast_list = smc_set_multicast_list;
1277 release_region(ioaddr, SMC_IO_EXTENT);
1282 static void print_packet( byte * buf, int length )
1291 printk("Packet of length %d \n", length );
1294 lines = length / 16;
1295 remainder = length % 16;
1297 for ( i = 0; i < lines ; i ++ ) {
1300 for ( cur = 0; cur < 8; cur ++ ) {
1305 printk("%02x%02x ", a, b );
1309 for ( i = 0; i < remainder/2 ; i++ ) {
1314 printk("%02x%02x ", a, b );
1324 * Open and Initialize the board
1326 * Set up everything, reset the card, etc ..
1329 static int smc_open(struct net_device *dev)
1331 struct smc_local *lp = (struct smc_local *)dev->priv;
1332 unsigned long ioaddr = dev->base_addr;
1333 int i; /* used to set hw ethernet address */
1335 PRINTK2("%s:smc_open\n", dev->name);
1337 /* clear out all the junk that was put here before... */
1338 memset(dev->priv, 0, sizeof(struct smc_local));
1340 // Setup the default Register Modes
1341 lp->tcr_cur_mode = TCR_DEFAULT;
1342 lp->rcr_cur_mode = RCR_DEFAULT;
1343 lp->rpc_cur_mode = RPC_DEFAULT;
1345 // Set default parameters (files)
1347 lp->ctl_ephloop = 0;
1349 lp->ctl_autoneg = 1;
1350 lp->ctl_rfduplx = 1;
1351 lp->ctl_rspeed = 100;
1352 lp->ctl_afduplx = 1;
1353 lp->ctl_aspeed = 100;
1354 lp->ctl_lnkfail = 1;
1356 lp->ctl_filtcar = 0;
1358 /* reset the hardware */
1363 /* Configure the PHY */
1364 smc_phy_configure(dev);
1367 According to Becker, I have to set the hardware address
1368 at this point, because the (l)user can set it with an
1369 ioctl. Easily done...
1371 SMC_SELECT_BANK( 1 );
1372 for ( i = 0; i < 6; i += 2 ) {
1375 address = dev->dev_addr[ i + 1 ] << 8 ;
1376 address |= dev->dev_addr[ i ];
1377 SMC_outw( address, ioaddr + ADDR0_REG + i );
1380 #ifdef CONFIG_SYSCTL
1381 smc_sysctl_register(dev);
1382 #endif /* CONFIG_SYSCTL */
1384 netif_start_queue(dev);
1388 /*--------------------------------------------------------
1389 . Called by the kernel to send a packet out into the void
1390 . of the net. This routine is largely based on
1391 . skeleton.c, from Becker.
1392 .--------------------------------------------------------
1394 static void smc_timeout(struct net_device *dev)
1396 struct smc_local *lp = (struct smc_local *)dev->priv;
1398 PRINTK3("%s:smc_timeout\n", dev->name);
1400 /* If we get here, some higher level has decided we are broken.
1401 There should really be a "kick me" function call instead. */
1402 printk(KERN_WARNING "%s: transmit timed out, %s?\n",
1403 dev->name, tx_done(dev) ? "IRQ conflict" :
1404 "network cable problem");
1405 /* "kick" the adaptor */
1410 /* Reconfiguring the PHY doesn't seem like a bad idea here, but
1411 * it introduced a problem. Now that this is a timeout routine,
1412 * we are getting called from within an interrupt context.
1413 * smc_phy_configure() calls smc_wait_ms() which calls
1414 * schedule_timeout() which calls schedule(). When schedule()
1415 * is called from an interrupt context, it prints out
1416 * "Scheduling in interrupt" and then calls BUG(). This is
1417 * obviously not desirable. This was worked around by removing
1418 * the call to smc_phy_configure() here because it didn't seem
1419 * absolutely necessary. Ultimately, if smc_wait_ms() is
1420 * supposed to be usable from an interrupt context (which it
1421 * looks like it thinks it should handle), it should be fixed.
1423 /* Reconfigure the PHY */
1424 smc_phy_configure(dev);
1426 dev->trans_start = jiffies;
1427 /* clear anything saved */
1428 if (lp->saved_skb != NULL) {
1429 dev_kfree_skb (lp->saved_skb);
1430 lp->saved_skb = NULL;
1432 ((struct smc_local *)dev->priv)->saved_skb = NULL;
1433 netif_wake_queue(dev);
1436 /*--------------------------------------------------------------------
1438 . This is the main routine of the driver, to handle the device when
1439 . it needs some attention.
1442 . first, save state of the chipset
1443 . branch off into routines to handle each case, and acknowledge
1444 . each to the interrupt register
1445 . and finally restore state.
1447 ---------------------------------------------------------------------*/
1448 static void smc_interrupt(int irq, void * dev_id, struct pt_regs * regs)
1450 struct net_device *dev = dev_id;
1451 unsigned long ioaddr = dev->base_addr;
1452 struct smc_local *lp = (struct smc_local *)dev->priv;
1458 /* state registers */
1462 PRINTK3("%s: SMC interrupt started \n", dev->name);
1465 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1470 saved_bank = SMC_CURRENT_BANK();
1473 saved_pointer = SMC_GET_PTR();
1475 /* read the interrupt mask register */
1476 mask = SMC_GET_INT_MASK();
1478 /* disable all interrupts */
1479 SMC_SET_INT_MASK( 0 );
1481 /* set a timeout value, so I don't stay here forever */
1484 PRINTK2(KERN_WARNING "%s: MASK IS %x \n", dev->name, mask);
1486 /* read the status flag, and mask it */
1487 status = SMC_GET_INT() & mask;
1491 PRINTK3(KERN_WARNING "%s: Handling interrupt status %x \n",
1494 if (status & IM_RCV_INT) {
1495 /* Got a packet(s). */
1496 PRINTK2(KERN_WARNING
1497 "%s: Receive Interrupt\n", dev->name);
1499 } else if (status & IM_TX_INT ) {
1500 PRINTK2(KERN_WARNING "%s: TX ERROR handled\n",
1503 // Acknowledge the interrupt
1504 SMC_ACK_INT( IM_TX_INT );
1505 } else if (status & IM_TX_EMPTY_INT ) {
1507 SMC_SELECT_BANK( 0 );
1508 card_stats = SMC_GET_COUNTER();
1509 /* single collisions */
1510 lp->stats.collisions += card_stats & 0xF;
1512 /* multiple collisions */
1513 lp->stats.collisions += card_stats & 0xF;
1515 /* these are for when linux supports these statistics */
1517 SMC_SELECT_BANK( 2 );
1518 PRINTK2(KERN_WARNING "%s: TX_BUFFER_EMPTY handled\n",
1520 // Acknowledge the interrupt
1521 SMC_ACK_INT( IM_TX_EMPTY_INT );
1522 mask &= ~IM_TX_EMPTY_INT;
1523 lp->stats.tx_packets += lp->packets_waiting;
1524 lp->packets_waiting = 0;
1526 } else if (status & IM_ALLOC_INT ) {
1527 PRINTK2(KERN_DEBUG "%s: Allocation interrupt \n",
1529 /* clear this interrupt so it doesn't happen again */
1530 mask &= ~IM_ALLOC_INT;
1532 smc_hardware_send_packet( dev );
1534 /* enable xmit interrupts based on this */
1535 mask |= ( IM_TX_EMPTY_INT | IM_TX_INT );
1537 /* and let the card send more packets to me */
1538 netif_wake_queue(dev);
1540 PRINTK2("%s: Handoff done successfully.\n",
1542 } else if (status & IM_RX_OVRN_INT ) {
1543 lp->stats.rx_errors++;
1544 lp->stats.rx_fifo_errors++;
1545 // Acknowledge the interrupt
1546 SMC_ACK_INT( IM_RX_OVRN_INT );
1547 } else if (status & IM_EPH_INT ) {
1548 PRINTK("%s: UNSUPPORTED: EPH INTERRUPT \n",
1550 } else if (status & IM_MDINT ) {
1551 smc_phy_interrupt(dev);
1552 // Acknowledge the interrupt
1553 SMC_ACK_INT( IM_MDINT );
1554 } else if (status & IM_ERCV_INT ) {
1555 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n",
1557 // Acknowledge the interrupt
1558 SMC_ACK_INT( IM_ERCV_INT );
1560 } while ( timeout -- );
1563 /* restore register states */
1565 SMC_SELECT_BANK( 2 );
1567 SMC_SET_INT_MASK( mask );
1569 PRINTK3( KERN_WARNING "%s: MASK is now %x \n", dev->name, mask);
1570 SMC_SET_PTR( saved_pointer );
1572 SMC_SELECT_BANK( saved_bank );
1574 PRINTK3("%s: Interrupt done\n", dev->name);
1578 /*-------------------------------------------------------------
1580 . smc_rcv - receive a packet from the card
1582 . There is ( at least ) a packet waiting to be read from
1586 . o If an error, record it
1587 . o otherwise, read in the packet
1588 --------------------------------------------------------------
1590 static void smc_rcv(struct net_device *dev)
1592 struct smc_local *lp = (struct smc_local *)dev->priv;
1593 unsigned long ioaddr = dev->base_addr;
1598 PRINTK3("%s:smc_rcv\n", dev->name);
1602 packet_number = SMC_GET_RXFIFO();
1604 if ( packet_number & RXFIFO_REMPTY ) {
1606 /* we got called , but nothing was on the FIFO */
1607 PRINTK("%s: WARNING: smc_rcv with nothing on FIFO. \n",
1609 /* don't need to restore anything */
1613 /* start reading from the start of the packet */
1614 SMC_SET_PTR( PTR_READ | PTR_RCV | PTR_AUTOINC );
1616 /* First two words are status and packet_length */
1617 status = SMC_inw( ioaddr + DATA_REG );
1618 packet_length = SMC_inw( ioaddr + DATA_REG );
1620 packet_length &= 0x07ff; /* mask off top bits */
1622 PRINTK2("RCV: STATUS %4x LENGTH %4x\n", status, packet_length );
1624 if ( !(status & RS_ERRORS ) ){
1625 /* do stuff to make a new packet */
1626 struct sk_buff * skb;
1629 /* set multicast stats */
1630 if ( status & RS_MULTICAST )
1631 lp->stats.multicast++;
1633 // Allocate enough memory for entire receive frame, to be safe
1634 skb = dev_alloc_skb( packet_length );
1636 /* Adjust for having already read the first two words */
1639 if ( skb == NULL ) {
1640 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
1642 lp->stats.rx_dropped++;
1647 ! This should work without alignment, but it could be
1651 skb_reserve( skb, 2 ); /* 16 bit alignment */
1655 // set odd length for bug in LAN91C111,
1656 // which never sets RS_ODDFRAME
1657 data = skb_put( skb, packet_length + 1 );
1659 #ifdef CONFIG_SMC91111_USE_32_BIT
1660 PRINTK3(" Reading %d dwords (and %d bytes) \n",
1661 packet_length >> 2, packet_length & 3 );
1662 /* QUESTION: Like in the TX routine, do I want
1663 to send the DWORDs or the bytes first, or some
1664 mixture. A mixture might improve already slow PIO
1666 SMC_insl(ioaddr + DATA_REG , data, packet_length >> 2 );
1667 /* read the left over bytes */
1668 #ifdef CONFIG_SMC91111_USE_8_BIT
1669 SMC_insb( ioaddr + DATA_REG, data + (packet_length & 0xFFFFFC),
1670 packet_length & 0x3 );
1672 if (packet_length & 0x3)
1674 unsigned long remaining_data;
1675 insl(ioaddr + DATA_REG , &remaining_data, 1);
1676 memcpy(data + (packet_length & 0xFFFFFC),
1677 &remaining_data, packet_length & 0x3 );
1679 #endif // CONFIG_SMC91111_USE_8_BIT
1681 PRINTK3(" Reading %d words and %d byte(s) \n",
1682 (packet_length >> 1 ), packet_length & 1 );
1683 SMC_insw(ioaddr + DATA_REG , data, packet_length >> 1);
1685 #endif // CONFIG_SMC91111_USE_32_BIT
1688 printk("Receiving Packet\n");
1689 print_packet( data, packet_length );
1692 skb->protocol = eth_type_trans(skb, dev );
1694 dev->last_rx = jiffies;
1695 lp->stats.rx_packets++;
1696 lp->stats.rx_bytes += packet_length;
1699 lp->stats.rx_errors++;
1701 if ( status & RS_ALGNERR ) lp->stats.rx_frame_errors++;
1702 if ( status & (RS_TOOSHORT | RS_TOOLONG ) )
1703 lp->stats.rx_length_errors++;
1704 if ( status & RS_BADCRC) lp->stats.rx_crc_errors++;
1707 while ( SMC_GET_MMU_CMD() & MC_BUSY )
1708 udelay(1); // Wait until not busy
1711 /* error or good, tell the card to get rid of this packet */
1712 SMC_SET_MMU_CMD( MC_RELEASE );
1716 /*************************************************************************
1719 . Purpose: Handle a transmit error message. This will only be called
1720 . when an error, because of the AUTO_RELEASE mode.
1723 . Save pointer and packet no
1724 . Get the packet no from the top of the queue
1725 . check if it's valid ( if not, is this an error??? )
1726 . read the status word
1728 . ( resend? Not really, since we don't want old packets around )
1729 . Restore saved values
1730 ************************************************************************/
1731 static void smc_tx( struct net_device * dev )
1733 unsigned long ioaddr = dev->base_addr;
1734 struct smc_local *lp = (struct smc_local *)dev->priv;
1740 PRINTK3("%s:smc_tx\n", dev->name);
1744 saved_packet = SMC_GET_PN();
1745 packet_no = SMC_GET_RXFIFO();
1748 /* If the TX FIFO is empty then nothing to do */
1749 if ( packet_no & TXFIFO_TEMPTY )
1752 /* select this as the packet to read from */
1753 SMC_SET_PN( packet_no );
1755 /* read the first word (status word) from this packet */
1756 SMC_SET_PTR( PTR_AUTOINC | PTR_READ );
1758 tx_status = SMC_inw( ioaddr + DATA_REG );
1759 PRINTK3("%s: TX DONE STATUS: %4x \n", dev->name, tx_status);
1761 lp->stats.tx_errors++;
1762 if ( tx_status & TS_LOSTCAR ) lp->stats.tx_carrier_errors++;
1763 if ( tx_status & TS_LATCOL ) {
1765 "%s: Late collision occurred on last xmit.\n",
1767 lp->stats.tx_window_errors++;
1768 lp->ctl_forcol = 0; // Reset forced collsion
1771 if ( tx_status & TS_16COL ) { ... }
1774 if ( tx_status & TS_SUCCESS ) {
1775 printk("%s: Successful packet caused interrupt \n", dev->name);
1777 /* re-enable transmit */
1778 SMC_SELECT_BANK( 0 );
1779 SMC_SET_TCR( SMC_GET_TCR() | TCR_ENABLE );
1781 /* kill the packet */
1782 SMC_SELECT_BANK( 2 );
1783 SMC_SET_MMU_CMD( MC_FREEPKT );
1785 /* one less packet waiting for me */
1786 lp->packets_waiting--;
1788 /* Don't change Packet Number Reg until busy bit is cleared */
1789 /* Per LAN91C111 Spec, Page 50 */
1790 while ( SMC_GET_MMU_CMD() & MC_BUSY );
1792 SMC_SET_PN( saved_packet );
1797 /*----------------------------------------------------
1800 . this makes the board clean up everything that it can
1801 . and not talk to the outside world. Caused by
1802 . an 'ifconfig ethX down'
1804 -----------------------------------------------------*/
1805 static int smc_close(struct net_device *dev)
1807 PRINTK2("%s:smc_close\n", dev->name);
1809 netif_stop_queue(dev);
1811 #ifdef CONFIG_SYSCTL
1812 smc_sysctl_unregister(dev);
1813 #endif /* CONFIG_SYSCTL */
1815 /* clear everything */
1816 smc_shutdown( dev->base_addr );
1818 /* Update the statistics here. */
1822 /*------------------------------------------------------------
1823 . Get the current statistics.
1824 . This may be called with the card open or closed.
1825 .-------------------------------------------------------------*/
1826 static struct net_device_stats* smc_query_statistics(struct net_device *dev) {
1827 struct smc_local *lp = (struct smc_local *)dev->priv;
1829 PRINTK2("%s:smc_query_statistics\n", dev->name);
1834 /*-----------------------------------------------------------
1835 . smc_set_multicast_list
1837 . This routine will, depending on the values passed to it,
1838 . either make it accept multicast packets, go into
1839 . promiscuous mode ( for TCPDUMP and cousins ) or accept
1840 . a select set of multicast packets
1842 static void smc_set_multicast_list(struct net_device *dev)
1844 unsigned long ioaddr = dev->base_addr;
1846 PRINTK2("%s:smc_set_multicast_list\n", dev->name);
1849 if ( dev->flags & IFF_PROMISC ) {
1850 PRINTK2("%s:smc_set_multicast_list:RCR_PRMS\n", dev->name);
1851 SMC_SET_RCR( SMC_GET_RCR() | RCR_PRMS );
1854 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1855 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1856 when promiscuous mode is turned on.
1859 /* Here, I am setting this to accept all multicast packets.
1860 I don't need to zero the multicast table, because the flag is
1861 checked before the table is
1863 else if (dev->flags & IFF_ALLMULTI) {
1864 SMC_SET_RCR( SMC_GET_RCR() | RCR_ALMUL );
1865 PRINTK2("%s:smc_set_multicast_list:RCR_ALMUL\n", dev->name);
1868 /* We just get all multicast packets even if we only want them
1869 . from one source. This will be changed at some future
1871 else if (dev->mc_count ) {
1872 /* support hardware multicasting */
1874 /* be sure I get rid of flags I might have set */
1875 SMC_SET_RCR( SMC_GET_RCR() & ~(RCR_PRMS | RCR_ALMUL) );
1876 /* NOTE: this has to set the bank, so make sure it is the
1877 last thing called. The bank is set to zero at the top */
1878 smc_setmulticast( ioaddr, dev->mc_count, dev->mc_list );
1880 PRINTK2("%s:smc_set_multicast_list:~(RCR_PRMS|RCR_ALMUL)\n",
1882 SMC_SET_RCR( SMC_GET_RCR() & ~(RCR_PRMS | RCR_ALMUL) );
1885 since I'm disabling all multicast entirely, I need to
1886 clear the multicast list
1888 SMC_SELECT_BANK( 3 );
1893 /*------------------------------------------------------------
1894 . Cleanup when module is removed with rmmod
1895 .-------------------------------------------------------------*/
1896 static void __exit smc_cleanup(void)
1898 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1899 unregister_netdev(global_dev);
1901 free_irq(global_dev->irq, global_dev);
1902 release_region(global_dev->base_addr, SMC_IO_EXTENT);
1905 iounmap((void *)global_dev->base_addr);
1912 module_init(smc_init);
1913 module_exit(smc_cleanup);
1916 #ifdef CONFIG_SYSCTL
1917 /*------------------------------------------------------------
1918 . Modify a bit in the LAN91C111 register set
1919 .-------------------------------------------------------------*/
1920 static word smc_modify_regbit(int bank, unsigned long ioaddr, int reg,
1921 unsigned int bit, int val)
1925 SMC_SELECT_BANK( bank );
1927 regval = SMC_inw( ioaddr+reg );
1933 SMC_outw( regval, ioaddr );
1938 /*------------------------------------------------------------
1939 . Retrieve a bit in the LAN91C111 register set
1940 .-------------------------------------------------------------*/
1941 static int smc_get_regbit(int bank, unsigned long ioaddr,
1942 int reg, unsigned int bit)
1944 SMC_SELECT_BANK( bank );
1945 if ( SMC_inw( ioaddr+reg ) & bit)
1952 /*------------------------------------------------------------
1953 . Modify a LAN91C111 register (word access only)
1954 .-------------------------------------------------------------*/
1955 static void smc_modify_reg(int bank, unsigned long ioaddr,
1958 SMC_SELECT_BANK( bank );
1959 SMC_outw( val, ioaddr+reg );
1963 /*------------------------------------------------------------
1964 . Retrieve a LAN91C111 register (word access only)
1965 .-------------------------------------------------------------*/
1966 static int smc_get_reg(int bank, unsigned long ioaddr,
1969 SMC_SELECT_BANK( bank );
1970 return(SMC_inw( ioaddr+reg ));
1974 static const char smc_info_string[] =
1976 "info Provides this information blurb\n"
1977 "swver Prints the software version information of this driver\n"
1978 "autoneg Auto-negotiate Mode = 1\n"
1979 "rspeed Requested Speed, 100=100Mbps, 10=10Mpbs\n"
1980 "rfduplx Requested Full Duplex Operation\n"
1981 "aspeed Actual Speed, 100=100Mbps, 10=10Mpbs\n"
1982 "afduplx Actual Full Duplex Operation\n"
1983 "lnkfail PHY Link Failure when 1\n"
1984 "miiop External MII when 1, Internal PHY when 0\n"
1985 "swfdup Switched Full Duplex Mode (allowed only in MII operation)\n"
1986 "ephloop EPH Block Loopback\n"
1987 "forcol Force a collision\n"
1988 "filtcar Filter leading edge of carrier sense for 12 bit times\n"
1989 "freemem Free buffer memory in bytes\n"
1990 "totmem Total buffer memory in bytes\n"
1991 "leda Output of LED-A (green)\n"
1992 "ledb Output of LED-B (yellow)\n"
1993 "chiprev Revision ID of the LAN91C111 chip\n"
1996 /*------------------------------------------------------------
1997 . Sysctl handler for all integer parameters
1998 .-------------------------------------------------------------*/
1999 static int smc_sysctl_handler(ctl_table *ctl, int write, struct file * filp,
2000 void *buffer, size_t *lenp)
2002 struct net_device *dev = (struct net_device*)ctl->extra1;
2003 struct smc_local *lp = (struct smc_local *)ctl->extra2;
2004 unsigned long ioaddr = dev->base_addr;
2005 int *valp = ctl->data;
2009 // Update parameters from the real registers
2010 switch (ctl->ctl_name)
2012 case CTL_SMC_FORCOL:
2013 *valp = smc_get_regbit(0, ioaddr, TCR_REG, TCR_FORCOL);
2016 case CTL_SMC_FREEMEM:
2017 *valp = ( (word)smc_get_reg(0, ioaddr, MIR_REG) >> 8 )
2018 * LAN91C111_MEMORY_MULTIPLIER;
2022 case CTL_SMC_TOTMEM:
2023 *valp = ( smc_get_reg(0, ioaddr, MIR_REG) & (word)0x00ff )
2024 * LAN91C111_MEMORY_MULTIPLIER;
2027 case CTL_SMC_CHIPREV:
2028 *valp = smc_get_reg(3, ioaddr, REV_REG);
2031 case CTL_SMC_AFDUPLX:
2032 *valp = (lp->lastPhy18 & PHY_INT_DPLXDET) ? 1 : 0;
2035 case CTL_SMC_ASPEED:
2036 *valp = (lp->lastPhy18 & PHY_INT_SPDDET) ? 100 : 10;
2039 case CTL_SMC_LNKFAIL:
2040 *valp = (lp->lastPhy18 & PHY_INT_LNKFAIL) ? 1 : 0;
2044 *valp = (lp->rpc_cur_mode >> RPC_LSXA_SHFT) & (word)0x0007;
2048 *valp = (lp->rpc_cur_mode >> RPC_LSXB_SHFT) & (word)0x0007;
2052 *valp = smc_get_regbit(1, ioaddr, CONFIG_REG, CONFIG_EXT_PHY);
2056 case CTL_SMC_REG_BSR: // Bank Select
2057 *valp = smc_get_reg(0, ioaddr, BSR_REG);
2060 case CTL_SMC_REG_TCR: // Transmit Control
2061 *valp = smc_get_reg(0, ioaddr, TCR_REG);
2064 case CTL_SMC_REG_ESR: // EPH Status
2065 *valp = smc_get_reg(0, ioaddr, EPH_STATUS_REG);
2068 case CTL_SMC_REG_RCR: // Receive Control
2069 *valp = smc_get_reg(0, ioaddr, RCR_REG);
2072 case CTL_SMC_REG_CTRR: // Counter
2073 *valp = smc_get_reg(0, ioaddr, COUNTER_REG);
2076 case CTL_SMC_REG_MIR: // Memory Information
2077 *valp = smc_get_reg(0, ioaddr, MIR_REG);
2080 case CTL_SMC_REG_RPCR: // Receive/Phy Control
2081 *valp = smc_get_reg(0, ioaddr, RPC_REG);
2084 case CTL_SMC_REG_CFGR: // Configuration
2085 *valp = smc_get_reg(1, ioaddr, CONFIG_REG);
2088 case CTL_SMC_REG_BAR: // Base Address
2089 *valp = smc_get_reg(1, ioaddr, BASE_REG);
2092 case CTL_SMC_REG_IAR0: // Individual Address
2093 *valp = smc_get_reg(1, ioaddr, ADDR0_REG);
2096 case CTL_SMC_REG_IAR1: // Individual Address
2097 *valp = smc_get_reg(1, ioaddr, ADDR1_REG);
2100 case CTL_SMC_REG_IAR2: // Individual Address
2101 *valp = smc_get_reg(1, ioaddr, ADDR2_REG);
2104 case CTL_SMC_REG_GPR: // General Purpose
2105 *valp = smc_get_reg(1, ioaddr, GP_REG);
2108 case CTL_SMC_REG_CTLR: // Control
2109 *valp = smc_get_reg(1, ioaddr, CTL_REG);
2112 case CTL_SMC_REG_MCR: // MMU Command
2113 *valp = smc_get_reg(2, ioaddr, MMU_CMD_REG);
2116 case CTL_SMC_REG_PNR: // Packet Number
2117 *valp = smc_get_reg(2, ioaddr, PN_REG);
2120 case CTL_SMC_REG_FPR: // Allocation Result/FIFO Ports
2121 *valp = smc_get_reg(2, ioaddr, RXFIFO_REG);
2124 case CTL_SMC_REG_PTR: // Pointer
2125 *valp = smc_get_reg(2, ioaddr, PTR_REG);
2128 case CTL_SMC_REG_DR: // Data
2129 *valp = smc_get_reg(2, ioaddr, DATA_REG);
2132 case CTL_SMC_REG_ISR: // Interrupt Status/Mask
2133 *valp = smc_get_reg(2, ioaddr, INT_REG);
2136 case CTL_SMC_REG_MTR1: // Multicast Table Entry 1
2137 *valp = smc_get_reg(3, ioaddr, MCAST_REG1);
2140 case CTL_SMC_REG_MTR2: // Multicast Table Entry 2
2141 *valp = smc_get_reg(3, ioaddr, MCAST_REG2);
2144 case CTL_SMC_REG_MTR3: // Multicast Table Entry 3
2145 *valp = smc_get_reg(3, ioaddr, MCAST_REG3);
2148 case CTL_SMC_REG_MTR4: // Multicast Table Entry 4
2149 *valp = smc_get_reg(3, ioaddr, MCAST_REG4);
2152 case CTL_SMC_REG_MIIR: // Management Interface
2153 *valp = smc_get_reg(3, ioaddr, MII_REG);
2156 case CTL_SMC_REG_REVR: // Revision
2157 *valp = smc_get_reg(3, ioaddr, REV_REG);
2160 case CTL_SMC_REG_ERCVR: // Early RCV
2161 *valp = smc_get_reg(3, ioaddr, ERCV_REG);
2164 case CTL_SMC_REG_EXTR: // External
2165 *valp = smc_get_reg(7, ioaddr, EXT_REG);
2168 case CTL_SMC_PHY_CTRL:
2169 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2173 case CTL_SMC_PHY_STAT:
2174 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2178 case CTL_SMC_PHY_ID1:
2179 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2183 case CTL_SMC_PHY_ID2:
2184 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2188 case CTL_SMC_PHY_ADC:
2189 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2193 case CTL_SMC_PHY_REMC:
2194 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2198 case CTL_SMC_PHY_CFG1:
2199 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2203 case CTL_SMC_PHY_CFG2:
2204 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2208 case CTL_SMC_PHY_INT:
2209 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2213 case CTL_SMC_PHY_MASK:
2214 *valp = smc_read_phy_register(ioaddr, lp->phyaddr,
2218 #endif // SMC_DEBUG > 1
2221 // Just ignore unsupported parameters
2228 // Perform the generic integer operation
2229 if ((ret = proc_dointvec(ctl, write, filp, buffer, lenp)) != 0)
2232 // Write changes out to the registers
2233 if (write && *valp != val) {
2236 switch (ctl->ctl_name) {
2238 case CTL_SMC_SWFDUP:
2240 lp->tcr_cur_mode |= TCR_SWFDUP;
2242 lp->tcr_cur_mode &= ~TCR_SWFDUP;
2244 smc_modify_regbit(0, ioaddr, TCR_REG, TCR_SWFDUP, val);
2247 case CTL_SMC_EPHLOOP:
2249 lp->tcr_cur_mode |= TCR_EPH_LOOP;
2251 lp->tcr_cur_mode &= ~TCR_EPH_LOOP;
2253 smc_modify_regbit(0, ioaddr, TCR_REG, TCR_EPH_LOOP, val);
2256 case CTL_SMC_FORCOL:
2258 lp->tcr_cur_mode |= TCR_FORCOL;
2260 lp->tcr_cur_mode &= ~TCR_FORCOL;
2262 // Update the EPH block
2263 smc_modify_regbit(0, ioaddr, TCR_REG, TCR_FORCOL, val);
2266 case CTL_SMC_FILTCAR:
2268 lp->rcr_cur_mode |= RCR_FILT_CAR;
2270 lp->rcr_cur_mode &= ~RCR_FILT_CAR;
2272 // Update the EPH block
2273 smc_modify_regbit(0, ioaddr, RCR_REG, RCR_FILT_CAR, val);
2276 case CTL_SMC_RFDUPLX:
2277 // Disallow changes if in auto-negotiation mode
2278 if (lp->ctl_autoneg)
2282 lp->rpc_cur_mode |= RPC_DPLX;
2284 lp->rpc_cur_mode &= ~RPC_DPLX;
2286 // Reconfigure the PHY
2287 smc_phy_configure(dev);
2291 case CTL_SMC_RSPEED:
2292 // Disallow changes if in auto-negotiation mode
2293 if (lp->ctl_autoneg)
2297 lp->rpc_cur_mode |= RPC_SPEED;
2299 lp->rpc_cur_mode &= ~RPC_SPEED;
2301 // Reconfigure the PHY
2302 smc_phy_configure(dev);
2306 case CTL_SMC_AUTONEG:
2308 lp->rpc_cur_mode |= RPC_ANEG;
2310 lp->rpc_cur_mode &= ~RPC_ANEG;
2312 // Reconfigure the PHY
2313 smc_phy_configure(dev);
2318 val &= 0x07; // Restrict to 3 ls bits
2319 lp->rpc_cur_mode &= ~(word)(0x07<<RPC_LSXA_SHFT);
2320 lp->rpc_cur_mode |= (word)(val<<RPC_LSXA_SHFT);
2322 // Update the Internal PHY block
2323 smc_modify_reg(0, ioaddr, RPC_REG, lp->rpc_cur_mode);
2327 val &= 0x07; // Restrict to 3 ls bits
2328 lp->rpc_cur_mode &= ~(word)(0x07<<RPC_LSXB_SHFT);
2329 lp->rpc_cur_mode |= (word)(val<<RPC_LSXB_SHFT);
2331 // Update the Internal PHY block
2332 smc_modify_reg(0, ioaddr, RPC_REG, lp->rpc_cur_mode);
2336 // Update the Internal PHY block
2337 smc_modify_regbit(1, ioaddr, CONFIG_REG,
2338 CONFIG_EXT_PHY, val);
2342 case CTL_SMC_REG_BSR: // Bank Select
2343 smc_modify_reg(0, ioaddr, BSR_REG, val);
2346 case CTL_SMC_REG_TCR: // Transmit Control
2347 smc_modify_reg(0, ioaddr, TCR_REG, val);
2350 case CTL_SMC_REG_ESR: // EPH Status
2351 smc_modify_reg(0, ioaddr, EPH_STATUS_REG, val);
2354 case CTL_SMC_REG_RCR: // Receive Control
2355 smc_modify_reg(0, ioaddr, RCR_REG, val);
2358 case CTL_SMC_REG_CTRR: // Counter
2359 smc_modify_reg(0, ioaddr, COUNTER_REG, val);
2362 case CTL_SMC_REG_MIR: // Memory Information
2363 smc_modify_reg(0, ioaddr, MIR_REG, val);
2366 case CTL_SMC_REG_RPCR: // Receive/Phy Control
2367 smc_modify_reg(0, ioaddr, RPC_REG, val);
2370 case CTL_SMC_REG_CFGR: // Configuration
2371 smc_modify_reg(1, ioaddr, CONFIG_REG, val);
2374 case CTL_SMC_REG_BAR: // Base Address
2375 smc_modify_reg(1, ioaddr, BASE_REG, val);
2378 case CTL_SMC_REG_IAR0: // Individual Address
2379 smc_modify_reg(1, ioaddr, ADDR0_REG, val);
2382 case CTL_SMC_REG_IAR1: // Individual Address
2383 smc_modify_reg(1, ioaddr, ADDR1_REG, val);
2386 case CTL_SMC_REG_IAR2: // Individual Address
2387 smc_modify_reg(1, ioaddr, ADDR2_REG, val);
2390 case CTL_SMC_REG_GPR: // General Purpose
2391 smc_modify_reg(1, ioaddr, GP_REG, val);
2394 case CTL_SMC_REG_CTLR: // Control
2395 smc_modify_reg(1, ioaddr, CTL_REG, val);
2398 case CTL_SMC_REG_MCR: // MMU Command
2399 smc_modify_reg(2, ioaddr, MMU_CMD_REG, val);
2402 case CTL_SMC_REG_PNR: // Packet Number
2403 smc_modify_reg(2, ioaddr, PN_REG, val);
2406 case CTL_SMC_REG_FPR: // Allocation Result/FIFO Ports
2407 smc_modify_reg(2, ioaddr, RXFIFO_REG, val);
2410 case CTL_SMC_REG_PTR: // Pointer
2411 smc_modify_reg(2, ioaddr, PTR_REG, val);
2414 case CTL_SMC_REG_DR: // Data
2415 smc_modify_reg(2, ioaddr, DATA_REG, val);
2418 case CTL_SMC_REG_ISR: // Interrupt Status/Mask
2419 smc_modify_reg(2, ioaddr, INT_REG, val);
2422 case CTL_SMC_REG_MTR1: // Multicast Table Entry 1
2423 smc_modify_reg(3, ioaddr, MCAST_REG1, val);
2426 case CTL_SMC_REG_MTR2: // Multicast Table Entry 2
2427 smc_modify_reg(3, ioaddr, MCAST_REG2, val);
2430 case CTL_SMC_REG_MTR3: // Multicast Table Entry 3
2431 smc_modify_reg(3, ioaddr, MCAST_REG3, val);
2434 case CTL_SMC_REG_MTR4: // Multicast Table Entry 4
2435 smc_modify_reg(3, ioaddr, MCAST_REG4, val);
2438 case CTL_SMC_REG_MIIR: // Management Interface
2439 smc_modify_reg(3, ioaddr, MII_REG, val);
2442 case CTL_SMC_REG_REVR: // Revision
2443 smc_modify_reg(3, ioaddr, REV_REG, val);
2446 case CTL_SMC_REG_ERCVR: // Early RCV
2447 smc_modify_reg(3, ioaddr, ERCV_REG, val);
2450 case CTL_SMC_REG_EXTR: // External
2451 smc_modify_reg(7, ioaddr, EXT_REG, val);
2454 case CTL_SMC_PHY_CTRL:
2455 smc_write_phy_register(ioaddr, lp->phyaddr,
2459 case CTL_SMC_PHY_STAT:
2460 smc_write_phy_register(ioaddr, lp->phyaddr,
2464 case CTL_SMC_PHY_ID1:
2465 smc_write_phy_register(ioaddr, lp->phyaddr,
2469 case CTL_SMC_PHY_ID2:
2470 smc_write_phy_register(ioaddr, lp->phyaddr,
2474 case CTL_SMC_PHY_ADC:
2475 smc_write_phy_register(ioaddr, lp->phyaddr,
2479 case CTL_SMC_PHY_REMC:
2480 smc_write_phy_register(ioaddr, lp->phyaddr,
2484 case CTL_SMC_PHY_CFG1:
2485 smc_write_phy_register(ioaddr, lp->phyaddr,
2489 case CTL_SMC_PHY_CFG2:
2490 smc_write_phy_register(ioaddr, lp->phyaddr,
2494 case CTL_SMC_PHY_INT:
2495 smc_write_phy_register(ioaddr, lp->phyaddr,
2499 case CTL_SMC_PHY_MASK:
2500 smc_write_phy_register(ioaddr, lp->phyaddr,
2504 #endif // SMC_DEBUG > 1
2507 // Just ignore unsupported parameters
2519 * This is called as the fill_inode function when an inode
2520 * is going into (fill = 1) or out of service (fill = 0).
2521 * We use it here to manage the module use counts.
2523 * Note: only the top-level directory needs to do this; if
2524 * a lower level is referenced, the parent will be as well.
2526 static void smc_procfs_modcount(struct inode *inode, int fill)
2535 /*------------------------------------------------------------
2536 . Sysctl registration function for all parameters (files)
2537 .-------------------------------------------------------------*/
2538 static void smc_sysctl_register(struct net_device *dev)
2540 struct smc_local *lp = (struct smc_local *)dev->priv;
2541 static int ctl_name = CTL_SMC;
2545 // Make sure the ctl_tables start out as all zeros
2546 memset(lp->root_table, 0, sizeof lp->root_table);
2547 memset(lp->eth_table, 0, sizeof lp->eth_table);
2548 memset(lp->param_table, 0, sizeof lp->param_table);
2550 // Initialize the root table
2551 ct = lp->root_table;
2552 ct->ctl_name = CTL_DEV;
2553 ct->procname = "dev";
2556 ct->child = lp->eth_table;
2557 // remaining fields are zero
2559 // Initialize the ethX table (this device's table)
2561 ct->ctl_name = ctl_name++; // Must be unique
2562 ct->procname = dev->name;
2565 ct->child = lp->param_table;
2566 // remaining fields are zero
2568 // Initialize the parameter (files) table
2569 // Make sure the last entry remains null
2570 ct = lp->param_table;
2571 for (i = 0; i < (CTL_SMC_LAST_ENTRY-1); ++i) {
2572 // Initialize fields common to all table entries
2573 ct[i].proc_handler = smc_sysctl_handler;
2574 ct[i].extra1 = (void*)dev; // Save our device pointer
2575 ct[i].extra2 = (void*)lp; // Save our smc_local data pointer
2578 // INFO - this is our only string parameter
2580 ct[i].proc_handler = proc_dostring; // use default handler
2581 ct[i].ctl_name = CTL_SMC_INFO;
2582 ct[i].procname = "info";
2583 ct[i].data = (void*)smc_info_string;
2584 ct[i].maxlen = sizeof smc_info_string;
2585 ct[i].mode = 0444; // Read only
2589 ct[i].proc_handler = proc_dostring; // use default handler
2590 ct[i].ctl_name = CTL_SMC_SWVER;
2591 ct[i].procname = "swver";
2592 ct[i].data = (void*)version;
2593 ct[i].maxlen = sizeof version;
2594 ct[i].mode = 0444; // Read only
2598 ct[i].ctl_name = CTL_SMC_SWFDUP;
2599 ct[i].procname = "swfdup";
2600 ct[i].data = (void*)&(lp->ctl_swfdup);
2601 ct[i].maxlen = sizeof lp->ctl_swfdup;
2602 ct[i].mode = 0644; // Read by all, write by root
2606 ct[i].ctl_name = CTL_SMC_EPHLOOP;
2607 ct[i].procname = "ephloop";
2608 ct[i].data = (void*)&(lp->ctl_ephloop);
2609 ct[i].maxlen = sizeof lp->ctl_ephloop;
2610 ct[i].mode = 0644; // Read by all, write by root
2614 ct[i].ctl_name = CTL_SMC_MIIOP;
2615 ct[i].procname = "miiop";
2616 ct[i].data = (void*)&(lp->ctl_miiop);
2617 ct[i].maxlen = sizeof lp->ctl_miiop;
2618 ct[i].mode = 0644; // Read by all, write by root
2622 ct[i].ctl_name = CTL_SMC_AUTONEG;
2623 ct[i].procname = "autoneg";
2624 ct[i].data = (void*)&(lp->ctl_autoneg);
2625 ct[i].maxlen = sizeof lp->ctl_autoneg;
2626 ct[i].mode = 0644; // Read by all, write by root
2630 ct[i].ctl_name = CTL_SMC_RFDUPLX;
2631 ct[i].procname = "rfduplx";
2632 ct[i].data = (void*)&(lp->ctl_rfduplx);
2633 ct[i].maxlen = sizeof lp->ctl_rfduplx;
2634 ct[i].mode = 0644; // Read by all, write by root
2638 ct[i].ctl_name = CTL_SMC_RSPEED;
2639 ct[i].procname = "rspeed";
2640 ct[i].data = (void*)&(lp->ctl_rspeed);
2641 ct[i].maxlen = sizeof lp->ctl_rspeed;
2642 ct[i].mode = 0644; // Read by all, write by root
2646 ct[i].ctl_name = CTL_SMC_AFDUPLX;
2647 ct[i].procname = "afduplx";
2648 ct[i].data = (void*)&(lp->ctl_afduplx);
2649 ct[i].maxlen = sizeof lp->ctl_afduplx;
2650 ct[i].mode = 0444; // Read only
2654 ct[i].ctl_name = CTL_SMC_ASPEED;
2655 ct[i].procname = "aspeed";
2656 ct[i].data = (void*)&(lp->ctl_aspeed);
2657 ct[i].maxlen = sizeof lp->ctl_aspeed;
2658 ct[i].mode = 0444; // Read only
2662 ct[i].ctl_name = CTL_SMC_LNKFAIL;
2663 ct[i].procname = "lnkfail";
2664 ct[i].data = (void*)&(lp->ctl_lnkfail);
2665 ct[i].maxlen = sizeof lp->ctl_lnkfail;
2666 ct[i].mode = 0444; // Read only
2670 ct[i].ctl_name = CTL_SMC_FORCOL;
2671 ct[i].procname = "forcol";
2672 ct[i].data = (void*)&(lp->ctl_forcol);
2673 ct[i].maxlen = sizeof lp->ctl_forcol;
2674 ct[i].mode = 0644; // Read by all, write by root
2678 ct[i].ctl_name = CTL_SMC_FILTCAR;
2679 ct[i].procname = "filtcar";
2680 ct[i].data = (void*)&(lp->ctl_filtcar);
2681 ct[i].maxlen = sizeof lp->ctl_filtcar;
2682 ct[i].mode = 0644; // Read by all, write by root
2686 ct[i].ctl_name = CTL_SMC_FREEMEM;
2687 ct[i].procname = "freemem";
2688 ct[i].data = (void*)&(lp->ctl_freemem);
2689 ct[i].maxlen = sizeof lp->ctl_freemem;
2690 ct[i].mode = 0444; // Read only
2694 ct[i].ctl_name = CTL_SMC_TOTMEM;
2695 ct[i].procname = "totmem";
2696 ct[i].data = (void*)&(lp->ctl_totmem);
2697 ct[i].maxlen = sizeof lp->ctl_totmem;
2698 ct[i].mode = 0444; // Read only
2702 ct[i].ctl_name = CTL_SMC_LEDA;
2703 ct[i].procname = "leda";
2704 ct[i].data = (void*)&(lp->ctl_leda);
2705 ct[i].maxlen = sizeof lp->ctl_leda;
2706 ct[i].mode = 0644; // Read by all, write by root
2710 ct[i].ctl_name = CTL_SMC_LEDB;
2711 ct[i].procname = "ledb";
2712 ct[i].data = (void*)&(lp->ctl_ledb);
2713 ct[i].maxlen = sizeof lp->ctl_ledb;
2714 ct[i].mode = 0644; // Read by all, write by root
2718 ct[i].ctl_name = CTL_SMC_CHIPREV;
2719 ct[i].procname = "chiprev";
2720 ct[i].data = (void*)&(lp->ctl_chiprev);
2721 ct[i].maxlen = sizeof lp->ctl_chiprev;
2722 ct[i].mode = 0444; // Read only
2727 ct[i].ctl_name = CTL_SMC_REG_BSR;
2728 ct[i].procname = "reg_bsr";
2729 ct[i].data = (void*)&(lp->ctl_reg_bsr);
2730 ct[i].maxlen = sizeof lp->ctl_reg_bsr;
2731 ct[i].mode = 0644; // Read by all, write by root
2735 ct[i].ctl_name = CTL_SMC_REG_TCR;
2736 ct[i].procname = "reg_tcr";
2737 ct[i].data = (void*)&(lp->ctl_reg_tcr);
2738 ct[i].maxlen = sizeof lp->ctl_reg_tcr;
2739 ct[i].mode = 0644; // Read by all, write by root
2743 ct[i].ctl_name = CTL_SMC_REG_ESR;
2744 ct[i].procname = "reg_esr";
2745 ct[i].data = (void*)&(lp->ctl_reg_esr);
2746 ct[i].maxlen = sizeof lp->ctl_reg_esr;
2747 ct[i].mode = 0644; // Read by all, write by root
2751 ct[i].ctl_name = CTL_SMC_REG_RCR;
2752 ct[i].procname = "reg_rcr";
2753 ct[i].data = (void*)&(lp->ctl_reg_rcr);
2754 ct[i].maxlen = sizeof lp->ctl_reg_rcr;
2755 ct[i].mode = 0644; // Read by all, write by root
2759 ct[i].ctl_name = CTL_SMC_REG_CTRR;
2760 ct[i].procname = "reg_ctrr";
2761 ct[i].data = (void*)&(lp->ctl_reg_ctrr);
2762 ct[i].maxlen = sizeof lp->ctl_reg_ctrr;
2763 ct[i].mode = 0644; // Read by all, write by root
2767 ct[i].ctl_name = CTL_SMC_REG_MIR;
2768 ct[i].procname = "reg_mir";
2769 ct[i].data = (void*)&(lp->ctl_reg_mir);
2770 ct[i].maxlen = sizeof lp->ctl_reg_mir;
2771 ct[i].mode = 0644; // Read by all, write by root
2775 ct[i].ctl_name = CTL_SMC_REG_RPCR;
2776 ct[i].procname = "reg_rpcr";
2777 ct[i].data = (void*)&(lp->ctl_reg_rpcr);
2778 ct[i].maxlen = sizeof lp->ctl_reg_rpcr;
2779 ct[i].mode = 0644; // Read by all, write by root
2783 ct[i].ctl_name = CTL_SMC_REG_CFGR;
2784 ct[i].procname = "reg_cfgr";
2785 ct[i].data = (void*)&(lp->ctl_reg_cfgr);
2786 ct[i].maxlen = sizeof lp->ctl_reg_cfgr;
2787 ct[i].mode = 0644; // Read by all, write by root
2791 ct[i].ctl_name = CTL_SMC_REG_BAR;
2792 ct[i].procname = "reg_bar";
2793 ct[i].data = (void*)&(lp->ctl_reg_bar);
2794 ct[i].maxlen = sizeof lp->ctl_reg_bar;
2795 ct[i].mode = 0644; // Read by all, write by root
2799 ct[i].ctl_name = CTL_SMC_REG_IAR0;
2800 ct[i].procname = "reg_iar0";
2801 ct[i].data = (void*)&(lp->ctl_reg_iar0);
2802 ct[i].maxlen = sizeof lp->ctl_reg_iar0;
2803 ct[i].mode = 0644; // Read by all, write by root
2807 ct[i].ctl_name = CTL_SMC_REG_IAR1;
2808 ct[i].procname = "reg_iar1";
2809 ct[i].data = (void*)&(lp->ctl_reg_iar1);
2810 ct[i].maxlen = sizeof lp->ctl_reg_iar1;
2811 ct[i].mode = 0644; // Read by all, write by root
2815 ct[i].ctl_name = CTL_SMC_REG_IAR2;
2816 ct[i].procname = "reg_iar2";
2817 ct[i].data = (void*)&(lp->ctl_reg_iar2);
2818 ct[i].maxlen = sizeof lp->ctl_reg_iar2;
2819 ct[i].mode = 0644; // Read by all, write by root
2823 ct[i].ctl_name = CTL_SMC_REG_GPR;
2824 ct[i].procname = "reg_gpr";
2825 ct[i].data = (void*)&(lp->ctl_reg_gpr);
2826 ct[i].maxlen = sizeof lp->ctl_reg_gpr;
2827 ct[i].mode = 0644; // Read by all, write by root
2831 ct[i].ctl_name = CTL_SMC_REG_CTLR;
2832 ct[i].procname = "reg_ctlr";
2833 ct[i].data = (void*)&(lp->ctl_reg_ctlr);
2834 ct[i].maxlen = sizeof lp->ctl_reg_ctlr;
2835 ct[i].mode = 0644; // Read by all, write by root
2839 ct[i].ctl_name = CTL_SMC_REG_MCR;
2840 ct[i].procname = "reg_mcr";
2841 ct[i].data = (void*)&(lp->ctl_reg_mcr);
2842 ct[i].maxlen = sizeof lp->ctl_reg_mcr;
2843 ct[i].mode = 0644; // Read by all, write by root
2847 ct[i].ctl_name = CTL_SMC_REG_PNR;
2848 ct[i].procname = "reg_pnr";
2849 ct[i].data = (void*)&(lp->ctl_reg_pnr);
2850 ct[i].maxlen = sizeof lp->ctl_reg_pnr;
2851 ct[i].mode = 0644; // Read by all, write by root
2855 ct[i].ctl_name = CTL_SMC_REG_FPR;
2856 ct[i].procname = "reg_fpr";
2857 ct[i].data = (void*)&(lp->ctl_reg_fpr);
2858 ct[i].maxlen = sizeof lp->ctl_reg_fpr;
2859 ct[i].mode = 0644; // Read by all, write by root
2863 ct[i].ctl_name = CTL_SMC_REG_PTR;
2864 ct[i].procname = "reg_ptr";
2865 ct[i].data = (void*)&(lp->ctl_reg_ptr);
2866 ct[i].maxlen = sizeof lp->ctl_reg_ptr;
2867 ct[i].mode = 0644; // Read by all, write by root
2871 ct[i].ctl_name = CTL_SMC_REG_DR;
2872 ct[i].procname = "reg_dr";
2873 ct[i].data = (void*)&(lp->ctl_reg_dr);
2874 ct[i].maxlen = sizeof lp->ctl_reg_dr;
2875 ct[i].mode = 0644; // Read by all, write by root
2879 ct[i].ctl_name = CTL_SMC_REG_ISR;
2880 ct[i].procname = "reg_isr";
2881 ct[i].data = (void*)&(lp->ctl_reg_isr);
2882 ct[i].maxlen = sizeof lp->ctl_reg_isr;
2883 ct[i].mode = 0644; // Read by all, write by root
2887 ct[i].ctl_name = CTL_SMC_REG_MTR1;
2888 ct[i].procname = "reg_mtr1";
2889 ct[i].data = (void*)&(lp->ctl_reg_mtr1);
2890 ct[i].maxlen = sizeof lp->ctl_reg_mtr1;
2891 ct[i].mode = 0644; // Read by all, write by root
2895 ct[i].ctl_name = CTL_SMC_REG_MTR2;
2896 ct[i].procname = "reg_mtr2";
2897 ct[i].data = (void*)&(lp->ctl_reg_mtr2);
2898 ct[i].maxlen = sizeof lp->ctl_reg_mtr2;
2899 ct[i].mode = 0644; // Read by all, write by root
2903 ct[i].ctl_name = CTL_SMC_REG_MTR3;
2904 ct[i].procname = "reg_mtr3";
2905 ct[i].data = (void*)&(lp->ctl_reg_mtr3);
2906 ct[i].maxlen = sizeof lp->ctl_reg_mtr3;
2907 ct[i].mode = 0644; // Read by all, write by root
2911 ct[i].ctl_name = CTL_SMC_REG_MTR4;
2912 ct[i].procname = "reg_mtr4";
2913 ct[i].data = (void*)&(lp->ctl_reg_mtr4);
2914 ct[i].maxlen = sizeof lp->ctl_reg_mtr4;
2915 ct[i].mode = 0644; // Read by all, write by root
2919 ct[i].ctl_name = CTL_SMC_REG_MIIR;
2920 ct[i].procname = "reg_miir";
2921 ct[i].data = (void*)&(lp->ctl_reg_miir);
2922 ct[i].maxlen = sizeof lp->ctl_reg_miir;
2923 ct[i].mode = 0644; // Read by all, write by root
2927 ct[i].ctl_name = CTL_SMC_REG_REVR;
2928 ct[i].procname = "reg_revr";
2929 ct[i].data = (void*)&(lp->ctl_reg_revr);
2930 ct[i].maxlen = sizeof lp->ctl_reg_revr;
2931 ct[i].mode = 0644; // Read by all, write by root
2935 ct[i].ctl_name = CTL_SMC_REG_ERCVR;
2936 ct[i].procname = "reg_ercvr";
2937 ct[i].data = (void*)&(lp->ctl_reg_ercvr);
2938 ct[i].maxlen = sizeof lp->ctl_reg_ercvr;
2939 ct[i].mode = 0644; // Read by all, write by root
2943 ct[i].ctl_name = CTL_SMC_REG_EXTR;
2944 ct[i].procname = "reg_extr";
2945 ct[i].data = (void*)&(lp->ctl_reg_extr);
2946 ct[i].maxlen = sizeof lp->ctl_reg_extr;
2947 ct[i].mode = 0644; // Read by all, write by root
2951 ct[i].ctl_name = CTL_SMC_PHY_CTRL;
2952 ct[i].procname = "phy_ctrl";
2953 ct[i].data = (void*)&(lp->ctl_phy_ctrl);
2954 ct[i].maxlen = sizeof lp->ctl_phy_ctrl;
2955 ct[i].mode = 0644; // Read by all, write by root
2959 ct[i].ctl_name = CTL_SMC_PHY_STAT;
2960 ct[i].procname = "phy_stat";
2961 ct[i].data = (void*)&(lp->ctl_phy_stat);
2962 ct[i].maxlen = sizeof lp->ctl_phy_stat;
2963 ct[i].mode = 0644; // Read by all, write by root
2967 ct[i].ctl_name = CTL_SMC_PHY_ID1;
2968 ct[i].procname = "phy_id1";
2969 ct[i].data = (void*)&(lp->ctl_phy_id1);
2970 ct[i].maxlen = sizeof lp->ctl_phy_id1;
2971 ct[i].mode = 0644; // Read by all, write by root
2975 ct[i].ctl_name = CTL_SMC_PHY_ID2;
2976 ct[i].procname = "phy_id2";
2977 ct[i].data = (void*)&(lp->ctl_phy_id2);
2978 ct[i].maxlen = sizeof lp->ctl_phy_id2;
2979 ct[i].mode = 0644; // Read by all, write by root
2981 // PHY Advertise Capabilities
2983 ct[i].ctl_name = CTL_SMC_PHY_ADC;
2984 ct[i].procname = "phy_adc";
2985 ct[i].data = (void*)&(lp->ctl_phy_adc);
2986 ct[i].maxlen = sizeof lp->ctl_phy_adc;
2987 ct[i].mode = 0644; // Read by all, write by root
2989 // PHY Remote Capabilities
2991 ct[i].ctl_name = CTL_SMC_PHY_REMC;
2992 ct[i].procname = "phy_remc";
2993 ct[i].data = (void*)&(lp->ctl_phy_remc);
2994 ct[i].maxlen = sizeof lp->ctl_phy_remc;
2995 ct[i].mode = 0644; // Read by all, write by root
2997 // PHY Configuration 1
2999 ct[i].ctl_name = CTL_SMC_PHY_CFG1;
3000 ct[i].procname = "phy_cfg1";
3001 ct[i].data = (void*)&(lp->ctl_phy_cfg1);
3002 ct[i].maxlen = sizeof lp->ctl_phy_cfg1;
3003 ct[i].mode = 0644; // Read by all, write by root
3005 // PHY Configuration 2
3007 ct[i].ctl_name = CTL_SMC_PHY_CFG2;
3008 ct[i].procname = "phy_cfg2";
3009 ct[i].data = (void*)&(lp->ctl_phy_cfg2);
3010 ct[i].maxlen = sizeof lp->ctl_phy_cfg2;
3011 ct[i].mode = 0644; // Read by all, write by root
3013 // PHY Interrupt/Status Output
3015 ct[i].ctl_name = CTL_SMC_PHY_INT;
3016 ct[i].procname = "phy_int";
3017 ct[i].data = (void*)&(lp->ctl_phy_int);
3018 ct[i].maxlen = sizeof lp->ctl_phy_int;
3019 ct[i].mode = 0644; // Read by all, write by root
3021 // PHY Interrupt/Status Mask
3023 ct[i].ctl_name = CTL_SMC_PHY_MASK;
3024 ct[i].procname = "phy_mask";
3025 ct[i].data = (void*)&(lp->ctl_phy_mask);
3026 ct[i].maxlen = sizeof lp->ctl_phy_mask;
3027 ct[i].mode = 0644; // Read by all, write by root
3029 #endif // SMC_DEBUG > 1
3031 // Register /proc/sys/dev/ethX
3032 lp->sysctl_header = register_sysctl_table(lp->root_table, 1);
3035 // Register our modcount function which adjusts the module count
3036 lp->root_table->child->de->fill_inode = smc_procfs_modcount;
3042 /*------------------------------------------------------------
3043 . Sysctl unregistration when driver is closed
3044 .-------------------------------------------------------------*/
3045 static void smc_sysctl_unregister(struct net_device *dev)
3047 struct smc_local *lp = (struct smc_local *)dev->priv;
3049 unregister_sysctl_table(lp->sysctl_header);
3052 #endif /* endif CONFIG_SYSCTL */
3055 //---PHY CONTROL AND CONFIGURATION-----------------------------------------
3057 #if (SMC_DEBUG > 2 )
3059 /*------------------------------------------------------------
3060 . Debugging function for viewing MII Management serial bitstream
3061 .-------------------------------------------------------------*/
3062 static void smc_dump_mii_stream(byte* bits, int size)
3067 for (i = 0; i < size; ++i)
3071 for (i = 0; i < size; ++i) {
3072 if (bits[i] & MII_MDOE)
3079 for (i = 0; i < size; ++i) {
3080 if (bits[i] & MII_MDO)
3087 for (i = 0; i < size; ++i) {
3088 if (bits[i] & MII_MDI)
3098 /*------------------------------------------------------------
3099 . Reads a register from the MII Management serial interface
3100 .-------------------------------------------------------------*/
3101 static word smc_read_phy_register(unsigned long ioaddr,
3102 byte phyaddr, byte phyreg)
3113 // 32 consecutive ones on MDO to establish sync
3114 for (i = 0; i < 32; ++i)
3115 bits[clk_idx++] = MII_MDOE | MII_MDO;
3118 bits[clk_idx++] = MII_MDOE;
3119 bits[clk_idx++] = MII_MDOE | MII_MDO;
3121 // Read command <10>
3122 bits[clk_idx++] = MII_MDOE | MII_MDO;
3123 bits[clk_idx++] = MII_MDOE;
3125 // Output the PHY address, msb first
3127 for (i = 0; i < 5; ++i) {
3129 bits[clk_idx++] = MII_MDOE | MII_MDO;
3131 bits[clk_idx++] = MII_MDOE;
3133 // Shift to next lowest bit
3137 // Output the phy register number, msb first
3139 for (i = 0; i < 5; ++i) {
3141 bits[clk_idx++] = MII_MDOE | MII_MDO;
3143 bits[clk_idx++] = MII_MDOE;
3145 // Shift to next lowest bit
3149 // Tristate and turnaround (2 bit times)
3150 bits[clk_idx++] = 0;
3151 //bits[clk_idx++] = 0;
3153 // Input starts at this bit time
3154 input_idx = clk_idx;
3156 // Will input 16 bits
3157 for (i = 0; i < 16; ++i)
3158 bits[clk_idx++] = 0;
3161 bits[clk_idx++] = 0;
3163 // Save the current bank
3164 oldBank = SMC_CURRENT_BANK();
3167 SMC_SELECT_BANK( 3 );
3169 // Get the current MII register value
3170 mii_reg = SMC_GET_MII();
3172 // Turn off all MII Interface bits
3173 mii_reg &= ~(MII_MDOE|MII_MCLK|MII_MDI|MII_MDO);
3175 // Clock all 64 cycles
3176 for (i = 0; i < sizeof bits; ++i) {
3177 // Clock Low - output data
3178 SMC_SET_MII( mii_reg | bits[i] );
3182 // Clock Hi - input data
3183 SMC_SET_MII( mii_reg | bits[i] | MII_MCLK );
3185 bits[i] |= SMC_GET_MII() & MII_MDI;
3188 // Return to idle state
3189 // Set clock to low, data to low, and output tristated
3190 SMC_SET_MII( mii_reg );
3193 // Restore original bank select
3194 SMC_SELECT_BANK( oldBank );
3196 // Recover input data
3198 for (i = 0; i < 16; ++i) {
3201 if (bits[input_idx++] & MII_MDI)
3205 #if (SMC_DEBUG > 2 )
3206 printk("smc_read_phy_register(): phyaddr=%x,phyreg=%x,phydata=%x\n",
3207 phyaddr, phyreg, phydata);
3208 smc_dump_mii_stream(bits, sizeof bits);
3215 /*------------------------------------------------------------
3216 . Writes a register to the MII Management serial interface
3217 .-------------------------------------------------------------*/
3218 static void smc_write_phy_register(unsigned long ioaddr,
3219 byte phyaddr, byte phyreg, word phydata)
3228 // 32 consecutive ones on MDO to establish sync
3229 for (i = 0; i < 32; ++i)
3230 bits[clk_idx++] = MII_MDOE | MII_MDO;
3233 bits[clk_idx++] = MII_MDOE;
3234 bits[clk_idx++] = MII_MDOE | MII_MDO;
3236 // Write command <01>
3237 bits[clk_idx++] = MII_MDOE;
3238 bits[clk_idx++] = MII_MDOE | MII_MDO;
3240 // Output the PHY address, msb first
3242 for (i = 0; i < 5; ++i) {
3244 bits[clk_idx++] = MII_MDOE | MII_MDO;
3246 bits[clk_idx++] = MII_MDOE;
3248 // Shift to next lowest bit
3252 // Output the phy register number, msb first
3254 for (i = 0; i < 5; ++i) {
3256 bits[clk_idx++] = MII_MDOE | MII_MDO;
3258 bits[clk_idx++] = MII_MDOE;
3260 // Shift to next lowest bit
3264 // Tristate and turnaround (2 bit times)
3265 bits[clk_idx++] = 0;
3266 bits[clk_idx++] = 0;
3268 // Write out 16 bits of data, msb first
3270 for (i = 0; i < 16; ++i) {
3272 bits[clk_idx++] = MII_MDOE | MII_MDO;
3274 bits[clk_idx++] = MII_MDOE;
3276 // Shift to next lowest bit
3280 // Final clock bit (tristate)
3281 bits[clk_idx++] = 0;
3283 // Save the current bank
3284 oldBank = SMC_CURRENT_BANK();
3287 SMC_SELECT_BANK( 3 );
3289 // Get the current MII register value
3290 mii_reg = SMC_GET_MII();
3292 // Turn off all MII Interface bits
3293 mii_reg &= ~(MII_MDOE|MII_MCLK|MII_MDI|MII_MDO);
3296 for (i = 0; i < sizeof bits; ++i) {
3297 // Clock Low - output data
3298 SMC_SET_MII( mii_reg | bits[i] );
3302 // Clock Hi - input data
3303 SMC_SET_MII( mii_reg | bits[i] | MII_MCLK );
3305 bits[i] |= SMC_GET_MII() & MII_MDI;
3308 // Return to idle state
3309 // Set clock to low, data to low, and output tristated
3310 SMC_SET_MII( mii_reg );
3313 // Restore original bank select
3314 SMC_SELECT_BANK( oldBank );
3316 #if (SMC_DEBUG > 2 )
3317 printk("smc_write_phy_register(): phyaddr=%x,phyreg=%x,phydata=%x\n",
3318 phyaddr, phyreg, phydata);
3319 smc_dump_mii_stream(bits, sizeof bits);
3324 /*------------------------------------------------------------
3325 . Finds and reports the PHY address
3326 .-------------------------------------------------------------*/
3327 static int smc_detect_phy(struct net_device* dev)
3329 struct smc_local *lp = (struct smc_local *)dev->priv;
3330 unsigned long ioaddr = dev->base_addr;
3336 PRINTK3("%s:smc_detect_phy()\n", dev->name);
3338 // Scan all 32 PHY addresses if necessary
3339 for (phyaddr = 0; phyaddr < 32; ++phyaddr) {
3340 // Read the PHY identifiers
3341 phy_id1 = smc_read_phy_register(ioaddr, phyaddr, PHY_ID1_REG);
3342 phy_id2 = smc_read_phy_register(ioaddr, phyaddr, PHY_ID2_REG);
3344 PRINTK3("%s: phy_id1=%x, phy_id2=%x\n",
3345 dev->name, phy_id1, phy_id2);
3347 // Make sure it is a valid identifier
3348 if ((phy_id2 > 0x0000) && (phy_id2 < 0xffff) &&
3349 (phy_id1 > 0x0000) && (phy_id1 < 0xffff)) {
3350 if ((phy_id1 != 0x8000) && (phy_id2 != 0x8000)) {
3351 // Save the PHY's address
3352 lp->phyaddr = phyaddr;
3360 PRINTK("%s: No PHY found\n", dev->name);
3365 if ( (phy_id1 == 0x0016) && ((phy_id2 & 0xFFF0) == 0xF840 ) ) {
3366 lp->phytype = PHY_LAN83C183;
3367 PRINTK("%s: PHY=LAN83C183 (LAN91C111 Internal)\n", dev->name);
3370 if ( (phy_id1 == 0x0282) && ((phy_id2 & 0xFFF0) == 0x1C50) ) {
3371 lp->phytype = PHY_LAN83C180;
3372 PRINTK("%s: PHY=LAN83C180\n", dev->name);
3378 /*------------------------------------------------------------
3379 . Waits the specified number of milliseconds - kernel friendly
3380 .-------------------------------------------------------------*/
3381 static void smc_wait_ms(unsigned int ms)
3384 if (!in_interrupt()) {
3385 set_current_state(TASK_UNINTERRUPTIBLE);
3386 schedule_timeout(1 + ms * HZ / 1000);
3388 set_current_state(TASK_INTERRUPTIBLE);
3389 schedule_timeout(1 + ms * HZ / 1000);
3390 set_current_state(TASK_RUNNING);
3394 /*------------------------------------------------------------
3395 . Sets the PHY to a configuration as determined by the user
3396 .-------------------------------------------------------------*/
3397 static int smc_phy_fixed(struct net_device* dev)
3399 unsigned long ioaddr = dev->base_addr;
3400 struct smc_local *lp = (struct smc_local *)dev->priv;
3401 byte phyaddr = lp->phyaddr;
3405 PRINTK3("%s:smc_phy_fixed()\n", dev->name);
3407 // Enter Link Disable state
3408 cfg1 = smc_read_phy_register(ioaddr, phyaddr, PHY_CFG1_REG);
3409 cfg1 |= PHY_CFG1_LNKDIS;
3410 smc_write_phy_register(ioaddr, phyaddr, PHY_CFG1_REG, cfg1);
3412 // Set our fixed capabilities
3413 // Disable auto-negotiation
3416 if (lp->ctl_rfduplx)
3417 my_fixed_caps |= PHY_CNTL_DPLX;
3419 if (lp->ctl_rspeed == 100)
3420 my_fixed_caps |= PHY_CNTL_SPEED;
3422 // Write our capabilities to the phy control register
3423 smc_write_phy_register(ioaddr, phyaddr, PHY_CNTL_REG, my_fixed_caps);
3425 // Re-Configure the Receive/Phy Control register
3426 SMC_SET_RPC( lp->rpc_cur_mode );
3433 /*------------------------------------------------------------
3434 . Configures the specified PHY using Autonegotiation. Calls
3435 . smc_phy_fixed() if the user has requested a certain config.
3436 .-------------------------------------------------------------*/
3437 static void smc_phy_configure(struct net_device* dev)
3439 unsigned long ioaddr = dev->base_addr;
3440 struct smc_local *lp = (struct smc_local *)dev->priv;
3443 word my_phy_caps; // My PHY capabilities
3444 word my_ad_caps; // My Advertised capabilities
3448 PRINTK3("%s:smc_program_phy()\n", dev->name);
3450 // Set the blocking flag
3451 lp->autoneg_active = 1;
3453 // Find the address and type of our phy
3454 if (!smc_detect_phy(dev))
3455 goto smc_phy_configure_exit;
3457 // Get the detected phy address
3458 phyaddr = lp->phyaddr;
3460 // Reset the PHY, setting all other bits to zero
3461 smc_write_phy_register(ioaddr, phyaddr, PHY_CNTL_REG, PHY_CNTL_RST);
3463 // Wait for the reset to complete, or time out
3464 timeout = 6; // Wait up to 3 seconds
3466 if (!(smc_read_phy_register(ioaddr, phyaddr, PHY_CNTL_REG)
3470 smc_wait_ms(500); // wait 500 millisecs
3471 if (signal_pending(current)) { // Exit anyway if signaled
3472 PRINTK2("%s:PHY reset interrupted by signal\n",
3480 printk("%s:PHY reset timed out\n", dev->name);
3481 goto smc_phy_configure_exit;
3484 // Read PHY Register 18, Status Output
3485 lp->lastPhy18 = smc_read_phy_register(ioaddr, phyaddr, PHY_INT_REG);
3487 // Enable PHY Interrupts (for register 18)
3488 // Interrupts listed here are disabled
3489 smc_write_phy_register(ioaddr, phyaddr, PHY_MASK_REG,
3490 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
3491 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
3492 PHY_INT_SPDDET | PHY_INT_DPLXDET);
3494 /* Configure the Receive/Phy Control register */
3495 SMC_SELECT_BANK( 0 );
3496 SMC_SET_RPC( lp->rpc_cur_mode );
3498 // Copy our capabilities from PHY_STAT_REG to PHY_AD_REG
3499 my_phy_caps = smc_read_phy_register(ioaddr, phyaddr, PHY_STAT_REG);
3500 my_ad_caps = PHY_AD_CSMA; // I am CSMA capable
3502 if (my_phy_caps & PHY_STAT_CAP_T4)
3503 my_ad_caps |= PHY_AD_T4;
3505 if (my_phy_caps & PHY_STAT_CAP_TXF)
3506 my_ad_caps |= PHY_AD_TX_FDX;
3508 if (my_phy_caps & PHY_STAT_CAP_TXH)
3509 my_ad_caps |= PHY_AD_TX_HDX;
3511 if (my_phy_caps & PHY_STAT_CAP_TF)
3512 my_ad_caps |= PHY_AD_10_FDX;
3514 if (my_phy_caps & PHY_STAT_CAP_TH)
3515 my_ad_caps |= PHY_AD_10_HDX;
3517 // Disable capabilities not selected by our user
3518 if (lp->ctl_rspeed != 100)
3519 my_ad_caps &= ~(PHY_AD_T4|PHY_AD_TX_FDX|PHY_AD_TX_HDX);
3521 if (!lp->ctl_rfduplx)
3522 my_ad_caps &= ~(PHY_AD_TX_FDX|PHY_AD_10_FDX);
3524 // Update our Auto-Neg Advertisement Register
3525 smc_write_phy_register(ioaddr, phyaddr, PHY_AD_REG, my_ad_caps);
3527 // Read the register back. Without this, it appears that when
3528 // auto-negotiation is restarted, sometimes it isn't ready and
3529 // the link does not come up.
3530 status = smc_read_phy_register(ioaddr, phyaddr, PHY_AD_REG);
3532 PRINTK2("%s:phy caps=%x\n", dev->name, my_phy_caps);
3533 PRINTK2("%s:phy advertised caps=%x\n", dev->name, my_ad_caps);
3535 // If the user requested no auto neg, then go set his request
3536 if (!(lp->ctl_autoneg)) {
3538 goto smc_phy_configure_exit;
3541 // Restart auto-negotiation process in order to advertise my caps
3542 smc_write_phy_register( ioaddr, phyaddr, PHY_CNTL_REG,
3543 PHY_CNTL_ANEG_EN | PHY_CNTL_ANEG_RST );
3545 // Wait for the auto-negotiation to complete. This may take from
3547 // Wait for the reset to complete, or time out
3548 timeout = 20; // Wait up to 10 seconds
3550 status = smc_read_phy_register(ioaddr, phyaddr, PHY_STAT_REG);
3551 if (status & PHY_STAT_ANEG_ACK)
3552 // auto-negotiate complete
3555 smc_wait_ms(500); // wait 500 millisecs
3556 if (signal_pending(current)) { // Exit anyway if signaled
3558 "%s:PHY auto-negotiate interrupted by signal\n",
3564 // Restart auto-negotiation if remote fault
3565 if (status & PHY_STAT_REM_FLT) {
3566 PRINTK2("%s:PHY remote fault detected\n", dev->name);
3568 // Restart auto-negotiation
3569 PRINTK2("%s:PHY restarting auto-negotiation\n",
3571 smc_write_phy_register( ioaddr, phyaddr, PHY_CNTL_REG,
3572 PHY_CNTL_ANEG_EN | PHY_CNTL_ANEG_RST |
3573 PHY_CNTL_SPEED | PHY_CNTL_DPLX);
3578 printk(KERN_DEBUG "%s:PHY auto-negotiate timed out\n",
3580 PRINTK2("%s:PHY auto-negotiate timed out\n", dev->name);
3584 // Fail if we detected an auto-negotiate remote fault
3585 if (status & PHY_STAT_REM_FLT) {
3586 printk(KERN_DEBUG "%s:PHY remote fault detected\n", dev->name);
3587 PRINTK2("%s:PHY remote fault detected\n", dev->name);
3591 // The smc_phy_interrupt() routine will be called to update lastPhy18
3593 // Set our sysctl parameters to match auto-negotiation results
3594 if ( lp->lastPhy18 & PHY_INT_SPDDET ) {
3595 PRINTK2("%s:PHY 100BaseT\n", dev->name);
3596 lp->rpc_cur_mode |= RPC_SPEED;
3598 PRINTK2("%s:PHY 10BaseT\n", dev->name);
3599 lp->rpc_cur_mode &= ~RPC_SPEED;
3602 if ( lp->lastPhy18 & PHY_INT_DPLXDET ) {
3603 PRINTK2("%s:PHY Full Duplex\n", dev->name);
3604 lp->rpc_cur_mode |= RPC_DPLX;
3606 PRINTK2("%s:PHY Half Duplex\n", dev->name);
3607 lp->rpc_cur_mode &= ~RPC_DPLX;
3610 // Re-Configure the Receive/Phy Control register
3611 SMC_SET_RPC( lp->rpc_cur_mode );
3613 smc_phy_configure_exit:
3614 // Exit auto-negotiation
3615 lp->autoneg_active = 0;
3620 /*************************************************************************
3623 . Purpose: Handle interrupts relating to PHY register 18. This is
3624 . called from the "hard" interrupt handler.
3626 ************************************************************************/
3627 static void smc_phy_interrupt(struct net_device* dev)
3629 unsigned long ioaddr = dev->base_addr;
3630 struct smc_local *lp = (struct smc_local *)dev->priv;
3631 byte phyaddr = lp->phyaddr;
3634 PRINTK2("%s: smc_phy_interrupt\n", dev->name);
3637 // Read PHY Register 18, Status Output
3638 phy18 = smc_read_phy_register(ioaddr, phyaddr, PHY_INT_REG);
3640 // Exit if not more changes
3641 if (phy18 == lp->lastPhy18)
3644 #if (SMC_DEBUG > 1 )
3645 PRINTK2("%s: phy18=0x%x\n", dev->name, phy18);
3646 PRINTK2("%s: lastPhy18=0x%x\n", dev->name, lp->lastPhy18);
3649 if ((phy18 & PHY_INT_LNKFAIL) !=
3650 (lp->lastPhy18 & PHY_INT_LNKFAIL))
3651 PRINTK2("%s: PHY Link Fail=%x\n", dev->name,
3652 phy18 & PHY_INT_LNKFAIL);
3654 if ((phy18 & PHY_INT_LOSSSYNC) !=
3655 (lp->lastPhy18 & PHY_INT_LOSSSYNC))
3656 PRINTK2("%s: PHY LOSS SYNC=%x\n", dev->name,
3657 phy18 & PHY_INT_LOSSSYNC);
3659 if ((phy18 & PHY_INT_CWRD) != (lp->lastPhy18 & PHY_INT_CWRD))
3660 PRINTK2("%s: PHY INVALID 4B5B code=%x\n", dev->name,
3661 phy18 & PHY_INT_CWRD);
3663 if ((phy18 & PHY_INT_SSD) != (lp->lastPhy18 & PHY_INT_SSD))
3664 PRINTK2("%s: PHY No Start Of Stream=%x\n", dev->name,
3665 phy18 & PHY_INT_SSD);
3667 if ((phy18 & PHY_INT_ESD) != (lp->lastPhy18 & PHY_INT_ESD))
3669 PRINTK2("%s: PHY No End Of Stream=%x\n", dev->name,
3670 phy18 & PHY_INT_ESD);
3672 if ((phy18 & PHY_INT_RPOL) != (lp->lastPhy18 & PHY_INT_RPOL))
3673 PRINTK2("%s: PHY Reverse Polarity Detected=%x\n",
3674 dev->name, phy18 & PHY_INT_RPOL);
3676 if ((phy18 & PHY_INT_JAB) != (lp->lastPhy18 & PHY_INT_JAB))
3677 PRINTK2("%s: PHY Jabber Detected=%x\n", dev->name,
3678 phy18 & PHY_INT_JAB);
3680 if ((phy18 & PHY_INT_SPDDET) !=
3681 (lp->lastPhy18 & PHY_INT_SPDDET))
3682 PRINTK2("%s: PHY Speed Detect=%x\n", dev->name,
3683 phy18 & PHY_INT_SPDDET);
3685 if ((phy18 & PHY_INT_DPLXDET) !=
3686 (lp->lastPhy18 & PHY_INT_DPLXDET))
3687 PRINTK2("%s: PHY Duplex Detect=%x\n", dev->name,
3688 phy18 & PHY_INT_DPLXDET);
3690 // Update the last phy 18 variable
3691 lp->lastPhy18 = phy18;