2 drivers/net/tulip/tulip.h
4 Copyright 2000,2001 The Linux Kernel Team
5 Written/copyright 1994-2001 by Donald Becker.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
10 Please refer to Documentation/DocBook/tulip.{pdf,ps,html}
11 for more information on this driver, or visit the project
12 Web page at http://sourceforge.net/projects/tulip/
16 #ifndef __NET_TULIP_H__
17 #define __NET_TULIP_H__
19 #include <linux/config.h>
20 #include <linux/kernel.h>
21 #include <linux/types.h>
22 #include <linux/spinlock.h>
23 #include <linux/netdevice.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
31 /* undefine, or define to various debugging levels (>4 == obscene levels) */
32 //#define TULIP_DEBUG 1
34 /* undefine USE_IO_OPS for MMIO, define for PIO */
35 #ifdef CONFIG_TULIP_MMIO
43 struct tulip_chip_table {
46 int valid_intrs; /* CSR7 interrupt enable settings */
48 void (*media_timer) (unsigned long data);
54 HAS_MEDIA_TABLE = 0x0002,
55 CSR12_IN_SROM = 0x0004,
56 ALWAYS_CHECK_MII = 0x0008,
58 MC_HASH_ONLY = 0x0020, /* Hash-only multicast filter. */
59 HAS_PNICNWAY = 0x0080,
60 HAS_NWAY = 0x0040, /* Uses internal NWay xcvr. */
61 HAS_INTR_MITIGATION = 0x0100,
64 COMET_MAC_ADDR = 0x0800,
70 /* chip types. careful! order is VERY IMPORTANT here, as these
71 * are used throughout the driver as indices into arrays */
72 /* Note 21142 == 21143. */
77 DC21142 = 3, DC21143 = 3,
101 /* Offsets to the Command and Status Registers, "CSRs". All accesses
102 must be longword instructions and quadword aligned. */
122 /* register offset and bits for CFDD PCI config reg */
123 enum pci_cfg_driver_reg {
125 CFDD_Sleep = (1 << 31),
126 CFDD_Snooze = (1 << 30),
130 /* The bits in the CSR5 status registers, mostly interrupt sources. */
136 NormalIntr = 0x10000,
137 AbnormalIntr = 0x8000,
142 TxFIFOUnderflow = 0x20,
150 enum tulip_mode_bits {
151 TxThreshold = (1 << 22),
152 FullDuplex = (1 << 9),
154 AcceptBroadcast = 0x0100,
155 AcceptAllMulticast = 0x0080,
156 AcceptAllPhys = 0x0040,
159 RxTx = (TxOn | RxOn),
163 enum tulip_busconfig_bits {
172 /* The Tulip Rx and Tx buffer descriptors. */
173 struct tulip_rx_desc {
181 struct tulip_tx_desc {
185 u32 buffer2; /* We use only buffer 1. */
189 enum desc_status_bits {
190 DescOwned = 0x80000000,
191 RxDescFatalErr = 0x8000,
196 enum t21041_csr13_bits {
197 csr13_eng = (0xEF0<<4), /* for eng. purposes only, hardcode at EF0h */
198 csr13_aui = (1<<3), /* clear to force 10bT, set to force AUI/BNC */
199 csr13_cac = (1<<2), /* CSR13/14/15 autoconfiguration */
200 csr13_srl = (1<<0), /* When reset, resets all SIA functions, machines */
202 csr13_mask_auibnc = (csr13_eng | csr13_aui | csr13_srl),
203 csr13_mask_10bt = (csr13_eng | csr13_srl),
206 enum t21143_csr6_bits {
209 csr6_ign_dest_msb = (1<<26),
211 csr6_scr = (1<<24), /* scramble mode flag: can't be set */
212 csr6_pcs = (1<<23), /* Enables PCS functions (symbol mode requires csr6_ps be set) default is set */
213 csr6_ttm = (1<<22), /* Transmit Threshold Mode, set for 10baseT, 0 for 100BaseTX */
214 csr6_sf = (1<<21), /* Store and forward. If set ignores TR bits */
215 csr6_hbd = (1<<19), /* Heart beat disable. Disables SQE function in 10baseT */
216 csr6_ps = (1<<18), /* Port Select. 0 (defualt) = 10baseT, 1 = 100baseTX: can't be set */
217 csr6_ca = (1<<17), /* Collision Offset Enable. If set uses special algorithm in low collision situations */
218 csr6_trh = (1<<15), /* Transmit Threshold high bit */
219 csr6_trl = (1<<14), /* Transmit Threshold low bit */
221 /***************************************************************
222 * This table shows transmit threshold values based on media *
223 * and these two registers (from PNIC1 & 2 docs) Note: this is *
224 * all meaningless if sf is set. *
225 ***************************************************************/
227 /***********************************
228 * (trh,trl) * 100BaseTX * 10BaseT *
229 ***********************************
232 * (1,0) * 512 * 128 *
233 * (1,1) * 1024 * 160 *
234 ***********************************/
236 csr6_fc = (1<<12), /* Forces a collision in next transmission (for testing in loopback mode) */
237 csr6_om_int_loop = (1<<10), /* internal (FIFO) loopback flag */
238 csr6_om_ext_loop = (1<<11), /* external (PMD) loopback flag */
239 /* set both and you get (PHY) loopback */
240 csr6_fd = (1<<9), /* Full duplex mode, disables hearbeat, no loopback */
241 csr6_pm = (1<<7), /* Pass All Multicast */
242 csr6_pr = (1<<6), /* Promiscuous mode */
243 csr6_sb = (1<<5), /* Start(1)/Stop(0) backoff counter */
244 csr6_if = (1<<4), /* Inverse Filtering, rejects only addresses in address table: can't be set */
245 csr6_pb = (1<<3), /* Pass Bad Frames, (1) causes even bad frames to be passed on */
246 csr6_ho = (1<<2), /* Hash-only filtering mode: can't be set */
247 csr6_hp = (1<<0), /* Hash/Perfect Receive Filtering Mode: can't be set */
249 csr6_mask_capture = (csr6_sc | csr6_ca),
250 csr6_mask_defstate = (csr6_mask_capture | csr6_mbo),
251 csr6_mask_hdcap = (csr6_mask_defstate | csr6_hbd | csr6_ps),
252 csr6_mask_hdcaptt = (csr6_mask_hdcap | csr6_trh | csr6_trl),
253 csr6_mask_fullcap = (csr6_mask_hdcaptt | csr6_fd),
254 csr6_mask_fullpromisc = (csr6_pr | csr6_pm),
255 csr6_mask_filters = (csr6_hp | csr6_ho | csr6_if),
256 csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd),
260 /* Keep the ring sizes a power of two for efficiency.
261 Making the Tx ring too large decreases the effectiveness of channel
262 bonding and packet priority.
263 There are no ill effects from too-large receive rings. */
264 #define TX_RING_SIZE 16
265 #define RX_RING_SIZE 32
267 #define MEDIA_MASK 31
269 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
271 #define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */
273 #if defined(__sparc__) || defined(__hppa__)
274 /* The UltraSparc PCI controllers will disconnect at every 64-byte
275 * crossing anyways so it makes no sense to tell Tulip to burst
276 * any more than that.
278 #define TULIP_MAX_CACHE_LINE 16 /* in units of 32-bit words */
280 #define TULIP_MAX_CACHE_LINE 32 /* in units of 32-bit words */
284 /* Ring-wrap flag in length field, use for last ring entry.
285 0x01000000 means chain on buffer2 address,
286 0x02000000 means use the ring start address in CSR2/3.
287 Note: Some work-alike chips do not function correctly in chained mode.
288 The ASIX chip works only in chained mode.
289 Thus we indicates ring mode, but always write the 'next' field for
290 chained mode as well.
292 #define DESC_RING_WRAP 0x02000000
295 #define EEPROM_SIZE 128 /* 2 << EEPROM_ADDRLEN */
298 #define RUN_AT(x) (jiffies + (x))
300 #if defined(__i386__) /* AKA get_unaligned() */
301 #define get_u16(ptr) (*(u16 *)(ptr))
303 #define get_u16(ptr) (((u8*)(ptr))[0] + (((u8*)(ptr))[1]<<8))
309 unsigned char *leafdata;
316 u8 csr12dir; /* General purpose pin directions. */
318 unsigned has_nonmii:1;
319 unsigned has_reset:6;
321 u32 csr15val; /* 21143 NWay setting. */
322 struct medialeaf mleaf[0];
327 struct mediainfo *next;
339 struct tulip_private {
340 const char *product_name;
341 struct net_device *next_module;
342 struct tulip_rx_desc *rx_ring;
343 struct tulip_tx_desc *tx_ring;
344 dma_addr_t rx_ring_dma;
345 dma_addr_t tx_ring_dma;
346 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
347 struct ring_info tx_buffers[TX_RING_SIZE];
348 /* The addresses of receive-in-place skbuffs. */
349 struct ring_info rx_buffers[RX_RING_SIZE];
350 u16 setup_frame[96]; /* Pseudo-Tx frame to init address table. */
354 struct net_device_stats stats;
355 struct timer_list timer; /* Media selection timer. */
359 unsigned int cur_rx, cur_tx; /* The next free ring entry */
360 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
362 #ifdef CONFIG_NET_HW_FLOWCONTROL
363 #define RX_A_NBF_STOP 0xffffff3f /* To disable RX and RX-NOBUF ints. */
366 int mit_change; /* Signal for Interrupt Mitigtion */
368 unsigned int full_duplex:1; /* Full-duplex operation requested. */
369 unsigned int full_duplex_lock:1;
370 unsigned int fake_addr:1; /* Multiport board faked address. */
371 unsigned int default_port:4; /* Last dev->if_port value. */
372 unsigned int media2:4; /* Secondary monitored media port. */
373 unsigned int medialock:1; /* Don't sense media type. */
374 unsigned int mediasense:1; /* Media sensing in progress. */
375 unsigned int nway:1, nwayset:1; /* 21143 internal NWay. */
376 unsigned int csr0; /* CSR0 setting. */
377 unsigned int csr6; /* Current CSR6 control settings. */
378 unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */
379 void (*link_change) (struct net_device * dev, int csr5);
380 u16 sym_advertise, mii_advertise; /* NWay capabilities advertised. */
381 u16 lpar; /* 21143 Link partner ability. */
383 signed char phys[4], mii_cnt; /* MII device addresses. */
384 struct mediatable *mtable;
385 int cur_index; /* Current media index. */
387 struct pci_dev *pdev;
391 unsigned long base_addr;
393 int pad0; /* Used for 8-byte alignment */
397 struct eeprom_fixup {
402 u16 newtable[32]; /* Max length below. */
407 extern u16 t21142_csr14[];
408 void t21142_timer(unsigned long data);
409 void t21142_start_nway(struct net_device *dev);
410 void t21142_lnk_change(struct net_device *dev, int csr5);
414 void pnic2_lnk_change(struct net_device *dev, int csr5);
415 void pnic2_timer(unsigned long data);
416 void pnic2_start_nway(struct net_device *dev);
417 void pnic2_lnk_change(struct net_device *dev, int csr5);
420 void tulip_parse_eeprom(struct net_device *dev);
421 int tulip_read_eeprom(long ioaddr, int location, int addr_len);
424 extern unsigned int tulip_max_interrupt_work;
425 extern int tulip_rx_copybreak;
426 void tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
427 int tulip_refill_rx(struct net_device *dev);
430 int tulip_mdio_read(struct net_device *dev, int phy_id, int location);
431 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int value);
432 void tulip_select_media(struct net_device *dev, int startup);
433 int tulip_check_duplex(struct net_device *dev);
434 void tulip_find_mii (struct net_device *dev, int board_idx);
437 void pnic_do_nway(struct net_device *dev);
438 void pnic_lnk_change(struct net_device *dev, int csr5);
439 void pnic_timer(unsigned long data);
442 void tulip_timer(unsigned long data);
443 void mxic_timer(unsigned long data);
444 void comet_timer(unsigned long data);
447 extern int tulip_debug;
448 extern const char * const medianame[];
449 extern const char tulip_media_cap[];
450 extern struct tulip_chip_table tulip_tbl[];
451 extern u8 t21040_csr13[];
452 extern u16 t21041_csr13[];
453 extern u16 t21041_csr14[];
454 extern u16 t21041_csr15[];
463 #define inb(addr) readb((void*)(addr))
464 #define inw(addr) readw((void*)(addr))
465 #define inl(addr) readl((void*)(addr))
466 #define outb(val,addr) writeb((val), (void*)(addr))
467 #define outw(val,addr) writew((val), (void*)(addr))
468 #define outl(val,addr) writel((val), (void*)(addr))
469 #endif /* !USE_IO_OPS */
473 static inline void tulip_start_rxtx(struct tulip_private *tp)
475 long ioaddr = tp->base_addr;
476 //jack or 0x 80 is open multicast
477 outl(tp->csr6 | RxTx, ioaddr + CSR6);
480 (void) inl(ioaddr + CSR6); /* mmio sync */
483 static inline void tulip_stop_rxtx(struct tulip_private *tp)
485 long ioaddr = tp->base_addr;
486 u32 csr6 = inl(ioaddr + CSR6);
489 outl(csr6 & ~RxTx, ioaddr + CSR6);
491 (void) inl(ioaddr + CSR6); /* mmio sync */
495 static inline void tulip_restart_rxtx(struct tulip_private *tp)
499 tulip_start_rxtx(tp);
502 #endif /* __NET_TULIP_H__ */