drivers/pcmcia/i82092.c

   1 /*
   2  * Driver for Intel I82092AA PCI-PCMCIA bridge.
   3  *
   4  * (C) 2001 Red Hat, Inc.
   5  *
   6  * Author: Arjan Van De Ven <arjanv@redhat.com>
   7  * Loosly based on i82365.c from the pcmcia-cs package
   8  *
   9  * $Id: i82092.c,v 1.1.1.1 2005/04/11 02:50:33 jack Exp $
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/config.h>
  14 #include <linux/module.h>
  15 #include <linux/pci.h>
  16 #include <linux/init.h>
  17
  18 #include <pcmcia/cs_types.h>
  19 #include <pcmcia/ss.h>
  20 #include <pcmcia/cs.h>
  21
  22 #include <asm/system.h>
  23 #include <asm/io.h>
  24
  25 #include "i82092aa.h"
  26 #include "i82365.h"
  27
  28 MODULE_LICENSE("GPL");
  29
  30 /* PCI core routines */
  31 static struct pci_device_id i82092aa_pci_ids[] = {
  32         {
  33               vendor:PCI_VENDOR_ID_INTEL,
  34               device:PCI_DEVICE_ID_INTEL_82092AA_0,
  35               subvendor:PCI_ANY_ID,
  36               subdevice:PCI_ANY_ID,
  37               class: 0, class_mask:0,
  38
  39          },
  40          {}
  41 };
  42
  43 static struct pci_driver i82092aa_pci_drv = {
  44         name:           "i82092aa",
  45         id_table:       i82092aa_pci_ids,
  46         probe:          i82092aa_pci_probe,
  47         remove:         __devexit_p(i82092aa_pci_remove),
  48         suspend:        NULL,
  49         resume:         NULL
  50 };
  51
  52
  53 /* the pccard structure and its functions */
  54 static struct pccard_operations i82092aa_operations = {
  55         init:                   i82092aa_init,
  56         suspend:                i82092aa_suspend,
  57         register_callback:      i82092aa_register_callback,
  58         inquire_socket:         i82092aa_inquire_socket,
  59         get_status:             i82092aa_get_status,
  60         get_socket:             i82092aa_get_socket,
  61         set_socket:             i82092aa_set_socket,
  62         get_io_map:             i82092aa_get_io_map,
  63         set_io_map:             i82092aa_set_io_map,
  64         get_mem_map:            i82092aa_get_mem_map,
  65         set_mem_map:            i82092aa_set_mem_map,
  66         proc_setup:             i82092aa_proc_setup,
  67 };
  68
  69 /* The card can do upto 4 sockets, allocate a structure for each of them */
  70
  71 struct socket_info {
  72         int     card_state;     /*  0 = no socket,
  73                                     1 = empty socket,
  74                                     2 = card but not initialized,
  75                                     3 = operational card */
  76         int     io_base;        /* base io address of the socket */
  77         socket_cap_t cap;
  78
  79         unsigned int pending_events; /* Pending events on this interface */
  80
  81         void    (*handler)(void *info, u_int events);
  82                                 /* callback to the driver of the card */
  83         void    *info;          /* to be passed to the handler */
  84
  85         struct pci_dev *dev;    /* The PCI device for the socket */
  86 };
  87
  88 #define MAX_SOCKETS 4
  89 static struct socket_info sockets[MAX_SOCKETS];
  90 static int socket_count;  /* shortcut */
  91
  92
  93 static int __init i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  94 {
  95         unsigned char configbyte;
  96         int i;
  97
  98         enter("i82092aa_pci_probe");
  99
 100         if (pci_enable_device(dev))
 101                 return -EIO;
 102
 103         pci_read_config_byte(dev, 0x40, &configbyte);  /* PCI Configuration Control */
 104         switch(configbyte&6) {
 105                 case 0:
 106                         printk(KERN_INFO "i82092aa: configured as a 2 socket device.\n");
 107                         socket_count = 2;
 108                         break;
 109                 case 2:
 110                         printk(KERN_INFO "i82092aa: configured as a 1 socket device.\n");
 111                         socket_count = 1;
 112                         break;
 113                 case 4:
 114                 case 6:
 115                         printk(KERN_INFO "i82092aa: configured as a 4 socket device.\n");
 116                         socket_count = 4;
 117                         break;
 118
 119                 default:
 120                         printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
 121                         return -EIO;
 122                         break;
 123         }
 124
 125         for (i = 0;i<socket_count;i++) {
 126                 sockets[i].card_state = 1; /* 1 = present but empty */
 127                 sockets[i].io_base = (dev->resource[0].start & ~1);
 128                  if (sockets[i].io_base > 0)
 129                         request_region(sockets[i].io_base, 2, "i82092aa");
 130
 131
 132                 sockets[i].cap.features |= SS_CAP_PCCARD;
 133                 sockets[i].cap.map_size = 0x1000;
 134                 sockets[i].cap.irq_mask = 0;
 135                 sockets[i].cap.pci_irq  = dev->irq;
 136
 137                 if (card_present(i)) {
 138                         sockets[i].card_state = 3;
 139                         dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
 140                 } else {
 141                         dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
 142                 }
 143         }
 144
 145         /* Now, specifiy that all interrupts are to be done as PCI interrupts */
 146         configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
 147         pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
 148
 149
 150         /* Register the interrupt handler */
 151         dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
 152         if (request_irq(dev->irq, i82092aa_interrupt, SA_SHIRQ, "i82092aa", i82092aa_interrupt)) {
 153                 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
 154                 return -EIO;
 155         }
 156
 157
 158         if (register_ss_entry(socket_count, &i82092aa_operations) != 0)
 159                 printk(KERN_NOTICE "i82092aa: register_ss_entry() failed\n");
 160
 161         leave("i82092aa_pci_probe");
 162         return 0;
 163 }
 164
 165 static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
 166 {
 167         enter("i82092aa_pci_remove");
 168
 169         free_irq(dev->irq, i82092aa_interrupt);
 170
 171         leave("i82092aa_pci_remove");
 172 }
 173
 174 static spinlock_t port_lock = SPIN_LOCK_UNLOCKED;
 175
 176 /* basic value read/write functions */
 177
 178 static unsigned char indirect_read(int socket, unsigned short reg)
 179 {
 180         unsigned short int port;
 181         unsigned char val;
 182         unsigned long flags;
 183         spin_lock_irqsave(&port_lock,flags);
 184         reg += socket * 0x40;
 185         port = sockets[socket].io_base;
 186         outb(reg,port);
 187         val = inb(port+1);
 188         spin_unlock_irqrestore(&port_lock,flags);
 189         return val;
 190 }
 191
 192 static unsigned short indirect_read16(int socket, unsigned short reg)
 193 {
 194         unsigned short int port;
 195         unsigned short tmp;
 196         unsigned long flags;
 197         spin_lock_irqsave(&port_lock,flags);
 198         reg  = reg + socket * 0x40;
 199         port = sockets[socket].io_base;
 200         outb(reg,port);
 201         tmp = inb(port+1);
 202         reg++;
 203         outb(reg,port);
 204         tmp = tmp | (inb(port+1)<<8);
 205         spin_unlock_irqrestore(&port_lock,flags);
 206         return tmp;
 207 }
 208
 209 static void indirect_write(int socket, unsigned short reg, unsigned char value)
 210 {
 211         unsigned short int port;
 212         unsigned long flags;
 213         spin_lock_irqsave(&port_lock,flags);
 214         reg = reg + socket * 0x40;
 215         port = sockets[socket].io_base;
 216         outb(reg,port);
 217         outb(value,port+1);
 218         spin_unlock_irqrestore(&port_lock,flags);
 219 }
 220
 221 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
 222 {
 223         unsigned short int port;
 224         unsigned char val;
 225         unsigned long flags;
 226         spin_lock_irqsave(&port_lock,flags);
 227         reg = reg + socket * 0x40;
 228         port = sockets[socket].io_base;
 229         outb(reg,port);
 230         val = inb(port+1);
 231         val |= mask;
 232         outb(reg,port);
 233         outb(val,port+1);
 234         spin_unlock_irqrestore(&port_lock,flags);
 235 }
 236
 237
 238 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
 239 {
 240         unsigned short int port;
 241         unsigned char val;
 242         unsigned long flags;
 243         spin_lock_irqsave(&port_lock,flags);
 244         reg = reg + socket * 0x40;
 245         port = sockets[socket].io_base;
 246         outb(reg,port);
 247         val = inb(port+1);
 248         val &= ~mask;
 249         outb(reg,port);
 250         outb(val,port+1);
 251         spin_unlock_irqrestore(&port_lock,flags);
 252 }
 253
 254 static void indirect_write16(int socket, unsigned short reg, unsigned short value)
 255 {
 256         unsigned short int port;
 257         unsigned char val;
 258         unsigned long flags;
 259         spin_lock_irqsave(&port_lock,flags);
 260         reg = reg + socket * 0x40;
 261         port = sockets[socket].io_base;
 262
 263         outb(reg,port);
 264         val = value & 255;
 265         outb(val,port+1);
 266
 267         reg++;
 268
 269         outb(reg,port);
 270         val = value>>8;
 271         outb(val,port+1);
 272         spin_unlock_irqrestore(&port_lock,flags);
 273 }
 274
 275 /* simple helper functions */
 276 /* External clock time, in nanoseconds.  120 ns = 8.33 MHz */
 277 static int cycle_time = 120;
 278
 279 static int to_cycles(int ns)
 280 {
 281         if (cycle_time!=0)
 282                 return ns/cycle_time;
 283         else
 284                 return 0;
 285 }
 286
 287 static int to_ns(int cycles)
 288 {
 289         return cycle_time*cycles;
 290 }
 291
 292
 293 /* Interrupt handler functionality */
 294
 295 static void i82092aa_bh(void *dummy)
 296 {
 297         unsigned int events;
 298         int i;
 299
 300         for (i=0; i < socket_count; i++) {
 301                 events = xchg(&(sockets[i].pending_events),0);
 302                 printk("events = %x \n",events);
 303                 if (sockets[i].handler)
 304                         sockets[i].handler(sockets[i].info, events);
 305         }
 306 }
 307
 308
 309 static struct tq_struct i82092aa_task = {
 310         routine:        i82092aa_bh
 311 };
 312
 313
 314 static void i82092aa_interrupt(int irq, void *dev, struct pt_regs *regs)
 315 {
 316         int i;
 317         int loopcount = 0;
 318
 319         unsigned int events, active=0;
 320
 321 /*      enter("i82092aa_interrupt");*/
 322
 323         while (1) {
 324                 loopcount++;
 325                 if (loopcount>20) {
 326                         printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
 327                         break;
 328                 }
 329
 330                 active = 0;
 331
 332                 for (i=0;i<socket_count;i++) {
 333                         int csc;
 334                         if (sockets[i].card_state==0) /* Inactive socket, should not happen */
 335                                 continue;
 336
 337                         csc = indirect_read(i,I365_CSC); /* card status change register */
 338
 339                         if ((csc==0) ||  /* no events on this socket */
 340                            (sockets[i].handler==NULL)) /* no way to handle events */
 341                                 continue;
 342                         events = 0;
 343
 344                         if (csc & I365_CSC_DETECT) {
 345                                 events |= SS_DETECT;
 346                                 printk("Card detected in socket %i!\n",i);
 347                          }
 348
 349                         if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
 350                                 /* For IO/CARDS, bit 0 means "read the card" */
 351                                 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
 352                         } else {
 353                                 /* Check for battery/ready events */
 354                                 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
 355                                 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
 356                                 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
 357                         }
 358
 359                         if (events) {
 360                                 sockets[i].pending_events |= events;
 361                                 schedule_task(&i82092aa_task);
 362                         }
 363                         active |= events;
 364                 }
 365
 366                 if (active==0) /* no more events to handle */
 367                         break;
 368
 369         }
 370
 371 /*      leave("i82092aa_interrupt");*/
 372 }
 373
 374
 375
 376 /* socket functions */
 377
 378 static int card_present(int socketno)
 379 {
 380         unsigned int val;
 381         enter("card_present");
 382
 383         if ((socketno<0) || (socketno > MAX_SOCKETS))
 384                 return 0;
 385         if (sockets[socketno].io_base == 0)
 386                 return 0;
 387
 388
 389         val = indirect_read(socketno, 1); /* Interface status register */
 390         if ((val&12)==12) {
 391                 leave("card_present 1");
 392                 return 1;
 393         }
 394
 395         leave("card_present 0");
 396         return 0;
 397 }
 398
 399 static void set_bridge_state(int sock)
 400 {
 401         enter("set_bridge_state");
 402         indirect_write(sock, I365_GBLCTL,0x00);
 403         indirect_write(sock, I365_GENCTL,0x00);
 404
 405         indirect_setbit(sock, I365_INTCTL,0x08);
 406         leave("set_bridge_state");
 407 }
 408
 409
 410
 411
 412
 413
 414 static int i82092aa_init(unsigned int s)
 415 {
 416         int i;
 417         pccard_io_map io = { 0, 0, 0, 0, 1 };
 418         pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
 419
 420         enter("i82092aa_init");
 421
 422         mem.sys_stop = 0x0fff;
 423         i82092aa_set_socket(s, &dead_socket);
 424         for (i = 0; i < 2; i++) {
 425                 io.map = i;
 426                 i82092aa_set_io_map(s, &io);
 427         }
 428         for (i = 0; i < 5; i++) {
 429                 mem.map = i;
 430                 i82092aa_set_mem_map(s, &mem);
 431         }
 432
 433         leave("i82092aa_init");
 434         return 0;
 435 }
 436
 437 static int i82092aa_suspend(unsigned int sock)
 438 {
 439         int retval;
 440         enter("i82092aa_suspend");
 441         retval =  i82092aa_set_socket(sock, &dead_socket);
 442         leave("i82092aa_suspend");
 443         return retval;
 444 }
 445
 446 static int i82092aa_register_callback(unsigned int sock, void (*handler)(void *, unsigned int), void * info)
 447 {
 448         enter("i82092aa_register_callback");
 449         sockets[sock].handler = handler;
 450         sockets[sock].info = info;
 451         if (handler == NULL) {
 452                 MOD_DEC_USE_COUNT;
 453         } else {
 454                 MOD_INC_USE_COUNT;
 455         }
 456         leave("i82092aa_register_callback");
 457         return 0;
 458 } /* i82092aa_register_callback */
 459
 460 static int i82092aa_inquire_socket(unsigned int sock, socket_cap_t *cap)
 461 {
 462         enter("i82092aa_inquire_socket");
 463         *cap = sockets[sock].cap;
 464         leave("i82092aa_inquire_socket");
 465         return 0;
 466 } /* i82092aa_inquire_socket */
 467
 468
 469 static int i82092aa_get_status(unsigned int sock, u_int *value)
 470 {
 471         unsigned int status;
 472
 473         enter("i82092aa_get_status");
 474
 475         status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
 476         *value = 0;
 477
 478         if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
 479                 *value |= SS_DETECT;
 480         }
 481
 482         /* IO cards have a different meaning of bits 0,1 */
 483         /* Also notice the inverse-logic on the bits */
 484          if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
 485                 /* IO card */
 486                 if (!(status & I365_CS_STSCHG))
 487                         *value |= SS_STSCHG;
 488          } else { /* non I/O card */
 489                 if (!(status & I365_CS_BVD1))
 490                         *value |= SS_BATDEAD;
 491                 if (!(status & I365_CS_BVD2))
 492                         *value |= SS_BATWARN;
 493
 494          }
 495
 496          if (status & I365_CS_WRPROT)
 497                 (*value) |= SS_WRPROT;  /* card is write protected */
 498
 499          if (status & I365_CS_READY)
 500                 (*value) |= SS_READY;    /* card is not busy */
 501
 502          if (status & I365_CS_POWERON)
 503                 (*value) |= SS_POWERON;  /* power is applied to the card */
 504
 505
 506         leave("i82092aa_get_status");
 507         return 0;
 508 }
 509
 510
 511 static int i82092aa_get_socket(unsigned int sock, socket_state_t *state)
 512 {
 513         unsigned char reg,vcc,vpp;
 514
 515         enter("i82092aa_get_socket");
 516         state->flags    = 0;
 517         state->Vcc      = 0;
 518         state->Vpp      = 0;
 519         state->io_irq   = 0;
 520         state->csc_mask = 0;
 521
 522         /* First the power status of the socket */
 523         reg = indirect_read(sock,I365_POWER); /* PCTRL - Power Control Register */
 524
 525         if (reg & I365_PWR_AUTO)
 526                 state->flags |= SS_PWR_AUTO;  /* Automatic Power Switch */
 527
 528         if (reg & I365_PWR_OUT)
 529                 state->flags |= SS_OUTPUT_ENA; /* Output signals are enabled */
 530
 531         vcc = reg & I365_VCC_MASK;    vpp = reg & I365_VPP1_MASK;
 532
 533         if (reg & I365_VCC_5V) { /* Can still be 3.3V, in this case the Vcc value will be overwritten later */
 534                 state->Vcc = 50;
 535
 536                 if (vpp == I365_VPP1_5V)
 537                         state->Vpp = 50;
 538                 if (vpp == I365_VPP1_12V)
 539                         state->Vpp = 120;
 540
 541         }
 542
 543         if ((reg & I365_VCC_3V)==I365_VCC_3V)
 544                 state->Vcc = 33;
 545
 546
 547         /* Now the IO card, RESET flags and IO interrupt */
 548
 549         reg = indirect_read(sock, I365_INTCTL); /* IGENC, Interrupt and General Control */
 550
 551         if ((reg & I365_PC_RESET)==0)
 552                 state->flags |= SS_RESET;
 553         if (reg & I365_PC_IOCARD)
 554                 state->flags |= SS_IOCARD; /* This is an IO card */
 555
 556         /* Set the IRQ number */
 557         if (sockets[sock].dev!=NULL)
 558                 state->io_irq = sockets[sock].dev->irq;
 559
 560         /* Card status change */
 561         reg = indirect_read(sock, I365_CSCINT); /* CSCICR, Card Status Change Interrupt Configuration */
 562
 563         if (reg & I365_CSC_DETECT)
 564                 state->csc_mask |= SS_DETECT; /* Card detect is enabled */
 565
 566         if (state->flags & SS_IOCARD) {/* IO Cards behave different */
 567                 if (reg & I365_CSC_STSCHG)
 568                         state->csc_mask |= SS_STSCHG;
 569         } else {
 570                 if (reg & I365_CSC_BVD1)
 571                         state->csc_mask |= SS_BATDEAD;
 572                 if (reg & I365_CSC_BVD2)
 573                         state->csc_mask |= SS_BATWARN;
 574                 if (reg & I365_CSC_READY)
 575                         state->csc_mask |= SS_READY;
 576         }
 577
 578         leave("i82092aa_get_socket");
 579         return 0;
 580 }
 581
 582 static int i82092aa_set_socket(unsigned int sock, socket_state_t *state)
 583 {
 584         unsigned char reg;
 585
 586         enter("i82092aa_set_socket");
 587
 588         /* First, set the global controller options */
 589
 590         set_bridge_state(sock);
 591
 592         /* Values for the IGENC register */
 593
 594         reg = 0;
 595         if (!(state->flags & SS_RESET))         /* The reset bit has "inverse" logic */
 596                 reg = reg | I365_PC_RESET;
 597         if (state->flags & SS_IOCARD)
 598                 reg = reg | I365_PC_IOCARD;
 599
 600         indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
 601
 602         /* Power registers */
 603
 604         reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
 605
 606         if (state->flags & SS_PWR_AUTO) {
 607                 printk("Auto power\n");
 608                 reg |= I365_PWR_AUTO;   /* automatic power mngmnt */
 609         }
 610         if (state->flags & SS_OUTPUT_ENA) {
 611                 printk("Power Enabled \n");
 612                 reg |= I365_PWR_OUT;    /* enable power */
 613         }
 614
 615         switch (state->Vcc) {
 616                 case 0:
 617                         break;
 618                 case 50:
 619                         printk("setting voltage to Vcc to 5V on socket %i\n",sock);
 620                         reg |= I365_VCC_5V;
 621                         break;
 622                 default:
 623                         printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
 624                         leave("i82092aa_set_socket");
 625                         return -EINVAL;
 626         }
 627
 628
 629         switch (state->Vpp) {
 630                 case 0:
 631                         printk("not setting Vpp on socket %i\n",sock);
 632                         break;
 633                 case 50:
 634                         printk("setting Vpp to 5.0 for socket %i\n",sock);
 635                         reg |= I365_VPP1_5V | I365_VPP2_5V;
 636                         break;
 637                 case 120:
 638                         printk("setting Vpp to 12.0\n");
 639                         reg |= I365_VPP1_12V | I365_VPP2_12V;
 640                         break;
 641                 default:
 642                         printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
 643                         leave("i82092aa_set_socket");
 644                         return -EINVAL;
 645         }
 646
 647         if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
 648                 indirect_write(sock,I365_POWER,reg);
 649
 650         /* Enable specific interrupt events */
 651
 652         reg = 0x00;
 653         if (state->csc_mask & SS_DETECT) {
 654                 reg |= I365_CSC_DETECT;
 655         }
 656         if (state->flags & SS_IOCARD) {
 657                 if (state->csc_mask & SS_STSCHG)
 658                         reg |= I365_CSC_STSCHG;
 659         } else {
 660                 if (state->csc_mask & SS_BATDEAD)
 661                         reg |= I365_CSC_BVD1;
 662                 if (state->csc_mask & SS_BATWARN)
 663                         reg |= I365_CSC_BVD2;
 664                 if (state->csc_mask & SS_READY)
 665                         reg |= I365_CSC_READY;
 666
 667         }
 668
 669         /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
 670
 671         indirect_write(sock,I365_CSCINT,reg);
 672         (void)indirect_read(sock,I365_CSC);
 673
 674         leave("i82092aa_set_socket");
 675         return 0;
 676 }
 677
 678 static int i82092aa_get_io_map(unsigned int sock, struct pccard_io_map *io)
 679 {
 680         unsigned char map, ioctl, addr;
 681
 682         enter("i82092aa_get_io_map");
 683         map = io->map;
 684         if (map > 1) {
 685                 leave("i82092aa_get_io_map with -EINVAL");
 686                 return -EINVAL;
 687         }
 688
 689         /* FIXME: How does this fit in with the PCI resource (re)allocation */
 690         io->start = indirect_read16(sock, I365_IO(map)+I365_W_START);
 691         io->stop  = indirect_read16(sock, I365_IO(map)+I365_W_START);
 692
 693         ioctl = indirect_read(sock,I365_IOCTL); /* IOCREG: I/O Control Register */
 694         addr  = indirect_read(sock,I365_ADDRWIN); /* */
 695
 696         io->speed = to_ns(ioctl & I365_IOCTL_WAIT(map)) ? 1 : 0; /* check this out later */
 697         io->flags = 0;
 698
 699         if (addr & I365_IOCTL_16BIT(map))
 700                 io->flags |= MAP_AUTOSZ;
 701
 702         leave("i82092aa_get_io_map");
 703         return 0;
 704 }
 705
 706 static int i82092aa_set_io_map(unsigned sock, struct pccard_io_map *io)
 707 {
 708         unsigned char map, ioctl;
 709
 710         enter("i82092aa_set_io_map");
 711
 712         map = io->map;
 713
 714         /* Check error conditions */
 715         if (map > 1) {
 716                 leave("i82092aa_set_io_map with invalid map");
 717                 return -EINVAL;
 718         }
 719         if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
 720                 leave("i82092aa_set_io_map with invalid io");
 721                 return -EINVAL;
 722         }
 723
 724         /* Turn off the window before changing anything */
 725         if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
 726                 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
 727
 728 /*      printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop);  */
 729
 730         /* write the new values */
 731         indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
 732         indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
 733
 734         ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
 735
 736         if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
 737                 ioctl |= I365_IOCTL_16BIT(map);
 738
 739         indirect_write(sock,I365_IOCTL,ioctl);
 740
 741         /* Turn the window back on if needed */
 742         if (io->flags & MAP_ACTIVE)
 743                 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
 744
 745         leave("i82092aa_set_io_map");
 746         return 0;
 747 }
 748
 749 static int i82092aa_get_mem_map(unsigned sock, struct pccard_mem_map *mem)
 750 {
 751         unsigned short base, i;
 752         unsigned char map, addr;
 753
 754         enter("i82092aa_get_mem_map");
 755
 756         mem->flags = 0;
 757         mem->speed = 0;
 758         map = mem->map;
 759         if (map > 4) {
 760                 leave("i82092aa_get_mem_map: -EINVAL");
 761                 return -EINVAL;
 762         }
 763
 764         addr = indirect_read(sock, I365_ADDRWIN);
 765
 766         if (addr & I365_ENA_MEM(map))
 767                 mem->flags |= MAP_ACTIVE;               /* yes this mapping is active */
 768
 769         base = I365_MEM(map);
 770
 771         /* Find the start address - this register also has mapping info */
 772
 773         i = indirect_read16(sock,base+I365_W_START);
 774         if (i & I365_MEM_16BIT)
 775                 mem->flags |= MAP_16BIT;
 776         if (i & I365_MEM_0WS)
 777                 mem->flags |= MAP_0WS;
 778
 779         mem->sys_start = ((unsigned long)(i & 0x0fff) << 12);
 780
 781         /* Find the end address - this register also has speed info */
 782         i = indirect_read16(sock,base+I365_W_STOP);
 783         if (i & I365_MEM_WS0)
 784                 mem->speed = 1;
 785         if (i & I365_MEM_WS1)
 786                 mem->speed += 2;
 787         mem->speed = to_ns(mem->speed);
 788         mem->sys_stop = ( (unsigned long)(i & 0x0fff) << 12) + 0x0fff;
 789
 790         /* Find the card start address, also some more MAP attributes */
 791
 792         i = indirect_read16(sock, base+I365_W_OFF);
 793         if (i & I365_MEM_WRPROT)
 794                 mem->flags |= MAP_WRPROT;
 795         if (i & I365_MEM_REG)
 796                 mem->flags |= MAP_ATTRIB;
 797         mem->card_start = ( (unsigned long)(i & 0x3fff)<12) + mem->sys_start;
 798         mem->card_start &=  0x3ffffff;
 799
 800         printk("Card %i is from %lx to %lx \n",sock,mem->sys_start,mem->sys_stop);
 801
 802         leave("i82092aa_get_mem_map");
 803         return 0;
 804
 805 }
 806
 807 static int i82092aa_set_mem_map(unsigned sock, struct pccard_mem_map *mem)
 808 {
 809         unsigned short base, i;
 810         unsigned char map;
 811
 812         enter("i82092aa_set_mem_map");
 813
 814         map = mem->map;
 815         if (map > 4) {
 816                 leave("i82092aa_set_mem_map: invalid map");
 817                 return -EINVAL;
 818         }
 819
 820
 821         if ( (mem->card_start > 0x3ffffff) || (mem->sys_start > mem->sys_stop) ||
 822              (mem->speed > 1000) ) {
 823                 leave("i82092aa_set_mem_map: invalid address / speed");
 824                 printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,mem->sys_start, mem->sys_stop, mem->card_start);
 825                 return -EINVAL;
 826         }
 827
 828         /* Turn off the window before changing anything */
 829         if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
 830                       indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
 831
 832
 833 /*      printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, mem->sys_start,mem->sys_stop,sock,mem->speed,mem->flags & MAP_ACTIVE);  */
 834
 835         /* write the start address */
 836         base = I365_MEM(map);
 837         i = (mem->sys_start >> 12) & 0x0fff;
 838         if (mem->flags & MAP_16BIT)
 839                 i |= I365_MEM_16BIT;
 840         if (mem->flags & MAP_0WS)
 841                 i |= I365_MEM_0WS;
 842         indirect_write16(sock,base+I365_W_START,i);
 843
 844         /* write the stop address */
 845
 846         i= (mem->sys_stop >> 12) & 0x0fff;
 847         switch (to_cycles(mem->speed)) {
 848                 case 0:
 849                         break;
 850                 case 1:
 851                         i |= I365_MEM_WS0;
 852                         break;
 853                 case 2:
 854                         i |= I365_MEM_WS1;
 855                         break;
 856                 default:
 857                         i |= I365_MEM_WS1 | I365_MEM_WS0;
 858                         break;
 859         }
 860
 861         indirect_write16(sock,base+I365_W_STOP,i);
 862
 863         /* card start */
 864
 865         i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
 866         if (mem->flags & MAP_WRPROT)
 867                 i |= I365_MEM_WRPROT;
 868         if (mem->flags & MAP_ATTRIB) {
 869 /*              printk("requesting attribute memory for socket %i\n",sock);*/
 870                 i |= I365_MEM_REG;
 871         } else {
 872 /*              printk("requesting normal memory for socket %i\n",sock);*/
 873         }
 874         indirect_write16(sock,base+I365_W_OFF,i);
 875
 876         /* Enable the window if necessary */
 877         if (mem->flags & MAP_ACTIVE)
 878                 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
 879
 880         leave("i82092aa_set_mem_map");
 881         return 0;
 882 }
 883
 884 static void i82092aa_proc_setup(unsigned int sock, struct proc_dir_entry *base)
 885 {
 886
 887 }
 888 /* Module stuff */
 889
 890 static int i82092aa_module_init(void)
 891 {
 892         enter("i82092aa_module_init");
 893         pci_register_driver(&i82092aa_pci_drv);
 894         leave("i82092aa_module_init");
 895         return 0;
 896 }
 897
 898 static void i82092aa_module_exit(void)
 899 {
 900         enter("i82092aa_module_exit");
 901         pci_unregister_driver(&i82092aa_pci_drv);
 902         unregister_ss_entry(&i82092aa_operations);
 903         if (sockets[0].io_base>0)
 904                          release_region(sockets[0].io_base, 2);
 905         leave("i82092aa_module_exit");
 906 }
 907
 908 module_init(i82092aa_module_init);
 909 module_exit(i82092aa_module_exit);
 910