1 /*======================================================================
3 Device driver for Intel 82365 and compatible PC Card controllers.
5 i82365.c 1.265 1999/11/10 18:36:21
7 The contents of this file are subject to the Mozilla Public
8 License Version 1.1 (the "License"); you may not use this file
9 except in compliance with the License. You may obtain a copy of
10 the License at http://www.mozilla.org/MPL/
12 Software distributed under the License is distributed on an "AS
13 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
14 implied. See the License for the specific language governing
15 rights and limitations under the License.
17 The initial developer of the original code is David A. Hinds
18 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
19 are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
21 Alternatively, the contents of this file may be used under the
22 terms of the GNU General Public License version 2 (the "GPL"), in which
23 case the provisions of the GPL are applicable instead of the
24 above. If you wish to allow the use of your version of this file
25 only under the terms of the GPL and not to allow others to use
26 your version of this file under the MPL, indicate your decision
27 by deleting the provisions above and replace them with the notice
28 and other provisions required by the GPL. If you do not delete
29 the provisions above, a recipient may use your version of this
30 file under either the MPL or the GPL.
32 ======================================================================*/
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/config.h>
37 #include <linux/types.h>
38 #include <linux/fcntl.h>
39 #include <linux/string.h>
40 #include <linux/kernel.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/ioport.h>
47 #include <linux/delay.h>
48 #include <linux/proc_fs.h>
51 #include <asm/bitops.h>
52 #include <asm/segment.h>
53 #include <asm/system.h>
55 #include <pcmcia/version.h>
56 #include <pcmcia/cs_types.h>
57 #include <pcmcia/ss.h>
58 #include <pcmcia/cs.h>
60 #include <linux/isapnp.h>
62 /* ISA-bus controllers */
70 static int pc_debug = PCMCIA_DEBUG;
71 MODULE_PARM(pc_debug, "i");
72 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
73 static const char *version =
74 "i82365.c 1.265 1999/11/10 18:36:21 (David Hinds)";
76 #define DEBUG(n, args...) do { } while (0)
79 static void irq_count(int, void *, struct pt_regs *);
80 static inline int _check_irq(int irq, int flags)
82 if (request_irq(irq, irq_count, flags, "x", irq_count) != 0)
84 free_irq(irq, irq_count);
88 /*====================================================================*/
90 /* Parameters that can be set with 'insmod' */
93 /* Default base address for i82365sl and other ISA chips */
94 static int i365_base = 0x3e0;
95 /* Should we probe at 0x3e2 for an extra ISA controller? */
96 static int extra_sockets = 0;
97 /* Specify a socket number to ignore */
98 static int ignore = -1;
99 /* Bit map or list of interrupts to choose from */
100 static u_int irq_mask = 0xffff;
101 static int irq_list[16] = { -1 };
102 /* The card status change interrupt -- 0 means autoselect */
103 static int cs_irq = 0;
106 /* Probe for safe interrupts? */
107 static int do_scan = 1;
108 /* Poll status interval -- 0 means default to interrupt */
109 static int poll_interval = 0;
110 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
111 static int cycle_time = 120;
114 static int has_dma = -1;
115 static int has_led = -1;
116 static int has_ring = -1;
117 static int dynamic_mode = 0;
118 static int freq_bypass = -1;
119 static int setup_time = -1;
120 static int cmd_time = -1;
121 static int recov_time = -1;
125 static int async_clock = -1;
126 static int cable_mode = -1;
127 static int wakeup = 0;
131 MODULE_PARM(i365_base, "i");
132 MODULE_PARM(ignore, "i");
133 MODULE_PARM(extra_sockets, "i");
134 MODULE_PARM(irq_mask, "i");
135 MODULE_PARM(irq_list, "1-16i");
136 MODULE_PARM(cs_irq, "i");
137 MODULE_PARM(async_clock, "i");
138 MODULE_PARM(cable_mode, "i");
139 MODULE_PARM(wakeup, "i");
142 MODULE_PARM(do_scan, "i");
143 MODULE_PARM(poll_interval, "i");
144 MODULE_PARM(cycle_time, "i");
145 MODULE_PARM(has_dma, "i");
146 MODULE_PARM(has_led, "i");
147 MODULE_PARM(has_ring, "i");
148 MODULE_PARM(dynamic_mode, "i");
149 MODULE_PARM(freq_bypass, "i");
150 MODULE_PARM(setup_time, "i");
151 MODULE_PARM(cmd_time, "i");
152 MODULE_PARM(recov_time, "i");
154 /*====================================================================*/
156 typedef struct cirrus_state_t {
161 typedef struct vg46x_state_t {
165 typedef struct socket_info_t {
171 void (*handler)(void *info, u_int events);
173 #ifdef CONFIG_PROC_FS
174 struct proc_dir_entry *proc;
177 cirrus_state_t cirrus;
182 /* Where we keep track of our sockets... */
183 static int sockets = 0;
184 static socket_info_t socket[8] = {
188 /* Default ISA interrupt mask */
189 #define I365_MASK 0xdeb8 /* irq 15,14,12,11,10,9,7,5,4,3 */
193 static spinlock_t isa_lock = SPIN_LOCK_UNLOCKED;
194 #define ISA_LOCK(n, f) spin_lock_irqsave(&isa_lock, f)
195 #define ISA_UNLOCK(n, f) spin_unlock_irqrestore(&isa_lock, f)
197 #define ISA_LOCK(n, f) do { } while (0)
198 #define ISA_UNLOCK(n, f) do { } while (0)
201 static struct timer_list poll_timer;
203 /*====================================================================*/
205 /* Default settings for PCI command configuration register */
206 #define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
207 PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
209 /* These definitions must match the pcic table! */
211 typedef enum pcic_id {
212 IS_I82365A, IS_I82365B, IS_I82365DF,
213 IS_IBM, IS_RF5Cx96, IS_VLSI, IS_VG468, IS_VG469,
214 IS_PD6710, IS_PD672X, IS_VT83C469,
218 /* Flags for classifying groups of controllers */
219 #define IS_VADEM 0x0001
220 #define IS_CIRRUS 0x0002
222 #define IS_O2MICRO 0x0008
223 #define IS_VIA 0x0010
224 #define IS_TOPIC 0x0020
225 #define IS_RICOH 0x0040
226 #define IS_UNKNOWN 0x0400
227 #define IS_VG_PWR 0x0800
228 #define IS_DF_PWR 0x1000
229 #define IS_PCI 0x2000
230 #define IS_ALIVE 0x8000
232 typedef struct pcic_t {
237 static pcic_t pcic[] = {
239 { "Intel i82365sl A step", 0 },
240 { "Intel i82365sl B step", 0 },
241 { "Intel i82365sl DF", IS_DF_PWR },
243 { "Ricoh RF5C296/396", 0 },
244 { "VLSI 82C146", 0 },
245 { "Vadem VG-468", IS_VADEM },
246 { "Vadem VG-469", IS_VADEM|IS_VG_PWR },
247 { "Cirrus PD6710", IS_CIRRUS },
248 { "Cirrus PD672x", IS_CIRRUS },
249 { "VIA VT83C469", IS_CIRRUS|IS_VIA },
253 #define PCIC_COUNT (sizeof(pcic)/sizeof(pcic_t))
255 /*====================================================================*/
257 static spinlock_t bus_lock = SPIN_LOCK_UNLOCKED;
259 static u_char i365_get(u_short sock, u_short reg)
262 spin_lock_irqsave(&bus_lock,flags);
264 ioaddr_t port = socket[sock].ioaddr;
266 reg = I365_REG(socket[sock].psock, reg);
267 outb(reg, port); val = inb(port+1);
268 spin_unlock_irqrestore(&bus_lock,flags);
273 static void i365_set(u_short sock, u_short reg, u_char data)
276 spin_lock_irqsave(&bus_lock,flags);
278 ioaddr_t port = socket[sock].ioaddr;
279 u_char val = I365_REG(socket[sock].psock, reg);
280 outb(val, port); outb(data, port+1);
281 spin_unlock_irqrestore(&bus_lock,flags);
285 static void i365_bset(u_short sock, u_short reg, u_char mask)
287 u_char d = i365_get(sock, reg);
289 i365_set(sock, reg, d);
292 static void i365_bclr(u_short sock, u_short reg, u_char mask)
294 u_char d = i365_get(sock, reg);
296 i365_set(sock, reg, d);
299 static void i365_bflip(u_short sock, u_short reg, u_char mask, int b)
301 u_char d = i365_get(sock, reg);
306 i365_set(sock, reg, d);
309 static u_short i365_get_pair(u_short sock, u_short reg)
312 a = i365_get(sock, reg);
313 b = i365_get(sock, reg+1);
317 static void i365_set_pair(u_short sock, u_short reg, u_short data)
319 i365_set(sock, reg, data & 0xff);
320 i365_set(sock, reg+1, data >> 8);
323 /*======================================================================
325 Code to save and restore global state information for Cirrus
326 PD67xx controllers, and to set and report global configuration
329 The VIA controllers also use these routines, as they are mostly
330 Cirrus lookalikes, without the timing registers.
332 ======================================================================*/
334 #define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b))))
336 static void cirrus_get_state(u_short s)
339 cirrus_state_t *p = &socket[s].state.cirrus;
340 p->misc1 = i365_get(s, PD67_MISC_CTL_1);
341 p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
342 p->misc2 = i365_get(s, PD67_MISC_CTL_2);
343 for (i = 0; i < 6; i++)
344 p->timer[i] = i365_get(s, PD67_TIME_SETUP(0)+i);
347 static void cirrus_set_state(u_short s)
351 cirrus_state_t *p = &socket[s].state.cirrus;
353 misc = i365_get(s, PD67_MISC_CTL_2);
354 i365_set(s, PD67_MISC_CTL_2, p->misc2);
355 if (misc & PD67_MC2_SUSPEND) mdelay(50);
356 misc = i365_get(s, PD67_MISC_CTL_1);
357 misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
358 i365_set(s, PD67_MISC_CTL_1, misc | p->misc1);
359 for (i = 0; i < 6; i++)
360 i365_set(s, PD67_TIME_SETUP(0)+i, p->timer[i]);
363 static u_int __init cirrus_set_opts(u_short s, char *buf)
365 socket_info_t *t = &socket[s];
366 cirrus_state_t *p = &socket[s].state.cirrus;
369 if (has_ring == -1) has_ring = 1;
370 flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring);
371 flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode);
372 if (p->misc2 & PD67_MC2_IRQ15_RI)
373 strcat(buf, " [ring]");
374 if (p->misc2 & PD67_MC2_DYNAMIC_MODE)
375 strcat(buf, " [dyn mode]");
376 if (p->misc1 & PD67_MC1_INPACK_ENA)
377 strcat(buf, " [inpack]");
378 if (!(t->flags & IS_PCI)) {
379 if (p->misc2 & PD67_MC2_IRQ15_RI)
382 strcat(buf, " [led]");
386 strcat(buf, " [dma]");
388 flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass);
389 if (p->misc2 & PD67_MC2_FREQ_BYPASS)
390 strcat(buf, " [freq bypass]");
393 if (!(t->flags & IS_VIA)) {
395 p->timer[0] = p->timer[3] = setup_time;
397 p->timer[1] = cmd_time;
398 p->timer[4] = cmd_time*2+4;
400 if (p->timer[1] == 0) {
401 p->timer[1] = 6; p->timer[4] = 16;
402 if (p->timer[0] == 0)
403 p->timer[0] = p->timer[3] = 1;
406 p->timer[2] = p->timer[5] = recov_time;
408 sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1],
409 p->timer[2], p->timer[3], p->timer[4], p->timer[5]);
414 /*======================================================================
416 Code to save and restore global state information for Vadem VG468
417 and VG469 controllers, and to set and report global configuration
420 ======================================================================*/
424 static void vg46x_get_state(u_short s)
426 vg46x_state_t *p = &socket[s].state.vg46x;
427 p->ctl = i365_get(s, VG468_CTL);
428 if (socket[s].type == IS_VG469)
429 p->ema = i365_get(s, VG469_EXT_MODE);
432 static void vg46x_set_state(u_short s)
434 vg46x_state_t *p = &socket[s].state.vg46x;
435 i365_set(s, VG468_CTL, p->ctl);
436 if (socket[s].type == IS_VG469)
437 i365_set(s, VG469_EXT_MODE, p->ema);
440 static u_int __init vg46x_set_opts(u_short s, char *buf)
442 vg46x_state_t *p = &socket[s].state.vg46x;
444 flip(p->ctl, VG468_CTL_ASYNC, async_clock);
445 flip(p->ema, VG469_MODE_CABLE, cable_mode);
446 if (p->ctl & VG468_CTL_ASYNC)
447 strcat(buf, " [async]");
448 if (p->ctl & VG468_CTL_INPACK)
449 strcat(buf, " [inpack]");
450 if (socket[s].type == IS_VG469) {
451 u_char vsel = i365_get(s, VG469_VSELECT);
452 if (vsel & VG469_VSEL_EXT_STAT) {
453 strcat(buf, " [ext mode]");
454 if (vsel & VG469_VSEL_EXT_BUS)
455 strcat(buf, " [isa buf]");
457 if (p->ema & VG469_MODE_CABLE)
458 strcat(buf, " [cable]");
459 if (p->ema & VG469_MODE_COMPAT)
460 strcat(buf, " [c step]");
468 /*======================================================================
470 Generic routines to get and set controller options
472 ======================================================================*/
474 static void get_bridge_state(u_short s)
476 socket_info_t *t = &socket[s];
477 if (t->flags & IS_CIRRUS)
480 else if (t->flags & IS_VADEM)
485 static void set_bridge_state(u_short s)
487 socket_info_t *t = &socket[s];
488 if (t->flags & IS_CIRRUS)
491 i365_set(s, I365_GBLCTL, 0x00);
492 i365_set(s, I365_GENCTL, 0x00);
494 i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr);
496 if (t->flags & IS_VADEM)
501 static u_int __init set_bridge_opts(u_short s, u_short ns)
507 for (i = s; i < s+ns; i++) {
508 if (socket[i].flags & IS_ALIVE) {
509 printk(KERN_INFO " host opts [%d]: already alive!\n", i);
514 if (socket[i].flags & IS_CIRRUS)
515 m = cirrus_set_opts(i, buf);
517 else if (socket[i].flags & IS_VADEM)
518 m = vg46x_set_opts(i, buf);
521 printk(KERN_INFO " host opts [%d]:%s\n", i,
522 (*buf) ? buf : " none");
527 /*======================================================================
529 Interrupt testing code, for ISA and PCI interrupts
531 ======================================================================*/
533 static volatile u_int irq_hits;
534 static u_short irq_sock;
536 static void irq_count(int irq, void *dev, struct pt_regs *regs)
538 i365_get(irq_sock, I365_CSC);
540 DEBUG(2, "-> hit on irq %d\n", irq);
543 static u_int __init test_irq(u_short sock, int irq)
545 DEBUG(2, " testing ISA irq %d\n", irq);
546 if (request_irq(irq, irq_count, 0, "scan", irq_count) != 0)
548 irq_hits = 0; irq_sock = sock;
549 __set_current_state(TASK_UNINTERRUPTIBLE);
550 schedule_timeout(HZ/100);
552 free_irq(irq, irq_count);
553 DEBUG(2, " spurious hit!\n");
557 /* Generate one interrupt */
558 i365_set(sock, I365_CSCINT, I365_CSC_DETECT | (irq << 4));
559 i365_bset(sock, I365_GENCTL, I365_CTL_SW_IRQ);
562 free_irq(irq, irq_count);
564 /* mask all interrupts */
565 i365_set(sock, I365_CSCINT, 0);
566 DEBUG(2, " hits = %d\n", irq_hits);
568 return (irq_hits != 1);
573 static u_int __init isa_scan(u_short sock, u_int mask0)
580 /* Don't probe level-triggered interrupts -- reserved for PCI */
581 mask0 &= ~(inb(PIC) | (inb(PIC+1) << 8));
585 set_bridge_state(sock);
586 i365_set(sock, I365_CSCINT, 0);
587 for (i = 0; i < 16; i++)
588 if ((mask0 & (1 << i)) && (test_irq(sock, i) == 0))
590 for (i = 0; i < 16; i++)
591 if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0))
595 printk(KERN_INFO " ISA irqs (");
599 /* Fallback: just find interrupts that aren't in use */
600 for (i = 0; i < 16; i++)
601 if ((mask0 & (1 << i)) && (_check_irq(i, 0) == 0))
604 /* If scan failed, default to polled status */
605 if (!cs_irq && (poll_interval == 0)) poll_interval = HZ;
609 for (i = 0; i < 16; i++)
611 printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i);
612 if (mask1 == 0) printk("none!");
617 #endif /* CONFIG_ISA */
619 /*====================================================================*/
621 /* Time conversion functions */
623 static int to_cycles(int ns)
625 return ns/cycle_time;
628 static int to_ns(int cycles)
630 return cycle_time*cycles;
633 /*====================================================================*/
637 static int __init identify(u_short port, u_short sock)
642 /* Use the next free entry in the socket table */
643 socket[sockets].ioaddr = port;
644 socket[sockets].psock = sock;
646 /* Wake up a sleepy Cirrus controller */
648 i365_bclr(sockets, PD67_MISC_CTL_2, PD67_MC2_SUSPEND);
649 /* Pause at least 50 ms */
653 if ((val = i365_get(sockets, I365_IDENT)) & 0x70)
657 type = IS_I82365A; break;
659 type = IS_I82365B; break;
661 type = IS_I82365DF; break;
662 case 0x88: case 0x89: case 0x8a:
663 type = IS_IBM; break;
666 /* Check for Vadem VG-468 chips */
669 i365_bset(sockets, VG468_MISC, VG468_MISC_VADEMREV);
670 val = i365_get(sockets, I365_IDENT);
671 if (val & I365_IDENT_VADEM) {
672 i365_bclr(sockets, VG468_MISC, VG468_MISC_VADEMREV);
673 type = ((val & 7) >= 4) ? IS_VG469 : IS_VG468;
676 /* Check for Ricoh chips */
677 val = i365_get(sockets, RF5C_CHIP_ID);
678 if ((val == RF5C_CHIP_RF5C296) || (val == RF5C_CHIP_RF5C396))
681 /* Check for Cirrus CL-PD67xx chips */
682 i365_set(sockets, PD67_CHIP_INFO, 0);
683 val = i365_get(sockets, PD67_CHIP_INFO);
684 if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) {
685 val = i365_get(sockets, PD67_CHIP_INFO);
686 if ((val & PD67_INFO_CHIP_ID) == 0) {
687 type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710;
688 i365_set(sockets, PD67_EXT_INDEX, 0xe5);
689 if (i365_get(sockets, PD67_EXT_INDEX) != 0xe5)
698 /*======================================================================
700 See if a card is present, powered up, in IO mode, and already
701 bound to a (non PC Card) Linux driver. We leave these alone.
703 We make an exception for cards that seem to be serial devices.
705 ======================================================================*/
707 static int __init is_alive(u_short sock)
712 stat = i365_get(sock, I365_STATUS);
713 start = i365_get_pair(sock, I365_IO(0)+I365_W_START);
714 stop = i365_get_pair(sock, I365_IO(0)+I365_W_STOP);
715 if ((stat & I365_CS_DETECT) && (stat & I365_CS_POWERON) &&
716 (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) &&
717 (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(0)) &&
718 (check_region(start, stop-start+1) != 0) &&
719 ((start & 0xfeef) != 0x02e8))
725 /*====================================================================*/
727 static void __init add_socket(u_short port, int psock, int type)
729 socket[sockets].ioaddr = port;
730 socket[sockets].psock = psock;
731 socket[sockets].type = type;
732 socket[sockets].flags = pcic[type].flags;
733 if (is_alive(sockets))
734 socket[sockets].flags |= IS_ALIVE;
738 static void __init add_pcic(int ns, int type)
740 u_int mask = 0, i, base;
741 int use_pci = 0, isa_irq = 0;
742 socket_info_t *t = &socket[sockets-ns];
745 if (t->ioaddr > 0) request_region(t->ioaddr, 2, "i82365");
747 if (base == 0) printk("\n");
748 printk(KERN_INFO " %s", pcic[type].name);
749 printk(" ISA-to-PCMCIA at port %#x ofs 0x%02x",
750 t->ioaddr, t->psock*0x40);
751 printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : ""));
754 /* Set host options, build basic interrupt mask */
755 if (irq_list[0] == -1)
758 for (i = mask = 0; i < 16; i++)
759 mask |= (1<<irq_list[i]);
761 mask &= I365_MASK & set_bridge_opts(base, ns);
763 /* Scan for ISA interrupts */
764 mask = isa_scan(base, mask);
766 printk(KERN_INFO " PCI card interrupts,");
770 /* Poll if only two interrupts available */
771 if (!use_pci && !poll_interval) {
772 u_int tmp = (mask & 0xff20);
774 if ((tmp & (tmp-1)) == 0)
777 /* Only try an ISA cs_irq if this is the first controller */
778 if (!use_pci && !grab_irq && (cs_irq || !poll_interval)) {
779 /* Avoid irq 12 unless it is explicitly requested */
780 u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12));
781 for (cs_irq = 15; cs_irq > 0; cs_irq--)
782 if ((cs_mask & (1 << cs_irq)) &&
783 (_check_irq(cs_irq, 0) == 0))
788 printk(" status change on irq %d\n", cs_irq);
793 if (!use_pci && !isa_irq) {
794 if (poll_interval == 0)
796 printk(" polling interval = %d ms\n",
797 poll_interval * 1000 / HZ);
801 /* Update socket interrupt information, capabilities */
802 for (i = 0; i < ns; i++) {
803 t[i].cap.features |= SS_CAP_PCCARD;
804 t[i].cap.map_size = 0x1000;
805 t[i].cap.irq_mask = mask;
806 t[i].cs_irq = isa_irq;
812 /*====================================================================*/
816 #if defined(CONFIG_ISAPNP) || (defined(CONFIG_ISAPNP_MODULE) && defined(MODULE))
817 #define I82365_ISAPNP
821 static struct isapnp_device_id id_table[] __initdata = {
822 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
823 ISAPNP_FUNCTION(0x0e00), (unsigned long) "Intel 82365-Compatible" },
824 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
825 ISAPNP_FUNCTION(0x0e01), (unsigned long) "Cirrus Logic CL-PD6720" },
826 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
827 ISAPNP_FUNCTION(0x0e02), (unsigned long) "VLSI VL82C146" },
830 MODULE_DEVICE_TABLE(isapnp, id_table);
832 static struct pci_dev *i82365_pnpdev;
835 static void __init isa_probe(void)
837 int i, j, sock, k, ns, id;
840 struct isapnp_device_id *devid;
843 for (devid = id_table; devid->vendor; devid++) {
844 if ((dev = isapnp_find_dev(NULL, devid->vendor, devid->function, NULL))) {
847 if (dev->prepare && dev->prepare(dev) < 0) {
848 printk("prepare failed\n");
852 if (dev->activate && dev->activate(dev) < 0) {
853 printk("activate failed\n");
857 if ((i365_base = pci_resource_start(dev, 0))) {
858 printk("no resources ?\n");
867 if (check_region(i365_base, 2) != 0) {
869 printk("port conflict at %#x\n", i365_base);
873 id = identify(i365_base, 0);
874 if ((id == IS_I82365DF) && (identify(i365_base, 1) != id)) {
875 for (i = 0; i < 4; i++) {
876 if (i == ignore) continue;
877 port = i365_base + ((i & 1) << 2) + ((i & 2) << 1);
879 if (identify(port, sock) == IS_I82365DF) {
880 add_socket(port, sock, IS_VLSI);
881 add_pcic(1, IS_VLSI);
885 for (i = 0; i < (extra_sockets ? 8 : 4); i += 2) {
886 port = i365_base + 2*(i>>2);
888 id = identify(port, sock);
889 if (id < 0) continue;
891 for (j = ns = 0; j < 2; j++) {
892 /* Does the socket exist? */
893 if ((ignore == i+j) || (identify(port, sock+j) < 0))
895 /* Check for bad socket decode */
896 for (k = 0; k <= sockets; k++)
897 i365_set(k, I365_MEM(0)+I365_W_OFF, k);
898 for (k = 0; k <= sockets; k++)
899 if (i365_get(k, I365_MEM(0)+I365_W_OFF) != k)
901 if (k <= sockets) break;
902 add_socket(port, sock+j, id); ns++;
904 if (ns != 0) add_pcic(ns, id);
911 /*====================================================================*/
913 static u_int pending_events[8];
914 static spinlock_t pending_event_lock = SPIN_LOCK_UNLOCKED;
916 static void pcic_bh(void *dummy)
921 for (i=0; i < sockets; i++) {
922 spin_lock_irq(&pending_event_lock);
923 events = pending_events[i];
924 pending_events[i] = 0;
925 spin_unlock_irq(&pending_event_lock);
927 SS_DETECT events need a small delay here. The reason for this is that
928 the "is there a card" electronics need time to see the card after the
929 "we have a card coming in" electronics have seen it.
931 if (events & SS_DETECT)
933 if (socket[i].handler)
934 socket[i].handler(socket[i].info, events);
938 static struct tq_struct pcic_task = {
942 static unsigned long last_detect_jiffies;
944 static void pcic_interrupt(int irq, void *dev,
945 struct pt_regs *regs)
948 u_int events, active;
953 DEBUG(4, "i82365: pcic_interrupt(%d)\n", irq);
955 for (j = 0; j < 20; j++) {
957 for (i = 0; i < sockets; i++) {
958 if ((socket[i].cs_irq != irq) &&
959 (socket[i].cap.pci_irq != irq))
962 csc = i365_get(i, I365_CSC);
963 if ((csc == 0) || (!socket[i].handler) ||
964 (i365_get(i, I365_IDENT) & 0x70)) {
965 ISA_UNLOCK(i, flags);
968 events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
971 /* Several sockets will send multiple "new card detected"
972 events in rapid succession. However, the rest of the pcmcia expects
973 only one such event. We just ignore these events by having a
977 if ((jiffies - last_detect_jiffies)<(HZ/20))
979 last_detect_jiffies = jiffies;
983 if (i365_get(i, I365_INTCTL) & I365_PC_IOCARD)
984 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
986 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
987 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
988 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
990 ISA_UNLOCK(i, flags);
991 DEBUG(2, "i82365: socket %d event 0x%02x\n", i, events);
994 spin_lock(&pending_event_lock);
995 pending_events[i] |= events;
996 spin_unlock(&pending_event_lock);
997 schedule_task(&pcic_task);
1004 printk(KERN_NOTICE "i82365: infinite loop in interrupt handler\n");
1006 DEBUG(4, "i82365: interrupt done\n");
1007 } /* pcic_interrupt */
1009 static void pcic_interrupt_wrapper(u_long data)
1011 pcic_interrupt(0, NULL, NULL);
1012 poll_timer.expires = jiffies + poll_interval;
1013 add_timer(&poll_timer);
1016 /*====================================================================*/
1018 static int pcic_register_callback(unsigned int sock, void (*handler)(void *, unsigned int), void * info)
1020 socket[sock].handler = handler;
1021 socket[sock].info = info;
1022 if (handler == NULL) {
1028 } /* pcic_register_callback */
1030 /*====================================================================*/
1032 static int pcic_inquire_socket(unsigned int sock, socket_cap_t *cap)
1034 *cap = socket[sock].cap;
1036 } /* pcic_inquire_socket */
1038 /*====================================================================*/
1040 static int i365_get_status(u_short sock, u_int *value)
1044 status = i365_get(sock, I365_STATUS);
1045 *value = ((status & I365_CS_DETECT) == I365_CS_DETECT)
1048 if (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD)
1049 *value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
1051 *value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
1052 *value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
1054 *value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
1055 *value |= (status & I365_CS_READY) ? SS_READY : 0;
1056 *value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
1059 if (socket[sock].type == IS_VG469) {
1060 status = i365_get(sock, VG469_VSENSE);
1061 if (socket[sock].psock & 1) {
1062 *value |= (status & VG469_VSENSE_B_VS1) ? 0 : SS_3VCARD;
1063 *value |= (status & VG469_VSENSE_B_VS2) ? 0 : SS_XVCARD;
1065 *value |= (status & VG469_VSENSE_A_VS1) ? 0 : SS_3VCARD;
1066 *value |= (status & VG469_VSENSE_A_VS2) ? 0 : SS_XVCARD;
1071 DEBUG(1, "i82365: GetStatus(%d) = %#4.4x\n", sock, *value);
1073 } /* i365_get_status */
1075 /*====================================================================*/
1077 static int i365_get_socket(u_short sock, socket_state_t *state)
1079 socket_info_t *t = &socket[sock];
1080 u_char reg, vcc, vpp;
1082 reg = i365_get(sock, I365_POWER);
1083 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
1084 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
1085 vcc = reg & I365_VCC_MASK; vpp = reg & I365_VPP1_MASK;
1086 state->Vcc = state->Vpp = 0;
1087 if (t->flags & IS_CIRRUS) {
1088 if (i365_get(sock, PD67_MISC_CTL_1) & PD67_MC1_VCC_3V) {
1089 if (reg & I365_VCC_5V) state->Vcc = 33;
1090 if (vpp == I365_VPP1_5V) state->Vpp = 33;
1092 if (reg & I365_VCC_5V) state->Vcc = 50;
1093 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1095 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1096 } else if (t->flags & IS_VG_PWR) {
1097 if (i365_get(sock, VG469_VSELECT) & VG469_VSEL_VCC) {
1098 if (reg & I365_VCC_5V) state->Vcc = 33;
1099 if (vpp == I365_VPP1_5V) state->Vpp = 33;
1101 if (reg & I365_VCC_5V) state->Vcc = 50;
1102 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1104 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1105 } else if (t->flags & IS_DF_PWR) {
1106 if (vcc == I365_VCC_3V) state->Vcc = 33;
1107 if (vcc == I365_VCC_5V) state->Vcc = 50;
1108 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1109 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1111 if (reg & I365_VCC_5V) {
1113 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1114 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1118 /* IO card, RESET flags, IO interrupt */
1119 reg = i365_get(sock, I365_INTCTL);
1120 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
1121 if (reg & I365_PC_IOCARD) state->flags |= SS_IOCARD;
1122 state->io_irq = reg & I365_IRQ_MASK;
1124 /* speaker control */
1125 if (t->flags & IS_CIRRUS) {
1126 if (i365_get(sock, PD67_MISC_CTL_1) & PD67_MC1_SPKR_ENA)
1127 state->flags |= SS_SPKR_ENA;
1130 /* Card status change mask */
1131 reg = i365_get(sock, I365_CSCINT);
1132 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
1133 if (state->flags & SS_IOCARD)
1134 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
1136 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
1137 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
1138 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
1141 DEBUG(1, "i82365: GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, "
1142 "io_irq %d, csc_mask %#2.2x\n", sock, state->flags,
1143 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
1145 } /* i365_get_socket */
1147 /*====================================================================*/
1149 static int i365_set_socket(u_short sock, socket_state_t *state)
1151 socket_info_t *t = &socket[sock];
1154 DEBUG(1, "i82365: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
1155 "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags,
1156 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
1158 /* First set global controller options */
1159 set_bridge_state(sock);
1161 /* IO card, RESET flag, IO interrupt */
1163 if (state->io_irq != t->cap.pci_irq) reg |= state->io_irq;
1164 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
1165 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
1166 i365_set(sock, I365_INTCTL, reg);
1168 reg = I365_PWR_NORESET;
1169 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
1170 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
1172 if (t->flags & IS_CIRRUS) {
1173 if (state->Vpp != 0) {
1174 if (state->Vpp == 120)
1175 reg |= I365_VPP1_12V;
1176 else if (state->Vpp == state->Vcc)
1177 reg |= I365_VPP1_5V;
1178 else return -EINVAL;
1180 if (state->Vcc != 0) {
1182 if (state->Vcc == 33)
1183 i365_bset(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
1184 else if (state->Vcc == 50)
1185 i365_bclr(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
1186 else return -EINVAL;
1188 } else if (t->flags & IS_VG_PWR) {
1189 if (state->Vpp != 0) {
1190 if (state->Vpp == 120)
1191 reg |= I365_VPP1_12V;
1192 else if (state->Vpp == state->Vcc)
1193 reg |= I365_VPP1_5V;
1194 else return -EINVAL;
1196 if (state->Vcc != 0) {
1198 if (state->Vcc == 33)
1199 i365_bset(sock, VG469_VSELECT, VG469_VSEL_VCC);
1200 else if (state->Vcc == 50)
1201 i365_bclr(sock, VG469_VSELECT, VG469_VSEL_VCC);
1202 else return -EINVAL;
1204 } else if (t->flags & IS_DF_PWR) {
1205 switch (state->Vcc) {
1207 case 33: reg |= I365_VCC_3V; break;
1208 case 50: reg |= I365_VCC_5V; break;
1209 default: return -EINVAL;
1211 switch (state->Vpp) {
1213 case 50: reg |= I365_VPP1_5V; break;
1214 case 120: reg |= I365_VPP1_12V; break;
1215 default: return -EINVAL;
1218 switch (state->Vcc) {
1220 case 50: reg |= I365_VCC_5V; break;
1221 default: return -EINVAL;
1223 switch (state->Vpp) {
1225 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break;
1226 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break;
1227 default: return -EINVAL;
1231 if (reg != i365_get(sock, I365_POWER))
1232 i365_set(sock, I365_POWER, reg);
1234 /* Chipset-specific functions */
1235 if (t->flags & IS_CIRRUS) {
1236 /* Speaker control */
1237 i365_bflip(sock, PD67_MISC_CTL_1, PD67_MC1_SPKR_ENA,
1238 state->flags & SS_SPKR_ENA);
1241 /* Card status change interrupt mask */
1242 reg = t->cs_irq << 4;
1243 if (state->csc_mask & SS_DETECT) reg |= I365_CSC_DETECT;
1244 if (state->flags & SS_IOCARD) {
1245 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
1247 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
1248 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
1249 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
1251 i365_set(sock, I365_CSCINT, reg);
1252 i365_get(sock, I365_CSC);
1255 } /* i365_set_socket */
1257 /*====================================================================*/
1259 static int i365_get_io_map(u_short sock, struct pccard_io_map *io)
1261 u_char map, ioctl, addr;
1264 if (map > 1) return -EINVAL;
1265 io->start = i365_get_pair(sock, I365_IO(map)+I365_W_START);
1266 io->stop = i365_get_pair(sock, I365_IO(map)+I365_W_STOP);
1267 ioctl = i365_get(sock, I365_IOCTL);
1268 addr = i365_get(sock, I365_ADDRWIN);
1269 io->speed = to_ns(ioctl & I365_IOCTL_WAIT(map)) ? 1 : 0;
1270 io->flags = (addr & I365_ENA_IO(map)) ? MAP_ACTIVE : 0;
1271 io->flags |= (ioctl & I365_IOCTL_0WS(map)) ? MAP_0WS : 0;
1272 io->flags |= (ioctl & I365_IOCTL_16BIT(map)) ? MAP_16BIT : 0;
1273 io->flags |= (ioctl & I365_IOCTL_IOCS16(map)) ? MAP_AUTOSZ : 0;
1274 DEBUG(1, "i82365: GetIOMap(%d, %d) = %#2.2x, %d ns, "
1275 "%#4.4x-%#4.4x\n", sock, map, io->flags, io->speed,
1276 io->start, io->stop);
1278 } /* i365_get_io_map */
1280 /*====================================================================*/
1282 static int i365_set_io_map(u_short sock, struct pccard_io_map *io)
1286 DEBUG(1, "i82365: SetIOMap(%d, %d, %#2.2x, %d ns, "
1287 "%#4.4x-%#4.4x)\n", sock, io->map, io->flags,
1288 io->speed, io->start, io->stop);
1290 if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
1291 (io->stop < io->start)) return -EINVAL;
1292 /* Turn off the window before changing anything */
1293 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(map))
1294 i365_bclr(sock, I365_ADDRWIN, I365_ENA_IO(map));
1295 i365_set_pair(sock, I365_IO(map)+I365_W_START, io->start);
1296 i365_set_pair(sock, I365_IO(map)+I365_W_STOP, io->stop);
1297 ioctl = i365_get(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map);
1298 if (io->speed) ioctl |= I365_IOCTL_WAIT(map);
1299 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
1300 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
1301 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
1302 i365_set(sock, I365_IOCTL, ioctl);
1303 /* Turn on the window if necessary */
1304 if (io->flags & MAP_ACTIVE)
1305 i365_bset(sock, I365_ADDRWIN, I365_ENA_IO(map));
1307 } /* i365_set_io_map */
1309 /*====================================================================*/
1311 static int i365_get_mem_map(u_short sock, struct pccard_mem_map *mem)
1317 if (map > 4) return -EINVAL;
1318 addr = i365_get(sock, I365_ADDRWIN);
1319 mem->flags = (addr & I365_ENA_MEM(map)) ? MAP_ACTIVE : 0;
1320 base = I365_MEM(map);
1322 i = i365_get_pair(sock, base+I365_W_START);
1323 mem->flags |= (i & I365_MEM_16BIT) ? MAP_16BIT : 0;
1324 mem->flags |= (i & I365_MEM_0WS) ? MAP_0WS : 0;
1325 mem->sys_start = ((u_long)(i & 0x0fff) << 12);
1327 i = i365_get_pair(sock, base+I365_W_STOP);
1328 mem->speed = (i & I365_MEM_WS0) ? 1 : 0;
1329 mem->speed += (i & I365_MEM_WS1) ? 2 : 0;
1330 mem->speed = to_ns(mem->speed);
1331 mem->sys_stop = ((u_long)(i & 0x0fff) << 12) + 0x0fff;
1333 i = i365_get_pair(sock, base+I365_W_OFF);
1334 mem->flags |= (i & I365_MEM_WRPROT) ? MAP_WRPROT : 0;
1335 mem->flags |= (i & I365_MEM_REG) ? MAP_ATTRIB : 0;
1336 mem->card_start = ((u_int)(i & 0x3fff) << 12) + mem->sys_start;
1337 mem->card_start &= 0x3ffffff;
1339 DEBUG(1, "i82365: GetMemMap(%d, %d) = %#2.2x, %d ns, %#5.5lx-%#5."
1340 "5lx, %#5.5x\n", sock, mem->map, mem->flags, mem->speed,
1341 mem->sys_start, mem->sys_stop, mem->card_start);
1343 } /* i365_get_mem_map */
1345 /*====================================================================*/
1347 static int i365_set_mem_map(u_short sock, struct pccard_mem_map *mem)
1352 DEBUG(1, "i82365: SetMemMap(%d, %d, %#2.2x, %d ns, %#5.5lx-%#5.5"
1353 "lx, %#5.5x)\n", sock, mem->map, mem->flags, mem->speed,
1354 mem->sys_start, mem->sys_stop, mem->card_start);
1357 if ((map > 4) || (mem->card_start > 0x3ffffff) ||
1358 (mem->sys_start > mem->sys_stop) || (mem->speed > 1000))
1360 if (!(socket[sock].flags & IS_PCI) &&
1361 ((mem->sys_start > 0xffffff) || (mem->sys_stop > 0xffffff)))
1364 /* Turn off the window before changing anything */
1365 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
1366 i365_bclr(sock, I365_ADDRWIN, I365_ENA_MEM(map));
1368 base = I365_MEM(map);
1369 i = (mem->sys_start >> 12) & 0x0fff;
1370 if (mem->flags & MAP_16BIT) i |= I365_MEM_16BIT;
1371 if (mem->flags & MAP_0WS) i |= I365_MEM_0WS;
1372 i365_set_pair(sock, base+I365_W_START, i);
1374 i = (mem->sys_stop >> 12) & 0x0fff;
1375 switch (to_cycles(mem->speed)) {
1377 case 1: i |= I365_MEM_WS0; break;
1378 case 2: i |= I365_MEM_WS1; break;
1379 default: i |= I365_MEM_WS1 | I365_MEM_WS0; break;
1381 i365_set_pair(sock, base+I365_W_STOP, i);
1383 i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
1384 if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT;
1385 if (mem->flags & MAP_ATTRIB) i |= I365_MEM_REG;
1386 i365_set_pair(sock, base+I365_W_OFF, i);
1388 /* Turn on the window if necessary */
1389 if (mem->flags & MAP_ACTIVE)
1390 i365_bset(sock, I365_ADDRWIN, I365_ENA_MEM(map));
1392 } /* i365_set_mem_map */
1394 /*======================================================================
1396 Routines for accessing socket information and register dumps via
1397 /proc/bus/pccard/...
1399 ======================================================================*/
1401 #ifdef CONFIG_PROC_FS
1403 static int proc_read_info(char *buf, char **start, off_t pos,
1404 int count, int *eof, void *data)
1406 socket_info_t *s = data;
1408 p += sprintf(p, "type: %s\npsock: %d\n",
1409 pcic[s->type].name, s->psock);
1413 static int proc_read_exca(char *buf, char **start, off_t pos,
1414 int count, int *eof, void *data)
1416 u_short sock = (socket_info_t *)data - socket;
1423 ISA_LOCK(sock, flags);
1425 for (i = 0; i < top; i += 4) {
1427 p += sprintf(p, "\n");
1430 p += sprintf(p, "%02x %02x %02x %02x%s",
1431 i365_get(sock,i), i365_get(sock,i+1),
1432 i365_get(sock,i+2), i365_get(sock,i+3),
1433 ((i % 16) == 12) ? "\n" : " ");
1435 ISA_UNLOCK(sock, flags);
1439 static void pcic_proc_setup(unsigned int sock, struct proc_dir_entry *base)
1441 socket_info_t *s = &socket[sock];
1443 if (s->flags & IS_ALIVE)
1446 create_proc_read_entry("info", 0, base, proc_read_info, s);
1447 create_proc_read_entry("exca", 0, base, proc_read_exca, s);
1451 static void pcic_proc_remove(u_short sock)
1453 struct proc_dir_entry *base = socket[sock].proc;
1454 if (base == NULL) return;
1455 remove_proc_entry("info", base);
1456 remove_proc_entry("exca", base);
1461 #define pcic_proc_setup NULL
1463 #endif /* CONFIG_PROC_FS */
1465 /*====================================================================*/
1468 * The locking is rather broken. Why do we only lock for ISA, not for
1469 * all other cases? If there are reasons to lock, we should lock. Not
1470 * this silly conditional.
1472 * Plan: make it bug-for-bug compatible with the old stuff, and clean
1473 * it up when the infrastructure is done.
1476 #define LOCKED(x) do { \
1478 unsigned long flags; \
1479 spin_lock_irqsave(&isa_lock, flags); \
1481 spin_unlock_irqrestore(&isa_lock, flags); \
1485 #define LOCKED(x) return x
1489 static int pcic_get_status(unsigned int sock, u_int *value)
1491 if (socket[sock].flags & IS_ALIVE) {
1496 LOCKED(i365_get_status(sock, value));
1499 static int pcic_get_socket(unsigned int sock, socket_state_t *state)
1501 if (socket[sock].flags & IS_ALIVE)
1504 LOCKED(i365_get_socket(sock, state));
1507 static int pcic_set_socket(unsigned int sock, socket_state_t *state)
1509 if (socket[sock].flags & IS_ALIVE)
1512 LOCKED(i365_set_socket(sock, state));
1515 static int pcic_get_io_map(unsigned int sock, struct pccard_io_map *io)
1517 if (socket[sock].flags & IS_ALIVE)
1520 LOCKED(i365_get_io_map(sock, io));
1523 static int pcic_set_io_map(unsigned int sock, struct pccard_io_map *io)
1525 if (socket[sock].flags & IS_ALIVE)
1528 LOCKED(i365_set_io_map(sock, io));
1531 static int pcic_get_mem_map(unsigned int sock, struct pccard_mem_map *mem)
1533 if (socket[sock].flags & IS_ALIVE)
1536 LOCKED(i365_get_mem_map(sock, mem));
1539 static int pcic_set_mem_map(unsigned int sock, struct pccard_mem_map *mem)
1541 if (socket[sock].flags & IS_ALIVE)
1544 LOCKED(i365_set_mem_map(sock, mem));
1547 static int pcic_init(unsigned int s)
1550 pccard_io_map io = { 0, 0, 0, 0, 1 };
1551 pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
1553 mem.sys_stop = 0x1000;
1554 pcic_set_socket(s, &dead_socket);
1555 for (i = 0; i < 2; i++) {
1557 pcic_set_io_map(s, &io);
1559 for (i = 0; i < 5; i++) {
1561 pcic_set_mem_map(s, &mem);
1566 static int pcic_suspend(unsigned int sock)
1568 return pcic_set_socket(sock, &dead_socket);
1571 static struct pccard_operations pcic_operations = {
1574 pcic_register_callback,
1575 pcic_inquire_socket,
1586 /*====================================================================*/
1588 static int __init init_i82365(void)
1591 pcmcia_get_card_services_info(&serv);
1592 if (serv.Revision != CS_RELEASE_CODE) {
1593 printk(KERN_NOTICE "i82365: Card Services release "
1594 "does not match!\n");
1597 DEBUG(0, "%s\n", version);
1598 printk(KERN_INFO "Intel PCIC probe: ");
1606 printk("not found.\n");
1610 /* Set up interrupt handler(s) */
1613 request_irq(cs_irq, pcic_interrupt, 0, "i82365", pcic_interrupt);
1616 if (register_ss_entry(sockets, &pcic_operations) != 0)
1617 printk(KERN_NOTICE "i82365: register_ss_entry() failed\n");
1619 /* Finally, schedule a polling interrupt */
1620 if (poll_interval != 0) {
1621 poll_timer.function = pcic_interrupt_wrapper;
1622 poll_timer.data = 0;
1623 init_timer(&poll_timer);
1624 poll_timer.expires = jiffies + poll_interval;
1625 add_timer(&poll_timer);
1632 static void __exit exit_i82365(void)
1635 #ifdef CONFIG_PROC_FS
1636 for (i = 0; i < sockets; i++) pcic_proc_remove(i);
1638 unregister_ss_entry(&pcic_operations);
1639 if (poll_interval != 0)
1640 del_timer(&poll_timer);
1643 free_irq(cs_irq, pcic_interrupt);
1645 for (i = 0; i < sockets; i++) {
1646 /* Turn off all interrupt sources! */
1647 i365_set(i, I365_CSCINT, 0);
1648 release_region(socket[i].ioaddr, 2);
1650 #if defined(CONFIG_ISA) && defined(I82365_ISAPNP)
1651 if (i82365_pnpdev && i82365_pnpdev->deactivate)
1652 i82365_pnpdev->deactivate(i82365_pnpdev);
1656 module_init(init_i82365);
1657 module_exit(exit_i82365);
1658 MODULE_LICENSE("Dual MPL/GPL");
1659 /*====================================================================*/