drivers/scsi/gdth.h

   1 #ifndef _GDTH_H
   2 #define _GDTH_H
   3
   4 /*
   5  * Header file for the GDT Disk Array/Storage RAID controllers driver for Linux
   6  *
   7  * gdth.h Copyright (C) 1995-02 ICP vortex, an Intel company, Achim Leubner
   8  * See gdth.c for further informations and
   9  * below for supported controller types
  10  *
  11  * <achim.leubner@intel.com>
  12  *
  13  * $Id: gdth.h,v 1.1.1.1 2005/04/11 02:50:36 jack Exp $
  14  */
  15
  16 #include <linux/version.h>
  17 #include <linux/types.h>
  18
  19 #ifndef NULL
  20 #define NULL 0
  21 #endif
  22 #ifndef TRUE
  23 #define TRUE 1
  24 #endif
  25 #ifndef FALSE
  26 #define FALSE 0
  27 #endif
  28
  29 /* defines, macros */
  30
  31 /* driver version */
  32 #define GDTH_VERSION_STR        "2.05"
  33 #define GDTH_VERSION            2
  34 #define GDTH_SUBVERSION         5
  35
  36 /* protocol version */
  37 #define PROTOCOL_VERSION        1
  38
  39 /* OEM IDs */
  40 #define OEM_ID_ICP      0x941c
  41 #define OEM_ID_INTEL    0x8000
  42
  43 /* controller classes */
  44 #define GDT_ISA         0x01                    /* ISA controller */
  45 #define GDT_EISA        0x02                    /* EISA controller */
  46 #define GDT_PCI         0x03                    /* PCI controller */
  47 #define GDT_PCINEW      0x04                    /* new PCI controller */
  48 #define GDT_PCIMPR      0x05                    /* PCI MPR controller */
  49 /* GDT_EISA, controller subtypes EISA */
  50 #define GDT3_ID         0x0130941c              /* GDT3000/3020 */
  51 #define GDT3A_ID        0x0230941c              /* GDT3000A/3020A/3050A */
  52 #define GDT3B_ID        0x0330941c              /* GDT3000B/3010A */
  53 /* GDT_ISA */
  54 #define GDT2_ID         0x0120941c              /* GDT2000/2020 */
  55
  56 /* vendor ID, device IDs (PCI) */
  57 /* these defines should already exist in <linux/pci.h> */
  58 #ifndef PCI_VENDOR_ID_VORTEX
  59 #define PCI_VENDOR_ID_VORTEX            0x1119  /* PCI controller vendor ID */
  60 #endif
  61 #ifndef PCI_VENDOR_ID_INTEL
  62 #define PCI_VENDOR_ID_INTEL             0x8086
  63 #endif
  64
  65 #ifndef PCI_DEVICE_ID_VORTEX_GDT60x0
  66 /* GDT_PCI */
  67 #define PCI_DEVICE_ID_VORTEX_GDT60x0    0       /* GDT6000/6020/6050 */
  68 #define PCI_DEVICE_ID_VORTEX_GDT6000B   1       /* GDT6000B/6010 */
  69 /* GDT_PCINEW */
  70 #define PCI_DEVICE_ID_VORTEX_GDT6x10    2       /* GDT6110/6510 */
  71 #define PCI_DEVICE_ID_VORTEX_GDT6x20    3       /* GDT6120/6520 */
  72 #define PCI_DEVICE_ID_VORTEX_GDT6530    4       /* GDT6530 */
  73 #define PCI_DEVICE_ID_VORTEX_GDT6550    5       /* GDT6550 */
  74 /* GDT_PCINEW, wide/ultra SCSI controllers */
  75 #define PCI_DEVICE_ID_VORTEX_GDT6x17    6       /* GDT6117/6517 */
  76 #define PCI_DEVICE_ID_VORTEX_GDT6x27    7       /* GDT6127/6527 */
  77 #define PCI_DEVICE_ID_VORTEX_GDT6537    8       /* GDT6537 */
  78 #define PCI_DEVICE_ID_VORTEX_GDT6557    9       /* GDT6557/6557-ECC */
  79 /* GDT_PCINEW, wide SCSI controllers */
  80 #define PCI_DEVICE_ID_VORTEX_GDT6x15    10      /* GDT6115/6515 */
  81 #define PCI_DEVICE_ID_VORTEX_GDT6x25    11      /* GDT6125/6525 */
  82 #define PCI_DEVICE_ID_VORTEX_GDT6535    12      /* GDT6535 */
  83 #define PCI_DEVICE_ID_VORTEX_GDT6555    13      /* GDT6555/6555-ECC */
  84 #endif
  85
  86 #ifndef PCI_DEVICE_ID_VORTEX_GDT6x17RP
  87 /* GDT_MPR, RP series, wide/ultra SCSI */
  88 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP  0x100   /* GDT6117RP/GDT6517RP */
  89 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP  0x101   /* GDT6127RP/GDT6527RP */
  90 #define PCI_DEVICE_ID_VORTEX_GDT6537RP  0x102   /* GDT6537RP */
  91 #define PCI_DEVICE_ID_VORTEX_GDT6557RP  0x103   /* GDT6557RP */
  92 /* GDT_MPR, RP series, narrow/ultra SCSI */
  93 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP  0x104   /* GDT6111RP/GDT6511RP */
  94 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP  0x105   /* GDT6121RP/GDT6521RP */
  95 #endif
  96 #ifndef PCI_DEVICE_ID_VORTEX_GDT6x17RD
  97 /* GDT_MPR, RD series, wide/ultra SCSI */
  98 #define PCI_DEVICE_ID_VORTEX_GDT6x17RD  0x110   /* GDT6117RD/GDT6517RD */
  99 #define PCI_DEVICE_ID_VORTEX_GDT6x27RD  0x111   /* GDT6127RD/GDT6527RD */
 100 #define PCI_DEVICE_ID_VORTEX_GDT6537RD  0x112   /* GDT6537RD */
 101 #define PCI_DEVICE_ID_VORTEX_GDT6557RD  0x113   /* GDT6557RD */
 102 /* GDT_MPR, RD series, narrow/ultra SCSI */
 103 #define PCI_DEVICE_ID_VORTEX_GDT6x11RD  0x114   /* GDT6111RD/GDT6511RD */
 104 #define PCI_DEVICE_ID_VORTEX_GDT6x21RD  0x115   /* GDT6121RD/GDT6521RD */
 105 /* GDT_MPR, RD series, wide/ultra2 SCSI */
 106 #define PCI_DEVICE_ID_VORTEX_GDT6x18RD  0x118   /* GDT6118RD/GDT6518RD/
 107                                                    GDT6618RD */
 108 #define PCI_DEVICE_ID_VORTEX_GDT6x28RD  0x119   /* GDT6128RD/GDT6528RD/
 109                                                    GDT6628RD */
 110 #define PCI_DEVICE_ID_VORTEX_GDT6x38RD  0x11A   /* GDT6538RD/GDT6638RD */
 111 #define PCI_DEVICE_ID_VORTEX_GDT6x58RD  0x11B   /* GDT6558RD/GDT6658RD */
 112 /* GDT_MPR, RN series (64-bit PCI), wide/ultra2 SCSI */
 113 #define PCI_DEVICE_ID_VORTEX_GDT7x18RN  0x168   /* GDT7118RN/GDT7518RN/
 114                                                    GDT7618RN */
 115 #define PCI_DEVICE_ID_VORTEX_GDT7x28RN  0x169   /* GDT7128RN/GDT7528RN/
 116                                                    GDT7628RN */
 117 #define PCI_DEVICE_ID_VORTEX_GDT7x38RN  0x16A   /* GDT7538RN/GDT7638RN */
 118 #define PCI_DEVICE_ID_VORTEX_GDT7x58RN  0x16B   /* GDT7558RN/GDT7658RN */
 119 #endif
 120
 121 #ifndef PCI_DEVICE_ID_VORTEX_GDT6x19RD
 122 /* GDT_MPR, RD series, Fibre Channel */
 123 #define PCI_DEVICE_ID_VORTEX_GDT6x19RD  0x210   /* GDT6519RD/GDT6619RD */
 124 #define PCI_DEVICE_ID_VORTEX_GDT6x29RD  0x211   /* GDT6529RD/GDT6629RD */
 125 /* GDT_MPR, RN series (64-bit PCI), Fibre Channel */
 126 #define PCI_DEVICE_ID_VORTEX_GDT7x19RN  0x260   /* GDT7519RN/GDT7619RN */
 127 #define PCI_DEVICE_ID_VORTEX_GDT7x29RN  0x261   /* GDT7529RN/GDT7629RN */
 128 #endif
 129
 130 #ifndef PCI_DEVICE_ID_VORTEX_GDTMAXRP
 131 /* GDT_MPR, last device ID */
 132 #define PCI_DEVICE_ID_VORTEX_GDTMAXRP   0x2ff
 133 #endif
 134
 135 #ifndef PCI_DEVICE_ID_VORTEX_GDTNEWRX
 136 /* new GDT Rx Controller */
 137 #define PCI_DEVICE_ID_VORTEX_GDTNEWRX   0x300
 138 #endif
 139
 140 #ifndef PCI_DEVICE_ID_INTEL_SRC
 141 /* Intel Storage RAID Controller */
 142 #define PCI_DEVICE_ID_INTEL_SRC         0x600
 143 #endif
 144
 145 /* limits */
 146 #define GDTH_SCRATCH    PAGE_SIZE               /* 4KB scratch buffer */
 147 #define GDTH_SCRATCH_ORD 0                      /* order 0 means 1 page */
 148 #define GDTH_MAXCMDS    124
 149 #define GDTH_MAXC_P_L   16                      /* max. cmds per lun */
 150 #define GDTH_MAX_RAW    2                       /* max. cmds per raw device */
 151 #define MAXOFFSETS      128
 152 #define MAXHA           16
 153 #define MAXID           127
 154 #define MAXLUN          8
 155 #define MAXBUS          6
 156 #define MAX_HDRIVES     100                     /* max. host drive count */
 157 #define MAX_LDRIVES     255                     /* max. log. drive count */
 158 #define MAX_EVENTS      100                     /* event buffer count */
 159 #define MAX_RES_ARGS    40                      /* device reservation,
 160                                                    must be a multiple of 4 */
 161 #define MAXCYLS         1024
 162 #define HEADS           64
 163 #define SECS            32                      /* mapping 64*32 */
 164 #define MEDHEADS        127
 165 #define MEDSECS         63                      /* mapping 127*63 */
 166 #define BIGHEADS        255
 167 #define BIGSECS         63                      /* mapping 255*63 */
 168
 169 /* special command ptr. */
 170 #define UNUSED_CMND     ((Scsi_Cmnd *)-1)
 171 #define INTERNAL_CMND   ((Scsi_Cmnd *)-2)
 172 #define SCREEN_CMND     ((Scsi_Cmnd *)-3)
 173 #define SPECIAL_SCP(p)  (p==UNUSED_CMND || p==INTERNAL_CMND || p==SCREEN_CMND)
 174
 175 /* controller services */
 176 #define SCSIRAWSERVICE  3
 177 #define CACHESERVICE    9
 178 #define SCREENSERVICE   11
 179
 180 /* screenservice defines */
 181 #define MSG_INV_HANDLE  -1                      /* special message handle */
 182 #define MSGLEN          16                      /* size of message text */
 183 #define MSG_SIZE        34                      /* size of message structure */
 184 #define MSG_REQUEST     0                       /* async. event: message */
 185
 186 /* cacheservice defines */
 187 #define SECTOR_SIZE     0x200                   /* always 512 bytes per sec. */
 188
 189 /* DPMEM constants */
 190 #define DPMEM_MAGIC     0xC0FFEE11
 191 #define IC_HEADER_BYTES 48
 192 #define IC_QUEUE_BYTES  4
 193 #define DPMEM_COMMAND_OFFSET    IC_HEADER_BYTES+IC_QUEUE_BYTES*MAXOFFSETS
 194
 195 /* cluster_type constants */
 196 #define CLUSTER_DRIVE         1
 197 #define CLUSTER_MOUNTED       2
 198 #define CLUSTER_RESERVED      4
 199 #define CLUSTER_RESERVE_STATE (CLUSTER_DRIVE|CLUSTER_MOUNTED|CLUSTER_RESERVED)
 200
 201 /* commands for all services, cache service */
 202 #define GDT_INIT        0                       /* service initialization */
 203 #define GDT_READ        1                       /* read command */
 204 #define GDT_WRITE       2                       /* write command */
 205 #define GDT_INFO        3                       /* information about devices */
 206 #define GDT_FLUSH       4                       /* flush dirty cache buffers */
 207 #define GDT_IOCTL       5                       /* ioctl command */
 208 #define GDT_DEVTYPE     9                       /* additional information */
 209 #define GDT_MOUNT       10                      /* mount cache device */
 210 #define GDT_UNMOUNT     11                      /* unmount cache device */
 211 #define GDT_SET_FEAT    12                      /* set feat. (scatter/gather) */
 212 #define GDT_GET_FEAT    13                      /* get features */
 213 #define GDT_WRITE_THR   16                      /* write through */
 214 #define GDT_READ_THR    17                      /* read through */
 215 #define GDT_EXT_INFO    18                      /* extended info */
 216 #define GDT_RESET       19                      /* controller reset */
 217 #define GDT_RESERVE_DRV 20                      /* reserve host drive */
 218 #define GDT_RELEASE_DRV 21                      /* release host drive */
 219 #define GDT_CLUST_INFO  22                      /* cluster info */
 220 #define GDT_RW_ATTRIBS  23                      /* R/W attribs (write thru,..)*/
 221 #define GDT_CLUST_RESET 24                      /* releases the cluster drives*/
 222 #define GDT_FREEZE_IO   25                      /* freezes all IOs */
 223 #define GDT_UNFREEZE_IO 26                      /* unfreezes all IOs */
 224
 225 /* raw service commands */
 226 #define GDT_RESERVE     14                      /* reserve dev. to raw serv. */
 227 #define GDT_RELEASE     15                      /* release device */
 228 #define GDT_RESERVE_ALL 16                      /* reserve all devices */
 229 #define GDT_RELEASE_ALL 17                      /* release all devices */
 230 #define GDT_RESET_BUS   18                      /* reset bus */
 231 #define GDT_SCAN_START  19                      /* start device scan */
 232 #define GDT_SCAN_END    20                      /* stop device scan */
 233
 234 /* screen service commands */
 235 #define GDT_REALTIME    3                       /* realtime clock to screens. */
 236
 237 /* IOCTL command defines */
 238 #define SCSI_DR_INFO    0x00                    /* SCSI drive info */
 239 #define SCSI_CHAN_CNT   0x05                    /* SCSI channel count */
 240 #define SCSI_DR_LIST    0x06                    /* SCSI drive list */
 241 #define SCSI_DEF_CNT    0x15                    /* grown/primary defects */
 242 #define DSK_STATISTICS  0x4b                    /* SCSI disk statistics */
 243 #define IOCHAN_DESC     0x5d                    /* description of IO channel */
 244 #define IOCHAN_RAW_DESC 0x5e                    /* description of raw IO chn. */
 245 #define L_CTRL_PATTERN  0x20000000L             /* SCSI IOCTL mask */
 246 #define ARRAY_INFO      0x12                    /* array drive info */
 247 #define ARRAY_DRV_LIST  0x0f                    /* array drive list */
 248 #define ARRAY_DRV_LIST2 0x34                    /* array drive list (new) */
 249 #define LA_CTRL_PATTERN 0x10000000L             /* array IOCTL mask */
 250 #define CACHE_DRV_CNT   0x01                    /* cache drive count */
 251 #define CACHE_DRV_LIST  0x02                    /* cache drive list */
 252 #define CACHE_INFO      0x04                    /* cache info */
 253 #define CACHE_CONFIG    0x05                    /* cache configuration */
 254 #define CACHE_DRV_INFO  0x07                    /* cache drive info */
 255 #define BOARD_FEATURES  0x15                    /* controller features */
 256 #define BOARD_INFO      0x28                    /* controller info */
 257 #define HOST_GET        0x10001L                /* get host drive list */
 258 #define IO_CHANNEL      0x00020000L             /* default IO channel */
 259 #define INVALID_CHANNEL 0x0000ffffL             /* invalid channel */
 260
 261 /* service errors */
 262 #define S_OK            1                       /* no error */
 263 #define S_GENERR        6                       /* general error */
 264 #define S_BSY           7                       /* controller busy */
 265 #define S_CACHE_UNKNOWN 12                      /* cache serv.: drive unknown */
 266 #define S_RAW_SCSI      12                      /* raw serv.: target error */
 267 #define S_RAW_ILL       0xff                    /* raw serv.: illegal */
 268 #define S_CACHE_RESERV  -24                     /* cache: reserv. conflict */
 269
 270 /* timeout values */
 271 #define INIT_RETRIES    100000                  /* 100000 * 1ms = 100s */
 272 #define INIT_TIMEOUT    100000                  /* 100000 * 1ms = 100s */
 273 #define POLL_TIMEOUT    10000                   /* 10000 * 1ms = 10s */
 274
 275 /* priorities */
 276 #define DEFAULT_PRI     0x20
 277 #define IOCTL_PRI       0x10
 278 #define HIGH_PRI        0x08
 279
 280 /* data directions */
 281 #define GDTH_DATA_IN    0x01000000L             /* data from target */
 282 #define GDTH_DATA_OUT   0x00000000L             /* data to target */
 283
 284 /* BMIC registers (EISA controllers) */
 285 #define ID0REG          0x0c80                  /* board ID */
 286 #define EINTENABREG     0x0c89                  /* interrupt enable */
 287 #define SEMA0REG        0x0c8a                  /* command semaphore */
 288 #define SEMA1REG        0x0c8b                  /* status semaphore */
 289 #define LDOORREG        0x0c8d                  /* local doorbell */
 290 #define EDENABREG       0x0c8e                  /* EISA system doorbell enab. */
 291 #define EDOORREG        0x0c8f                  /* EISA system doorbell */
 292 #define MAILBOXREG      0x0c90                  /* mailbox reg. (16 bytes) */
 293 #define EISAREG         0x0cc0                  /* EISA configuration */
 294
 295 /* other defines */
 296 #define LINUX_OS        8                       /* used for cache optim. */
 297 #define SCATTER_GATHER  1                       /* s/g feature */
 298 #define GDTH_MAXSG      32                      /* max. s/g elements */
 299 #define SECS32          0x1f                    /* round capacity */
 300 #define BIOS_ID_OFFS    0x10                    /* offset contr-ID in ISABIOS */
 301 #define LOCALBOARD      0                       /* board node always 0 */
 302 #define ASYNCINDEX      0                       /* cmd index async. event */
 303 #define SPEZINDEX       1                       /* cmd index unknown service */
 304 #define GDT_WR_THROUGH  0x100                   /* WRITE_THROUGH supported */
 305
 306
 307 /* typedefs */
 308 typedef u32     ulong32;
 309 #define PACKED  __attribute__((packed))
 310
 311 /* screenservice message */
 312 typedef struct {
 313     ulong32     msg_handle;                     /* message handle */
 314     ulong32     msg_len;                        /* size of message */
 315     ulong32     msg_alen;                       /* answer length */
 316     unchar      msg_answer;                     /* answer flag */
 317     unchar      msg_ext;                        /* more messages */
 318     unchar      msg_reserved[2];
 319     char        msg_text[MSGLEN+2];             /* the message text */
 320 } PACKED gdth_msg_str;
 321
 322 /* IOCTL data structures */
 323 /* SCSI drive info */
 324 typedef struct {
 325     unchar      vendor[8];                      /* vendor string */
 326     unchar      product[16];                    /* product string */
 327     unchar      revision[4];                    /* revision */
 328     ulong32     sy_rate;                        /* current rate for sync. tr. */
 329     ulong32     sy_max_rate;                    /* max. rate for sync. tr. */
 330     ulong32     no_ldrive;                      /* belongs to this log. drv.*/
 331     ulong32     blkcnt;                         /* number of blocks */
 332     ushort      blksize;                        /* size of block in bytes */
 333     unchar      available;                      /* flag: access is available */
 334     unchar      init;                           /* medium is initialized */
 335     unchar      devtype;                        /* SCSI devicetype */
 336     unchar      rm_medium;                      /* medium is removable */
 337     unchar      wp_medium;                      /* medium is write protected */
 338     unchar      ansi;                           /* SCSI I/II or III? */
 339     unchar      protocol;                       /* same as ansi */
 340     unchar      sync;                           /* flag: sync. transfer enab. */
 341     unchar      disc;                           /* flag: disconnect enabled */
 342     unchar      queueing;                       /* flag: command queing enab. */
 343     unchar      cached;                         /* flag: caching enabled */
 344     unchar      target_id;                      /* target ID of device */
 345     unchar      lun;                            /* LUN id of device */
 346     unchar      orphan;                         /* flag: drive fragment */
 347     ulong32     last_error;                     /* sense key or drive state */
 348     ulong32     last_result;                    /* result of last command */
 349     ulong32     check_errors;                   /* err. in last surface check */
 350     unchar      percent;                        /* progress for surface check */
 351     unchar      last_check;                     /* IOCTRL operation */
 352     unchar      res[2];
 353     ulong32     flags;                          /* from 1.19/2.19: raw reserv.*/
 354     unchar      multi_bus;                      /* multi bus dev? (fibre ch.) */
 355     unchar      mb_status;                      /* status: available? */
 356     unchar      res2[2];
 357     unchar      mb_alt_status;                  /* status on second bus */
 358     unchar      mb_alt_bid;                     /* number of second bus */
 359     unchar      mb_alt_tid;                     /* target id on second bus */
 360     unchar      res3;
 361     unchar      fc_flag;                        /* from 1.22/2.22: info valid?*/
 362     unchar      res4;
 363     ushort      fc_frame_size;                  /* frame size (bytes) */
 364     char        wwn[8];                         /* world wide name */
 365 } PACKED gdth_diskinfo_str;
 366
 367 /* get SCSI channel count  */
 368 typedef struct {
 369     ulong32     channel_no;                     /* number of channel */
 370     ulong32     drive_cnt;                      /* drive count */
 371     unchar      siop_id;                        /* SCSI processor ID */
 372     unchar      siop_state;                     /* SCSI processor state */
 373 } PACKED gdth_getch_str;
 374
 375 /* get SCSI drive numbers */
 376 typedef struct {
 377     ulong32     sc_no;                          /* SCSI channel */
 378     ulong32     sc_cnt;                         /* sc_list[] elements */
 379     ulong32     sc_list[MAXID];                 /* minor device numbers */
 380 } PACKED gdth_drlist_str;
 381
 382 /* get grown/primary defect count */
 383 typedef struct {
 384     unchar      sddc_type;                      /* 0x08: grown, 0x10: prim. */
 385     unchar      sddc_format;                    /* list entry format */
 386     unchar      sddc_len;                       /* list entry length */
 387     unchar      sddc_res;
 388     ulong32     sddc_cnt;                       /* entry count */
 389 } PACKED gdth_defcnt_str;
 390
 391 /* disk statistics */
 392 typedef struct {
 393     ulong32     bid;                            /* SCSI channel */
 394     ulong32     first;                          /* first SCSI disk */
 395     ulong32     entries;                        /* number of elements */
 396     ulong32     count;                          /* (R) number of init. el. */
 397     ulong32     mon_time;                       /* time stamp */
 398     struct {
 399         unchar  tid;                            /* target ID */
 400         unchar  lun;                            /* LUN */
 401         unchar  res[2];
 402         ulong32 blk_size;                       /* block size in bytes */
 403         ulong32 rd_count;                       /* bytes read */
 404         ulong32 wr_count;                       /* bytes written */
 405         ulong32 rd_blk_count;                   /* blocks read */
 406         ulong32 wr_blk_count;                   /* blocks written */
 407         ulong32 retries;                        /* retries */
 408         ulong32 reassigns;                      /* reassigns */
 409     } PACKED list[1];
 410 } PACKED gdth_dskstat_str;
 411
 412 /* IO channel header */
 413 typedef struct {
 414     ulong32     version;                        /* version (-1UL: newest) */
 415     unchar      list_entries;                   /* list entry count */
 416     unchar      first_chan;                     /* first channel number */
 417     unchar      last_chan;                      /* last channel number */
 418     unchar      chan_count;                     /* (R) channel count */
 419     ulong32     list_offset;                    /* offset of list[0] */
 420 } PACKED gdth_iochan_header;
 421
 422 /* get IO channel description */
 423 typedef struct {
 424     gdth_iochan_header  hdr;
 425     struct {
 426         ulong32         address;                /* channel address */
 427         unchar          type;                   /* type (SCSI, FCAL) */
 428         unchar          local_no;               /* local number */
 429         ushort          features;               /* channel features */
 430     } PACKED list[MAXBUS];
 431 } PACKED gdth_iochan_str;
 432
 433 /* get raw IO channel description */
 434 typedef struct {
 435     gdth_iochan_header  hdr;
 436     struct {
 437         unchar      proc_id;                    /* processor id */
 438         unchar      proc_defect;                /* defect ? */
 439         unchar      reserved[2];
 440     } PACKED list[MAXBUS];
 441 } PACKED gdth_raw_iochan_str;
 442
 443 /* array drive component */
 444 typedef struct {
 445     ulong32     al_controller;                  /* controller ID */
 446     unchar      al_cache_drive;                 /* cache drive number */
 447     unchar      al_status;                      /* cache drive state */
 448     unchar      al_res[2];
 449 } PACKED gdth_arraycomp_str;
 450
 451 /* array drive information */
 452 typedef struct {
 453     unchar      ai_type;                        /* array type (RAID0,4,5) */
 454     unchar      ai_cache_drive_cnt;             /* active cachedrives */
 455     unchar      ai_state;                       /* array drive state */
 456     unchar      ai_master_cd;                   /* master cachedrive */
 457     ulong32     ai_master_controller;           /* ID of master controller */
 458     ulong32     ai_size;                        /* user capacity [sectors] */
 459     ulong32     ai_striping_size;               /* striping size [sectors] */
 460     ulong32     ai_secsize;                     /* sector size [bytes] */
 461     ulong32     ai_err_info;                    /* failed cache drive */
 462     unchar      ai_name[8];                     /* name of the array drive */
 463     unchar      ai_controller_cnt;              /* number of controllers */
 464     unchar      ai_removable;                   /* flag: removable */
 465     unchar      ai_write_protected;             /* flag: write protected */
 466     unchar      ai_devtype;                     /* type: always direct access */
 467     gdth_arraycomp_str  ai_drives[35];          /* drive components: */
 468     unchar      ai_drive_entries;               /* number of drive components */
 469     unchar      ai_protected;                   /* protection flag */
 470     unchar      ai_verify_state;                /* state of a parity verify */
 471     unchar      ai_ext_state;                   /* extended array drive state */
 472     unchar      ai_expand_state;                /* array expand state (>=2.18)*/
 473     unchar      ai_reserved[3];
 474 } PACKED gdth_arrayinf_str;
 475
 476 /* get array drive list */
 477 typedef struct {
 478     ulong32     controller_no;                  /* controller no. */
 479     unchar      cd_handle;                      /* master cachedrive */
 480     unchar      is_arrayd;                      /* Flag: is array drive? */
 481     unchar      is_master;                      /* Flag: is array master? */
 482     unchar      is_parity;                      /* Flag: is parity drive? */
 483     unchar      is_hotfix;                      /* Flag: is hotfix drive? */
 484     unchar      res[3];
 485 } PACKED gdth_alist_str;
 486
 487 typedef struct {
 488     ulong32     entries_avail;                  /* allocated entries */
 489     ulong32     entries_init;                   /* returned entries */
 490     ulong32     first_entry;                    /* first entry number */
 491     ulong32     list_offset;                    /* offset of following list */
 492     gdth_alist_str list[1];                     /* list */
 493 } PACKED gdth_arcdl_str;
 494
 495 /* cache info/config IOCTL */
 496 typedef struct {
 497     ulong32     version;                        /* firmware version */
 498     ushort      state;                          /* cache state (on/off) */
 499     ushort      strategy;                       /* cache strategy */
 500     ushort      write_back;                     /* write back state (on/off) */
 501     ushort      block_size;                     /* cache block size */
 502 } PACKED gdth_cpar_str;
 503
 504 typedef struct {
 505     ulong32     csize;                          /* cache size */
 506     ulong32     read_cnt;                       /* read/write counter */
 507     ulong32     write_cnt;
 508     ulong32     tr_hits;                        /* hits */
 509     ulong32     sec_hits;
 510     ulong32     sec_miss;                       /* misses */
 511 } PACKED gdth_cstat_str;
 512
 513 typedef struct {
 514     gdth_cpar_str   cpar;
 515     gdth_cstat_str  cstat;
 516 } PACKED gdth_cinfo_str;
 517
 518 /* cache drive info */
 519 typedef struct {
 520     unchar      cd_name[8];                     /* cache drive name */
 521     ulong32     cd_devtype;                     /* SCSI devicetype */
 522     ulong32     cd_ldcnt;                       /* number of log. drives */
 523     ulong32     cd_last_error;                  /* last error */
 524     unchar      cd_initialized;                 /* drive is initialized */
 525     unchar      cd_removable;                   /* media is removable */
 526     unchar      cd_write_protected;             /* write protected */
 527     unchar      cd_flags;                       /* Pool Hot Fix? */
 528     ulong32     ld_blkcnt;                      /* number of blocks */
 529     ulong32     ld_blksize;                     /* blocksize */
 530     ulong32     ld_dcnt;                        /* number of disks */
 531     ulong32     ld_slave;                       /* log. drive index */
 532     ulong32     ld_dtype;                       /* type of logical drive */
 533     ulong32     ld_last_error;                  /* last error */
 534     unchar      ld_name[8];                     /* log. drive name */
 535     unchar      ld_error;                       /* error */
 536 } PACKED gdth_cdrinfo_str;
 537
 538 /* board features */
 539 typedef struct {
 540     unchar      chaining;                       /* Chaining supported */
 541     unchar      striping;                       /* Striping (RAID-0) supp. */
 542     unchar      mirroring;                      /* Mirroring (RAID-1) supp. */
 543     unchar      raid;                           /* RAID-4/5/10 supported */
 544 } PACKED gdth_bfeat_str;
 545
 546 /* board info IOCTL */
 547 typedef struct {
 548     ulong32     ser_no;                         /* serial no. */
 549     unchar      oem_id[2];                      /* OEM ID */
 550     ushort      ep_flags;                       /* eprom flags */
 551     ulong32     proc_id;                        /* processor ID */
 552     ulong32     memsize;                        /* memory size (bytes) */
 553     unchar      mem_banks;                      /* memory banks */
 554     unchar      chan_type;                      /* channel type */
 555     unchar      chan_count;                     /* channel count */
 556     unchar      rdongle_pres;                   /* dongle present? */
 557     ulong32     epr_fw_ver;                     /* (eprom) firmware version */
 558     ulong32     upd_fw_ver;                     /* (update) firmware version */
 559     ulong32     upd_revision;                   /* update revision */
 560     char        type_string[16];                /* controller name */
 561     char        raid_string[16];                /* RAID firmware name */
 562     unchar      update_pres;                    /* update present? */
 563     unchar      xor_pres;                       /* XOR engine present? */
 564     unchar      prom_type;                      /* ROM type (eprom/flash) */
 565     unchar      prom_count;                     /* number of ROM devices */
 566     ulong32     dup_pres;                       /* duplexing module present? */
 567     ulong32     chan_pres;                      /* number of expansion chn. */
 568     ulong32     mem_pres;                       /* memory expansion inst. ? */
 569     unchar      ft_bus_system;                  /* fault bus supported? */
 570     unchar      subtype_valid;                  /* board_subtype valid? */
 571     unchar      board_subtype;                  /* subtype/hardware level */
 572     unchar      ramparity_pres;                 /* RAM parity check hardware? */
 573 } PACKED gdth_binfo_str;
 574
 575 /* get host drive info */
 576 typedef struct {
 577     char        name[8];                        /* host drive name */
 578     ulong32     size;                           /* size (sectors) */
 579     unchar      host_drive;                     /* host drive number */
 580     unchar      log_drive;                      /* log. drive (master) */
 581     unchar      reserved;
 582     unchar      rw_attribs;                     /* r/w attribs */
 583     ulong32     start_sec;                      /* start sector */
 584 } PACKED gdth_hentry_str;
 585
 586 typedef struct {
 587     ulong32     entries;                        /* entry count */
 588     ulong32     offset;                         /* offset of entries */
 589     unchar      secs_p_head;                    /* sectors/head */
 590     unchar      heads_p_cyl;                    /* heads/cylinder */
 591     unchar      reserved;
 592     unchar      clust_drvtype;                  /* cluster drive type */
 593     ulong32     location;                       /* controller number */
 594     gdth_hentry_str entry[MAX_HDRIVES];         /* entries */
 595 } PACKED gdth_hget_str;
 596
 597 /* scatter/gather element */
 598 typedef struct {
 599     ulong32     sg_ptr;                         /* address */
 600     ulong32     sg_len;                         /* length */
 601 } PACKED gdth_sg_str;
 602
 603 /* command structure */
 604 typedef struct {
 605     ulong32     BoardNode;                      /* board node (always 0) */
 606     ulong32     CommandIndex;                   /* command number */
 607     ushort      OpCode;                         /* the command (READ,..) */
 608     union {
 609         struct {
 610             ushort      DeviceNo;               /* number of cache drive */
 611             ulong32     BlockNo;                /* block number */
 612             ulong32     BlockCnt;               /* block count */
 613             ulong32     DestAddr;               /* dest. addr. (if s/g: -1) */
 614             ulong32     sg_canz;                /* s/g element count */
 615             gdth_sg_str sg_lst[GDTH_MAXSG];     /* s/g list */
 616         } PACKED cache;                         /* cache service cmd. str. */
 617         struct {
 618             ushort      param_size;             /* size of p_param buffer */
 619             ulong32     subfunc;                /* IOCTL function */
 620             ulong32     channel;                /* device */
 621             ulong32     p_param;                /* buffer */
 622         } PACKED ioctl;                         /* IOCTL command structure */
 623         struct {
 624             ushort      reserved;
 625             union {
 626                 struct {
 627                     ulong32  msg_handle;        /* message handle */
 628                     ulong32  msg_addr;          /* message buffer address */
 629                 } PACKED msg;
 630                 unchar       data[12];          /* buffer for rtc data, ... */
 631             } su;
 632         } PACKED screen;                        /* screen service cmd. str. */
 633         struct {
 634             ushort      reserved;
 635             ulong32     direction;              /* data direction */
 636             ulong32     mdisc_time;             /* disc. time (0: no timeout)*/
 637             ulong32     mcon_time;              /* connect time(0: no to.) */
 638             ulong32     sdata;                  /* dest. addr. (if s/g: -1) */
 639             ulong32     sdlen;                  /* data length (bytes) */
 640             ulong32     clen;                   /* SCSI cmd. length(6,10,12) */
 641             unchar      cmd[12];                /* SCSI command */
 642             unchar      target;                 /* target ID */
 643             unchar      lun;                    /* LUN */
 644             unchar      bus;                    /* SCSI bus number */
 645             unchar      priority;               /* only 0 used */
 646             ulong32     sense_len;              /* sense data length */
 647             ulong32     sense_data;             /* sense data addr. */
 648             ulong32     link_p;                 /* linked cmds (not supp.) */
 649             ulong32     sg_ranz;                /* s/g element count */
 650             gdth_sg_str sg_lst[GDTH_MAXSG];     /* s/g list */
 651         } PACKED raw;                           /* raw service cmd. struct. */
 652     } u;
 653     /* additional variables */
 654     unchar      Service;                        /* controller service */
 655     ushort      Status;                         /* command result */
 656     ulong32     Info;                           /* additional information */
 657     Scsi_Cmnd   *RequestBuffer;                 /* request buffer */
 658 } PACKED gdth_cmd_str;
 659
 660 /* controller event structure */
 661 #define ES_ASYNC    1
 662 #define ES_DRIVER   2
 663 #define ES_TEST     3
 664 #define ES_SYNC     4
 665 typedef struct {
 666     ushort                  size;               /* size of structure */
 667     union {
 668         char                stream[16];
 669         struct {
 670             ushort          ionode;
 671             ushort          service;
 672             ulong32         index;
 673         } PACKED driver;
 674         struct {
 675             ushort          ionode;
 676             ushort          service;
 677             ushort          status;
 678             ulong32         info;
 679             unchar          scsi_coord[3];
 680         } PACKED async;
 681         struct {
 682             ushort          ionode;
 683             ushort          service;
 684             ushort          status;
 685             ulong32         info;
 686             ushort          hostdrive;
 687             unchar          scsi_coord[3];
 688             unchar          sense_key;
 689         } PACKED sync;
 690         struct {
 691             ulong32         l1, l2, l3, l4;
 692         } PACKED test;
 693     } eu;
 694     ulong32                 severity;
 695     unchar                  event_string[256];
 696 } PACKED gdth_evt_data;
 697
 698 typedef struct {
 699     ulong32         first_stamp;
 700     ulong32         last_stamp;
 701     ushort          same_count;
 702     ushort          event_source;
 703     ushort          event_idx;
 704     unchar          application;
 705     unchar          reserved;
 706     gdth_evt_data   event_data;
 707 } PACKED gdth_evt_str;
 708
 709
 710 /* DPRAM structures */
 711
 712 /* interface area ISA/PCI */
 713 typedef struct {
 714     unchar              S_Cmd_Indx;             /* special command */
 715     unchar volatile     S_Status;               /* status special command */
 716     ushort              reserved1;
 717     ulong32             S_Info[4];              /* add. info special command */
 718     unchar volatile     Sema0;                  /* command semaphore */
 719     unchar              reserved2[3];
 720     unchar              Cmd_Index;              /* command number */
 721     unchar              reserved3[3];
 722     ushort volatile     Status;                 /* command status */
 723     ushort              Service;                /* service(for async.events) */
 724     ulong32             Info[2];                /* additional info */
 725     struct {
 726         ushort          offset;                 /* command offs. in the DPRAM*/
 727         ushort          serv_id;                /* service */
 728     } PACKED comm_queue[MAXOFFSETS];            /* command queue */
 729     ulong32             bios_reserved[2];
 730     unchar              gdt_dpr_cmd[1];         /* commands */
 731 } PACKED gdt_dpr_if;
 732
 733 /* SRAM structure PCI controllers */
 734 typedef struct {
 735     ulong32     magic;                          /* controller ID from BIOS */
 736     ushort      need_deinit;                    /* switch betw. BIOS/driver */
 737     unchar      switch_support;                 /* see need_deinit */
 738     unchar      padding[9];
 739     unchar      os_used[16];                    /* OS code per service */
 740     unchar      unused[28];
 741     unchar      fw_magic;                       /* contr. ID from firmware */
 742 } PACKED gdt_pci_sram;
 743
 744 /* SRAM structure EISA controllers (but NOT GDT3000/3020) */
 745 typedef struct {
 746     unchar      os_used[16];                    /* OS code per service */
 747     ushort      need_deinit;                    /* switch betw. BIOS/driver */
 748     unchar      switch_support;                 /* see need_deinit */
 749     unchar      padding;
 750 } PACKED gdt_eisa_sram;
 751
 752
 753 /* DPRAM ISA controllers */
 754 typedef struct {
 755     union {
 756         struct {
 757             unchar      bios_used[0x3c00-32];   /* 15KB - 32Bytes BIOS */
 758             ulong32     magic;                  /* controller (EISA) ID */
 759             ushort      need_deinit;            /* switch betw. BIOS/driver */
 760             unchar      switch_support;         /* see need_deinit */
 761             unchar      padding[9];
 762             unchar      os_used[16];            /* OS code per service */
 763         } PACKED dp_sram;
 764         unchar          bios_area[0x4000];      /* 16KB reserved for BIOS */
 765     } bu;
 766     union {
 767         gdt_dpr_if      ic;                     /* interface area */
 768         unchar          if_area[0x3000];        /* 12KB for interface */
 769     } u;
 770     struct {
 771         unchar          memlock;                /* write protection DPRAM */
 772         unchar          event;                  /* release event */
 773         unchar          irqen;                  /* board interrupts enable */
 774         unchar          irqdel;                 /* acknowledge board int. */
 775         unchar volatile Sema1;                  /* status semaphore */
 776         unchar          rq;                     /* IRQ/DRQ configuration */
 777     } PACKED io;
 778 } PACKED gdt2_dpram_str;
 779
 780 /* DPRAM PCI controllers */
 781 typedef struct {
 782     union {
 783         gdt_dpr_if      ic;                     /* interface area */
 784         unchar          if_area[0xff0-sizeof(gdt_pci_sram)];
 785     } u;
 786     gdt_pci_sram        gdt6sr;                 /* SRAM structure */
 787     struct {
 788         unchar          unused0[1];
 789         unchar volatile Sema1;                  /* command semaphore */
 790         unchar          unused1[3];
 791         unchar          irqen;                  /* board interrupts enable */
 792         unchar          unused2[2];
 793         unchar          event;                  /* release event */
 794         unchar          unused3[3];
 795         unchar          irqdel;                 /* acknowledge board int. */
 796         unchar          unused4[3];
 797     } PACKED io;
 798 } PACKED gdt6_dpram_str;
 799
 800 /* PLX register structure (new PCI controllers) */
 801 typedef struct {
 802     unchar              cfg_reg;        /* DPRAM cfg.(2:below 1MB,0:anywhere)*/
 803     unchar              unused1[0x3f];
 804     unchar volatile     sema0_reg;              /* command semaphore */
 805     unchar volatile     sema1_reg;              /* status semaphore */
 806     unchar              unused2[2];
 807     ushort volatile     status;                 /* command status */
 808     ushort              service;                /* service */
 809     ulong32             info[2];                /* additional info */
 810     unchar              unused3[0x10];
 811     unchar              ldoor_reg;              /* PCI to local doorbell */
 812     unchar              unused4[3];
 813     unchar volatile     edoor_reg;              /* local to PCI doorbell */
 814     unchar              unused5[3];
 815     unchar              control0;               /* control0 register(unused) */
 816     unchar              control1;               /* board interrupts enable */
 817     unchar              unused6[0x16];
 818 } PACKED gdt6c_plx_regs;
 819
 820 /* DPRAM new PCI controllers */
 821 typedef struct {
 822     union {
 823         gdt_dpr_if      ic;                     /* interface area */
 824         unchar          if_area[0x4000-sizeof(gdt_pci_sram)];
 825     } u;
 826     gdt_pci_sram        gdt6sr;                 /* SRAM structure */
 827 } PACKED gdt6c_dpram_str;
 828
 829 /* i960 register structure (PCI MPR controllers) */
 830 typedef struct {
 831     unchar              unused1[16];
 832     unchar volatile     sema0_reg;              /* command semaphore */
 833     unchar              unused2;
 834     unchar volatile     sema1_reg;              /* status semaphore */
 835     unchar              unused3;
 836     ushort volatile     status;                 /* command status */
 837     ushort              service;                /* service */
 838     ulong32             info[2];                /* additional info */
 839     unchar              ldoor_reg;              /* PCI to local doorbell */
 840     unchar              unused4[11];
 841     unchar volatile     edoor_reg;              /* local to PCI doorbell */
 842     unchar              unused5[7];
 843     unchar              edoor_en_reg;           /* board interrupts enable */
 844     unchar              unused6[27];
 845     ulong32             unused7[939];
 846     ulong32             severity;
 847     char                evt_str[256];           /* event string */
 848 } PACKED gdt6m_i960_regs;
 849
 850 /* DPRAM PCI MPR controllers */
 851 typedef struct {
 852     gdt6m_i960_regs     i960r;                  /* 4KB i960 registers */
 853     union {
 854         gdt_dpr_if      ic;                     /* interface area */
 855         unchar          if_area[0x3000-sizeof(gdt_pci_sram)];
 856     } u;
 857     gdt_pci_sram        gdt6sr;                 /* SRAM structure */
 858 } PACKED gdt6m_dpram_str;
 859
 860
 861 /* PCI resources */
 862 typedef struct {
 863 #if LINUX_VERSION_CODE >= 0x02015C
 864     struct pci_dev      *pdev;
 865 #endif
 866     ushort              vendor_id;              /* vendor (ICP, Intel, ..) */
 867     ushort              device_id;              /* device ID (0,..,9) */
 868     ushort              subdevice_id;           /* sub device ID */
 869     unchar              bus;                    /* PCI bus */
 870     unchar              device_fn;              /* PCI device/function no. */
 871     ulong               dpmem;                  /* DPRAM address */
 872     ulong               io;                     /* IO address */
 873     ulong               io_mm;                  /* IO address mem. mapped */
 874     unchar              irq;                    /* IRQ */
 875 } gdth_pci_str;
 876
 877
 878 /* controller information structure */
 879 typedef struct {
 880     ushort              oem_id;                 /* OEM */
 881     ushort              type;                   /* controller class */
 882     ushort              raw_feat;               /* feat. raw service (s/g,..) */
 883     ulong32             stype;                  /* subtype (PCI: device ID) */
 884     ushort              subdevice_id;           /* sub device ID (PCI) */
 885     ushort              fw_vers;                /* firmware version */
 886     ushort              cache_feat;             /* feat. cache serv. (s/g,..) */
 887     ushort              bmic;                   /* BMIC address (EISA) */
 888     void                *brd;                   /* DPRAM address */
 889     ulong32             brd_phys;               /* slot number/BIOS address */
 890     gdt6c_plx_regs      *plx;                   /* PLX regs (new PCI contr.) */
 891     gdth_cmd_str        *pccb;                  /* address command structure */
 892     char                *pscratch;              /* scratch (DMA) buffer */
 893     unchar              scratch_busy;           /* in use? */
 894     unchar              scan_mode;              /* current scan mode */
 895     unchar              irq;                    /* IRQ */
 896     unchar              drq;                    /* DRQ (ISA controllers) */
 897     ushort              status;                 /* command status */
 898     ushort              service;                /* service/firmware ver./.. */
 899     ulong32             info;
 900     ulong32             info2;                  /* additional info */
 901     Scsi_Cmnd           *req_first;             /* top of request queue */
 902     struct {
 903         unchar          present;                /* Flag: host drive present? */
 904         unchar          is_logdrv;              /* Flag: log. drive (master)? */
 905         unchar          is_arraydrv;            /* Flag: array drive? */
 906         unchar          is_master;              /* Flag: array drive master? */
 907         unchar          is_parity;              /* Flag: parity drive? */
 908         unchar          is_hotfix;              /* Flag: hotfix drive? */
 909         unchar          master_no;              /* number of master drive */
 910         unchar          lock;                   /* drive locked? (hot plug) */
 911         unchar          heads;                  /* mapping */
 912         unchar          secs;
 913         ushort          devtype;                /* further information */
 914         ulong32         size;                   /* capacity */
 915         unchar          ldr_no;                 /* log. drive no. */
 916         unchar          rw_attribs;             /* r/w attributes */
 917         unchar          cluster_type;           /* cluster properties */
 918         unchar          media_changed;          /* Flag:MOUNT/UNMOUNT occured */
 919         ulong32         start_sec;              /* start sector */
 920     } hdr[MAX_LDRIVES];                         /* host drives */
 921     struct {
 922         unchar          lock;                   /* channel locked? (hot plug) */
 923         unchar          pdev_cnt;               /* physical device count */
 924         unchar          local_no;               /* local channel number */
 925         unchar          io_cnt[MAXID];          /* current IO count */
 926         ulong32         address;                /* channel address */
 927         ulong32         id_list[MAXID];         /* IDs of the phys. devices */
 928     } raw[MAXBUS];                              /* SCSI channels */
 929     struct {
 930         Scsi_Cmnd       *cmnd;                  /* pending request */
 931         ushort          service;                /* service */
 932     } cmd_tab[GDTH_MAXCMDS];                    /* table of pend. requests */
 933     unchar              bus_cnt;                /* SCSI bus count */
 934     unchar              tid_cnt;                /* Target ID count */
 935     unchar              bus_id[MAXBUS];         /* IOP IDs */
 936     unchar              virt_bus;               /* number of virtual bus */
 937     unchar              more_proc;              /* more /proc info supported */
 938     ushort              cmd_cnt;                /* command count in DPRAM */
 939     ushort              cmd_len;                /* length of actual command */
 940     ushort              cmd_offs_dpmem;         /* actual offset in DPRAM */
 941     ushort              ic_all_size;            /* sizeof DPRAM interf. area */
 942     gdth_cpar_str       cpar;                   /* controller cache par. */
 943     gdth_bfeat_str      bfeat;                  /* controller features */
 944     gdth_binfo_str      binfo;                  /* controller info */
 945     gdth_evt_data       dvr;                    /* event structure */
 946 #if LINUX_VERSION_CODE >= 0x02015F
 947     spinlock_t          smp_lock;
 948 #endif
 949 } gdth_ha_str;
 950
 951 /* structure for scsi_register(), SCSI bus != 0 */
 952 typedef struct {
 953     ushort      hanum;
 954     ushort      busnum;
 955 } gdth_num_str;
 956
 957 /* structure for scsi_register() */
 958 typedef struct {
 959     gdth_num_str        numext;                 /* must be the first element */
 960     gdth_ha_str         haext;
 961     gdth_cmd_str        cmdext;
 962 } gdth_ext_str;
 963
 964
 965 /* INQUIRY data format */
 966 typedef struct {
 967     unchar      type_qual;
 968     unchar      modif_rmb;
 969     unchar      version;
 970     unchar      resp_aenc;
 971     unchar      add_length;
 972     unchar      reserved1;
 973     unchar      reserved2;
 974     unchar      misc;
 975     unchar      vendor[8];
 976     unchar      product[16];
 977     unchar      revision[4];
 978 } PACKED gdth_inq_data;
 979
 980 /* READ_CAPACITY data format */
 981 typedef struct {
 982     ulong32     last_block_no;
 983     ulong32     block_length;
 984 } PACKED gdth_rdcap_data;
 985
 986 /* REQUEST_SENSE data format */
 987 typedef struct {
 988     unchar      errorcode;
 989     unchar      segno;
 990     unchar      key;
 991     ulong32     info;
 992     unchar      add_length;
 993     ulong32     cmd_info;
 994     unchar      adsc;
 995     unchar      adsq;
 996     unchar      fruc;
 997     unchar      key_spec[3];
 998 } PACKED gdth_sense_data;
 999
1000 /* MODE_SENSE data format */
1001 typedef struct {
1002     struct {
1003         unchar  data_length;
1004         unchar  med_type;
1005         unchar  dev_par;
1006         unchar  bd_length;
1007     } PACKED hd;
1008     struct {
1009         unchar  dens_code;
1010         unchar  block_count[3];
1011         unchar  reserved;
1012         unchar  block_length[3];
1013     } PACKED bd;
1014 } PACKED gdth_modep_data;
1015
1016 /* stack frame */
1017 typedef struct {
1018     ulong       b[10];                          /* 32/64 bit compiler ! */
1019 } PACKED gdth_stackframe;
1020
1021
1022 /* function prototyping */
1023
1024 int gdth_detect(Scsi_Host_Template *);
1025 int gdth_release(struct Scsi_Host *);
1026 int gdth_queuecommand(Scsi_Cmnd *,void (*done)(Scsi_Cmnd *));
1027 int gdth_abort(Scsi_Cmnd *);
1028 #if LINUX_VERSION_CODE >= 0x010346
1029 int gdth_reset(Scsi_Cmnd *, unsigned int reset_flags);
1030 #else
1031 int gdth_reset(Scsi_Cmnd *);
1032 #endif
1033 const char *gdth_info(struct Scsi_Host *);
1034
1035 #if LINUX_VERSION_CODE >= 0x020322
1036 int gdth_bios_param(Disk *,kdev_t,int *);
1037 int gdth_proc_info(char *,char **,off_t,int,int,int);
1038 int gdth_eh_abort(Scsi_Cmnd *scp);
1039 int gdth_eh_device_reset(Scsi_Cmnd *scp);
1040 int gdth_eh_bus_reset(Scsi_Cmnd *scp);
1041 int gdth_eh_host_reset(Scsi_Cmnd *scp);
1042 #define GDTH { proc_name:       "gdth",                          \
1043                proc_info:       gdth_proc_info,                  \
1044                name:            "GDT SCSI Disk Array Controller",\
1045                detect:          gdth_detect,                     \
1046                release:         gdth_release,                    \
1047                info:            gdth_info,                       \
1048                command:         NULL,                            \
1049                queuecommand:    gdth_queuecommand,               \
1050                eh_abort_handler: gdth_eh_abort,                  \
1051                eh_device_reset_handler: gdth_eh_device_reset,    \
1052                eh_bus_reset_handler: gdth_eh_bus_reset,          \
1053                eh_host_reset_handler: gdth_eh_host_reset,        \
1054                abort:           gdth_abort,                      \
1055                reset:           gdth_reset,                      \
1056                bios_param:      gdth_bios_param,                 \
1057                can_queue:       GDTH_MAXCMDS,                    \
1058                this_id:         -1,                              \
1059                sg_tablesize:    GDTH_MAXSG,                      \
1060                cmd_per_lun:     GDTH_MAXC_P_L,                   \
1061                present:         0,                               \
1062                unchecked_isa_dma: 1,                             \
1063                use_clustering:  ENABLE_CLUSTERING,               \
1064                use_new_eh_code: 1       /* use new error code */ }
1065
1066 #elif LINUX_VERSION_CODE >= 0x02015F
1067 int gdth_bios_param(Disk *,kdev_t,int *);
1068 extern struct proc_dir_entry proc_scsi_gdth;
1069 int gdth_proc_info(char *,char **,off_t,int,int,int);
1070 int gdth_eh_abort(Scsi_Cmnd *scp);
1071 int gdth_eh_device_reset(Scsi_Cmnd *scp);
1072 int gdth_eh_bus_reset(Scsi_Cmnd *scp);
1073 int gdth_eh_host_reset(Scsi_Cmnd *scp);
1074 #define GDTH { proc_dir:        &proc_scsi_gdth,                 \
1075                proc_info:       gdth_proc_info,                  \
1076                name:            "GDT SCSI Disk Array Controller",\
1077                detect:          gdth_detect,                     \
1078                release:         gdth_release,                    \
1079                info:            gdth_info,                       \
1080                command:         NULL,                            \
1081                queuecommand:    gdth_queuecommand,               \
1082                eh_abort_handler: gdth_eh_abort,                  \
1083                eh_device_reset_handler: gdth_eh_device_reset,    \
1084                eh_bus_reset_handler: gdth_eh_bus_reset,          \
1085                eh_host_reset_handler: gdth_eh_host_reset,        \
1086                abort:           gdth_abort,                      \
1087                reset:           gdth_reset,                      \
1088                bios_param:      gdth_bios_param,                 \
1089                can_queue:       GDTH_MAXCMDS,                    \
1090                this_id:         -1,                              \
1091                sg_tablesize:    GDTH_MAXSG,                      \
1092                cmd_per_lun:     GDTH_MAXC_P_L,                   \
1093                present:         0,                               \
1094                unchecked_isa_dma: 1,                             \
1095                use_clustering:  ENABLE_CLUSTERING,               \
1096                use_new_eh_code: 1       /* use new error code */ }
1097
1098 #elif LINUX_VERSION_CODE >= 0x010300
1099 int gdth_bios_param(Disk *,kdev_t,int *);
1100 extern struct proc_dir_entry proc_scsi_gdth;
1101 int gdth_proc_info(char *,char **,off_t,int,int,int);
1102 #define GDTH { NULL, NULL,                              \
1103                    &proc_scsi_gdth,                     \
1104                    gdth_proc_info,                      \
1105                    "GDT SCSI Disk Array Controller",    \
1106                    gdth_detect,                         \
1107                    gdth_release,                        \
1108                    gdth_info,                           \
1109                    NULL,                                \
1110                    gdth_queuecommand,                   \
1111                    gdth_abort,                          \
1112                    gdth_reset,                          \
1113                    NULL,                                \
1114                    gdth_bios_param,                     \
1115                    GDTH_MAXCMDS,                        \
1116                    -1,                                  \
1117                    GDTH_MAXSG,                          \
1118                    GDTH_MAXC_P_L,                       \
1119                    0,                                   \
1120                    1,                                   \
1121                    ENABLE_CLUSTERING}
1122
1123 #else
1124 int gdth_bios_param(Disk *,int,int *);
1125 #define GDTH { NULL, NULL,                              \
1126                    "GDT SCSI Disk Array Controller",    \
1127                    gdth_detect,                         \
1128                    gdth_release,                        \
1129                    gdth_info,                           \
1130                    NULL,                                \
1131                    gdth_queuecommand,                   \
1132                    gdth_abort,                          \
1133                    gdth_reset,                          \
1134                    NULL,                                \
1135                    gdth_bios_param,                     \
1136                    GDTH_MAXCMDS,                        \
1137                    -1,                                  \
1138                    GDTH_MAXSG,                          \
1139                    GDTH_MAXC_P_L,                       \
1140                    0,                                   \
1141                    1,                                   \
1142                    ENABLE_CLUSTERING}
1143 #endif
1144
1145 #endif
1146