1 /**************************************************************************
2 * Initio A100 device driver for Linux.
4 * Copyright (c) 1994-1998 Initio Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 * --------------------------------------------------------------------------
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions, and the following disclaimer,
28 * without modification, immediately at the beginning of the file.
29 * 2. Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in the
31 * documentation and/or other materials provided with the distribution.
32 * 3. The name of the author may not be used to endorse or promote products
33 * derived from this software without specific prior written permission.
35 * Where this Software is combined with software released under the terms of
36 * the GNU General Public License ("GPL") and the terms of the GPL would require the
37 * combined work to also be released under the terms of the GPL, the terms
38 * and conditions of this License will apply in addition to those of the
39 * GPL with the exception of any terms or conditions of this License that
40 * conflict with, or are expressly prohibited by, the GPL.
42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
43 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
45 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
46 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
48 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
50 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
51 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 **************************************************************************
57 * Description: INI-A100U2W LINUX device driver header
59 * 06/18/98 HL, Initial production Version 1.02
60 * 12/19/98 bv, Use spinlocks for 2.1.95 and up
61 ****************************************************************************/
63 #ifndef CVT_LINUX_VERSION
64 #define CVT_LINUX_VERSION(V,P,S) (((V) * 65536) + ((P) * 256) + (S))
67 #ifndef LINUX_VERSION_CODE
68 #include <linux/version.h>
71 #include <linux/types.h>
75 extern int inia100_detect(Scsi_Host_Template *);
76 extern int inia100_release(struct Scsi_Host *);
77 extern int inia100_command(Scsi_Cmnd *);
78 extern int inia100_queue(Scsi_Cmnd *, void (*done) (Scsi_Cmnd *));
79 extern int inia100_abort(Scsi_Cmnd *);
80 extern int inia100_reset(Scsi_Cmnd *, unsigned int);
82 extern int inia100_biosparam(Scsi_Disk *, kdev_t, int *); /*for linux v2.0 */
84 #define inia100_REVID "Initio INI-A100U2W SCSI device driver; Revision: 1.02c"
89 proc_name: "INIA100", \
91 name: inia100_REVID, \
92 detect: inia100_detect, \
93 release: inia100_release, \
95 command: inia100_command, \
96 queuecommand: inia100_queue, \
97 eh_strategy_handler: NULL, \
98 eh_abort_handler: NULL, \
99 eh_device_reset_handler: NULL, \
100 eh_bus_reset_handler: NULL, \
101 eh_host_reset_handler: NULL, \
102 abort: inia100_abort, \
103 reset: inia100_reset, \
104 slave_attach: NULL, \
105 bios_param: inia100_biosparam, \
108 sg_tablesize: SG_ALL, \
111 unchecked_isa_dma: 0, \
112 use_clustering: ENABLE_CLUSTERING, \
116 #define VIRT_TO_BUS(i) (unsigned int) virt_to_bus((void *)(i))
117 #define ULONG unsigned long
119 #define USHORT unsigned short
120 #define UCHAR unsigned char
121 #define BYTE unsigned char
122 #define WORD unsigned short
123 #define DWORD unsigned long
124 #define UBYTE unsigned char
125 #define UWORD unsigned short
126 #define UDWORD unsigned long
130 #define NULL 0 /* zero */
133 #define TRUE (1) /* boolean true */
136 #define FALSE (0) /* boolean false */
142 #define ORC_MAXQUEUE 245
144 #define ORC_MAXQUEUE 25
147 #define TOTAL_SG_ENTRY 32
148 #define MAX_TARGETS 16
150 #define SENSE_SIZE 14
151 #define MAX_SUPPORTED_ADAPTERS 4
152 #define SUCCESSFUL 0x00
154 #define I920_DEVICE_ID 0x0002 /* Initio's inic-950 product ID */
156 /************************************************************************/
157 /* Scatter-Gather Element Structure */
158 /************************************************************************/
159 typedef struct ORC_SG_Struc {
160 U32 SG_Ptr; /* Data Pointer */
161 U32 SG_Len; /* Data Length */
165 /* SCSI related definition */
166 #define DISC_NOT_ALLOW 0x80 /* Disconnect is not allowed */
167 #define DISC_ALLOW 0xC0 /* Disconnect is allowed */
170 #define ORC_OFFSET_SCB 16
171 #define ORC_MAX_SCBS 250
172 #define MAX_CHANNELS 2
173 #define MAX_ESCB_ELE 64
174 #define TCF_DRV_255_63 0x0400
176 /********************************************************/
177 /* Orchid Configuration Register Set */
178 /********************************************************/
179 #define ORC_PVID 0x00 /* Vendor ID */
180 #define ORC_VENDOR_ID 0x1101 /* Orchid vendor ID */
181 #define ORC_PDID 0x02 /* Device ID */
182 #define ORC_DEVICE_ID 0x1060 /* Orchid device ID */
183 #define ORC_COMMAND 0x04 /* Command */
184 #define BUSMS 0x04 /* BUS MASTER Enable */
185 #define IOSPA 0x01 /* IO Space Enable */
186 #define ORC_STATUS 0x06 /* Status register */
187 #define ORC_REVISION 0x08 /* Revision number */
188 #define ORC_BASE 0x10 /* Base address */
189 #define ORC_BIOS 0x50 /* Expansion ROM base address */
190 #define ORC_INT_NUM 0x3C /* Interrupt line */
191 #define ORC_INT_PIN 0x3D /* Interrupt pin */
193 /********************************************************/
194 /* Orchid Host Command Set */
195 /********************************************************/
196 #define ORC_CMD_NOP 0x00 /* Host command - NOP */
197 #define ORC_CMD_VERSION 0x01 /* Host command - Get F/W version */
198 #define ORC_CMD_ECHO 0x02 /* Host command - ECHO */
199 #define ORC_CMD_SET_NVM 0x03 /* Host command - Set NVRAM */
200 #define ORC_CMD_GET_NVM 0x04 /* Host command - Get NVRAM */
201 #define ORC_CMD_GET_BUS_STATUS 0x05 /* Host command - Get SCSI bus status */
202 #define ORC_CMD_ABORT_SCB 0x06 /* Host command - Abort SCB */
203 #define ORC_CMD_ISSUE_SCB 0x07 /* Host command - Issue SCB */
205 /********************************************************/
206 /* Orchid Register Set */
207 /********************************************************/
208 #define ORC_GINTS 0xA0 /* Global Interrupt Status */
209 #define QINT 0x04 /* Reply Queue Interrupt */
210 #define ORC_GIMSK 0xA1 /* Global Interrupt MASK */
211 #define MQINT 0x04 /* Mask Reply Queue Interrupt */
212 #define ORC_GCFG 0xA2 /* Global Configure */
213 #define EEPRG 0x01 /* Enable EEPROM programming */
214 #define ORC_GSTAT 0xA3 /* Global status */
215 #define WIDEBUS 0x10 /* Wide SCSI Devices connected */
216 #define ORC_HDATA 0xA4 /* Host Data */
217 #define ORC_HCTRL 0xA5 /* Host Control */
218 #define SCSIRST 0x80 /* SCSI bus reset */
219 #define HDO 0x40 /* Host data out */
220 #define HOSTSTOP 0x02 /* Host stop RISC engine */
221 #define DEVRST 0x01 /* Device reset */
222 #define ORC_HSTUS 0xA6 /* Host Status */
223 #define HDI 0x02 /* Host data in */
224 #define RREADY 0x01 /* RISC engine is ready to receive */
225 #define ORC_NVRAM 0xA7 /* Nvram port address */
230 #define ORC_PQUEUE 0xA8 /* Posting queue FIFO */
231 #define ORC_PQCNT 0xA9 /* Posting queue FIFO Cnt */
232 #define ORC_RQUEUE 0xAA /* Reply queue FIFO */
233 #define ORC_RQUEUECNT 0xAB /* Reply queue FIFO Cnt */
234 #define ORC_FWBASEADR 0xAC /* Firmware base address */
236 #define ORC_EBIOSADR0 0xB0 /* External Bios address */
237 #define ORC_EBIOSADR1 0xB1 /* External Bios address */
238 #define ORC_EBIOSADR2 0xB2 /* External Bios address */
239 #define ORC_EBIOSDATA 0xB3 /* External Bios address */
241 #define ORC_SCBSIZE 0xB7 /* SCB size register */
242 #define ORC_SCBBASE0 0xB8 /* SCB base address 0 */
243 #define ORC_SCBBASE1 0xBC /* SCB base address 1 */
245 #define ORC_RISCCTL 0xE0 /* RISC Control */
246 #define PRGMRST 0x002
247 #define DOWNLOAD 0x001
248 #define ORC_PRGMCTR0 0xE2 /* RISC program counter */
249 #define ORC_PRGMCTR1 0xE3 /* RISC program counter */
250 #define ORC_RISCRAM 0xEC /* RISC RAM data port 4 bytes */
252 typedef struct orc_extended_scb { /* Extended SCB */
253 ORC_SG ESCB_SGList[TOTAL_SG_ENTRY]; /*0 Start of SG list */
254 Scsi_Cmnd *SCB_Srb; /*50 SRB Pointer */
257 /***********************************************************************
259 ************************************************************************/
260 typedef struct orc_scb { /* Scsi_Ctrl_Blk */
261 UBYTE SCB_Opcode; /*00 SCB command code&residual */
262 UBYTE SCB_Flags; /*01 SCB Flags */
263 UBYTE SCB_Target; /*02 Target Id */
264 UBYTE SCB_Lun; /*03 Lun */
265 U32 SCB_Reserved0; /*04 Reserved for ORCHID must 0 */
266 U32 SCB_XferLen; /*08 Data Transfer Length */
267 U32 SCB_Reserved1; /*0C Reserved for ORCHID must 0 */
268 U32 SCB_SGLen; /*10 SG list # * 8 */
269 U32 SCB_SGPAddr; /*14 SG List Buf physical Addr */
270 U32 SCB_SGPAddrHigh; /*18 SG Buffer high physical Addr */
271 UBYTE SCB_HaStat; /*1C Host Status */
272 UBYTE SCB_TaStat; /*1D Target Status */
273 UBYTE SCB_Status; /*1E SCB status */
274 UBYTE SCB_Link; /*1F Link pointer, default 0xFF */
275 UBYTE SCB_SenseLen; /*20 Sense Allocation Length */
276 UBYTE SCB_CDBLen; /*21 CDB Length */
277 UBYTE SCB_Ident; /*22 Identify */
278 UBYTE SCB_TagMsg; /*23 Tag Message */
279 UBYTE SCB_CDB[IMAX_CDB]; /*24 SCSI CDBs */
280 UBYTE SCB_ScbIdx; /*3C Index for this ORCSCB */
281 U32 SCB_SensePAddr; /*34 Sense Buffer physical Addr */
283 ESCB *SCB_EScb; /*38 Extended SCB Pointer */
285 UBYTE SCB_Reserved2[4]; /*3E Reserved for Driver use */
289 /* Opcodes of ORCSCB_Opcode */
290 #define ORC_EXECSCSI 0x00 /* SCSI initiator command with residual */
291 #define ORC_BUSDEVRST 0x01 /* SCSI Bus Device Reset */
293 /* Status of ORCSCB_Status */
294 #define ORCSCB_COMPLETE 0x00 /* SCB request completed */
295 #define ORCSCB_POST 0x01 /* SCB is posted by the HOST */
297 /* Bit Definition for ORCSCB_Flags */
298 #define SCF_DISINT 0x01 /* Disable HOST interrupt */
299 #define SCF_DIR 0x18 /* Direction bits */
300 #define SCF_NO_DCHK 0x00 /* Direction determined by SCSI */
301 #define SCF_DIN 0x08 /* From Target to Initiator */
302 #define SCF_DOUT 0x10 /* From Initiator to Target */
303 #define SCF_NO_XF 0x18 /* No data transfer */
304 #define SCF_POLL 0x40
306 /* Error Codes for ORCSCB_HaStat */
307 #define HOST_SEL_TOUT 0x11
308 #define HOST_DO_DU 0x12
309 #define HOST_BUS_FREE 0x13
310 #define HOST_BAD_PHAS 0x14
311 #define HOST_INV_CMD 0x16
312 #define HOST_SCSI_RST 0x1B
313 #define HOST_DEV_RST 0x1C
316 /* Error Codes for ORCSCB_TaStat */
317 #define TARGET_CHK_COND 0x02
318 #define TARGET_BUSY 0x08
319 #define TARGET_TAG_FULL 0x28
322 /* Queue tag msg: Simple_quque_tag, Head_of_queue_tag, Ordered_queue_tag */
323 #define MSG_STAG 0x20
324 #define MSG_HTAG 0x21
325 #define MSG_OTAG 0x22
327 #define MSG_IGNOREWIDE 0x23
329 #define MSG_IDENT 0x80
330 #define MSG_DISC 0x40 /* Disconnect allowed */
334 #define MSG_EXTEND 0x01
336 #define MSG_ABORT 0x06
339 #define MSG_PARITY 0x09
340 #define MSG_DEVRST 0x0C
341 #define MSG_STAG 0x20
343 /***********************************************************************
344 Target Device Control Structure
345 **********************************************************************/
347 typedef struct ORC_Tar_Ctrl_Struc {
348 UBYTE TCS_DrvDASD; /* 6 */
349 UBYTE TCS_DrvSCSI; /* 7 */
350 UBYTE TCS_DrvHead; /* 8 */
351 UWORD TCS_DrvFlags; /* 4 */
352 UBYTE TCS_DrvSector; /* 7 */
353 } ORC_TCS, *PORC_TCS;
355 /* Bit Definition for TCF_DrvFlags */
356 #define TCS_DF_NODASD_SUPT 0x20 /* Suppress OS/2 DASD Mgr support */
357 #define TCS_DF_NOSCSI_SUPT 0x40 /* Suppress OS/2 SCSI Mgr support */
360 /***********************************************************************
361 Host Adapter Control Structure
362 ************************************************************************/
363 typedef struct ORC_Ha_Ctrl_Struc {
364 USHORT HCS_Base; /* 00 */
365 UBYTE HCS_Index; /* 02 */
366 UBYTE HCS_Intr; /* 04 */
367 UBYTE HCS_SCSI_ID; /* 06 H/A SCSI ID */
368 UBYTE HCS_BIOS; /* 07 BIOS configuration */
370 UBYTE HCS_Flags; /* 0B */
371 UBYTE HCS_HAConfig1; /* 1B SCSI0MAXTags */
372 UBYTE HCS_MaxTar; /* 1B SCSI0MAXTags */
374 USHORT HCS_Units; /* Number of units this adapter */
375 USHORT HCS_AFlags; /* Adapter info. defined flags */
376 ULONG HCS_Timeout; /* Adapter timeout value */
377 PVOID HCS_virScbArray; /* 28 Virtual Pointer to SCB array */
378 U32 HCS_physScbArray; /* Scb Physical address */
379 PVOID HCS_virEscbArray; /* Virtual pointer to ESCB Scatter list */
380 U32 HCS_physEscbArray; /* scatter list Physical address */
381 UBYTE TargetFlag[16]; /* 30 target configuration, TCF_EN_TAG */
382 UBYTE MaximumTags[16]; /* 40 ORC_MAX_SCBS */
383 UBYTE ActiveTags[16][16]; /* 50 */
384 ORC_TCS HCS_Tcs[16]; /* 28 */
385 U32 BitAllocFlag[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */
386 spinlock_t BitAllocFlagLock;
387 Scsi_Cmnd *pSRB_head;
388 Scsi_Cmnd *pSRB_tail;
389 spinlock_t pSRB_lock;
392 /* Bit Definition for HCS_Flags */
394 #define HCF_SCSI_RESET 0x01 /* SCSI BUS RESET */
395 #define HCF_PARITY 0x02 /* parity card */
396 #define HCF_LVDS 0x10 /* parity card */
398 /* Bit Definition for TargetFlag */
400 #define TCF_EN_255 0x08
401 #define TCF_EN_TAG 0x10
402 #define TCF_BUSY 0x20
403 #define TCF_DISCONNECT 0x40
404 #define TCF_SPIN_UP 0x80
406 /* Bit Definition for HCS_AFlags */
407 #define HCS_AF_IGNORE 0x01 /* Adapter ignore */
408 #define HCS_AF_DISABLE_RESET 0x10 /* Adapter disable reset */
409 #define HCS_AF_DISABLE_ADPT 0x80 /* Adapter disable */
412 /*---------------------------------------*/
413 /* TimeOut for RESET to complete (30s) */
415 /* After a RESET the drive is checked */
417 /*---------------------------------------*/
418 #define DELAYED_RESET_MAX (30*1000L)
419 #define DELAYED_RESET_INTERVAL 200L
421 /*----------------------------------------------*/
422 /* TimeOut for IRQ from last interrupt (5s) */
423 /*----------------------------------------------*/
424 #define IRQ_TIMEOUT_INTERVAL (5*1000L)
426 /*----------------------------------------------*/
427 /* Retry Delay interval (200ms) */
428 /*----------------------------------------------*/
429 #define DELAYED_RETRY_INTERVAL 200L
431 #define INQUIRY_SIZE 36
432 #define CAPACITY_SIZE 8
433 #define DEFAULT_SENSE_LEN 14
435 #define DEVICE_NOT_FOUND 0x86
437 /*----------------------------------------------*/
438 /* Definition for PCI device */
439 /*----------------------------------------------*/
440 #define MAX_PCI_DEVICES 21
441 #define MAX_PCI_BUSES 8