1 /*****************************************************************************/
2 /* ips.h -- driver for the IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 1999 IBM Corporation */
10 /* This program is free software; you can redistribute it and/or modify */
11 /* it under the terms of the GNU General Public License as published by */
12 /* the Free Software Foundation; either version 2 of the License, or */
13 /* (at your option) any later version. */
15 /* This program is distributed in the hope that it will be useful, */
16 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
17 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
18 /* GNU General Public License for more details. */
21 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
22 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
23 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
24 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
25 /* solely responsible for determining the appropriateness of using and */
26 /* distributing the Program and assumes all risks associated with its */
27 /* exercise of rights under this Agreement, including but not limited to */
28 /* the risks and costs of program errors, damage to or loss of data, */
29 /* programs or equipment, and unavailability or interruption of operations. */
31 /* DISCLAIMER OF LIABILITY */
32 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
33 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
34 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
35 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
36 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
37 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
38 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
40 /* You should have received a copy of the GNU General Public License */
41 /* along with this program; if not, write to the Free Software */
42 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
44 /* Bugs/Comments/Suggestions should be mailed to: */
45 /* ipslinux@adaptec.com */
47 /*****************************************************************************/
52 #include <asm/uaccess.h>
56 extern int ips_detect(Scsi_Host_Template *);
57 extern int ips_release(struct Scsi_Host *);
58 extern int ips_eh_abort(Scsi_Cmnd *);
59 extern int ips_eh_reset(Scsi_Cmnd *);
60 extern int ips_queue(Scsi_Cmnd *, void (*) (Scsi_Cmnd *));
61 extern int ips_biosparam(Disk *, kdev_t, int *);
62 extern const char * ips_info(struct Scsi_Host *);
63 extern void do_ips(int, void *, struct pt_regs *);
68 #ifndef LinuxVersionCode
69 #define LinuxVersionCode(x,y,z) (((x)<<16)+((y)<<8)+(z))
72 #define IPS_HA(x) ((ips_ha_t *) x->hostdata)
73 #define IPS_COMMAND_ID(ha, scb) (int) (scb - ha->scbs)
74 #define IPS_IS_TROMBONE(ha) (((ha->device_id == IPS_DEVICEID_COPPERHEAD) && \
75 (ha->revision_id >= IPS_REVID_TROMBONE32) && \
76 (ha->revision_id <= IPS_REVID_TROMBONE64)) ? 1 : 0)
77 #define IPS_IS_CLARINET(ha) (((ha->device_id == IPS_DEVICEID_COPPERHEAD) && \
78 (ha->revision_id >= IPS_REVID_CLARINETP1) && \
79 (ha->revision_id <= IPS_REVID_CLARINETP3)) ? 1 : 0)
80 #define IPS_IS_MORPHEUS(ha) (ha->device_id == IPS_DEVICEID_MORPHEUS)
81 #define IPS_USE_I2O_DELIVER(ha) ((IPS_IS_MORPHEUS(ha) || \
82 (IPS_IS_TROMBONE(ha) && \
83 (ips_force_i2o))) ? 1 : 0)
84 #define IPS_USE_I2O_STATUS(ha) (IPS_IS_MORPHEUS(ha))
85 #define IPS_USE_MEMIO(ha) ((IPS_IS_MORPHEUS(ha) || \
86 ((IPS_IS_TROMBONE(ha) || IPS_IS_CLARINET(ha)) && \
87 (ips_force_memio))) ? 1 : 0)
90 #define VIRT_TO_BUS(x) (uint32_t) virt_to_bus((void *) x)
97 #ifndef verify_area_20
98 #define verify_area_20(t,a,sz) (0) /* success */
101 #ifndef DECLARE_MUTEX_LOCKED
102 #define DECLARE_MUTEX_LOCKED(sem) struct semaphore sem = MUTEX_LOCKED;
108 #define IPS_SCB_LOCK(cpu_flags) spin_lock_irqsave(&ha->scb_lock, cpu_flags)
109 #define IPS_SCB_UNLOCK(cpu_flags) spin_unlock_irqrestore(&ha->scb_lock, cpu_flags)
110 #define IPS_QUEUE_LOCK(queue) spin_lock_irqsave(&(queue)->lock, (queue)->cpu_flags)
111 #define IPS_QUEUE_UNLOCK(queue) spin_unlock_irqrestore(&(queue)->lock, (queue)->cpu_flags)
112 #define IPS_HA_LOCK(cpu_flags) spin_lock_irqsave(&ha->ips_lock, cpu_flags)
113 #define IPS_HA_UNLOCK(cpu_flags) spin_unlock_irqrestore(&ha->ips_lock, cpu_flags)
116 * Adapter address map equates
118 #define IPS_REG_HISR 0x08 /* Host Interrupt Status Reg */
119 #define IPS_REG_CCSAR 0x10 /* Cmd Channel System Addr Reg */
120 #define IPS_REG_CCCR 0x14 /* Cmd Channel Control Reg */
121 #define IPS_REG_SQHR 0x20 /* Status Q Head Reg */
122 #define IPS_REG_SQTR 0x24 /* Status Q Tail Reg */
123 #define IPS_REG_SQER 0x28 /* Status Q End Reg */
124 #define IPS_REG_SQSR 0x2C /* Status Q Start Reg */
125 #define IPS_REG_SCPR 0x05 /* Subsystem control port reg */
126 #define IPS_REG_ISPR 0x06 /* interrupt status port reg */
127 #define IPS_REG_CBSP 0x07 /* CBSP register */
128 #define IPS_REG_FLAP 0x18 /* Flash address port */
129 #define IPS_REG_FLDP 0x1C /* Flash data port */
130 #define IPS_REG_NDAE 0x38 /* Anaconda 64 NDAE Register */
131 #define IPS_REG_I2O_INMSGQ 0x40 /* I2O Inbound Message Queue */
132 #define IPS_REG_I2O_OUTMSGQ 0x44 /* I2O Outbound Message Queue */
133 #define IPS_REG_I2O_HIR 0x30 /* I2O Interrupt Status */
134 #define IPS_REG_I960_IDR 0x20 /* i960 Inbound Doorbell */
135 #define IPS_REG_I960_MSG0 0x18 /* i960 Outbound Reg 0 */
136 #define IPS_REG_I960_MSG1 0x1C /* i960 Outbound Reg 1 */
137 #define IPS_REG_I960_OIMR 0x34 /* i960 Oubound Int Mask Reg */
140 * Adapter register bit equates
142 #define IPS_BIT_GHI 0x04 /* HISR General Host Interrupt */
143 #define IPS_BIT_SQO 0x02 /* HISR Status Q Overflow */
144 #define IPS_BIT_SCE 0x01 /* HISR Status Channel Enqueue */
145 #define IPS_BIT_SEM 0x08 /* CCCR Semaphore Bit */
146 #define IPS_BIT_ILE 0x10 /* CCCR ILE Bit */
147 #define IPS_BIT_START_CMD 0x101A /* CCCR Start Command Channel */
148 #define IPS_BIT_START_STOP 0x0002 /* CCCR Start/Stop Bit */
149 #define IPS_BIT_RST 0x80 /* SCPR Reset Bit */
150 #define IPS_BIT_EBM 0x02 /* SCPR Enable Bus Master */
151 #define IPS_BIT_EI 0x80 /* HISR Enable Interrupts */
152 #define IPS_BIT_OP 0x01 /* OP bit in CBSP */
153 #define IPS_BIT_I2O_OPQI 0x08 /* General Host Interrupt */
154 #define IPS_BIT_I960_MSG0I 0x01 /* Message Register 0 Interrupt*/
155 #define IPS_BIT_I960_MSG1I 0x02 /* Message Register 1 Interrupt*/
158 * Adapter Command ID Equates
160 #define IPS_CMD_GET_LD_INFO 0x19
161 #define IPS_CMD_GET_SUBSYS 0x40
162 #define IPS_CMD_READ_CONF 0x38
163 #define IPS_CMD_RW_NVRAM_PAGE 0xBC
164 #define IPS_CMD_READ 0x02
165 #define IPS_CMD_WRITE 0x03
166 #define IPS_CMD_FFDC 0xD7
167 #define IPS_CMD_ENQUIRY 0x05
168 #define IPS_CMD_FLUSH 0x0A
169 #define IPS_CMD_READ_SG 0x82
170 #define IPS_CMD_WRITE_SG 0x83
171 #define IPS_CMD_DCDB 0x04
172 #define IPS_CMD_DCDB_SG 0x84
173 #define IPS_CMD_EXTENDED_DCDB 0x95
174 #define IPS_CMD_EXTENDED_DCDB_SG 0x96
175 #define IPS_CMD_CONFIG_SYNC 0x58
176 #define IPS_CMD_ERROR_TABLE 0x17
177 #define IPS_CMD_DOWNLOAD 0x20
178 #define IPS_CMD_RW_BIOSFW 0x22
179 #define IPS_CMD_GET_VERSION_INFO 0xC6
180 #define IPS_CMD_RESET_CHANNEL 0x1A
186 #define IPS_POCL 0x30
187 #define IPS_NORM_STATE 0x00
188 #define IPS_MAX_ADAPTERS 16
189 #define IPS_MAX_IOCTL 1
190 #define IPS_MAX_IOCTL_QUEUE 8
191 #define IPS_MAX_QUEUE 128
192 #define IPS_BLKSIZE 512
193 #define IPS_MAX_SG 17
195 #define IPS_MAX_CHANNELS 4
196 #define IPS_MAX_TARGETS 15
197 #define IPS_MAX_CHUNKS 16
198 #define IPS_MAX_CMDS 128
199 #define IPS_MAX_XFER 0x10000
200 #define IPS_NVRAM_P5_SIG 0xFFDDBB99
201 #define IPS_MAX_POST_BYTES 0x02
202 #define IPS_MAX_CONFIG_BYTES 0x02
203 #define IPS_GOOD_POST_STATUS 0x80
204 #define IPS_SEM_TIMEOUT 2000
205 #define IPS_IOCTL_COMMAND 0x0D
206 #define IPS_INTR_ON 0
207 #define IPS_INTR_IORL 1
209 #define IPS_ADAPTER_ID 0xF
210 #define IPS_VENDORID 0x1014
211 #define IPS_DEVICEID_COPPERHEAD 0x002E
212 #define IPS_DEVICEID_MORPHEUS 0x01BD
213 #define IPS_SUBDEVICEID_4M 0x01BE
214 #define IPS_SUBDEVICEID_4L 0x01BF
215 #define IPS_SUBDEVICEID_4MX 0x0208
216 #define IPS_SUBDEVICEID_4LX 0x020E
217 #define IPS_SUBDEVICEID_5I2 0x0259
218 #define IPS_SUBDEVICEID_5I1 0x0258
219 #define IPS_IOCTL_SIZE 8192
220 #define IPS_STATUS_SIZE 4
221 #define IPS_STATUS_Q_SIZE (IPS_MAX_CMDS+1) * IPS_STATUS_SIZE
222 #define IPS_IMAGE_SIZE 500 * 1024
223 #define IPS_MEMMAP_SIZE 128
224 #define IPS_ONE_MSEC 1
225 #define IPS_ONE_SEC 1000
230 #define IPS_COMP_HEADS 128
231 #define IPS_COMP_SECTORS 32
232 #define IPS_NORM_HEADS 254
233 #define IPS_NORM_SECTORS 63
236 * Adapter Basic Status Codes
238 #define IPS_BASIC_STATUS_MASK 0xFF
239 #define IPS_GSC_STATUS_MASK 0x0F
240 #define IPS_CMD_SUCCESS 0x00
241 #define IPS_CMD_RECOVERED_ERROR 0x01
242 #define IPS_INVAL_OPCO 0x03
243 #define IPS_INVAL_CMD_BLK 0x04
244 #define IPS_INVAL_PARM_BLK 0x05
245 #define IPS_BUSY 0x08
246 #define IPS_CMD_CMPLT_WERROR 0x0C
247 #define IPS_LD_ERROR 0x0D
248 #define IPS_CMD_TIMEOUT 0x0E
249 #define IPS_PHYS_DRV_ERROR 0x0F
252 * Adapter Extended Status Equates
254 #define IPS_ERR_SEL_TO 0xF0
255 #define IPS_ERR_OU_RUN 0xF2
256 #define IPS_ERR_HOST_RESET 0xF7
257 #define IPS_ERR_DEV_RESET 0xF8
258 #define IPS_ERR_RECOVERY 0xFC
259 #define IPS_ERR_CKCOND 0xFF
262 * Operating System Defines
264 #define IPS_OS_WINDOWS_NT 0x01
265 #define IPS_OS_NETWARE 0x02
266 #define IPS_OS_OPENSERVER 0x03
267 #define IPS_OS_UNIXWARE 0x04
268 #define IPS_OS_SOLARIS 0x05
269 #define IPS_OS_OS2 0x06
270 #define IPS_OS_LINUX 0x07
271 #define IPS_OS_FREEBSD 0x08
274 * Adapter Revision ID's
276 #define IPS_REVID_SERVERAID 0x02
277 #define IPS_REVID_NAVAJO 0x03
278 #define IPS_REVID_SERVERAID2 0x04
279 #define IPS_REVID_CLARINETP1 0x05
280 #define IPS_REVID_CLARINETP2 0x07
281 #define IPS_REVID_CLARINETP3 0x0D
282 #define IPS_REVID_TROMBONE32 0x0F
283 #define IPS_REVID_TROMBONE64 0x10
286 * NVRAM Page 5 Adapter Defines
288 #define IPS_ADTYPE_SERVERAID 0x01
289 #define IPS_ADTYPE_SERVERAID2 0x02
290 #define IPS_ADTYPE_NAVAJO 0x03
291 #define IPS_ADTYPE_KIOWA 0x04
292 #define IPS_ADTYPE_SERVERAID3 0x05
293 #define IPS_ADTYPE_SERVERAID3L 0x06
294 #define IPS_ADTYPE_SERVERAID4H 0x07
295 #define IPS_ADTYPE_SERVERAID4M 0x08
296 #define IPS_ADTYPE_SERVERAID4L 0x09
297 #define IPS_ADTYPE_SERVERAID4MX 0x0A
298 #define IPS_ADTYPE_SERVERAID4LX 0x0B
299 #define IPS_ADTYPE_SERVERAID5I2 0x0C
300 #define IPS_ADTYPE_SERVERAID5I1 0x0D
303 * Adapter Command/Status Packet Definitions
305 #define IPS_SUCCESS 0x01 /* Successfully completed */
306 #define IPS_SUCCESS_IMM 0x02 /* Success - Immediately */
307 #define IPS_FAILURE 0x04 /* Completed with Error */
310 * Logical Drive Equates
312 #define IPS_LD_OFFLINE 0x02
313 #define IPS_LD_OKAY 0x03
314 #define IPS_LD_FREE 0x00
315 #define IPS_LD_SYS 0x06
316 #define IPS_LD_CRS 0x24
321 #define IPS_NO_DISCONNECT 0x00
322 #define IPS_DISCONNECT_ALLOWED 0x80
323 #define IPS_NO_AUTO_REQSEN 0x40
324 #define IPS_DATA_NONE 0x00
325 #define IPS_DATA_UNK 0x00
326 #define IPS_DATA_IN 0x01
327 #define IPS_DATA_OUT 0x02
328 #define IPS_TRANSFER64K 0x08
329 #define IPS_NOTIMEOUT 0x00
330 #define IPS_TIMEOUT10 0x10
331 #define IPS_TIMEOUT60 0x20
332 #define IPS_TIMEOUT20M 0x30
335 * SCSI Inquiry Data Flags
337 #define IPS_SCSI_INQ_TYPE_DASD 0x00
338 #define IPS_SCSI_INQ_TYPE_PROCESSOR 0x03
339 #define IPS_SCSI_INQ_LU_CONNECTED 0x00
340 #define IPS_SCSI_INQ_RD_REV2 0x02
341 #define IPS_SCSI_INQ_REV2 0x02
342 #define IPS_SCSI_INQ_REV3 0x03
343 #define IPS_SCSI_INQ_Address16 0x01
344 #define IPS_SCSI_INQ_Address32 0x02
345 #define IPS_SCSI_INQ_MedChanger 0x08
346 #define IPS_SCSI_INQ_MultiPort 0x10
347 #define IPS_SCSI_INQ_EncServ 0x40
348 #define IPS_SCSI_INQ_SoftReset 0x01
349 #define IPS_SCSI_INQ_CmdQue 0x02
350 #define IPS_SCSI_INQ_Linked 0x08
351 #define IPS_SCSI_INQ_Sync 0x10
352 #define IPS_SCSI_INQ_WBus16 0x20
353 #define IPS_SCSI_INQ_WBus32 0x40
354 #define IPS_SCSI_INQ_RelAdr 0x80
357 * SCSI Request Sense Data Flags
359 #define IPS_SCSI_REQSEN_VALID 0x80
360 #define IPS_SCSI_REQSEN_CURRENT_ERR 0x70
361 #define IPS_SCSI_REQSEN_NO_SENSE 0x00
364 * SCSI Mode Page Equates
366 #define IPS_SCSI_MP3_SoftSector 0x01
367 #define IPS_SCSI_MP3_HardSector 0x02
368 #define IPS_SCSI_MP3_Removeable 0x04
369 #define IPS_SCSI_MP3_AllocateSurface 0x08
372 * Configuration Structure Flags
374 #define IPS_CFG_USEROPT_UPDATECOUNT(cfg) (((cfg)->UserOpt & 0xffff000) >> 16)
375 #define IPS_CFG_USEROPT_CONCURSTART(cfg) (((cfg)->UserOpt & 0xf000) >> 12)
376 #define IPS_CFG_USEROPT_STARTUPDELAY(cfg) (((cfg)->UserOpt & 0xf00) >> 8)
377 #define IPS_CFG_USEROPT_REARRANGE(cfg) ((cfg)->UserOpt & 0x80)
378 #define IPS_CFG_USEROPT_CDBOOT(cfg) ((cfg)->UserOpt & 0x40)
379 #define IPS_CFG_USEROPT_CLUSTER(cfg) ((cfg)->UserOpt & 0x20)
382 * Host adapter Flags (bit numbers)
384 #define IPS_IN_INTR 0
385 #define IPS_IN_ABORT 1
386 #define IPS_IN_RESET 2
391 #define IPS_SCB_ACTIVE 0x00001
392 #define IPS_SCB_WAITING 0x00002
393 #define IPS_SCB_MAP_SG 0x00008
394 #define IPS_SCB_MAP_SINGLE 0X00010
399 #define IPS_COPPUSRCMD (('C'<<8) | 65)
400 #define IPS_COPPIOCCMD (('C'<<8) | 66)
401 #define IPS_NUMCTRLS (('C'<<8) | 68)
402 #define IPS_CTRLINFO (('C'<<8) | 69)
403 #define IPS_FLASHBIOS (('C'<<8) | 70)
405 /* flashing defines */
406 #define IPS_FW_IMAGE 0x00
407 #define IPS_BIOS_IMAGE 0x01
408 #define IPS_WRITE_FW 0x01
409 #define IPS_WRITE_BIOS 0x02
410 #define IPS_ERASE_BIOS 0x03
411 #define IPS_BIOS_HEADER 0xC0
413 /* time oriented stuff */
414 #define IPS_IS_LEAP_YEAR(y) (((y % 4 == 0) && ((y % 100 != 0) || (y % 400 == 0))) ? 1 : 0)
415 #define IPS_NUM_LEAP_YEARS_THROUGH(y) ((y) / 4 - (y) / 100 + (y) / 400)
417 #define IPS_SECS_MIN 60
418 #define IPS_SECS_HOUR 3600
419 #define IPS_SECS_8HOURS 28800
420 #define IPS_SECS_DAY 86400
421 #define IPS_DAYS_NORMAL_YEAR 365
422 #define IPS_DAYS_LEAP_YEAR 366
423 #define IPS_EPOCH_YEAR 1970
428 #if LINUX_VERSION_CODE < LinuxVersionCode(2,4,0)
435 detect : ips_detect, \
436 release : ips_release, \
439 queuecommand : ips_queue, \
440 eh_strategy_handler : NULL, \
441 eh_abort_handler : ips_eh_abort, \
442 eh_device_reset_handler : NULL, \
443 eh_bus_reset_handler : NULL, \
444 eh_host_reset_handler : ips_eh_reset, \
447 slave_attach : NULL, \
448 bios_param : ips_biosparam, \
451 sg_tablesize : IPS_MAX_SG, \
454 unchecked_isa_dma : 0, \
455 use_clustering : ENABLE_CLUSTERING, \
456 use_new_eh_code : 1 \
464 detect : ips_detect, \
465 release : ips_release, \
468 queuecommand : ips_queue, \
469 eh_strategy_handler : NULL, \
470 eh_abort_handler : ips_eh_abort, \
471 eh_device_reset_handler : NULL, \
472 eh_bus_reset_handler : NULL, \
473 eh_host_reset_handler : ips_eh_reset, \
476 slave_attach : NULL, \
477 bios_param : ips_biosparam, \
480 sg_tablesize : IPS_MAX_SG, \
483 unchecked_isa_dma : 0, \
484 use_clustering : ENABLE_CLUSTERING, \
485 use_new_eh_code : 1 \
490 * IBM PCI Raid Command Formats
499 uint16_t sector_count;
503 } IPS_IO_CMD, *PIPS_IO_CMD;
510 uint32_t buffer_addr;
514 } IPS_LD_CMD, *PIPS_LD_CMD;
522 uint32_t buffer_addr;
524 } IPS_IOCTL_CMD, *PIPS_IOCTL_CMD;
542 uint8_t adapter_flag;
543 } IPS_RESET_CMD, *PIPS_RESET_CMD;
550 uint32_t dcdb_address;
554 } IPS_DCDB_CMD, *PIPS_DCDB_CMD;
560 uint8_t source_target;
566 } IPS_CS_CMD, *PIPS_CS_CMD;
578 } IPS_US_CMD, *PIPS_US_CMD;
590 } IPS_FC_CMD, *PIPS_FC_CMD;
598 uint32_t buffer_addr;
602 } IPS_STATUS_CMD, *PIPS_STATUS_CMD;
610 uint32_t buffer_addr;
614 } IPS_NVRAM_CMD, *PIPS_NVRAM_CMD;
622 uint32_t buffer_addr;
624 } IPS_VERSION_INFO, *PIPS_VERSION_INFO;
635 uint8_t reserved1[4];
640 } IPS_FFDC_CMD, *PIPS_FFDC_CMD;
648 uint32_t buffer_addr;
649 uint8_t total_packets;
652 } IPS_FLASHFW_CMD, *PIPS_FLASHFW_CMD;
660 uint32_t buffer_addr;
662 } IPS_FLASHBIOS_CMD, *PIPS_FLASHBIOS_CMD;
666 IPS_LD_CMD logical_info;
667 IPS_IOCTL_CMD ioctl_info;
669 IPS_CS_CMD config_sync;
670 IPS_US_CMD unlock_stripe;
671 IPS_FC_CMD flush_cache;
672 IPS_STATUS_CMD status;
675 IPS_FLASHFW_CMD flashfw;
676 IPS_FLASHBIOS_CMD flashbios;
677 IPS_VERSION_INFO version_info;
679 } IPS_HOST_COMMAND, *PIPS_HOST_COMMAND;
686 uint32_t sector_count;
687 } IPS_DRIVE_INFO, *PIPS_DRIVE_INFO;
690 uint8_t no_of_log_drive;
692 IPS_DRIVE_INFO drive_info[IPS_MAX_LD];
693 } IPS_LD_INFO, *PIPS_LD_INFO;
696 uint8_t device_address;
697 uint8_t cmd_attribute;
698 uint16_t transfer_length;
699 uint32_t buffer_pointer;
701 uint8_t sense_length;
704 uint8_t scsi_cdb[12];
705 uint8_t sense_info[64];
707 uint8_t reserved2[3];
708 } IPS_DCDB_TABLE, *PIPS_DCDB_TABLE;
711 uint8_t device_address;
712 uint8_t cmd_attribute;
714 uint8_t reserved_for_LUN;
715 uint32_t transfer_length;
716 uint32_t buffer_pointer;
718 uint8_t sense_length;
721 uint8_t scsi_cdb[16];
722 uint8_t sense_info[56];
723 } IPS_DCDB_TABLE_TAPE, *PIPS_DCDB_TABLE_TAPE;
727 volatile uint8_t reserved;
728 volatile uint8_t command_id;
729 volatile uint8_t basic_status;
730 volatile uint8_t extended_status;
733 volatile uint32_t value;
734 } IPS_STATUS, *PIPS_STATUS;
737 IPS_STATUS status[IPS_MAX_CMDS + 1];
738 volatile PIPS_STATUS p_status_start;
739 volatile PIPS_STATUS p_status_end;
740 volatile PIPS_STATUS p_status_tail;
741 volatile uint32_t hw_status_start;
742 volatile uint32_t hw_status_tail;
743 IPS_LD_INFO logical_drive_info;
744 } IPS_ADAPTER, *PIPS_ADAPTER;
747 uint8_t ucLogDriveCount;
752 uint8_t ucWrongAdrCnt;
753 uint8_t ucUnidentCnt;
754 uint8_t ucNVramDevChgCnt;
755 uint8_t CodeBlkVersion[8];
756 uint8_t BootBlkVersion[8];
757 uint32_t ulDriveSize[IPS_MAX_LD];
758 uint8_t ucConcurrentCmdCount;
759 uint8_t ucMaxPhysicalDevices;
760 uint16_t usFlashRepgmCount;
761 uint8_t ucDefunctDiskCount;
762 uint8_t ucRebuildFlag;
763 uint8_t ucOfflineLogDrvCount;
764 uint8_t ucCriticalDrvCount;
765 uint16_t usConfigUpdateCount;
768 uint16_t usAddrDeadDisk[IPS_MAX_CHANNELS * IPS_MAX_TARGETS];
769 } IPS_ENQ, *PIPS_ENQ;
773 uint8_t ucParameters;
776 uint32_t ulBlockCount;
777 uint8_t ucDeviceId[28];
778 } IPS_DEVSTATE, *PIPS_DEVSTATE;
784 uint32_t ulStartSect;
785 uint32_t ulNoOfSects;
786 } IPS_CHUNK, *PIPS_CHUNK;
789 uint16_t ucUserField;
791 uint8_t ucRaidCacheParam;
792 uint8_t ucNoOfChunkUnits;
793 uint8_t ucStripeSize;
796 uint32_t ulLogDrvSize;
797 IPS_CHUNK chunk[IPS_MAX_CHUNKS];
801 uint8_t board_disc[8];
802 uint8_t processor[8];
803 uint8_t ucNoChanType;
804 uint8_t ucNoHostIntType;
805 uint8_t ucCompression;
807 uint32_t ulNvramSize;
808 } IPS_HARDWARE, *PIPS_HARDWARE;
811 uint8_t ucLogDriveCount;
817 uint8_t time_sign[8];
820 uint8_t ucRebuildRate;
822 IPS_HARDWARE hardware_disc;
823 IPS_LD logical_drive[IPS_MAX_LD];
824 IPS_DEVSTATE dev[IPS_MAX_CHANNELS][IPS_MAX_TARGETS+1];
825 uint8_t reserved[512];
826 } IPS_CONF, *PIPS_CONF;
831 uint8_t adapter_slot;
832 uint16_t adapter_type;
833 uint8_t ctrl_bios[8];
834 uint8_t versioning; /* 1 = Versioning Supported, else 0 */
835 uint8_t version_mismatch; /* 1 = Versioning MisMatch, else 0 */
837 uint8_t operating_system;
838 uint8_t driver_high[4];
839 uint8_t driver_low[4];
840 uint8_t BiosCompatibilityID[8];
841 uint8_t ReservedForOS2[8];
842 uint8_t bios_high[4]; /* Adapter's Flashed BIOS Version */
845 } IPS_NVRAM_P5, *PIPS_NVRAM_P5;
847 /*--------------------------------------------------------------------------*/
848 /* Data returned from a GetVersion Command */
849 /*--------------------------------------------------------------------------*/
851 /* SubSystem Parameter[4] */
852 #define IPS_GET_VERSION_SUPPORT 0x00018000 /* Mask for Versioning Support */
857 uint8_t bootBlkVersion[32];
858 uint8_t bootBlkAttributes[4];
859 uint8_t codeBlkVersion[32];
860 uint8_t biosVersion[32];
861 uint8_t biosAttributes[4];
862 uint8_t compatibilityId[32];
867 typedef struct _IPS_SUBSYS {
869 } IPS_SUBSYS, *PIPS_SUBSYS;
876 * Inquiry Data Format
880 uint8_t DeviceTypeQualifier;
882 uint8_t ResponseDataFormat;
883 uint8_t AdditionalLength;
887 uint8_t ProductId[16];
888 uint8_t ProductRevisionLevel[4];
889 uint8_t Reserved2; /* Provides NULL terminator to name */
890 } IPS_SCSI_INQ_DATA, *PIPS_SCSI_INQ_DATA;
893 * Read Capacity Data Format
901 * Request Sense Data Format
904 uint8_t ResponseCode;
905 uint8_t SegmentNumber;
907 uint8_t Information[4];
908 uint8_t AdditionalLength;
909 uint8_t CommandSpecific[4];
910 uint8_t AdditionalSenseCode;
911 uint8_t AdditionalSenseCodeQual;
913 uint8_t SenseKeySpecific[3];
917 * Sense Data Format - Page 3
922 uint16_t TracksPerZone;
923 uint16_t AltSectorsPerZone;
924 uint16_t AltTracksPerZone;
925 uint16_t AltTracksPerVolume;
926 uint16_t SectorsPerTrack;
927 uint16_t BytesPerSector;
930 uint16_t CylinderSkew;
933 } IPS_SCSI_MODE_PAGE3;
936 * Sense Data Format - Page 4
941 uint16_t CylindersHigh;
942 uint8_t CylindersLow;
944 uint16_t WritePrecompHigh;
945 uint8_t WritePrecompLow;
946 uint16_t ReducedWriteCurrentHigh;
947 uint8_t ReducedWriteCurrentLow;
949 uint16_t LandingZoneHigh;
950 uint8_t LandingZoneLow;
952 uint8_t RotationalOffset;
954 uint16_t MediumRotationRate;
955 uint8_t Reserved2[2];
956 } IPS_SCSI_MODE_PAGE4;
959 * Sense Data Format - Block Descriptor (DASD)
962 uint32_t NumberOfBlocks;
964 uint16_t BlockLengthHigh;
965 uint8_t BlockLengthLow;
966 } IPS_SCSI_MODE_PAGE_BLKDESC;
969 * Sense Data Format - Mode Page Header
975 uint8_t BlockDescLength;
976 } IPS_SCSI_MODE_PAGE_HEADER;
979 IPS_SCSI_MODE_PAGE_HEADER hdr;
980 IPS_SCSI_MODE_PAGE_BLKDESC blkdesc;
983 IPS_SCSI_MODE_PAGE3 pg3;
984 IPS_SCSI_MODE_PAGE4 pg4;
986 } IPS_SCSI_MODE_PAGE_DATA;
989 * Scatter Gather list format
991 typedef struct ips_sglist {
994 } IPS_SG_LIST, *PIPS_SG_LIST;
996 typedef struct _IPS_INFOSTR {
1018 struct semaphore *sem;
1026 typedef struct ips_stat {
1027 uint32_t residue_len;
1029 uint8_t padding[12 - sizeof(void *)];
1035 typedef struct ips_scb_queue {
1036 struct ips_scb *head;
1037 struct ips_scb *tail;
1039 unsigned long cpu_flags;
1046 typedef struct ips_wait_queue {
1050 unsigned long cpu_flags;
1054 typedef struct ips_copp_wait_item {
1055 Scsi_Cmnd *scsi_cmd;
1056 struct semaphore *sem;
1057 struct ips_copp_wait_item *next;
1058 } ips_copp_wait_item_t;
1060 typedef struct ips_copp_queue {
1061 struct ips_copp_wait_item *head;
1062 struct ips_copp_wait_item *tail;
1064 unsigned long cpu_flags;
1068 /* forward decl for host structure */
1072 int (*reset)(struct ips_ha *);
1073 int (*issue)(struct ips_ha *, struct ips_scb *);
1074 int (*isinit)(struct ips_ha *);
1075 int (*isintr)(struct ips_ha *);
1076 int (*init)(struct ips_ha *);
1077 int (*erasebios)(struct ips_ha *);
1078 int (*programbios)(struct ips_ha *, char *, uint32_t, uint32_t);
1079 int (*verifybios)(struct ips_ha *, char *, uint32_t, uint32_t);
1080 void (*statinit)(struct ips_ha *);
1081 void (*intr)(struct ips_ha *);
1082 void (*enableint)(struct ips_ha *);
1083 uint32_t (*statupd)(struct ips_ha *);
1086 typedef struct ips_ha {
1087 uint8_t ha_id[IPS_MAX_CHANNELS+1];
1088 uint32_t dcdb_active[IPS_MAX_CHANNELS];
1089 uint32_t io_addr; /* Base I/O address */
1090 uint8_t irq; /* IRQ for adapter */
1091 uint8_t ntargets; /* Number of targets */
1092 uint8_t nbus; /* Number of buses */
1093 uint8_t nlun; /* Number of Luns */
1094 uint16_t ad_type; /* Adapter type */
1095 uint16_t host_num; /* Adapter number */
1096 uint32_t max_xfer; /* Maximum Xfer size */
1097 uint32_t max_cmds; /* Max concurrent commands */
1098 uint32_t num_ioctl; /* Number of Ioctls */
1099 ips_stat_t sp; /* Status packer pointer */
1100 struct ips_scb *scbs; /* Array of all CCBS */
1101 struct ips_scb *scb_freelist; /* SCB free list */
1102 ips_wait_queue_t scb_waitlist; /* Pending SCB list */
1103 ips_copp_queue_t copp_waitlist; /* Pending PT list */
1104 ips_scb_queue_t scb_activelist; /* Active SCB list */
1105 IPS_IO_CMD *dummy; /* dummy command */
1106 IPS_ADAPTER *adapt; /* Adapter status area */
1107 IPS_ENQ *enq; /* Adapter Enquiry data */
1108 IPS_CONF *conf; /* Adapter config data */
1109 IPS_NVRAM_P5 *nvram; /* NVRAM page 5 data */
1110 IPS_SUBSYS *subsys; /* Subsystem parameters */
1111 char *ioctl_data; /* IOCTL data area */
1112 uint32_t ioctl_datasize; /* IOCTL data size */
1113 uint32_t cmd_in_progress; /* Current command in progress*/
1114 unsigned long flags; /* HA flags */
1115 uint8_t waitflag; /* are we waiting for cmd */
1117 int ioctl_reset; /* IOCTL Requested Reset Flag */
1118 uint16_t reset_count; /* number of resets */
1119 time_t last_ffdc; /* last time we sent ffdc info*/
1120 uint8_t revision_id; /* Revision level */
1121 uint16_t device_id; /* PCI device ID */
1122 uint8_t slot_num; /* PCI Slot Number */
1123 uint16_t subdevice_id; /* Subsystem device ID */
1124 uint8_t ioctl_order; /* Number of pages in ioctl */
1125 uint8_t reserved2; /* Empty */
1126 uint8_t bios_version[8]; /* BIOS Revision */
1127 uint32_t mem_addr; /* Memory mapped address */
1128 uint32_t io_len; /* Size of IO Address */
1129 uint32_t mem_len; /* Size of memory address */
1130 char *mem_ptr; /* Memory mapped Ptr */
1131 char *ioremap_ptr; /* ioremapped memory pointer */
1132 ips_hw_func_t func; /* hw function pointers */
1133 struct pci_dev *pcidev; /* PCI device handle */
1134 spinlock_t scb_lock;
1135 spinlock_t copp_lock;
1136 spinlock_t ips_lock;
1137 struct semaphore ioctl_sem; /* Semaphore for new IOCTL's */
1138 struct semaphore flash_ioctl_sem; /* Semaphore for Flashing */
1139 char *flash_data; /* Save Area for flash data */
1140 u8 flash_order; /* Save Area for flash size order */
1141 u32 flash_datasize; /* Save Area for flash data size */
1144 typedef void (*ips_scb_callback) (ips_ha_t *, struct ips_scb *);
1149 typedef struct ips_scb {
1150 IPS_HOST_COMMAND cmd;
1151 IPS_DCDB_TABLE dcdb;
1156 uint32_t scb_busaddr;
1157 uint32_t data_busaddr;
1159 uint8_t basic_status;
1160 uint8_t extended_status;
1167 IPS_SG_LIST *sg_list;
1168 Scsi_Cmnd *scsi_cmd;
1169 struct ips_scb *q_next;
1170 ips_scb_callback callback;
1171 struct semaphore *sem;
1172 uint32_t sg_busaddr;
1176 typedef struct ips_scb_pt {
1177 IPS_HOST_COMMAND cmd;
1178 IPS_DCDB_TABLE dcdb;
1183 uint32_t scb_busaddr;
1184 uint32_t data_busaddr;
1186 uint8_t basic_status;
1187 uint8_t extended_status;
1193 IPS_SG_LIST *sg_list;
1194 Scsi_Cmnd *scsi_cmd;
1195 struct ips_scb *q_next;
1196 ips_scb_callback callback;
1200 * Passthru Command Format
1208 ips_scb_pt_t CoppCP;
1210 uint8_t BasicStatus;
1211 uint8_t ExtendedStatus;
1212 uint8_t AdapterType;
1218 /* The Version Information below gets created by SED during the build process. */
1219 /* Do not modify the next line; it's what SED is looking for to do the insert. */
1221 /*************************************************************************
1223 * VERSION.H -- version numbers and copyright notices in various formats
1225 *************************************************************************/
1227 #define IPS_VER_MAJOR 5
1228 #define IPS_VER_MAJOR_STRING "5"
1229 #define IPS_VER_MINOR 10
1230 #define IPS_VER_MINOR_STRING "10"
1231 #define IPS_VER_BUILD 21
1232 #define IPS_VER_BUILD_STRING "21"
1233 #define IPS_VER_STRING "5.10.21"
1234 #define IPS_LEGALCOPYRIGHT_STRING "(C) Copyright IBM Corp. 1994, 2002. All Rights Reserved."
1235 #define IPS_ADAPTECCOPYRIGHT_STRING "(c) Copyright Adaptec, Inc. 2002 to present. All Rights Reserved."
1236 #define IPS_NT_LEGALCOPYRIGHT_STRING "(C) Copyright IBM Corp. 1994, 2002."
1238 /* Version numbers for various adapters */
1239 #define IPS_VER_SERVERAID1 "2.25.01"
1240 #define IPS_VER_SERVERAID2 "2.88.13"
1241 #define IPS_VER_NAVAJO "2.88.13"
1242 #define IPS_VER_SERVERAID3 "5.10.21"
1243 #define IPS_VER_SERVERAID4H "5.10.21"
1244 #define IPS_VER_SERVERAID4MLx "5.10.21"
1245 #define IPS_VER_SARASOTA "5.10.21"
1247 /* Compatability IDs for various adapters */
1248 #define IPS_COMPAT_UNKNOWN ""
1249 #define IPS_COMPAT_CURRENT "SA510"
1250 #define IPS_COMPAT_SERVERAID1 "2.25.01"
1251 #define IPS_COMPAT_SERVERAID2 "2.88.13"
1252 #define IPS_COMPAT_NAVAJO "2.88.13"
1253 #define IPS_COMPAT_KIOWA "2.88.13"
1254 #define IPS_COMPAT_SERVERAID3H "SA510"
1255 #define IPS_COMPAT_SERVERAID3L "SA510"
1256 #define IPS_COMPAT_SERVERAID4H "SA510"
1257 #define IPS_COMPAT_SERVERAID4M "SA510"
1258 #define IPS_COMPAT_SERVERAID4L "SA510"
1259 #define IPS_COMPAT_SERVERAID4Mx "SA510"
1260 #define IPS_COMPAT_SERVERAID4Lx "SA510"
1261 #define IPS_COMPAT_SARASOTA "SA510"
1262 #define IPS_COMPAT_BIOS "SA510"
1264 #define IPS_COMPAT_MAX_ADAPTER_TYPE 14
1265 #define IPS_COMPAT_ID_LENGTH 8
1267 #define IPS_DEFINE_COMPAT_TABLE(tablename) \
1268 char tablename[IPS_COMPAT_MAX_ADAPTER_TYPE] [IPS_COMPAT_ID_LENGTH] = { \
1269 IPS_COMPAT_UNKNOWN, \
1270 IPS_COMPAT_SERVERAID1, \
1271 IPS_COMPAT_SERVERAID2, \
1272 IPS_COMPAT_NAVAJO, \
1274 IPS_COMPAT_SERVERAID3H, \
1275 IPS_COMPAT_SERVERAID3L, \
1276 IPS_COMPAT_SERVERAID4H, \
1277 IPS_COMPAT_SERVERAID4M, \
1278 IPS_COMPAT_SERVERAID4L, \
1279 IPS_COMPAT_SERVERAID4Mx, \
1280 IPS_COMPAT_SERVERAID4Lx, \
1281 IPS_COMPAT_SARASOTA, \
1282 IPS_COMPAT_SARASOTA \
1287 * Overrides for Emacs so that we almost follow Linus's tabbing style.
1288 * Emacs will notice this stuff at the end of the file and automatically
1289 * adjust the settings for this buffer only. This must remain at the end
1291 * ---------------------------------------------------------------------------
1294 * c-brace-imaginary-offset: 0
1295 * c-brace-offset: -2
1296 * c-argdecl-indent: 2
1297 * c-label-offset: -2
1298 * c-continued-statement-offset: 2
1299 * c-continued-brace-offset: 0
1300 * indent-tabs-mode: nil