2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
18 * Other major contributions:
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
23 *-----------------------------------------------------------------------------
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. The name of the author may not be used to endorse or promote products
31 * derived from this software without specific prior written permission.
33 * Where this Software is combined with software released under the terms of
34 * the GNU Public License ("GPL") and the terms of the GPL would require the
35 * combined work to also be released under the terms of the GPL, the terms
36 * and conditions of this License will apply in addition to those of the
37 * GPL with the exception of any terms or conditions of this License that
38 * conflict with, or are expressly prohibited by, the GPL.
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
44 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 * Scripts for SYMBIOS-Processor
56 * We have to know the offsets of all labels before we reach
57 * them (for forward jumps). Therefore we declare a struct
58 * here. If you make changes inside the script,
60 * DONT FORGET TO CHANGE THE LENGTHS HERE!
64 * Script fragments which are loaded into the on-chip RAM
65 * of 825A, 875, 876, 895, 895A, 896 and 1010 chips.
66 * Must not exceed 4K bytes.
70 u32 getjob_begin [ 4];
74 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
82 #ifdef SYM_CONF_IARB_SUPPORT
93 u32 datai_done_wsr [ 20];
95 u32 datao_done_wss [ 6];
100 #ifdef SYM_CONF_IARB_SUPPORT
112 u32 complete_error [ 5];
115 u32 disconnect [ 11];
116 u32 disconnect2 [ 5];
118 #ifdef SYM_CONF_IARB_SUPPORT
123 #ifdef SYM_CONF_IARB_SUPPORT
128 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
133 u32 reselected [ 19];
136 u32 reselected1 [ 25];
141 #if SYM_CONF_MAX_TASK*4 > 512
143 #elif SYM_CONF_MAX_TASK*4 > 256
154 u32 resel_no_tag [ 4];
156 u32 data_in [SYM_CONF_MAX_SG * 2];
158 u32 data_out [SYM_CONF_MAX_SG * 2];
161 u32 pm0_data_out [ 6];
162 u32 pm0_data_end [ 7];
163 u32 pm_data_end [ 4];
166 u32 pm1_data_out [ 6];
167 u32 pm1_data_end [ 9];
171 * Script fragments which stay in main memory for all chips
172 * except for chips that support 8K on-chip RAM.
176 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
177 u32 sel_for_abort [ 18];
179 u32 sel_for_abort [ 16];
181 u32 sel_for_abort_1 [ 2];
182 u32 msg_in_etc [ 12];
183 u32 msg_received [ 5];
184 u32 msg_weird_seen [ 5];
185 u32 msg_extended [ 17];
196 u32 nego_bad_phase [ 4];
198 u32 msg_out_done [ 4];
200 u32 data_ovrun1 [ 22];
201 u32 data_ovrun2 [ 8];
202 u32 abort_resel [ 16];
203 u32 resend_ident [ 4];
204 u32 ident_break [ 4];
205 u32 ident_break_atn [ 4];
207 u32 resel_bad_lun [ 4];
209 u32 bad_i_t_l_q [ 4];
211 u32 wsr_ma_helper [ 4];
213 #ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
214 /* Unknown direction handling */
216 u32 data_io_com [ 8];
217 u32 data_io_out [ 7];
231 * Script fragments used at initialisations.
232 * Only runs out of main memory.
237 #ifdef SYM_OPT_NO_BUS_MEMORY_MAPPING
239 u32 scripta0_ba [ 4];
243 static struct SYM_FWA_SCR SYM_FWA_SCR = {
244 /*--------------------------< START >----------------------------*/ {
247 * Will be patched with a NO_OP if LED
248 * not needed or not desired.
250 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
255 SCR_FROM_REG (ctest2),
258 * Stop here if the C code wants to perform
259 * some error recovery procedure manually.
260 * (Indicate this by setting SEM in ISTAT)
262 SCR_FROM_REG (istat),
265 * Report to the C code the next position in
266 * the start queue the SCRIPTS will schedule.
267 * The C code must not change SCRATCHA.
272 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
275 * Start the next job.
277 * @DSA = start point for this job.
278 * SCRATCHA = address of this job in the start queue.
280 * We will restore startpos with SCRATCHA if we fails the
281 * arbitration or if it is the idle job.
283 * The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
284 * is a critical path. If it is partially executed, it then
285 * may happen that the job address is not yet in the DSA
286 * and the next queue position points to the next JOB.
288 }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
290 * Copy to a fixed location both the next STARTPOS
291 * and the current JOB address, using self modifying
298 }/*-------------------------< _SMS_A10 >-------------------------*/,{
302 * Move the start address to TEMP using self-
303 * modifying SCRIPTS and jump indirectly to
309 }/*-------------------------< GETJOB_END >-----------------------*/,{
314 }/*-------------------------< _SMS_A20 >-------------------------*/,{
319 }/*-------------------------< SELECT >---------------------------*/,{
321 * DSA contains the address of a scheduled
324 * SCRATCHA contains the address of the start queue
325 * entry which points to the next job.
327 * Set Initiator mode.
329 * (Target mode is left as an exercise for the reader)
331 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
336 * And try to select this target.
338 SCR_SEL_TBL_ATN ^ offsetof (struct sym_dsb, select),
341 * Now there are 4 possibilities:
343 * (1) The chip looses arbitration.
344 * This is ok, because it will try again,
345 * when the bus becomes idle.
346 * (But beware of the timeout function!)
348 * (2) The chip is reselected.
349 * Then the script processor takes the jump
350 * to the RESELECT label.
352 * (3) The chip wins arbitration.
353 * Then it will execute SCRIPTS instruction until
354 * the next instruction that checks SCSI phase.
355 * Then will stop and wait for selection to be
356 * complete or selection time-out to occur.
358 * After having won arbitration, the SCRIPTS
359 * processor is able to execute instructions while
360 * the SCSI core is performing SCSI selection.
364 * Copy the CCB header to a fixed location
365 * in the HCB using self-modifying SCRIPTS.
370 SCR_COPY (sizeof(struct sym_ccbh)),
371 }/*-------------------------< _SMS_A30 >-------------------------*/,{
375 * Initialize the status register
378 HADDR_1 (ccb_head.status),
380 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
381 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
382 SIR_SEL_ATN_NO_MSG_OUT,
383 }/*-------------------------< SEND_IDENT >-----------------------*/,{
385 * Selection complete.
386 * Send the IDENTIFY and possibly the TAG message
387 * and negotiation message if present.
389 SCR_MOVE_TBL ^ SCR_MSG_OUT,
390 offsetof (struct sym_dsb, smsg),
391 }/*-------------------------< SELECT2 >--------------------------*/,{
392 #ifdef SYM_CONF_IARB_SUPPORT
394 * Set IMMEDIATE ARBITRATION if we have been given
395 * a hint to do so. (Some job to do after this one).
397 SCR_FROM_REG (HF_REG),
399 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
401 SCR_REG_REG (scntl1, SCR_OR, IARB),
405 * Anticipate the COMMAND phase.
406 * This is the PHASE we expect at this point.
408 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
409 PADDR_A (sel_no_cmd),
410 }/*-------------------------< COMMAND >--------------------------*/,{
412 * ... and send the command
414 SCR_MOVE_TBL ^ SCR_COMMAND,
415 offsetof (struct sym_dsb, cmd),
416 }/*-------------------------< DISPATCH >-------------------------*/,{
418 * MSG_IN is the only phase that shall be
419 * entered at least once for each (re)selection.
420 * So we test it first.
422 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
424 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
425 PADDR_A (datao_phase),
426 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
427 PADDR_A (datai_phase),
428 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
430 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
432 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
435 * Discard as many illegal phases as
436 * required and tell the C code about.
438 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
440 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
442 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
444 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
446 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
448 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
454 }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
456 * The target does not switch to command
457 * phase after IDENTIFY has been sent.
459 * If it stays in MSG OUT phase send it
460 * the IDENTIFY again.
462 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
463 PADDR_B (resend_ident),
465 * If target does not switch to MSG IN phase
466 * and we sent a negotiation, assert the
467 * failure immediately.
469 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
471 SCR_FROM_REG (HS_REG),
473 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
476 * Jump to dispatcher.
480 }/*-------------------------< INIT >-----------------------------*/,{
482 * Wait for the SCSI RESET signal to be
483 * inactive before restarting operations,
484 * since the chip may hang on SEL_ATN
485 * if SCSI RESET is active.
487 SCR_FROM_REG (sstat0),
489 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
493 }/*-------------------------< CLRACK >---------------------------*/,{
495 * Terminate possible pending message phase.
501 }/*-------------------------< DATAI_DONE >-----------------------*/,{
503 * Save current pointer to LASTP.
507 HADDR_1 (ccb_head.lastp),
509 * If the SWIDE is not full, jump to dispatcher.
510 * We anticipate a STATUS phase.
512 SCR_FROM_REG (scntl2),
514 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
515 PADDR_A (datai_done_wsr),
516 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
520 }/*-------------------------< DATAI_DONE_WSR >-------------------*/,{
523 * Clear this condition.
525 SCR_REG_REG (scntl2, SCR_OR, WSR),
528 * We are expecting an IGNORE RESIDUE message
529 * from the device, otherwise we are in data
530 * overrun condition. Check against MSG_IN phase.
532 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
534 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
537 * We are in MSG_IN phase,
538 * Read the first byte of the message.
539 * If it is not an IGNORE RESIDUE message,
540 * signal overrun and jump to message
543 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
545 SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
547 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
550 * We got the message we expected.
551 * Read the 2nd byte, and jump to dispatcher.
555 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
561 }/*-------------------------< DATAO_DONE >-----------------------*/,{
563 * Save current pointer to LASTP.
567 HADDR_1 (ccb_head.lastp),
569 * If the SODL is not full jump to dispatcher.
570 * We anticipate a STATUS phase.
572 SCR_FROM_REG (scntl2),
574 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
575 PADDR_A (datao_done_wss),
576 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
580 }/*-------------------------< DATAO_DONE_WSS >-------------------*/,{
582 * The SODL is full, clear this condition.
584 SCR_REG_REG (scntl2, SCR_OR, WSS),
587 * And signal a DATA UNDERRUN condition
594 }/*-------------------------< DATAI_PHASE >----------------------*/,{
596 * Jump to current pointer.
599 HADDR_1 (ccb_head.lastp),
603 }/*-------------------------< DATAO_PHASE >----------------------*/,{
605 * Jump to current pointer.
608 HADDR_1 (ccb_head.lastp),
612 }/*-------------------------< MSG_IN >---------------------------*/,{
614 * Get the first byte of the message.
616 * The script processor doesn't negate the
617 * ACK signal after this transfer.
619 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
621 }/*-------------------------< MSG_IN2 >--------------------------*/,{
623 * Check first against 1 byte messages
624 * that we handle from SCRIPTS.
626 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
628 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
629 PADDR_A (disconnect),
630 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
632 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
633 PADDR_A (restore_dp),
635 * We handle all other messages from the
636 * C code, so no need to waste on-chip RAM
640 PADDR_B (msg_in_etc),
641 }/*-------------------------< STATUS >---------------------------*/,{
645 SCR_MOVE_ABS (1) ^ SCR_STATUS,
647 #ifdef SYM_CONF_IARB_SUPPORT
649 * If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
650 * since we may have to tamper the start queue from
653 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
655 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
659 * save status to scsi_status.
664 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
667 * Anticipate the MESSAGE PHASE for
668 * the TASK COMPLETE message.
670 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
674 }/*-------------------------< COMPLETE >-------------------------*/,{
678 * When we terminate the cycle by clearing ACK,
679 * the target may disconnect immediately.
681 * We don't want to be told of an "unexpected disconnect",
682 * so we disable this feature.
684 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
687 * Terminate cycle ...
689 SCR_CLR (SCR_ACK|SCR_ATN),
692 * ... and wait for the disconnect.
696 }/*-------------------------< COMPLETE2 >------------------------*/,{
702 HADDR_1 (ccb_head.status),
704 * Move back the CCB header using self-modifying
710 SCR_COPY (sizeof(struct sym_ccbh)),
712 }/*-------------------------< _SMS_A40 >-------------------------*/,{
715 * Some bridges may reorder DMA writes to memory.
716 * We donnot want the CPU to deal with completions
717 * without all the posted write having been flushed
718 * to memory. This DUMMY READ should flush posted
719 * buffers prior to the CPU having to deal with
722 SCR_COPY (4), /* DUMMY READ */
723 HADDR_1 (ccb_head.status),
726 * If command resulted in not GOOD status,
727 * call the C code if needed.
729 SCR_FROM_REG (SS_REG),
731 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
732 PADDR_B (bad_status),
734 * If we performed an auto-sense, call
735 * the C code to synchronyze task aborts
736 * with UNIT ATTENTION conditions.
738 SCR_FROM_REG (HF_REG),
740 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
741 PADDR_A (complete_error),
742 }/*-------------------------< DONE >-----------------------------*/,{
744 * Copy the DSA to the DONE QUEUE and
745 * signal completion to the host.
746 * If we are interrupted between DONE
747 * and DONE_END, we must reset, otherwise
748 * the completed CCB may be lost.
755 }/*-------------------------< _SMS_A50 >-------------------------*/,{
761 * The instruction below reads the DONE QUEUE next
762 * free position from memory.
763 * In addition it ensures that all PCI posted writes
764 * are flushed and so the DSA value of the done
765 * CCB is visible by the CPU before INTFLY is raised.
768 }/*-------------------------< _SMS_A60 >-------------------------*/,{
771 }/*-------------------------< DONE_END >-------------------------*/,{
776 }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
782 }/*-------------------------< SAVE_DP >--------------------------*/,{
784 * Clear ACK immediately.
785 * No need to delay it.
790 * Keep track we received a SAVE DP, so
791 * we will switch to the other PM context
792 * on the next PM since the DP may point
793 * to the current PM context.
795 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
799 * Copy LASTP to SAVEP.
802 HADDR_1 (ccb_head.lastp),
803 HADDR_1 (ccb_head.savep),
805 * Anticipate the MESSAGE PHASE for
806 * the DISCONNECT message.
808 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
812 }/*-------------------------< RESTORE_DP >-----------------------*/,{
814 * Clear ACK immediately.
815 * No need to delay it.
820 * Copy SAVEP to LASTP.
823 HADDR_1 (ccb_head.savep),
824 HADDR_1 (ccb_head.lastp),
827 }/*-------------------------< DISCONNECT >-----------------------*/,{
831 * disable the "unexpected disconnect" feature,
832 * and remove the ACK signal.
834 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
836 SCR_CLR (SCR_ACK|SCR_ATN),
839 * Wait for the disconnect.
844 * Status is: DISCONNECTED.
846 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
853 HADDR_1 (ccb_head.status),
854 }/*-------------------------< DISCONNECT2 >----------------------*/,{
856 * Move back the CCB header using self-modifying
862 SCR_COPY (sizeof(struct sym_ccbh)),
864 }/*-------------------------< _SMS_A65 >-------------------------*/,{
868 }/*-------------------------< IDLE >-----------------------------*/,{
871 * Switch the LED off and wait for reselect.
872 * Will be patched with a NO_OP if LED
873 * not needed or not desired.
875 SCR_REG_REG (gpreg, SCR_OR, 0x01),
877 #ifdef SYM_CONF_IARB_SUPPORT
881 }/*-------------------------< UNGETJOB >-------------------------*/,{
882 #ifdef SYM_CONF_IARB_SUPPORT
884 * Set IMMEDIATE ARBITRATION, for the next time.
885 * This will give us better chance to win arbitration
886 * for the job we just wanted to do.
888 SCR_REG_REG (scntl1, SCR_OR, IARB),
892 * We are not able to restart the SCRIPTS if we are
893 * interrupted and these instruction haven't been
894 * all executed. BTW, this is very unlikely to
895 * happen, but we check that from the C code.
897 SCR_LOAD_REG (dsa, 0xff),
902 }/*-------------------------< RESELECT >-------------------------*/,{
903 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
905 * Make sure we are in initiator mode.
911 * Sleep waiting for a reselection.
915 }/*-------------------------< RESELECTED >-----------------------*/,{
918 * Will be patched with a NO_OP if LED
919 * not needed or not desired.
921 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
924 * load the target id into the sdid
926 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
931 * Load the target control block address
936 SCR_SFBR_REG (dsa, SCR_SHL, 0),
938 SCR_REG_REG (dsa, SCR_SHL, 0),
940 SCR_REG_REG (dsa, SCR_AND, 0x3c),
946 }/*-------------------------< _SMS_A70 >-------------------------*/,{
950 * Copy the TCB header to a fixed place in
956 SCR_COPY (sizeof(struct sym_tcbh)),
957 }/*-------------------------< _SMS_A80 >-------------------------*/,{
961 * We expect MESSAGE IN phase.
962 * If not, get help from the C code.
964 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
966 }/*-------------------------< RESELECTED1 >----------------------*/,{
968 * Load the synchronous transfer registers.
971 HADDR_1 (tcb_head.wval),
974 HADDR_1 (tcb_head.sval),
977 * Get the IDENTIFY message.
979 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
982 * If IDENTIFY LUN #0, use a faster path
983 * to find the LCB structure.
985 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
986 PADDR_A (resel_lun0),
988 * If message isn't an IDENTIFY,
989 * tell the C code about.
991 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
992 SIR_RESEL_NO_IDENTIFY,
994 * It is an IDENTIFY message,
995 * Load the LUN control block address.
998 HADDR_1 (tcb_head.luntbl_sa),
1000 SCR_SFBR_REG (dsa, SCR_SHL, 0),
1002 SCR_REG_REG (dsa, SCR_SHL, 0),
1004 SCR_REG_REG (dsa, SCR_AND, 0xfc),
1010 }/*-------------------------< _SMS_A90 >-------------------------*/,{
1015 }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
1017 * LUN 0 special case (but usual one :))
1020 HADDR_1 (tcb_head.lun0_sa),
1023 * Jump indirectly to the reselect action for this LUN.
1024 * (lcb.head.resel_sa assumed at offset zero of lcb).
1028 PADDR_A (_sms_a100),
1030 }/*-------------------------< _SMS_A100 >------------------------*/,{
1035 /* In normal situations, we jump to RESEL_TAG or RESEL_NO_TAG */
1036 }/*-------------------------< RESEL_TAG >------------------------*/,{
1038 * ACK the IDENTIFY previously received.
1043 * It shall be a tagged command.
1045 * The C code will deal with errors.
1046 * Agressive optimization, is'nt it? :)
1048 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
1051 * Copy the LCB header to a fixed place in
1052 * the HCB using self-modifying SCRIPTS.
1056 PADDR_A (_sms_a110),
1057 SCR_COPY (sizeof(struct sym_lcbh)),
1058 }/*-------------------------< _SMS_A110 >------------------------*/,{
1062 * Load the pointer to the tagged task
1063 * table for this LUN.
1066 HADDR_1 (lcb_head.itlq_tbl_sa),
1069 * The SIDL still contains the TAG value.
1070 * Agressive optimization, isn't it? :):)
1072 SCR_REG_SFBR (sidl, SCR_SHL, 0),
1074 #if SYM_CONF_MAX_TASK*4 > 512
1075 SCR_JUMPR ^ IFFALSE (CARRYSET),
1077 SCR_REG_REG (dsa1, SCR_OR, 2),
1079 SCR_REG_REG (sfbr, SCR_SHL, 0),
1081 SCR_JUMPR ^ IFFALSE (CARRYSET),
1083 SCR_REG_REG (dsa1, SCR_OR, 1),
1085 #elif SYM_CONF_MAX_TASK*4 > 256
1086 SCR_JUMPR ^ IFFALSE (CARRYSET),
1088 SCR_REG_REG (dsa1, SCR_OR, 1),
1092 * Retrieve the DSA of this task.
1093 * JUMP indirectly to the restart point of the CCB.
1095 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
1099 PADDR_A (_sms_a120),
1101 }/*-------------------------< _SMS_A120 >------------------------*/,{
1104 }/*-------------------------< RESEL_GO >-------------------------*/,{
1107 PADDR_A (_sms_a130),
1109 * Move 'ccb.phys.head.go' action to
1110 * scratch/scratch1. So scratch1 will
1111 * contain the 'restart' field of the
1115 }/*-------------------------< _SMS_A130 >------------------------*/,{
1119 PADDR_B (scratch1), /* phys.head.go.restart */
1123 /* In normal situations we branch to RESEL_DSA */
1124 }/*-------------------------< RESEL_DSA >------------------------*/,{
1126 * ACK the IDENTIFY or TAG previously received.
1130 }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
1132 * Copy the CCB header to a fixed location
1133 * in the HCB using self-modifying SCRIPTS.
1137 PADDR_A (_sms_a140),
1138 SCR_COPY (sizeof(struct sym_ccbh)),
1139 }/*-------------------------< _SMS_A140 >------------------------*/,{
1143 * Initialize the status register
1146 HADDR_1 (ccb_head.status),
1149 * Jump to dispatcher.
1153 }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
1155 * Copy the LCB header to a fixed place in
1156 * the HCB using self-modifying SCRIPTS.
1160 PADDR_A (_sms_a145),
1161 SCR_COPY (sizeof(struct sym_lcbh)),
1162 }/*-------------------------< _SMS_A145 >------------------------*/,{
1166 * Load the DSA with the unique ITL task.
1169 HADDR_1 (lcb_head.itl_task_sa),
1173 }/*-------------------------< DATA_IN >--------------------------*/,{
1175 * Because the size depends on the
1176 * #define SYM_CONF_MAX_SG parameter,
1177 * it is filled in at runtime.
1179 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1180 * || SCR_CHMOV_TBL ^ SCR_DATA_IN,
1181 * || offsetof (struct sym_dsb, data[ i]),
1182 * ##==========================================
1185 }/*-------------------------< DATA_IN2 >-------------------------*/,{
1187 PADDR_A (datai_done),
1189 PADDR_B (data_ovrun),
1190 }/*-------------------------< DATA_OUT >-------------------------*/,{
1192 * Because the size depends on the
1193 * #define SYM_CONF_MAX_SG parameter,
1194 * it is filled in at runtime.
1196 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1197 * || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1198 * || offsetof (struct sym_dsb, data[ i]),
1199 * ##==========================================
1202 }/*-------------------------< DATA_OUT2 >------------------------*/,{
1204 PADDR_A (datao_done),
1206 PADDR_B (data_ovrun),
1207 }/*-------------------------< PM0_DATA >-------------------------*/,{
1209 * Read our host flags to SFBR, so we will be able
1210 * to check against the data direction we expect.
1212 SCR_FROM_REG (HF_REG),
1215 * Check against actual DATA PHASE.
1217 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1218 PADDR_A (pm0_data_out),
1220 * Actual phase is DATA IN.
1221 * Check against expected direction.
1223 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1224 PADDR_B (data_ovrun),
1226 * Keep track we are moving data from the
1227 * PM0 DATA mini-script.
1229 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1232 * Move the data to memory.
1234 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1235 offsetof (struct sym_ccb, phys.pm0.sg),
1237 PADDR_A (pm0_data_end),
1238 }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
1240 * Actual phase is DATA OUT.
1241 * Check against expected direction.
1243 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1244 PADDR_B (data_ovrun),
1246 * Keep track we are moving data from the
1247 * PM0 DATA mini-script.
1249 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1252 * Move the data from memory.
1254 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1255 offsetof (struct sym_ccb, phys.pm0.sg),
1256 }/*-------------------------< PM0_DATA_END >---------------------*/,{
1258 * Clear the flag that told we were moving
1259 * data from the PM0 DATA mini-script.
1261 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
1264 * Return to the previous DATA script which
1265 * is guaranteed by design (if no bug) to be
1266 * the main DATA script for this transfer.
1271 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm0.ret)),
1273 }/*-------------------------< PM_DATA_END >----------------------*/,{
1276 PADDR_A (_sms_a150),
1278 }/*-------------------------< _SMS_A150 >------------------------*/,{
1283 }/*-------------------------< PM1_DATA >-------------------------*/,{
1285 * Read our host flags to SFBR, so we will be able
1286 * to check against the data direction we expect.
1288 SCR_FROM_REG (HF_REG),
1291 * Check against actual DATA PHASE.
1293 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1294 PADDR_A (pm1_data_out),
1296 * Actual phase is DATA IN.
1297 * Check against expected direction.
1299 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1300 PADDR_B (data_ovrun),
1302 * Keep track we are moving data from the
1303 * PM1 DATA mini-script.
1305 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1308 * Move the data to memory.
1310 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1311 offsetof (struct sym_ccb, phys.pm1.sg),
1313 PADDR_A (pm1_data_end),
1314 }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
1316 * Actual phase is DATA OUT.
1317 * Check against expected direction.
1319 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1320 PADDR_B (data_ovrun),
1322 * Keep track we are moving data from the
1323 * PM1 DATA mini-script.
1325 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1328 * Move the data from memory.
1330 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1331 offsetof (struct sym_ccb, phys.pm1.sg),
1332 }/*-------------------------< PM1_DATA_END >---------------------*/,{
1334 * Clear the flag that told we were moving
1335 * data from the PM1 DATA mini-script.
1337 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
1340 * Return to the previous DATA script which
1341 * is guaranteed by design (if no bug) to be
1342 * the main DATA script for this transfer.
1347 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm1.ret)),
1350 PADDR_A (pm_data_end),
1351 }/*--------------------------<>----------------------------------*/
1354 static struct SYM_FWB_SCR SYM_FWB_SCR = {
1355 /*-------------------------< NO_DATA >--------------------------*/ {
1357 PADDR_B (data_ovrun),
1358 }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
1360 * We are jumped here by the C code, if we have
1361 * some target to reset or some disconnected
1362 * job to abort. Since error recovery is a serious
1363 * busyness, we will really reset the SCSI BUS, if
1364 * case of a SCSI interrupt occuring in this path.
1367 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
1369 * Set initiator mode.
1375 * And try to select this target.
1377 SCR_SEL_TBL_ATN ^ offsetof (struct sym_hcb, abrt_sel),
1380 * Wait for the selection to complete or
1381 * the selection to time out.
1383 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1389 SIR_TARGET_SELECTED,
1391 * The C code should let us continue here.
1392 * Send the 'kiss of death' message.
1393 * We expect an immediate disconnect once
1394 * the target has eaten the message.
1396 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1398 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1399 offsetof (struct sym_hcb, abrt_tbl),
1400 SCR_CLR (SCR_ACK|SCR_ATN),
1405 * Tell the C code that we are done.
1409 }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
1411 * Jump at scheduler.
1415 }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
1417 * If it is an EXTENDED (variable size message)
1420 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
1421 PADDR_B (msg_extended),
1423 * Let the C code handle any other
1426 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1427 PADDR_B (msg_received),
1428 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1429 PADDR_B (msg_received),
1431 * We donnot handle 2 bytes messages from SCRIPTS.
1432 * So, let the C code deal with these ones too.
1434 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
1435 PADDR_B (msg_weird_seen),
1438 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1440 }/*-------------------------< MSG_RECEIVED >---------------------*/,{
1441 SCR_COPY (4), /* DUMMY READ */
1446 }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
1447 SCR_COPY (4), /* DUMMY READ */
1452 }/*-------------------------< MSG_EXTENDED >---------------------*/,{
1454 * Clear ACK and get the next byte
1455 * assumed to be the message length.
1459 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1462 * Try to catch some unlikely situations as 0 length
1463 * or too large the length.
1465 SCR_JUMP ^ IFTRUE (DATA (0)),
1466 PADDR_B (msg_weird_seen),
1467 SCR_TO_REG (scratcha),
1469 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
1471 SCR_JUMP ^ IFTRUE (CARRYSET),
1472 PADDR_B (msg_weird_seen),
1474 * We donnot handle extended messages from SCRIPTS.
1475 * Read the amount of data correponding to the
1476 * message length and call the C code.
1483 }/*-------------------------< _SMS_B10 >-------------------------*/,{
1484 SCR_MOVE_ABS (0) ^ SCR_MSG_IN,
1487 PADDR_B (msg_received),
1488 }/*-------------------------< MSG_BAD >--------------------------*/,{
1490 * unimplemented message - reject it.
1498 }/*-------------------------< MSG_WEIRD >------------------------*/,{
1500 * weird message received
1501 * ignore all MSG IN phases and reject it.
1507 }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
1510 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1512 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1515 PADDR_B (msg_weird1),
1516 }/*-------------------------< WDTR_RESP >------------------------*/,{
1518 * let the target fetch our answer.
1524 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1525 PADDR_B (nego_bad_phase),
1526 }/*-------------------------< SEND_WDTR >------------------------*/,{
1528 * Send the M_X_WIDE_REQ
1530 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
1533 PADDR_B (msg_out_done),
1534 }/*-------------------------< SDTR_RESP >------------------------*/,{
1536 * let the target fetch our answer.
1542 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1543 PADDR_B (nego_bad_phase),
1544 }/*-------------------------< SEND_SDTR >------------------------*/,{
1546 * Send the M_X_SYNC_REQ
1548 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
1551 PADDR_B (msg_out_done),
1552 }/*-------------------------< PPR_RESP >-------------------------*/,{
1554 * let the target fetch our answer.
1560 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1561 PADDR_B (nego_bad_phase),
1562 }/*-------------------------< SEND_PPR >-------------------------*/,{
1564 * Send the M_X_PPR_REQ
1566 SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
1569 PADDR_B (msg_out_done),
1570 }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
1575 }/*-------------------------< MSG_OUT >--------------------------*/,{
1577 * The target requests a message.
1578 * We donnot send messages that may
1579 * require the device to go to bus free.
1581 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1584 * ... wait for the next phase
1585 * if it's a message out, send it again, ...
1587 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1589 }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
1591 * Let the C code be aware of the
1592 * sent message and clear the message.
1597 * ... and process the next phase
1601 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
1603 * Zero scratcha that will count the
1609 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
1611 * The target may want to transfer too much data.
1613 * If phase is DATA OUT write 1 byte and count it.
1615 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1617 SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
1620 PADDR_B (data_ovrun2),
1622 * If WSR is set, clear this condition, and
1625 SCR_FROM_REG (scntl2),
1627 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1629 SCR_REG_REG (scntl2, SCR_OR, WSR),
1632 PADDR_B (data_ovrun2),
1634 * Finally check against DATA IN phase.
1635 * Signal data overrun to the C code
1636 * and jump to dispatcher if not so.
1637 * Read 1 byte otherwise and count it.
1639 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
1645 SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
1647 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
1650 * This will allow to return a negative
1653 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
1655 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
1657 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
1660 * .. and repeat as required.
1663 PADDR_B (data_ovrun1),
1664 }/*-------------------------< ABORT_RESEL >----------------------*/,{
1670 * send the abort/abortag/reset message
1671 * we expect an immediate disconnect
1673 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1675 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1677 SCR_CLR (SCR_ACK|SCR_ATN),
1685 }/*-------------------------< RESEND_IDENT >---------------------*/,{
1687 * The target stays in MSG OUT phase after having acked
1688 * Identify [+ Tag [+ Extended message ]]. Targets shall
1689 * behave this way on parity error.
1690 * We must send it again all the messages.
1692 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
1693 0, /* 1rst ACK = 90 ns. Hope the chip isn't too fast */
1695 PADDR_A (send_ident),
1696 }/*-------------------------< IDENT_BREAK >----------------------*/,{
1701 }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
1706 }/*-------------------------< SDATA_IN >-------------------------*/,{
1707 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1708 offsetof (struct sym_dsb, sense),
1710 PADDR_A (datai_done),
1712 PADDR_B (data_ovrun),
1713 }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
1715 * Message is an IDENTIFY, but lun is unknown.
1716 * Signal problem to C code for logging the event.
1717 * Send a M_ABORT to clear all pending tasks.
1722 PADDR_B (abort_resel),
1723 }/*-------------------------< BAD_I_T_L >------------------------*/,{
1725 * We donnot have a task for that I_T_L.
1726 * Signal problem to C code for logging the event.
1727 * Send a M_ABORT message.
1730 SIR_RESEL_BAD_I_T_L,
1732 PADDR_B (abort_resel),
1733 }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
1735 * We donnot have a task that matches the tag.
1736 * Signal problem to C code for logging the event.
1737 * Send a M_ABORTTAG message.
1740 SIR_RESEL_BAD_I_T_L_Q,
1742 PADDR_B (abort_resel),
1743 }/*-------------------------< BAD_STATUS >-----------------------*/,{
1745 * Anything different from INTERMEDIATE
1746 * CONDITION MET should be a bad SCSI status,
1747 * given that GOOD status has already been tested.
1753 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
1754 SIR_BAD_SCSI_STATUS,
1757 }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
1759 * Helper for the C code when WSR bit is set.
1760 * Perform the move of the residual byte.
1762 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1763 offsetof (struct sym_ccb, phys.wresid),
1767 #ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
1768 }/*-------------------------< DATA_IO >--------------------------*/,{
1770 * We jump here if the data direction was unknown at the
1771 * time we had to queue the command to the scripts processor.
1772 * Pointers had been set as follow in this situation:
1774 * lastp --> start pointer when DATA_IN
1775 * wlastp --> start pointer when DATA_OUT
1776 * This script sets savep and lastp according to the
1777 * direction chosen by the target.
1779 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1780 PADDR_B (data_io_out),
1781 }/*-------------------------< DATA_IO_COM >----------------------*/,{
1783 * Direction is DATA IN.
1786 HADDR_1 (ccb_head.lastp),
1787 HADDR_1 (ccb_head.savep),
1789 * Jump to the SCRIPTS according to actual direction.
1792 HADDR_1 (ccb_head.savep),
1796 }/*-------------------------< DATA_IO_OUT >----------------------*/,{
1798 * Direction is DATA OUT.
1800 SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
1803 HADDR_1 (ccb_head.wlastp),
1804 HADDR_1 (ccb_head.lastp),
1806 PADDR_B(data_io_com),
1807 #endif /* SYM_OPT_HANDLE_DIR_UNKNOWN */
1809 }/*-------------------------< ZERO >-----------------------------*/,{
1811 }/*-------------------------< SCRATCH >--------------------------*/,{
1812 SCR_DATA_ZERO, /* MUST BE BEFORE SCRATCH1 */
1813 }/*-------------------------< SCRATCH1 >-------------------------*/,{
1815 }/*-------------------------< PREV_DONE >------------------------*/,{
1816 SCR_DATA_ZERO, /* MUST BE BEFORE DONE_POS ! */
1817 }/*-------------------------< DONE_POS >-------------------------*/,{
1819 }/*-------------------------< NEXTJOB >--------------------------*/,{
1820 SCR_DATA_ZERO, /* MUST BE BEFORE STARTPOS ! */
1821 }/*-------------------------< STARTPOS >-------------------------*/,{
1823 }/*-------------------------< TARGTBL >--------------------------*/,{
1825 }/*--------------------------<>----------------------------------*/
1828 static struct SYM_FWZ_SCR SYM_FWZ_SCR = {
1829 /*-------------------------< SNOOPTEST >------------------------*/{
1831 * Read the variable.
1837 * Write the variable.
1843 * Read back the variable.
1848 }/*-------------------------< SNOOPEND >-------------------------*/,{
1854 #ifdef SYM_OPT_NO_BUS_MEMORY_MAPPING
1856 * We may use MEMORY MOVE instructions to load the on chip-RAM,
1857 * if it happens that mapping PCI memory is not possible.
1858 * But writing the RAM from the CPU is the preferred method,
1859 * since PCI 2.2 seems to disallow PCI self-mastering.
1861 }/*-------------------------< START_RAM >------------------------*/,{
1863 * Load the script into on-chip RAM,
1864 * and jump to start point.
1866 SCR_COPY (sizeof(struct SYM_FWA_SCR)),
1867 }/*-------------------------< SCRIPTA0_BA >----------------------*/,{
1872 #endif /* SYM_OPT_NO_BUS_MEMORY_MAPPING */
1873 }/*--------------------------<>----------------------------------*/