2 * Trantor T128/T128F/T228 defines
3 * Note : architecturally, the T100 and T128 are different and won't work
5 * Copyright 1993, Drew Eckhardt
7 * (Unix and Linux consulting and custom programming)
11 * DISTRIBUTION RELEASE 3.
13 * For more information, please consult
15 * Trantor Systems, Ltd.
16 * T128/T128F/T228 SCSI Host Adapter
17 * Hardware Specifications
19 * Trantor Systems, Ltd.
22 * 1+ (415) 770-1400, FAX 1+ (415) 770-9910
27 * SCSI Protocol Controller
30 * NCR Microelectronics
31 * 1635 Aeroplaza Drive
32 * Colorado Springs, CO 80916
39 * Revision 1.1.1.1 2005/04/11 02:50:37 jack
42 * Revision 1.1.1.1 2005/01/10 13:16:36 jack
50 #define T128_PUBLIC_RELEASE 3
52 #define TDEBUG_INIT 0x1
53 #define TDEBUG_TRANSFER 0x2
56 * The trantor boards are memory mapped. They use an NCR5380 or
57 * equivalent (my sample board had part second sourced from ZILOG).
58 * NCR's recommended "Pseudo-DMA" architecture is used, where
59 * a PAL drives the DMA signals on the 5380 allowing fast, blind
60 * transfers with proper handshaking.
64 * Note : a boot switch is provided for the purpose of informing the
65 * firmware to boot or not boot from attached SCSI devices. So, I imagine
66 * there are fewer people who've yanked the ROM like they do on the Seagate
67 * to make bootup faster, and I'll probably use this for autodetection.
69 #define T_ROM_OFFSET 0
72 * Note : my sample board *WAS NOT* populated with the SRAM, so this
73 * can't be used for autodetection without a ROM present.
75 #define T_RAM_OFFSET 0x1800
78 * All of the registers are allocated 32 bytes of address space, except
79 * for the data register (read/write to/from the 5380 in pseudo-DMA mode)
81 #define T_CONTROL_REG_OFFSET 0x1c00 /* rw */
82 #define T_CR_INT 0x10 /* Enable interrupts */
83 #define T_CR_CT 0x02 /* Reset watchdog timer */
85 #define T_STATUS_REG_OFFSET 0x1c20 /* ro */
86 #define T_ST_BOOT 0x80 /* Boot switch */
87 #define T_ST_S3 0x40 /* User settable switches, */
88 #define T_ST_S2 0x20 /* read 0 when switch is on, 1 off */
90 #define T_ST_PS2 0x08 /* Set for Microchannel 228 */
91 #define T_ST_RDY 0x04 /* 5380 DRQ */
92 #define T_ST_TIM 0x02 /* indicates 40us watchdog timer fired */
93 #define T_ST_ZERO 0x01 /* Always zero */
95 #define T_5380_OFFSET 0x1d00 /* 8 registers here, see NCR5380.h */
97 #define T_DATA_REG_OFFSET 0x1e00 /* rw 512 bytes long */
100 int t128_abort(Scsi_Cmnd *);
101 int t128_biosparam(Disk *, kdev_t, int*);
102 int t128_detect(Scsi_Host_Template *);
103 int t128_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
104 int t128_reset(Scsi_Cmnd *, unsigned int reset_flags);
105 int t128_proc_info (char *buffer, char **start, off_t offset,
106 int length, int hostno, int inout);
113 #define CMD_PER_LUN 2
121 * I hadn't thought of this with the earlier drivers - but to prevent
122 * macro definition conflicts, we shouldn't define all of the internal
123 * macros when this is being used solely for the host stub.
126 #define TRANTOR_T128 { \
127 name: "Trantor T128/T128F/T228", \
128 detect: t128_detect, \
129 queuecommand: t128_queue_command, \
132 bios_param: t128_biosparam, \
133 can_queue: CAN_QUEUE, \
135 sg_tablesize: SG_ALL, \
136 cmd_per_lun: CMD_PER_LUN, \
137 use_clustering: DISABLE_CLUSTERING}
141 #define NCR5380_implementation_fields \
144 #define NCR5380_local_declare() \
147 #define NCR5380_setup(instance) \
148 base = (instance)->base
150 #define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
152 #if !(TDEBUG & TDEBUG_TRANSFER)
153 #define NCR5380_read(reg) isa_readb(T128_address(reg))
154 #define NCR5380_write(reg, value) isa_writeb((value),(T128_address(reg)))
156 #define NCR5380_read(reg) \
157 (((unsigned char) printk("scsi%d : read register %d at address %08x\n"\
158 , instance->hostno, (reg), T128_address(reg))), isa_readb(T128_address(reg)))
160 #define NCR5380_write(reg, value) { \
161 printk("scsi%d : write %02x to register %d at address %08x\n", \
162 instance->hostno, (value), (reg), T128_address(reg)); \
163 isa_writeb((value), (T128_address(reg))); \
167 #define NCR5380_intr t128_intr
168 #define do_NCR5380_intr do_t128_intr
169 #define NCR5380_queue_command t128_queue_command
170 #define NCR5380_abort t128_abort
171 #define NCR5380_reset t128_reset
172 #define NCR5380_proc_info t128_proc_info
175 1101 0100 1010 1000 */
177 #define T128_IRQS 0xc4a8
179 #endif /* else def HOSTS_C */
180 #endif /* ndef ASM */