drivers/sound/ad1848.c

   1 /*
   2  * sound/ad1848.c
   3  *
   4  * The low level driver for the AD1848/CS4248 codec chip which
   5  * is used for example in the MS Sound System.
   6  *
   7  * The CS4231 which is used in the GUS MAX and some other cards is
   8  * upwards compatible with AD1848 and this driver is able to drive it.
   9  *
  10  * CS4231A and AD1845 are upward compatible with CS4231. However
  11  * the new features of these chips are different.
  12  *
  13  * CS4232 is a PnP audio chip which contains a CS4231A (and SB, MPU).
  14  * CS4232A is an improved version of CS4232.
  15  *
  16  *
  17  *
  18  * Copyright (C) by Hannu Savolainen 1993-1997
  19  *
  20  * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
  21  * Version 2 (June 1991). See the "COPYING" file distributed with this software
  22  * for more info.
  23  *
  24  *
  25  * Thomas Sailer        : ioctl code reworked (vmalloc/vfree removed)
  26  *                        general sleep/wakeup clean up.
  27  * Alan Cox             : reformatted. Fixed SMP bugs. Moved to kernel alloc/free
  28  *                        of irqs. Use dev_id.
  29  * Christoph Hellwig    : adapted to module_init/module_exit
  30  * Aki Laukkanen        : added power management support
  31  * Arnaldo C. de Melo   : added missing restore_flags in ad1848_resume
  32  * Miguel Freitas       : added ISA PnP support
  33  * Alan Cox             : Added CS4236->4239 identification
  34  * Daniel T. Cobra      : Alernate config/mixer for later chips
  35  * Alan Cox             : Merged chip idents and config code
  36  * Zwane Mwaikambo      : Fix ISA PnP scan
  37  *
  38  * TODO
  39  *              APM save restore assist code on IBM thinkpad
  40  *
  41  * Status:
  42  *              Tested. Believed fully functional.
  43  */
  44
  45 #include <linux/config.h>
  46 #include <linux/init.h>
  47 #include <linux/module.h>
  48 #include <linux/stddef.h>
  49 #include <linux/pm.h>
  50 #include <linux/isapnp.h>
  51
  52 #define DEB(x)
  53 #define DEB1(x)
  54 #include "sound_config.h"
  55
  56 #include "ad1848.h"
  57 #include "ad1848_mixer.h"
  58
  59 typedef struct
  60 {
  61         int             base;
  62         int             irq;
  63         int             dma1, dma2;
  64         int             dual_dma;       /* 1, when two DMA channels allocated */
  65         int             subtype;
  66         unsigned char   MCE_bit;
  67         unsigned char   saved_regs[64]; /* Includes extended register space */
  68         int             debug_flag;
  69
  70         int             audio_flags;
  71         int             record_dev, playback_dev;
  72
  73         int             xfer_count;
  74         int             audio_mode;
  75         int             open_mode;
  76         int             intr_active;
  77         char           *chip_name, *name;
  78         int             model;
  79 #define MD_1848         1
  80 #define MD_4231         2
  81 #define MD_4231A        3
  82 #define MD_1845         4
  83 #define MD_4232         5
  84 #define MD_C930         6
  85 #define MD_IWAVE        7
  86 #define MD_4235         8 /* Crystal Audio CS4235  */
  87 #define MD_1845_SSCAPE  9 /* Ensoniq Soundscape PNP*/
  88 #define MD_4236         10 /* 4236 and higher */
  89 #define MD_42xB         11 /* CS 42xB */
  90 #define MD_4239         12 /* CS4239 */
  91
  92         /* Mixer parameters */
  93         int             recmask;
  94         int             supported_devices, orig_devices;
  95         int             supported_rec_devices, orig_rec_devices;
  96         int            *levels;
  97         short           mixer_reroute[32];
  98         int             dev_no;
  99         volatile unsigned long timer_ticks;
 100         int             timer_running;
 101         int             irq_ok;
 102         mixer_ents     *mix_devices;
 103         int             mixer_output_port;
 104
 105         /* Power management */
 106         struct          pm_dev *pmdev;
 107 } ad1848_info;
 108
 109 typedef struct ad1848_port_info
 110 {
 111         int             open_mode;
 112         int             speed;
 113         unsigned char   speed_bits;
 114         int             channels;
 115         int             audio_format;
 116         unsigned char   format_bits;
 117 }
 118 ad1848_port_info;
 119
 120 static struct address_info cfg;
 121 static int nr_ad1848_devs;
 122
 123 int deskpro_xl;
 124 int deskpro_m;
 125 int soundpro;
 126
 127 static volatile signed char irq2dev[17] = {
 128         -1, -1, -1, -1, -1, -1, -1, -1,
 129         -1, -1, -1, -1, -1, -1, -1, -1, -1
 130 };
 131
 132 #ifndef EXCLUDE_TIMERS
 133 static int timer_installed = -1;
 134 #endif
 135
 136 static int loaded;
 137
 138 static int ad_format_mask[13 /*devc->model */ ] =
 139 {
 140         0,
 141         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,
 142         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 143         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 144         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,       /* AD1845 */
 145         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 146         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 147         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 148         AFMT_U8 | AFMT_S16_LE /* CS4235 */,
 149         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW        /* Ensoniq Soundscape*/,
 150         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 151         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM,
 152         AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_S16_BE | AFMT_IMA_ADPCM
 153 };
 154
 155 static ad1848_info adev_info[MAX_AUDIO_DEV];
 156
 157 #define io_Index_Addr(d)        ((d)->base)
 158 #define io_Indexed_Data(d)      ((d)->base+1)
 159 #define io_Status(d)            ((d)->base+2)
 160 #define io_Polled_IO(d)         ((d)->base+3)
 161
 162 static struct {
 163      unsigned char flags;
 164 #define CAP_F_TIMER 0x01
 165 } capabilities [10 /*devc->model */ ] = {
 166      {0}
 167     ,{0}           /* MD_1848  */
 168     ,{CAP_F_TIMER} /* MD_4231  */
 169     ,{CAP_F_TIMER} /* MD_4231A */
 170     ,{CAP_F_TIMER} /* MD_1845  */
 171     ,{CAP_F_TIMER} /* MD_4232  */
 172     ,{0}           /* MD_C930  */
 173     ,{CAP_F_TIMER} /* MD_IWAVE */
 174     ,{0}           /* MD_4235  */
 175     ,{CAP_F_TIMER} /* MD_1845_SSCAPE */
 176 };
 177
 178 #if defined CONFIG_ISAPNP || defined CONFIG_ISAPNP_MODULE
 179 static int isapnp       = 1;
 180 static int isapnpjump   = 0;
 181 static int reverse      = 0;
 182
 183 static int audio_activated = 0;
 184 #else
 185 static int isapnp       = 0;
 186 #endif
 187
 188
 189
 190 static int      ad1848_open(int dev, int mode);
 191 static void     ad1848_close(int dev);
 192 static void     ad1848_output_block(int dev, unsigned long buf, int count, int intrflag);
 193 static void     ad1848_start_input(int dev, unsigned long buf, int count, int intrflag);
 194 static int      ad1848_prepare_for_output(int dev, int bsize, int bcount);
 195 static int      ad1848_prepare_for_input(int dev, int bsize, int bcount);
 196 static void     ad1848_halt(int dev);
 197 static void     ad1848_halt_input(int dev);
 198 static void     ad1848_halt_output(int dev);
 199 static void     ad1848_trigger(int dev, int bits);
 200 static int      ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data);
 201
 202 #ifndef EXCLUDE_TIMERS
 203 static int ad1848_tmr_install(int dev);
 204 static void ad1848_tmr_reprogram(int dev);
 205 #endif
 206
 207 static int ad_read(ad1848_info * devc, int reg)
 208 {
 209         unsigned long flags;
 210         int x;
 211         int timeout = 900000;
 212
 213         while (timeout > 0 && inb(devc->base) == 0x80)  /*Are we initializing */
 214                 timeout--;
 215
 216         save_flags(flags);
 217         cli();
 218
 219         if(reg < 32)
 220         {
 221                 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 222                 x = inb(io_Indexed_Data(devc));
 223         }
 224         else
 225         {
 226                 int xreg, xra;
 227
 228                 xreg = (reg & 0xff) - 32;
 229                 xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2);
 230                 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 231                 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
 232                 x = inb(io_Indexed_Data(devc));
 233         }
 234         restore_flags(flags);
 235
 236         return x;
 237 }
 238
 239 static void ad_write(ad1848_info * devc, int reg, int data)
 240 {
 241         unsigned long flags;
 242         int timeout = 900000;
 243
 244         while (timeout > 0 && inb(devc->base) == 0x80)  /* Are we initializing */
 245                 timeout--;
 246
 247         save_flags(flags);
 248         cli();
 249
 250         if(reg < 32)
 251         {
 252                 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 253                 outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc));
 254         }
 255         else
 256         {
 257                 int xreg, xra;
 258
 259                 xreg = (reg & 0xff) - 32;
 260                 xra = (((xreg & 0x0f) << 4) & 0xf0) | 0x08 | ((xreg & 0x10) >> 2);
 261                 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc));
 262                 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc));
 263                 outb((unsigned char) (data & 0xff), io_Indexed_Data(devc));
 264         }
 265         restore_flags(flags);
 266 }
 267
 268 static void wait_for_calibration(ad1848_info * devc)
 269 {
 270         int timeout = 0;
 271
 272         /*
 273          * Wait until the auto calibration process has finished.
 274          *
 275          * 1)       Wait until the chip becomes ready (reads don't return 0x80).
 276          * 2)       Wait until the ACI bit of I11 gets on and then off.
 277          */
 278
 279         timeout = 100000;
 280         while (timeout > 0 && inb(devc->base) == 0x80)
 281                 timeout--;
 282         if (inb(devc->base) & 0x80)
 283                 printk(KERN_WARNING "ad1848: Auto calibration timed out(1).\n");
 284
 285         timeout = 100;
 286         while (timeout > 0 && !(ad_read(devc, 11) & 0x20))
 287                 timeout--;
 288         if (!(ad_read(devc, 11) & 0x20))
 289                 return;
 290
 291         timeout = 80000;
 292         while (timeout > 0 && (ad_read(devc, 11) & 0x20))
 293                 timeout--;
 294         if (ad_read(devc, 11) & 0x20)
 295                 if ( (devc->model != MD_1845) || (devc->model != MD_1845_SSCAPE))
 296                         printk(KERN_WARNING "ad1848: Auto calibration timed out(3).\n");
 297 }
 298
 299 static void ad_mute(ad1848_info * devc)
 300 {
 301         int i;
 302         unsigned char prev;
 303
 304         /*
 305          * Save old register settings and mute output channels
 306          */
 307
 308         for (i = 6; i < 8; i++)
 309         {
 310                 prev = devc->saved_regs[i] = ad_read(devc, i);
 311         }
 312
 313 }
 314
 315 static void ad_unmute(ad1848_info * devc)
 316 {
 317 }
 318
 319 static void ad_enter_MCE(ad1848_info * devc)
 320 {
 321         unsigned long flags;
 322         int timeout = 1000;
 323         unsigned short prev;
 324
 325         while (timeout > 0 && inb(devc->base) == 0x80)  /*Are we initializing */
 326                 timeout--;
 327
 328         save_flags(flags);
 329         cli();
 330
 331         devc->MCE_bit = 0x40;
 332         prev = inb(io_Index_Addr(devc));
 333         if (prev & 0x40)
 334         {
 335                 restore_flags(flags);
 336                 return;
 337         }
 338         outb((devc->MCE_bit), io_Index_Addr(devc));
 339         restore_flags(flags);
 340 }
 341
 342 static void ad_leave_MCE(ad1848_info * devc)
 343 {
 344         unsigned long flags;
 345         unsigned char prev, acal;
 346         int timeout = 1000;
 347
 348         while (timeout > 0 && inb(devc->base) == 0x80)  /*Are we initializing */
 349                 timeout--;
 350
 351         save_flags(flags);
 352         cli();
 353
 354         acal = ad_read(devc, 9);
 355
 356         devc->MCE_bit = 0x00;
 357         prev = inb(io_Index_Addr(devc));
 358         outb((0x00), io_Index_Addr(devc));      /* Clear the MCE bit */
 359
 360         if ((prev & 0x40) == 0) /* Not in MCE mode */
 361         {
 362                 restore_flags(flags);
 363                 return;
 364         }
 365         outb((0x00), io_Index_Addr(devc));      /* Clear the MCE bit */
 366         if (acal & 0x08)        /* Auto calibration is enabled */
 367                 wait_for_calibration(devc);
 368         restore_flags(flags);
 369 }
 370
 371 static int ad1848_set_recmask(ad1848_info * devc, int mask)
 372 {
 373         unsigned char   recdev;
 374         int             i, n;
 375
 376         mask &= devc->supported_rec_devices;
 377
 378         /* Rename the mixer bits if necessary */
 379         for (i = 0; i < 32; i++)
 380         {
 381                 if (devc->mixer_reroute[i] != i)
 382                 {
 383                         if (mask & (1 << i))
 384                         {
 385                                 mask &= ~(1 << i);
 386                                 mask |= (1 << devc->mixer_reroute[i]);
 387                         }
 388                 }
 389         }
 390
 391         n = 0;
 392         for (i = 0; i < 32; i++)        /* Count selected device bits */
 393                 if (mask & (1 << i))
 394                         n++;
 395
 396         if (!soundpro) {
 397                 if (n == 0)
 398                         mask = SOUND_MASK_MIC;
 399                 else if (n != 1) {      /* Too many devices selected */
 400                         mask &= ~devc->recmask; /* Filter out active settings */
 401
 402                         n = 0;
 403                         for (i = 0; i < 32; i++)        /* Count selected device bits */
 404                                 if (mask & (1 << i))
 405                                         n++;
 406
 407                         if (n != 1)
 408                                 mask = SOUND_MASK_MIC;
 409                 }
 410                 switch (mask) {
 411                 case SOUND_MASK_MIC:
 412                         recdev = 2;
 413                         break;
 414
 415                 case SOUND_MASK_LINE:
 416                 case SOUND_MASK_LINE3:
 417                         recdev = 0;
 418                         break;
 419
 420                 case SOUND_MASK_CD:
 421                 case SOUND_MASK_LINE1:
 422                         recdev = 1;
 423                         break;
 424
 425                 case SOUND_MASK_IMIX:
 426                         recdev = 3;
 427                         break;
 428
 429                 default:
 430                         mask = SOUND_MASK_MIC;
 431                         recdev = 2;
 432                 }
 433
 434                 recdev <<= 6;
 435                 ad_write(devc, 0, (ad_read(devc, 0) & 0x3f) | recdev);
 436                 ad_write(devc, 1, (ad_read(devc, 1) & 0x3f) | recdev);
 437         } else { /* soundpro */
 438                 unsigned char val;
 439                 int set_rec_bit;
 440                 int j;
 441
 442                 for (i = 0; i < 32; i++) {      /* For each bit */
 443                         if ((devc->supported_rec_devices & (1 << i)) == 0)
 444                                 continue;       /* Device not supported */
 445
 446                         for (j = LEFT_CHN; j <= RIGHT_CHN; j++) {
 447                                 if (devc->mix_devices[i][j].nbits == 0) /* Inexistent channel */
 448                                         continue;
 449
 450                                 /*
 451                                  * This is tricky:
 452                                  * set_rec_bit becomes 1 if the corresponding bit in mask is set
 453                                  * then it gets flipped if the polarity is inverse
 454                                  */
 455                                 set_rec_bit = ((mask & (1 << i)) != 0) ^ devc->mix_devices[i][j].recpol;
 456
 457                                 val = ad_read(devc, devc->mix_devices[i][j].recreg);
 458                                 val &= ~(1 << devc->mix_devices[i][j].recpos);
 459                                 val |= (set_rec_bit << devc->mix_devices[i][j].recpos);
 460                                 ad_write(devc, devc->mix_devices[i][j].recreg, val);
 461                         }
 462                 }
 463         }
 464
 465         /* Rename the mixer bits back if necessary */
 466         for (i = 0; i < 32; i++)
 467         {
 468                 if (devc->mixer_reroute[i] != i)
 469                 {
 470                         if (mask & (1 << devc->mixer_reroute[i]))
 471                         {
 472                                 mask &= ~(1 << devc->mixer_reroute[i]);
 473                                 mask |= (1 << i);
 474                         }
 475                 }
 476         }
 477         devc->recmask = mask;
 478         return mask;
 479 }
 480
 481 static void change_bits(ad1848_info * devc, unsigned char *regval,
 482                         unsigned char *muteval, int dev, int chn, int newval)
 483 {
 484         unsigned char mask;
 485         int shift;
 486         int mute;
 487         int mutemask;
 488         int set_mute_bit;
 489
 490         set_mute_bit = (newval == 0) ^ devc->mix_devices[dev][chn].mutepol;
 491
 492         if (devc->mix_devices[dev][chn].polarity == 1)  /* Reverse */
 493                 newval = 100 - newval;
 494
 495         mask = (1 << devc->mix_devices[dev][chn].nbits) - 1;
 496         shift = devc->mix_devices[dev][chn].bitpos;
 497
 498         if (devc->mix_devices[dev][chn].mutepos == 8)
 499         {                       /* if there is no mute bit */
 500                 mute = 0;       /* No mute bit; do nothing special */
 501                 mutemask = ~0;  /* No mute bit; do nothing special */
 502         }
 503         else
 504         {
 505                 mute = (set_mute_bit << devc->mix_devices[dev][chn].mutepos);
 506                 mutemask = ~(1 << devc->mix_devices[dev][chn].mutepos);
 507         }
 508
 509         newval = (int) ((newval * mask) + 50) / 100;    /* Scale it */
 510         *regval &= ~(mask << shift);                    /* Clear bits */
 511         *regval |= (newval & mask) << shift;            /* Set new value */
 512
 513         *muteval &= mutemask;
 514         *muteval |= mute;
 515 }
 516
 517 static int ad1848_mixer_get(ad1848_info * devc, int dev)
 518 {
 519         if (!((1 << dev) & devc->supported_devices))
 520                 return -EINVAL;
 521
 522         dev = devc->mixer_reroute[dev];
 523
 524         return devc->levels[dev];
 525 }
 526
 527 static void ad1848_mixer_set_channel(ad1848_info *devc, int dev, int value, int channel)
 528 {
 529         int regoffs, muteregoffs;
 530         unsigned char val, muteval;
 531
 532         regoffs = devc->mix_devices[dev][channel].regno;
 533         muteregoffs = devc->mix_devices[dev][channel].mutereg;
 534         val = ad_read(devc, regoffs);
 535
 536         if (muteregoffs != regoffs) {
 537                 muteval = ad_read(devc, muteregoffs);
 538                 change_bits(devc, &val, &muteval, dev, channel, value);
 539         }
 540         else
 541                 change_bits(devc, &val, &val, dev, channel, value);
 542
 543         ad_write(devc, regoffs, val);
 544         devc->saved_regs[regoffs] = val;
 545         if (muteregoffs != regoffs) {
 546                 ad_write(devc, muteregoffs, muteval);
 547                 devc->saved_regs[muteregoffs] = muteval;
 548         }
 549 }
 550
 551 static int ad1848_mixer_set(ad1848_info * devc, int dev, int value)
 552 {
 553         int left = value & 0x000000ff;
 554         int right = (value & 0x0000ff00) >> 8;
 555         int retvol;
 556
 557         if (dev > 31)
 558                 return -EINVAL;
 559
 560         if (!(devc->supported_devices & (1 << dev)))
 561                 return -EINVAL;
 562
 563         dev = devc->mixer_reroute[dev];
 564
 565         if (devc->mix_devices[dev][LEFT_CHN].nbits == 0)
 566                 return -EINVAL;
 567
 568         if (left > 100)
 569                 left = 100;
 570         if (right > 100)
 571                 right = 100;
 572
 573         if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0)       /* Mono control */
 574                 right = left;
 575
 576         retvol = left | (right << 8);
 577
 578         /* Scale volumes */
 579         left = mix_cvt[left];
 580         right = mix_cvt[right];
 581
 582         devc->levels[dev] = retvol;
 583
 584         /*
 585          * Set the left channel
 586          */
 587         ad1848_mixer_set_channel(devc, dev, left, LEFT_CHN);
 588
 589         /*
 590          * Set the right channel
 591          */
 592         if (devc->mix_devices[dev][RIGHT_CHN].nbits == 0)
 593                 goto out;
 594         ad1848_mixer_set_channel(devc, dev, right, RIGHT_CHN);
 595
 596  out:
 597         return retvol;
 598 }
 599
 600 static void ad1848_mixer_reset(ad1848_info * devc)
 601 {
 602         int i;
 603         char name[32];
 604
 605         devc->mix_devices = &(ad1848_mix_devices[0]);
 606
 607         sprintf(name, "%s_%d", devc->chip_name, nr_ad1848_devs);
 608
 609         for (i = 0; i < 32; i++)
 610                 devc->mixer_reroute[i] = i;
 611
 612         devc->supported_rec_devices = MODE1_REC_DEVICES;
 613
 614         switch (devc->model)
 615         {
 616                 case MD_4231:
 617                 case MD_4231A:
 618                 case MD_1845:
 619                 case MD_1845_SSCAPE:
 620                         devc->supported_devices = MODE2_MIXER_DEVICES;
 621                         break;
 622
 623                 case MD_C930:
 624                         devc->supported_devices = C930_MIXER_DEVICES;
 625                         devc->mix_devices = &(c930_mix_devices[0]);
 626                         break;
 627
 628                 case MD_IWAVE:
 629                         devc->supported_devices = MODE3_MIXER_DEVICES;
 630                         devc->mix_devices = &(iwave_mix_devices[0]);
 631                         break;
 632
 633                 case MD_42xB:
 634                 case MD_4239:
 635                         devc->mix_devices = &(cs42xb_mix_devices[0]);
 636                         devc->supported_devices = MODE3_MIXER_DEVICES;
 637                         break;
 638                 case MD_4232:
 639                 case MD_4236:
 640                         devc->supported_devices = MODE3_MIXER_DEVICES;
 641                         break;
 642
 643                 case MD_1848:
 644                         if (soundpro) {
 645                                 devc->supported_devices = SPRO_MIXER_DEVICES;
 646                                 devc->supported_rec_devices = SPRO_REC_DEVICES;
 647                                 devc->mix_devices = &(spro_mix_devices[0]);
 648                                 break;
 649                         }
 650
 651                 default:
 652                         devc->supported_devices = MODE1_MIXER_DEVICES;
 653         }
 654
 655         devc->orig_devices = devc->supported_devices;
 656         devc->orig_rec_devices = devc->supported_rec_devices;
 657
 658         devc->levels = load_mixer_volumes(name, default_mixer_levels, 1);
 659
 660         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
 661         {
 662                 if (devc->supported_devices & (1 << i))
 663                         ad1848_mixer_set(devc, i, devc->levels[i]);
 664         }
 665
 666         ad1848_set_recmask(devc, SOUND_MASK_MIC);
 667
 668         devc->mixer_output_port = devc->levels[31] | AUDIO_HEADPHONE | AUDIO_LINE_OUT;
 669
 670         if (!soundpro) {
 671                 if (devc->mixer_output_port & AUDIO_SPEAKER)
 672                         ad_write(devc, 26, ad_read(devc, 26) & ~0x40);  /* Unmute mono out */
 673                 else
 674                         ad_write(devc, 26, ad_read(devc, 26) | 0x40);   /* Mute mono out */
 675         } else {
 676                 /*
 677                  * From the "wouldn't it be nice if the mixer API had (better)
 678                  * support for custom stuff" category
 679                  */
 680                 /* Enable surround mode and SB16 mixer */
 681                 ad_write(devc, 16, 0x60);
 682         }
 683 }
 684
 685 static int ad1848_mixer_ioctl(int dev, unsigned int cmd, caddr_t arg)
 686 {
 687         ad1848_info *devc = mixer_devs[dev]->devc;
 688         int val;
 689
 690         if (cmd == SOUND_MIXER_PRIVATE1)
 691         {
 692                 if (get_user(val, (int *)arg))
 693                         return -EFAULT;
 694
 695                 if (val != 0xffff)
 696                 {
 697                         val &= (AUDIO_SPEAKER | AUDIO_HEADPHONE | AUDIO_LINE_OUT);
 698                         devc->mixer_output_port = val;
 699                         val |= AUDIO_HEADPHONE | AUDIO_LINE_OUT;        /* Always on */
 700                         devc->mixer_output_port = val;
 701                         if (val & AUDIO_SPEAKER)
 702                                 ad_write(devc, 26, ad_read(devc, 26) & ~0x40);  /* Unmute mono out */
 703                         else
 704                                 ad_write(devc, 26, ad_read(devc, 26) | 0x40);           /* Mute mono out */
 705                 }
 706                 val = devc->mixer_output_port;
 707                 return put_user(val, (int *)arg);
 708         }
 709         if (cmd == SOUND_MIXER_PRIVATE2)
 710         {
 711                 if (get_user(val, (int *)arg))
 712                         return -EFAULT;
 713                 return(ad1848_control(AD1848_MIXER_REROUTE, val));
 714         }
 715         if (((cmd >> 8) & 0xff) == 'M')
 716         {
 717                 if (_SIOC_DIR(cmd) & _SIOC_WRITE)
 718                 {
 719                         switch (cmd & 0xff)
 720                         {
 721                                 case SOUND_MIXER_RECSRC:
 722                                         if (get_user(val, (int *)arg))
 723                                                 return -EFAULT;
 724                                         val = ad1848_set_recmask(devc, val);
 725                                         break;
 726
 727                                 default:
 728                                         if (get_user(val, (int *)arg))
 729                                         return -EFAULT;
 730                                         val = ad1848_mixer_set(devc, cmd & 0xff, val);
 731                                         break;
 732                         }
 733                         return put_user(val, (int *)arg);
 734                 }
 735                 else
 736                 {
 737                         switch (cmd & 0xff)
 738                         {
 739                                 /*
 740                                  * Return parameters
 741                                  */
 742
 743                                 case SOUND_MIXER_RECSRC:
 744                                         val = devc->recmask;
 745                                         break;
 746
 747                                 case SOUND_MIXER_DEVMASK:
 748                                         val = devc->supported_devices;
 749                                         break;
 750
 751                                 case SOUND_MIXER_STEREODEVS:
 752                                         val = devc->supported_devices;
 753                                         if (devc->model != MD_C930)
 754                                                 val &= ~(SOUND_MASK_SPEAKER | SOUND_MASK_IMIX);
 755                                         break;
 756
 757                                 case SOUND_MIXER_RECMASK:
 758                                         val = devc->supported_rec_devices;
 759                                         break;
 760
 761                                 case SOUND_MIXER_CAPS:
 762                                         val=SOUND_CAP_EXCL_INPUT;
 763                                         break;
 764
 765                                 default:
 766                                         val = ad1848_mixer_get(devc, cmd & 0xff);
 767                                         break;
 768                         }
 769                         return put_user(val, (int *)arg);
 770                 }
 771         }
 772         else
 773                 return -EINVAL;
 774 }
 775
 776 static int ad1848_set_speed(int dev, int arg)
 777 {
 778         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
 779         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
 780
 781         /*
 782          * The sampling speed is encoded in the least significant nibble of I8. The
 783          * LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and other
 784          * three bits select the divisor (indirectly):
 785          *
 786          * The available speeds are in the following table. Keep the speeds in
 787          * the increasing order.
 788          */
 789         typedef struct
 790         {
 791                 int             speed;
 792                 unsigned char   bits;
 793         }
 794         speed_struct;
 795
 796         static speed_struct speed_table[] =
 797         {
 798                 {5510, (0 << 1) | 1},
 799                 {5510, (0 << 1) | 1},
 800                 {6620, (7 << 1) | 1},
 801                 {8000, (0 << 1) | 0},
 802                 {9600, (7 << 1) | 0},
 803                 {11025, (1 << 1) | 1},
 804                 {16000, (1 << 1) | 0},
 805                 {18900, (2 << 1) | 1},
 806                 {22050, (3 << 1) | 1},
 807                 {27420, (2 << 1) | 0},
 808                 {32000, (3 << 1) | 0},
 809                 {33075, (6 << 1) | 1},
 810                 {37800, (4 << 1) | 1},
 811                 {44100, (5 << 1) | 1},
 812                 {48000, (6 << 1) | 0}
 813         };
 814
 815         int i, n, selected = -1;
 816
 817         n = sizeof(speed_table) / sizeof(speed_struct);
 818
 819         if (arg <= 0)
 820                 return portc->speed;
 821
 822         if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)    /* AD1845 has different timer than others */
 823         {
 824                 if (arg < 4000)
 825                         arg = 4000;
 826                 if (arg > 50000)
 827                         arg = 50000;
 828
 829                 portc->speed = arg;
 830                 portc->speed_bits = speed_table[3].bits;
 831                 return portc->speed;
 832         }
 833         if (arg < speed_table[0].speed)
 834                 selected = 0;
 835         if (arg > speed_table[n - 1].speed)
 836                 selected = n - 1;
 837
 838         for (i = 1 /*really */ ; selected == -1 && i < n; i++)
 839         {
 840                 if (speed_table[i].speed == arg)
 841                         selected = i;
 842                 else if (speed_table[i].speed > arg)
 843                 {
 844                         int diff1, diff2;
 845
 846                         diff1 = arg - speed_table[i - 1].speed;
 847                         diff2 = speed_table[i].speed - arg;
 848
 849                         if (diff1 < diff2)
 850                                 selected = i - 1;
 851                         else
 852                                 selected = i;
 853                 }
 854         }
 855         if (selected == -1)
 856         {
 857                 printk(KERN_WARNING "ad1848: Can't find speed???\n");
 858                 selected = 3;
 859         }
 860         portc->speed = speed_table[selected].speed;
 861         portc->speed_bits = speed_table[selected].bits;
 862         return portc->speed;
 863 }
 864
 865 static short ad1848_set_channels(int dev, short arg)
 866 {
 867         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
 868
 869         if (arg != 1 && arg != 2)
 870                 return portc->channels;
 871
 872         portc->channels = arg;
 873         return arg;
 874 }
 875
 876 static unsigned int ad1848_set_bits(int dev, unsigned int arg)
 877 {
 878         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 879         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
 880
 881         static struct format_tbl
 882         {
 883                   int             format;
 884                   unsigned char   bits;
 885         }
 886         format2bits[] =
 887         {
 888                 {
 889                         0, 0
 890                 }
 891                 ,
 892                 {
 893                         AFMT_MU_LAW, 1
 894                 }
 895                 ,
 896                 {
 897                         AFMT_A_LAW, 3
 898                 }
 899                 ,
 900                 {
 901                         AFMT_IMA_ADPCM, 5
 902                 }
 903                 ,
 904                 {
 905                         AFMT_U8, 0
 906                 }
 907                 ,
 908                 {
 909                         AFMT_S16_LE, 2
 910                 }
 911                 ,
 912                 {
 913                         AFMT_S16_BE, 6
 914                 }
 915                 ,
 916                 {
 917                         AFMT_S8, 0
 918                 }
 919                 ,
 920                 {
 921                         AFMT_U16_LE, 0
 922                 }
 923                 ,
 924                 {
 925                         AFMT_U16_BE, 0
 926                 }
 927         };
 928         int i, n = sizeof(format2bits) / sizeof(struct format_tbl);
 929
 930         if (arg == 0)
 931                 return portc->audio_format;
 932
 933         if (!(arg & ad_format_mask[devc->model]))
 934                 arg = AFMT_U8;
 935
 936         portc->audio_format = arg;
 937
 938         for (i = 0; i < n; i++)
 939                 if (format2bits[i].format == arg)
 940                 {
 941                         if ((portc->format_bits = format2bits[i].bits) == 0)
 942                                 return portc->audio_format = AFMT_U8;           /* Was not supported */
 943
 944                         return arg;
 945                 }
 946         /* Still hanging here. Something must be terribly wrong */
 947         portc->format_bits = 0;
 948         return portc->audio_format = AFMT_U8;
 949 }
 950
 951 static struct audio_driver ad1848_audio_driver =
 952 {
 953         owner:          THIS_MODULE,
 954         open:           ad1848_open,
 955         close:          ad1848_close,
 956         output_block:   ad1848_output_block,
 957         start_input:    ad1848_start_input,
 958         prepare_for_input:      ad1848_prepare_for_input,
 959         prepare_for_output:     ad1848_prepare_for_output,
 960         halt_io:        ad1848_halt,
 961         halt_input:     ad1848_halt_input,
 962         halt_output:    ad1848_halt_output,
 963         trigger:        ad1848_trigger,
 964         set_speed:      ad1848_set_speed,
 965         set_bits:       ad1848_set_bits,
 966         set_channels:   ad1848_set_channels
 967 };
 968
 969 static struct mixer_operations ad1848_mixer_operations =
 970 {
 971         owner:  THIS_MODULE,
 972         id:     "SOUNDPORT",
 973         name:   "AD1848/CS4248/CS4231",
 974         ioctl:  ad1848_mixer_ioctl
 975 };
 976
 977 static int ad1848_open(int dev, int mode)
 978 {
 979         ad1848_info    *devc = NULL;
 980         ad1848_port_info *portc;
 981         unsigned long   flags;
 982
 983         if (dev < 0 || dev >= num_audiodevs)
 984                 return -ENXIO;
 985
 986         devc = (ad1848_info *) audio_devs[dev]->devc;
 987         portc = (ad1848_port_info *) audio_devs[dev]->portc;
 988
 989         save_flags(flags);
 990         cli();
 991         if (portc->open_mode || (devc->open_mode & mode))
 992         {
 993                 restore_flags(flags);
 994                 return -EBUSY;
 995         }
 996         devc->dual_dma = 0;
 997
 998         if (audio_devs[dev]->flags & DMA_DUPLEX)
 999         {
1000                 devc->dual_dma = 1;
1001         }
1002         devc->intr_active = 0;
1003         devc->audio_mode = 0;
1004         devc->open_mode |= mode;
1005         portc->open_mode = mode;
1006         ad1848_trigger(dev, 0);
1007
1008         if (mode & OPEN_READ)
1009                 devc->record_dev = dev;
1010         if (mode & OPEN_WRITE)
1011                 devc->playback_dev = dev;
1012         restore_flags(flags);
1013 /*
1014  * Mute output until the playback really starts. This decreases clicking (hope so).
1015  */
1016         ad_mute(devc);
1017
1018         return 0;
1019 }
1020
1021 static void ad1848_close(int dev)
1022 {
1023         unsigned long   flags;
1024         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1025         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1026
1027         DEB(printk("ad1848_close(void)\n"));
1028
1029         save_flags(flags);
1030         cli();
1031
1032         devc->intr_active = 0;
1033         ad1848_halt(dev);
1034
1035         devc->audio_mode = 0;
1036         devc->open_mode &= ~portc->open_mode;
1037         portc->open_mode = 0;
1038
1039         ad_unmute(devc);
1040         restore_flags(flags);
1041 }
1042
1043 static void ad1848_output_block(int dev, unsigned long buf, int count, int intrflag)
1044 {
1045         unsigned long   flags, cnt;
1046         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1047         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1048
1049         cnt = count;
1050
1051         if (portc->audio_format == AFMT_IMA_ADPCM)
1052         {
1053                 cnt /= 4;
1054         }
1055         else
1056         {
1057                 if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE))  /* 16 bit data */
1058                         cnt >>= 1;
1059         }
1060         if (portc->channels > 1)
1061                 cnt >>= 1;
1062         cnt--;
1063
1064         if ((devc->audio_mode & PCM_ENABLE_OUTPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1065             intrflag &&
1066             cnt == devc->xfer_count)
1067         {
1068                 devc->audio_mode |= PCM_ENABLE_OUTPUT;
1069                 devc->intr_active = 1;
1070                 return; /*
1071                          * Auto DMA mode on. No need to react
1072                          */
1073         }
1074         save_flags(flags);
1075         cli();
1076
1077         ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1078         ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1079
1080         devc->xfer_count = cnt;
1081         devc->audio_mode |= PCM_ENABLE_OUTPUT;
1082         devc->intr_active = 1;
1083         restore_flags(flags);
1084 }
1085
1086 static void ad1848_start_input(int dev, unsigned long buf, int count, int intrflag)
1087 {
1088         unsigned long   flags, cnt;
1089         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1090         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1091
1092         cnt = count;
1093         if (portc->audio_format == AFMT_IMA_ADPCM)
1094         {
1095                 cnt /= 4;
1096         }
1097         else
1098         {
1099                 if (portc->audio_format & (AFMT_S16_LE | AFMT_S16_BE))  /* 16 bit data */
1100                         cnt >>= 1;
1101         }
1102         if (portc->channels > 1)
1103                 cnt >>= 1;
1104         cnt--;
1105
1106         if ((devc->audio_mode & PCM_ENABLE_INPUT) && (audio_devs[dev]->flags & DMA_AUTOMODE) &&
1107                 intrflag &&
1108                 cnt == devc->xfer_count)
1109         {
1110                 devc->audio_mode |= PCM_ENABLE_INPUT;
1111                 devc->intr_active = 1;
1112                 return; /*
1113                          * Auto DMA mode on. No need to react
1114                          */
1115         }
1116         save_flags(flags);
1117         cli();
1118
1119         if (devc->model == MD_1848)
1120         {
1121                   ad_write(devc, 15, (unsigned char) (cnt & 0xff));
1122                   ad_write(devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
1123         }
1124         else
1125         {
1126                   ad_write(devc, 31, (unsigned char) (cnt & 0xff));
1127                   ad_write(devc, 30, (unsigned char) ((cnt >> 8) & 0xff));
1128         }
1129
1130         ad_unmute(devc);
1131
1132         devc->xfer_count = cnt;
1133         devc->audio_mode |= PCM_ENABLE_INPUT;
1134         devc->intr_active = 1;
1135         restore_flags(flags);
1136 }
1137
1138 static int ad1848_prepare_for_output(int dev, int bsize, int bcount)
1139 {
1140         int             timeout;
1141         unsigned char   fs, old_fs, tmp = 0;
1142         unsigned long   flags;
1143         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1144         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1145
1146         ad_mute(devc);
1147
1148         save_flags(flags);
1149         cli();
1150         fs = portc->speed_bits | (portc->format_bits << 5);
1151
1152         if (portc->channels > 1)
1153                 fs |= 0x10;
1154
1155         ad_enter_MCE(devc);     /* Enables changes to the format select reg */
1156
1157         if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE) /* Use alternate speed select registers */
1158         {
1159                 fs &= 0xf0;     /* Mask off the rate select bits */
1160
1161                 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1162                 ad_write(devc, 23, portc->speed & 0xff);        /* Speed LSB */
1163         }
1164         old_fs = ad_read(devc, 8);
1165
1166         if (devc->model == MD_4232 || devc->model >= MD_4236)
1167         {
1168                 tmp = ad_read(devc, 16);
1169                 ad_write(devc, 16, tmp | 0x30);
1170         }
1171         if (devc->model == MD_IWAVE)
1172                 ad_write(devc, 17, 0xc2);       /* Disable variable frequency select */
1173
1174         ad_write(devc, 8, fs);
1175
1176         /*
1177          * Write to I8 starts resynchronization. Wait until it completes.
1178          */
1179
1180         timeout = 0;
1181         while (timeout < 100 && inb(devc->base) != 0x80)
1182                 timeout++;
1183         timeout = 0;
1184         while (timeout < 10000 && inb(devc->base) == 0x80)
1185                 timeout++;
1186
1187         if (devc->model >= MD_4232)
1188                 ad_write(devc, 16, tmp & ~0x30);
1189
1190         ad_leave_MCE(devc);     /*
1191                                  * Starts the calibration process.
1192                                  */
1193         restore_flags(flags);
1194         devc->xfer_count = 0;
1195
1196 #ifndef EXCLUDE_TIMERS
1197         if (dev == timer_installed && devc->timer_running)
1198                 if ((fs & 0x01) != (old_fs & 0x01))
1199                 {
1200                         ad1848_tmr_reprogram(dev);
1201                 }
1202 #endif
1203         ad1848_halt_output(dev);
1204         return 0;
1205 }
1206
1207 static int ad1848_prepare_for_input(int dev, int bsize, int bcount)
1208 {
1209         int timeout;
1210         unsigned char fs, old_fs, tmp = 0;
1211         unsigned long flags;
1212         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1213         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1214
1215         if (devc->audio_mode)
1216                 return 0;
1217
1218         save_flags(flags);
1219         cli();
1220         fs = portc->speed_bits | (portc->format_bits << 5);
1221
1222         if (portc->channels > 1)
1223                 fs |= 0x10;
1224
1225         ad_enter_MCE(devc);     /* Enables changes to the format select reg */
1226
1227         if ((devc->model == MD_1845) || (devc->model == MD_1845_SSCAPE))        /* Use alternate speed select registers */
1228         {
1229                 fs &= 0xf0;     /* Mask off the rate select bits */
1230
1231                 ad_write(devc, 22, (portc->speed >> 8) & 0xff); /* Speed MSB */
1232                 ad_write(devc, 23, portc->speed & 0xff);        /* Speed LSB */
1233         }
1234         if (devc->model == MD_4232)
1235         {
1236                 tmp = ad_read(devc, 16);
1237                 ad_write(devc, 16, tmp | 0x30);
1238         }
1239         if (devc->model == MD_IWAVE)
1240                 ad_write(devc, 17, 0xc2);       /* Disable variable frequency select */
1241
1242         /*
1243          * If mode >= 2 (CS4231), set I28. It's the capture format register.
1244          */
1245
1246         if (devc->model != MD_1848)
1247         {
1248                 old_fs = ad_read(devc, 28);
1249                 ad_write(devc, 28, fs);
1250
1251                 /*
1252                  * Write to I28 starts resynchronization. Wait until it completes.
1253                  */
1254
1255                 timeout = 0;
1256                 while (timeout < 100 && inb(devc->base) != 0x80)
1257                         timeout++;
1258
1259                 timeout = 0;
1260                 while (timeout < 10000 && inb(devc->base) == 0x80)
1261                         timeout++;
1262
1263                 if (devc->model != MD_1848 && devc->model != MD_1845 && devc->model != MD_1845_SSCAPE)
1264                 {
1265                         /*
1266                          * CS4231 compatible devices don't have separate sampling rate selection
1267                          * register for recording an playback. The I8 register is shared so we have to
1268                          * set the speed encoding bits of it too.
1269                          */
1270                         unsigned char   tmp = portc->speed_bits | (ad_read(devc, 8) & 0xf0);
1271
1272                         ad_write(devc, 8, tmp);
1273                         /*
1274                          * Write to I8 starts resynchronization. Wait until it completes.
1275                          */
1276                         timeout = 0;
1277                         while (timeout < 100 && inb(devc->base) != 0x80)
1278                                 timeout++;
1279
1280                         timeout = 0;
1281                         while (timeout < 10000 && inb(devc->base) == 0x80)
1282                                 timeout++;
1283                 }
1284         }
1285         else
1286         {                       /* For AD1848 set I8. */
1287
1288                 old_fs = ad_read(devc, 8);
1289                 ad_write(devc, 8, fs);
1290                 /*
1291                  * Write to I8 starts resynchronization. Wait until it completes.
1292                  */
1293                 timeout = 0;
1294                 while (timeout < 100 && inb(devc->base) != 0x80)
1295                         timeout++;
1296                 timeout = 0;
1297                 while (timeout < 10000 && inb(devc->base) == 0x80)
1298                         timeout++;
1299         }
1300
1301         if (devc->model == MD_4232)
1302                 ad_write(devc, 16, tmp & ~0x30);
1303
1304         ad_leave_MCE(devc);     /*
1305                                  * Starts the calibration process.
1306                                  */
1307         restore_flags(flags);
1308         devc->xfer_count = 0;
1309
1310 #ifndef EXCLUDE_TIMERS
1311         if (dev == timer_installed && devc->timer_running)
1312         {
1313                 if ((fs & 0x01) != (old_fs & 0x01))
1314                 {
1315                         ad1848_tmr_reprogram(dev);
1316                 }
1317         }
1318 #endif
1319         ad1848_halt_input(dev);
1320         return 0;
1321 }
1322
1323 static void ad1848_halt(int dev)
1324 {
1325         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1326         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1327
1328         unsigned char   bits = ad_read(devc, 9);
1329
1330         if (bits & 0x01 && (portc->open_mode & OPEN_WRITE))
1331                 ad1848_halt_output(dev);
1332
1333         if (bits & 0x02 && (portc->open_mode & OPEN_READ))
1334                 ad1848_halt_input(dev);
1335         devc->audio_mode = 0;
1336 }
1337
1338 static void ad1848_halt_input(int dev)
1339 {
1340         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1341         unsigned long   flags;
1342
1343         if (!(ad_read(devc, 9) & 0x02))
1344                 return;         /* Capture not enabled */
1345
1346         save_flags(flags);
1347         cli();
1348
1349         ad_mute(devc);
1350
1351         {
1352                 int             tmout;
1353
1354                 if(!isa_dma_bridge_buggy)
1355                         disable_dma(audio_devs[dev]->dmap_in->dma);
1356
1357                 for (tmout = 0; tmout < 100000; tmout++)
1358                         if (ad_read(devc, 11) & 0x10)
1359                                 break;
1360                 ad_write(devc, 9, ad_read(devc, 9) & ~0x02);    /* Stop capture */
1361
1362                 if(!isa_dma_bridge_buggy)
1363                         enable_dma(audio_devs[dev]->dmap_in->dma);
1364                 devc->audio_mode &= ~PCM_ENABLE_INPUT;
1365         }
1366
1367         outb(0, io_Status(devc));       /* Clear interrupt status */
1368         outb(0, io_Status(devc));       /* Clear interrupt status */
1369
1370         devc->audio_mode &= ~PCM_ENABLE_INPUT;
1371
1372         restore_flags(flags);
1373 }
1374
1375 static void ad1848_halt_output(int dev)
1376 {
1377         ad1848_info *devc = (ad1848_info *) audio_devs[dev]->devc;
1378         unsigned long flags;
1379
1380         if (!(ad_read(devc, 9) & 0x01))
1381                 return;         /* Playback not enabled */
1382
1383         save_flags(flags);
1384         cli();
1385
1386         ad_mute(devc);
1387         {
1388                 int             tmout;
1389
1390                 if(!isa_dma_bridge_buggy)
1391                         disable_dma(audio_devs[dev]->dmap_out->dma);
1392
1393                 for (tmout = 0; tmout < 100000; tmout++)
1394                         if (ad_read(devc, 11) & 0x10)
1395                                 break;
1396                 ad_write(devc, 9, ad_read(devc, 9) & ~0x01);    /* Stop playback */
1397
1398                 if(!isa_dma_bridge_buggy)
1399                        enable_dma(audio_devs[dev]->dmap_out->dma);
1400
1401                 devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1402         }
1403
1404         outb((0), io_Status(devc));     /* Clear interrupt status */
1405         outb((0), io_Status(devc));     /* Clear interrupt status */
1406
1407         devc->audio_mode &= ~PCM_ENABLE_OUTPUT;
1408
1409         restore_flags(flags);
1410 }
1411
1412 static void ad1848_trigger(int dev, int state)
1413 {
1414         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1415         ad1848_port_info *portc = (ad1848_port_info *) audio_devs[dev]->portc;
1416         unsigned long   flags;
1417         unsigned char   tmp, old;
1418
1419         save_flags(flags);
1420         cli();
1421         state &= devc->audio_mode;
1422
1423         tmp = old = ad_read(devc, 9);
1424
1425         if (portc->open_mode & OPEN_READ)
1426         {
1427                   if (state & PCM_ENABLE_INPUT)
1428                           tmp |= 0x02;
1429                   else
1430                           tmp &= ~0x02;
1431         }
1432         if (portc->open_mode & OPEN_WRITE)
1433         {
1434                 if (state & PCM_ENABLE_OUTPUT)
1435                         tmp |= 0x01;
1436                 else
1437                         tmp &= ~0x01;
1438         }
1439         /* ad_mute(devc); */
1440         if (tmp != old)
1441         {
1442                   ad_write(devc, 9, tmp);
1443                   ad_unmute(devc);
1444         }
1445         restore_flags(flags);
1446 }
1447
1448 static void ad1848_init_hw(ad1848_info * devc)
1449 {
1450         int i;
1451         int *init_values;
1452
1453         /*
1454          * Initial values for the indirect registers of CS4248/AD1848.
1455          */
1456         static int      init_values_a[] =
1457         {
1458                 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1459                 0x00, 0x0c, 0x02, 0x00, 0x8a, 0x01, 0x00, 0x00,
1460
1461         /* Positions 16 to 31 just for CS4231/2 and ad1845 */
1462                 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40,
1463                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1464         };
1465
1466         static int      init_values_b[] =
1467         {
1468                 /*
1469                    Values for the newer chips
1470                    Some of the register initialization values were changed. In
1471                    order to get rid of the click that preceded PCM playback,
1472                    calibration was disabled on the 10th byte. On that same byte,
1473                    dual DMA was enabled; on the 11th byte, ADC dithering was
1474                    enabled, since that is theoretically desirable; on the 13th
1475                    byte, Mode 3 was selected, to enable access to extended
1476                    registers.
1477                  */
1478                 0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1479                 0x00, 0x00, 0x06, 0x00, 0xe0, 0x01, 0x00, 0x00,
1480                 0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x1f, 0x40,
1481                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1482         };
1483
1484         /*
1485          *      Select initialisation data
1486          */
1487
1488         init_values = init_values_a;
1489         if(devc->model >= MD_4236)
1490                 init_values = init_values_b;
1491
1492         for (i = 0; i < 16; i++)
1493                 ad_write(devc, i, init_values[i]);
1494
1495
1496         ad_mute(devc);          /* Initialize some variables */
1497         ad_unmute(devc);        /* Leave it unmuted now */
1498
1499         if (devc->model > MD_1848)
1500         {
1501                 if (devc->model == MD_1845_SSCAPE)
1502                         ad_write(devc, 12, ad_read(devc, 12) | 0x50);
1503                 else
1504                         ad_write(devc, 12, ad_read(devc, 12) | 0x40);           /* Mode2 = enabled */
1505
1506                 if (devc->model == MD_IWAVE)
1507                         ad_write(devc, 12, 0x6c);       /* Select codec mode 3 */
1508
1509                 if (devc->model != MD_1845_SSCAPE)
1510                         for (i = 16; i < 32; i++)
1511                                 ad_write(devc, i, init_values[i]);
1512
1513                 if (devc->model == MD_IWAVE)
1514                         ad_write(devc, 16, 0x30);       /* Playback and capture counters enabled */
1515         }
1516         if (devc->model > MD_1848)
1517         {
1518                 if (devc->audio_flags & DMA_DUPLEX)
1519                         ad_write(devc, 9, ad_read(devc, 9) & ~0x04);    /* Dual DMA mode */
1520                 else
1521                         ad_write(devc, 9, ad_read(devc, 9) | 0x04);     /* Single DMA mode */
1522
1523                 if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
1524                         ad_write(devc, 27, ad_read(devc, 27) | 0x08);           /* Alternate freq select enabled */
1525
1526                 if (devc->model == MD_IWAVE)
1527                 {               /* Some magic Interwave specific initialization */
1528                         ad_write(devc, 12, 0x6c);       /* Select codec mode 3 */
1529                         ad_write(devc, 16, 0x30);       /* Playback and capture counters enabled */
1530                         ad_write(devc, 17, 0xc2);       /* Alternate feature enable */
1531                 }
1532         }
1533         else
1534         {
1535                   devc->audio_flags &= ~DMA_DUPLEX;
1536                   ad_write(devc, 9, ad_read(devc, 9) | 0x04);   /* Single DMA mode */
1537                   if (soundpro)
1538                           ad_write(devc, 12, ad_read(devc, 12) | 0x40); /* Mode2 = enabled */
1539         }
1540
1541         outb((0), io_Status(devc));     /* Clear pending interrupts */
1542
1543         /*
1544          * Toggle the MCE bit. It completes the initialization phase.
1545          */
1546
1547         ad_enter_MCE(devc);     /* In case the bit was off */
1548         ad_leave_MCE(devc);
1549
1550         ad1848_mixer_reset(devc);
1551 }
1552
1553 int ad1848_detect(int io_base, int *ad_flags, int *osp)
1554 {
1555         unsigned char tmp;
1556         ad1848_info *devc = &adev_info[nr_ad1848_devs];
1557         unsigned char tmp1 = 0xff, tmp2 = 0xff;
1558         int optiC930 = 0;       /* OPTi 82C930 flag */
1559         int interwave = 0;
1560         int ad1847_flag = 0;
1561         int cs4248_flag = 0;
1562         int sscape_flag = 0;
1563
1564         int i;
1565
1566         DDB(printk("ad1848_detect(%x)\n", io_base));
1567
1568         if (ad_flags)
1569         {
1570                 if (*ad_flags == 0x12345678)
1571                 {
1572                         interwave = 1;
1573                         *ad_flags = 0;
1574                 }
1575
1576                 if (*ad_flags == 0x87654321)
1577                 {
1578                         sscape_flag = 1;
1579                         *ad_flags = 0;
1580                 }
1581
1582                 if (*ad_flags == 0x12345677)
1583                 {
1584                     cs4248_flag = 1;
1585                     *ad_flags = 0;
1586                 }
1587         }
1588         if (nr_ad1848_devs >= MAX_AUDIO_DEV)
1589         {
1590                 printk(KERN_ERR "ad1848 - Too many audio devices\n");
1591                 return 0;
1592         }
1593         if (check_region(io_base, 4))
1594         {
1595                 printk(KERN_ERR "ad1848.c: Port %x not free.\n", io_base);
1596                 return 0;
1597         }
1598         devc->base = io_base;
1599         devc->irq_ok = 0;
1600         devc->timer_running = 0;
1601         devc->MCE_bit = 0x40;
1602         devc->irq = 0;
1603         devc->open_mode = 0;
1604         devc->chip_name = devc->name = "AD1848";
1605         devc->model = MD_1848;  /* AD1848 or CS4248 */
1606         devc->levels = NULL;
1607         devc->debug_flag = 0;
1608
1609         /*
1610          * Check that the I/O address is in use.
1611          *
1612          * The bit 0x80 of the base I/O port is known to be 0 after the
1613          * chip has performed its power on initialization. Just assume
1614          * this has happened before the OS is starting.
1615          *
1616          * If the I/O address is unused, it typically returns 0xff.
1617          */
1618
1619         if (inb(devc->base) == 0xff)
1620         {
1621                 DDB(printk("ad1848_detect: The base I/O address appears to be dead\n"));
1622         }
1623
1624         /*
1625          * Wait for the device to stop initialization
1626          */
1627
1628         DDB(printk("ad1848_detect() - step 0\n"));
1629
1630         for (i = 0; i < 10000000; i++)
1631         {
1632                 unsigned char   x = inb(devc->base);
1633
1634                 if (x == 0xff || !(x & 0x80))
1635                         break;
1636         }
1637
1638         DDB(printk("ad1848_detect() - step A\n"));
1639
1640         if (inb(devc->base) == 0x80)    /* Not ready. Let's wait */
1641                 ad_leave_MCE(devc);
1642
1643         if ((inb(devc->base) & 0x80) != 0x00)   /* Not a AD1848 */
1644         {
1645                 DDB(printk("ad1848 detect error - step A (%02x)\n", (int) inb(devc->base)));
1646                 return 0;
1647         }
1648
1649         /*
1650          * Test if it's possible to change contents of the indirect registers.
1651          * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read only
1652          * so try to avoid using it.
1653          */
1654
1655         DDB(printk("ad1848_detect() - step B\n"));
1656         ad_write(devc, 0, 0xaa);
1657         ad_write(devc, 1, 0x45);        /* 0x55 with bit 0x10 clear */
1658
1659         if ((tmp1 = ad_read(devc, 0)) != 0xaa || (tmp2 = ad_read(devc, 1)) != 0x45)
1660         {
1661                 if (tmp2 == 0x65)       /* AD1847 has couple of bits hardcoded to 1 */
1662                         ad1847_flag = 1;
1663                 else
1664                 {
1665                         DDB(printk("ad1848 detect error - step B (%x/%x)\n", tmp1, tmp2));
1666                         return 0;
1667                 }
1668         }
1669         DDB(printk("ad1848_detect() - step C\n"));
1670         ad_write(devc, 0, 0x45);
1671         ad_write(devc, 1, 0xaa);
1672
1673         if ((tmp1 = ad_read(devc, 0)) != 0x45 || (tmp2 = ad_read(devc, 1)) != 0xaa)
1674         {
1675                 if (tmp2 == 0x8a)       /* AD1847 has few bits hardcoded to 1 */
1676                         ad1847_flag = 1;
1677                 else
1678                 {
1679                         DDB(printk("ad1848 detect error - step C (%x/%x)\n", tmp1, tmp2));
1680                         return 0;
1681                 }
1682         }
1683
1684         /*
1685          * The indirect register I12 has some read only bits. Let's
1686          * try to change them.
1687          */
1688
1689         DDB(printk("ad1848_detect() - step D\n"));
1690         tmp = ad_read(devc, 12);
1691         ad_write(devc, 12, (~tmp) & 0x0f);
1692
1693         if ((tmp & 0x0f) != ((tmp1 = ad_read(devc, 12)) & 0x0f))
1694         {
1695                 DDB(printk("ad1848 detect error - step D (%x)\n", tmp1));
1696                 return 0;
1697         }
1698
1699         /*
1700          * NOTE! Last 4 bits of the reg I12 tell the chip revision.
1701          *   0x01=RevB and 0x0A=RevC.
1702          */
1703
1704         /*
1705          * The original AD1848/CS4248 has just 15 indirect registers. This means
1706          * that I0 and I16 should return the same value (etc.).
1707          * However this doesn't work with CS4248. Actually it seems to be impossible
1708          * to detect if the chip is a CS4231 or CS4248.
1709          * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test fails
1710          * with CS4231.
1711          */
1712
1713         /*
1714          * OPTi 82C930 has mode2 control bit in another place. This test will fail
1715          * with it. Accept this situation as a possible indication of this chip.
1716          */
1717
1718         DDB(printk("ad1848_detect() - step F\n"));
1719         ad_write(devc, 12, 0);  /* Mode2=disabled */
1720
1721         for (i = 0; i < 16; i++)
1722         {
1723                 if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16)))
1724                 {
1725                         DDB(printk("ad1848 detect step F(%d/%x/%x) - OPTi chip???\n", i, tmp1, tmp2));
1726                         if (!ad1847_flag)
1727                                 optiC930 = 1;
1728                         break;
1729                 }
1730         }
1731
1732         /*
1733          * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit (0x40).
1734          * The bit 0x80 is always 1 in CS4248 and CS4231.
1735          */
1736
1737         DDB(printk("ad1848_detect() - step G\n"));
1738
1739         if (ad_flags && *ad_flags == 400)
1740                 *ad_flags = 0;
1741         else
1742                 ad_write(devc, 12, 0x40);       /* Set mode2, clear 0x80 */
1743
1744
1745         if (ad_flags)
1746                 *ad_flags = 0;
1747
1748         tmp1 = ad_read(devc, 12);
1749         if (tmp1 & 0x80)
1750         {
1751                 if (ad_flags)
1752                         *ad_flags |= AD_F_CS4248;
1753
1754                 devc->chip_name = "CS4248";     /* Our best knowledge just now */
1755         }
1756         if (optiC930 || (tmp1 & 0xc0) == (0x80 | 0x40))
1757         {
1758                 /*
1759                  *      CS4231 detected - is it?
1760                  *
1761                  *      Verify that setting I0 doesn't change I16.
1762                  */
1763
1764                 DDB(printk("ad1848_detect() - step H\n"));
1765                 ad_write(devc, 16, 0);  /* Set I16 to known value */
1766
1767                 ad_write(devc, 0, 0x45);
1768                 if ((tmp1 = ad_read(devc, 16)) != 0x45) /* No change -> CS4231? */
1769                 {
1770                         ad_write(devc, 0, 0xaa);
1771                         if ((tmp1 = ad_read(devc, 16)) == 0xaa) /* Rotten bits? */
1772                         {
1773                                 DDB(printk("ad1848 detect error - step H(%x)\n", tmp1));
1774                                 return 0;
1775                         }
1776
1777                         /*
1778                          * Verify that some bits of I25 are read only.
1779                          */
1780
1781                         DDB(printk("ad1848_detect() - step I\n"));
1782                         tmp1 = ad_read(devc, 25);       /* Original bits */
1783                         ad_write(devc, 25, ~tmp1);      /* Invert all bits */
1784                         if ((ad_read(devc, 25) & 0xe7) == (tmp1 & 0xe7))
1785                         {
1786                                 int id;
1787
1788                                 /*
1789                                  *      It's at least CS4231
1790                                  */
1791
1792                                 devc->chip_name = "CS4231";
1793                                 devc->model = MD_4231;
1794
1795                                 /*
1796                                  * It could be an AD1845 or CS4231A as well.
1797                                  * CS4231 and AD1845 report the same revision info in I25
1798                                  * while the CS4231A reports different.
1799                                  */
1800
1801                                 id = ad_read(devc, 25);
1802                                 if ((id & 0xe7) == 0x80)        /* Device busy??? */
1803                                         id = ad_read(devc, 25);
1804                                 if ((id & 0xe7) == 0x80)        /* Device still busy??? */
1805                                         id = ad_read(devc, 25);
1806                                 DDB(printk("ad1848_detect() - step J (%02x/%02x)\n", id, ad_read(devc, 25)));
1807
1808                                 if ((id & 0xe7) == 0x80) {
1809                                         /*
1810                                          * It must be a CS4231 or AD1845. The register I23 of
1811                                          * CS4231 is undefined and it appears to be read only.
1812                                          * AD1845 uses I23 for setting sample rate. Assume
1813                                          * the chip is AD1845 if I23 is changeable.
1814                                          */
1815
1816                                         unsigned char   tmp = ad_read(devc, 23);
1817                                         ad_write(devc, 23, ~tmp);
1818
1819                                         if (interwave)
1820                                         {
1821                                                 devc->model = MD_IWAVE;
1822                                                 devc->chip_name = "IWave";
1823                                         }
1824                                         else if (ad_read(devc, 23) != tmp)      /* AD1845 ? */
1825                                         {
1826                                                 devc->chip_name = "AD1845";
1827                                                 devc->model = MD_1845;
1828                                         }
1829                                         else if (cs4248_flag)
1830                                         {
1831                                                 if (ad_flags)
1832                                                           *ad_flags |= AD_F_CS4248;
1833                                                 devc->chip_name = "CS4248";
1834                                                 devc->model = MD_1848;
1835                                                 ad_write(devc, 12, ad_read(devc, 12) & ~0x40);  /* Mode2 off */
1836                                         }
1837                                         ad_write(devc, 23, tmp);        /* Restore */
1838                                 }
1839                                 else
1840                                 {
1841                                         switch (id & 0x1f) {
1842                                         case 3: /* CS4236/CS4235/CS42xB/CS4239 */
1843                                                 {
1844                                                         int xid;
1845                                                         ad_write(devc, 12, ad_read(devc, 12) | 0x60); /* switch to mode 3 */
1846                                                         ad_write(devc, 23, 0x9c); /* select extended register 25 */
1847                                                         xid = inb(io_Indexed_Data(devc));
1848                                                         ad_write(devc, 12, ad_read(devc, 12) & ~0x60); /* back to mode 0 */
1849                                                         switch (xid & 0x1f)
1850                                                         {
1851                                                                 case 0x00:
1852                                                                         devc->chip_name = "CS4237B(B)";
1853                                                                         devc->model = MD_42xB;
1854                                                                         break;
1855                                                                 case 0x08:
1856                                                                         /* Seems to be a 4238 ?? */
1857                                                                         devc->chip_name = "CS4238";
1858                                                                         devc->model = MD_42xB;
1859                                                                         break;
1860                                                                 case 0x09:
1861                                                                         devc->chip_name = "CS4238B";
1862                                                                         devc->model = MD_42xB;
1863                                                                         break;
1864                                                                 case 0x0b:
1865                                                                         devc->chip_name = "CS4236B";
1866                                                                         devc->model = MD_4236;
1867                                                                         break;
1868                                                                 case 0x10:
1869                                                                         devc->chip_name = "CS4237B";
1870                                                                         devc->model = MD_42xB;
1871                                                                         break;
1872                                                                 case 0x1d:
1873                                                                         devc->chip_name = "CS4235";
1874                                                                         devc->model = MD_4235;
1875                                                                         break;
1876                                                                 case 0x1e:
1877                                                                         devc->chip_name = "CS4239";
1878                                                                         devc->model = MD_4239;
1879                                                                         break;
1880                                                                 default:
1881                                                                         printk("Chip ident is %X.\n", xid&0x1F);
1882                                                                         devc->chip_name = "CS42xx";
1883                                                                         devc->model = MD_4232;
1884                                                                         break;
1885                                                         }
1886                                                 }
1887                                                 break;
1888
1889                                         case 2: /* CS4232/CS4232A */
1890                                                 devc->chip_name = "CS4232";
1891                                                 devc->model = MD_4232;
1892                                                 break;
1893
1894                                         case 0:
1895                                                 if ((id & 0xe0) == 0xa0)
1896                                                 {
1897                                                         devc->chip_name = "CS4231A";
1898                                                         devc->model = MD_4231A;
1899                                                 }
1900                                                 else
1901                                                 {
1902                                                         devc->chip_name = "CS4321";
1903                                                         devc->model = MD_4231;
1904                                                 }
1905                                                 break;
1906
1907                                         default: /* maybe */
1908                                                 DDB(printk("ad1848: I25 = %02x/%02x\n", ad_read(devc, 25), ad_read(devc, 25) & 0xe7));
1909                                                 if (optiC930)
1910                                                 {
1911                                                         devc->chip_name = "82C930";
1912                                                         devc->model = MD_C930;
1913                                                 }
1914                                                 else
1915                                                 {
1916                                                         devc->chip_name = "CS4231";
1917                                                         devc->model = MD_4231;
1918                                                 }
1919                                         }
1920                                 }
1921                         }
1922                         ad_write(devc, 25, tmp1);       /* Restore bits */
1923
1924                         DDB(printk("ad1848_detect() - step K\n"));
1925                 }
1926         } else if (tmp1 == 0x0a) {
1927                 /*
1928                  * Is it perhaps a SoundPro CMI8330?
1929                  * If so, then we should be able to change indirect registers
1930                  * greater than I15 after activating MODE2, even though reading
1931                  * back I12 does not show it.
1932                  */
1933
1934                 /*
1935                  * Let's try comparing register values
1936                  */
1937                 for (i = 0; i < 16; i++) {
1938                         if ((tmp1 = ad_read(devc, i)) != (tmp2 = ad_read(devc, i + 16))) {
1939                                 DDB(printk("ad1848 detect step H(%d/%x/%x) - SoundPro chip?\n", i, tmp1, tmp2));
1940                                 soundpro = 1;
1941                                 devc->chip_name = "SoundPro CMI 8330";
1942                                 break;
1943                         }
1944                 }
1945         }
1946
1947         DDB(printk("ad1848_detect() - step L\n"));
1948         if (ad_flags)
1949         {
1950                   if (devc->model != MD_1848)
1951                           *ad_flags |= AD_F_CS4231;
1952         }
1953         DDB(printk("ad1848_detect() - Detected OK\n"));
1954
1955         if (devc->model == MD_1848 && ad1847_flag)
1956                 devc->chip_name = "AD1847";
1957
1958
1959         if (sscape_flag == 1)
1960                 devc->model = MD_1845_SSCAPE;
1961
1962         return 1;
1963 }
1964
1965 int ad1848_init (char *name, int io_base, int irq, int dma_playback,
1966                 int dma_capture, int share_dma, int *osp, struct module *owner)
1967 {
1968         /*
1969          * NOTE! If irq < 0, there is another driver which has allocated the IRQ
1970          *   so that this driver doesn't need to allocate/deallocate it.
1971          *   The actually used IRQ is ABS(irq).
1972          */
1973
1974         int my_dev;
1975         char dev_name[100];
1976         int e;
1977
1978         ad1848_info  *devc = &adev_info[nr_ad1848_devs];
1979
1980         ad1848_port_info *portc = NULL;
1981
1982         devc->irq = (irq > 0) ? irq : 0;
1983         devc->open_mode = 0;
1984         devc->timer_ticks = 0;
1985         devc->dma1 = dma_playback;
1986         devc->dma2 = dma_capture;
1987         devc->subtype = cfg.card_subtype;
1988         devc->audio_flags = DMA_AUTOMODE;
1989         devc->playback_dev = devc->record_dev = 0;
1990         if (name != NULL)
1991                 devc->name = name;
1992
1993         if (name != NULL && name[0] != 0)
1994                 sprintf(dev_name,
1995                         "%s (%s)", name, devc->chip_name);
1996         else
1997                 sprintf(dev_name,
1998                         "Generic audio codec (%s)", devc->chip_name);
1999
2000         request_region(devc->base, 4, devc->name);
2001
2002         conf_printf2(dev_name, devc->base, devc->irq, dma_playback, dma_capture);
2003
2004         if (devc->model == MD_1848 || devc->model == MD_C930)
2005                 devc->audio_flags |= DMA_HARDSTOP;
2006
2007         if (devc->model > MD_1848)
2008         {
2009                 if (devc->dma1 == devc->dma2 || devc->dma2 == -1 || devc->dma1 == -1)
2010                         devc->audio_flags &= ~DMA_DUPLEX;
2011                 else
2012                         devc->audio_flags |= DMA_DUPLEX;
2013         }
2014
2015         portc = (ad1848_port_info *) kmalloc(sizeof(ad1848_port_info), GFP_KERNEL);
2016         if(portc==NULL)
2017                 return -1;
2018
2019         if ((my_dev = sound_install_audiodrv(AUDIO_DRIVER_VERSION,
2020                                              dev_name,
2021                                              &ad1848_audio_driver,
2022                                              sizeof(struct audio_driver),
2023                                              devc->audio_flags,
2024                                              ad_format_mask[devc->model],
2025                                              devc,
2026                                              dma_playback,
2027                                              dma_capture)) < 0)
2028         {
2029                 kfree(portc);
2030                 portc=NULL;
2031                 return -1;
2032         }
2033
2034         audio_devs[my_dev]->portc = portc;
2035         audio_devs[my_dev]->mixer_dev = -1;
2036         if (owner)
2037                 audio_devs[my_dev]->d->owner = owner;
2038         memset((char *) portc, 0, sizeof(*portc));
2039
2040         nr_ad1848_devs++;
2041
2042         devc->pmdev = pm_register(PM_ISA_DEV, my_dev, ad1848_pm_callback);
2043         if (devc->pmdev)
2044                 devc->pmdev->data = devc;
2045
2046         ad1848_init_hw(devc);
2047
2048         if (irq > 0)
2049         {
2050                 devc->dev_no = my_dev;
2051                 if (request_irq(devc->irq, adintr, 0, devc->name, (void *)my_dev) < 0)
2052                 {
2053                         printk(KERN_WARNING "ad1848: Unable to allocate IRQ\n");
2054                         /* Don't free it either then.. */
2055                         devc->irq = 0;
2056                 }
2057                 if (capabilities[devc->model].flags & CAP_F_TIMER)
2058                 {
2059 #ifndef CONFIG_SMP
2060                         int x;
2061                         unsigned char tmp = ad_read(devc, 16);
2062 #endif
2063
2064                         devc->timer_ticks = 0;
2065
2066                         ad_write(devc, 21, 0x00);       /* Timer MSB */
2067                         ad_write(devc, 20, 0x10);       /* Timer LSB */
2068 #ifndef CONFIG_SMP
2069                         ad_write(devc, 16, tmp | 0x40); /* Enable timer */
2070                         for (x = 0; x < 100000 && devc->timer_ticks == 0; x++);
2071                         ad_write(devc, 16, tmp & ~0x40);        /* Disable timer */
2072
2073                         if (devc->timer_ticks == 0)
2074                                 printk(KERN_WARNING "ad1848: Interrupt test failed (IRQ%d)\n", irq);
2075                         else
2076                         {
2077                                 DDB(printk("Interrupt test OK\n"));
2078                                 devc->irq_ok = 1;
2079                         }
2080 #else
2081                         devc->irq_ok = 1;
2082 #endif
2083                 }
2084                 else
2085                         devc->irq_ok = 1;       /* Couldn't test. assume it's OK */
2086         } else if (irq < 0)
2087                 irq2dev[-irq] = devc->dev_no = my_dev;
2088
2089 #ifndef EXCLUDE_TIMERS
2090         if ((capabilities[devc->model].flags & CAP_F_TIMER) &&
2091             devc->irq_ok)
2092                 ad1848_tmr_install(my_dev);
2093 #endif
2094
2095         if (!share_dma)
2096         {
2097                 if (sound_alloc_dma(dma_playback, devc->name))
2098                         printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_playback);
2099
2100                 if (dma_capture != dma_playback)
2101                         if (sound_alloc_dma(dma_capture, devc->name))
2102                                 printk(KERN_WARNING "ad1848.c: Can't allocate DMA%d\n", dma_capture);
2103         }
2104
2105         if ((e = sound_install_mixer(MIXER_DRIVER_VERSION,
2106                                      dev_name,
2107                                      &ad1848_mixer_operations,
2108                                      sizeof(struct mixer_operations),
2109                                      devc)) >= 0)
2110         {
2111                 audio_devs[my_dev]->mixer_dev = e;
2112                 if (owner)
2113                         mixer_devs[e]->owner = owner;
2114         }
2115         return my_dev;
2116 }
2117
2118 int ad1848_control(int cmd, int arg)
2119 {
2120         ad1848_info *devc;
2121
2122         if (nr_ad1848_devs < 1)
2123                 return -ENODEV;
2124
2125         devc = &adev_info[nr_ad1848_devs - 1];
2126
2127         switch (cmd)
2128         {
2129                 case AD1848_SET_XTAL:   /* Change clock frequency of AD1845 (only ) */
2130                         if (devc->model != MD_1845 || devc->model != MD_1845_SSCAPE)
2131                                 return -EINVAL;
2132                         ad_enter_MCE(devc);
2133                         ad_write(devc, 29, (ad_read(devc, 29) & 0x1f) | (arg << 5));
2134                         ad_leave_MCE(devc);
2135                         break;
2136
2137                 case AD1848_MIXER_REROUTE:
2138                 {
2139                         int o = (arg >> 8) & 0xff;
2140                         int n = arg & 0xff;
2141
2142                         if (o < 0 || o >= SOUND_MIXER_NRDEVICES)
2143                                 return -EINVAL;
2144
2145                         if (!(devc->supported_devices & (1 << o)) &&
2146                             !(devc->supported_rec_devices & (1 << o)))
2147                                 return -EINVAL;
2148
2149                         if (n == SOUND_MIXER_NONE)
2150                         {       /* Just hide this control */
2151                                 ad1848_mixer_set(devc, o, 0);   /* Shut up it */
2152                                 devc->supported_devices &= ~(1 << o);
2153                                 devc->supported_rec_devices &= ~(1 << o);
2154                                 break;
2155                         }
2156
2157                         /* Make the mixer control identified by o to appear as n */
2158                         if (n < 0 || n >= SOUND_MIXER_NRDEVICES)
2159                                 return -EINVAL;
2160
2161                         devc->mixer_reroute[n] = o;     /* Rename the control */
2162                         if (devc->supported_devices & (1 << o))
2163                                 devc->supported_devices |= (1 << n);
2164                         if (devc->supported_rec_devices & (1 << o))
2165                                 devc->supported_rec_devices |= (1 << n);
2166
2167                         devc->supported_devices &= ~(1 << o);
2168                         devc->supported_rec_devices &= ~(1 << o);
2169                 }
2170                 break;
2171         }
2172         return 0;
2173 }
2174
2175 void ad1848_unload(int io_base, int irq, int dma_playback, int dma_capture, int share_dma)
2176 {
2177         int i, mixer, dev = 0;
2178         ad1848_info *devc = NULL;
2179
2180         for (i = 0; devc == NULL && i < nr_ad1848_devs; i++)
2181         {
2182                 if (adev_info[i].base == io_base)
2183                 {
2184                         devc = &adev_info[i];
2185                         dev = devc->dev_no;
2186                 }
2187         }
2188
2189         if (devc != NULL)
2190         {
2191                 if(audio_devs[dev]->portc!=NULL)
2192                         kfree(audio_devs[dev]->portc);
2193                 release_region(devc->base, 4);
2194
2195                 if (!share_dma)
2196                 {
2197                         if (devc->irq > 0) /* There is no point in freeing irq, if it wasn't allocated */
2198                                 free_irq(devc->irq, (void *)devc->dev_no);
2199
2200                         sound_free_dma(dma_playback);
2201
2202                         if (dma_playback != dma_capture)
2203                                 sound_free_dma(dma_capture);
2204
2205                 }
2206                 mixer = audio_devs[devc->dev_no]->mixer_dev;
2207                 if(mixer>=0)
2208                         sound_unload_mixerdev(mixer);
2209
2210                 if (devc->pmdev)
2211                         pm_unregister(devc->pmdev);
2212
2213                 nr_ad1848_devs--;
2214                 for ( ; i < nr_ad1848_devs ; i++)
2215                         adev_info[i] = adev_info[i+1];
2216         }
2217         else
2218                 printk(KERN_ERR "ad1848: Can't find device to be unloaded. Base=%x\n", io_base);
2219 }
2220
2221 void adintr(int irq, void *dev_id, struct pt_regs *dummy)
2222 {
2223         unsigned char status;
2224         ad1848_info *devc;
2225         int dev;
2226         int alt_stat = 0xff;
2227         unsigned char c930_stat = 0;
2228         int cnt = 0;
2229
2230         dev = (int)dev_id;
2231         devc = (ad1848_info *) audio_devs[dev]->devc;
2232
2233 interrupt_again:                /* Jump back here if int status doesn't reset */
2234
2235         status = inb(io_Status(devc));
2236
2237         if (status == 0x80)
2238                 printk(KERN_DEBUG "adintr: Why?\n");
2239         if (devc->model == MD_1848)
2240                 outb((0), io_Status(devc));     /* Clear interrupt status */
2241
2242         if (status & 0x01)
2243         {
2244                 if (devc->model == MD_C930)
2245                 {               /* 82C930 has interrupt status register in MAD16 register MC11 */
2246                         unsigned long   flags;
2247
2248                         save_flags(flags);
2249                         cli();
2250
2251                         /* 0xe0e is C930 address port
2252                          * 0xe0f is C930 data port
2253                          */
2254                         outb(11, 0xe0e);
2255                         c930_stat = inb(0xe0f);
2256                         outb((~c930_stat), 0xe0f);
2257
2258                         restore_flags(flags);
2259
2260                         alt_stat = (c930_stat << 2) & 0x30;
2261                 }
2262                 else if (devc->model != MD_1848)
2263                 {
2264                         alt_stat = ad_read(devc, 24);
2265                         ad_write(devc, 24, ad_read(devc, 24) & ~alt_stat);      /* Selective ack */
2266                 }
2267
2268                 if ((devc->open_mode & OPEN_READ) && (devc->audio_mode & PCM_ENABLE_INPUT) && (alt_stat & 0x20))
2269                 {
2270                         DMAbuf_inputintr(devc->record_dev);
2271                 }
2272                 if ((devc->open_mode & OPEN_WRITE) && (devc->audio_mode & PCM_ENABLE_OUTPUT) &&
2273                       (alt_stat & 0x10))
2274                 {
2275                         DMAbuf_outputintr(devc->playback_dev, 1);
2276                 }
2277                 if (devc->model != MD_1848 && (alt_stat & 0x40))        /* Timer interrupt */
2278                 {
2279                         devc->timer_ticks++;
2280 #ifndef EXCLUDE_TIMERS
2281                         if (timer_installed == dev && devc->timer_running)
2282                                 sound_timer_interrupt();
2283 #endif
2284                 }
2285         }
2286 /*
2287  * Sometimes playback or capture interrupts occur while a timer interrupt
2288  * is being handled. The interrupt will not be retriggered if we don't
2289  * handle it now. Check if an interrupt is still pending and restart
2290  * the handler in this case.
2291  */
2292         if (inb(io_Status(devc)) & 0x01 && cnt++ < 4)
2293         {
2294                   goto interrupt_again;
2295         }
2296 }
2297
2298 /*
2299  *      Experimental initialization sequence for the integrated sound system
2300  *      of the Compaq Deskpro M.
2301  */
2302
2303 static int init_deskpro_m(struct address_info *hw_config)
2304 {
2305         unsigned char   tmp;
2306
2307         if ((tmp = inb(0xc44)) == 0xff)
2308         {
2309                 DDB(printk("init_deskpro_m: Dead port 0xc44\n"));
2310                 return 0;
2311         }
2312
2313         outb(0x10, 0xc44);
2314         outb(0x40, 0xc45);
2315         outb(0x00, 0xc46);
2316         outb(0xe8, 0xc47);
2317         outb(0x14, 0xc44);
2318         outb(0x40, 0xc45);
2319         outb(0x00, 0xc46);
2320         outb(0xe8, 0xc47);
2321         outb(0x10, 0xc44);
2322
2323         return 1;
2324 }
2325
2326 /*
2327  *      Experimental initialization sequence for the integrated sound system
2328  *      of Compaq Deskpro XL.
2329  */
2330
2331 static int init_deskpro(struct address_info *hw_config)
2332 {
2333         unsigned char   tmp;
2334
2335         if ((tmp = inb(0xc44)) == 0xff)
2336         {
2337                 DDB(printk("init_deskpro: Dead port 0xc44\n"));
2338                 return 0;
2339         }
2340         outb((tmp | 0x04), 0xc44);      /* Select bank 1 */
2341         if (inb(0xc44) != 0x04)
2342         {
2343                 DDB(printk("init_deskpro: Invalid bank1 signature in port 0xc44\n"));
2344                 return 0;
2345         }
2346         /*
2347          * OK. It looks like a Deskpro so let's proceed.
2348          */
2349
2350         /*
2351          * I/O port 0xc44 Audio configuration register.
2352          *
2353          * bits 0xc0:   Audio revision bits
2354          *              0x00 = Compaq Business Audio
2355          *              0x40 = MS Sound System Compatible (reset default)
2356          *              0x80 = Reserved
2357          *              0xc0 = Reserved
2358          * bit 0x20:    No Wait State Enable
2359          *              0x00 = Disabled (reset default, DMA mode)
2360          *              0x20 = Enabled (programmed I/O mode)
2361          * bit 0x10:    MS Sound System Decode Enable
2362          *              0x00 = Decoding disabled (reset default)
2363          *              0x10 = Decoding enabled
2364          * bit 0x08:    FM Synthesis Decode Enable
2365          *              0x00 = Decoding Disabled (reset default)
2366          *              0x08 = Decoding enabled
2367          * bit 0x04     Bank select
2368          *              0x00 = Bank 0
2369          *              0x04 = Bank 1
2370          * bits 0x03    MSS Base address
2371          *              0x00 = 0x530 (reset default)
2372          *              0x01 = 0x604
2373          *              0x02 = 0xf40
2374          *              0x03 = 0xe80
2375          */
2376
2377 #ifdef DEBUGXL
2378         /* Debug printing */
2379         printk("Port 0xc44 (before): ");
2380         outb((tmp & ~0x04), 0xc44);
2381         printk("%02x ", inb(0xc44));
2382         outb((tmp | 0x04), 0xc44);
2383         printk("%02x\n", inb(0xc44));
2384 #endif
2385
2386         /* Set bank 1 of the register */
2387         tmp = 0x58;             /* MSS Mode, MSS&FM decode enabled */
2388
2389         switch (hw_config->io_base)
2390         {
2391                 case 0x530:
2392                         tmp |= 0x00;
2393                         break;
2394                 case 0x604:
2395                         tmp |= 0x01;
2396                         break;
2397                 case 0xf40:
2398                         tmp |= 0x02;
2399                         break;
2400                 case 0xe80:
2401                         tmp |= 0x03;
2402                         break;
2403                 default:
2404                         DDB(printk("init_deskpro: Invalid MSS port %x\n", hw_config->io_base));
2405                         return 0;
2406         }
2407         outb((tmp & ~0x04), 0xc44);     /* Write to bank=0 */
2408
2409 #ifdef DEBUGXL
2410         /* Debug printing */
2411         printk("Port 0xc44 (after): ");
2412         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2413         printk("%02x ", inb(0xc44));
2414         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2415         printk("%02x\n", inb(0xc44));
2416 #endif
2417
2418         /*
2419          * I/O port 0xc45 FM Address Decode/MSS ID Register.
2420          *
2421          * bank=0, bits 0xfe:   FM synthesis Decode Compare bits 7:1 (default=0x88)
2422          * bank=0, bit 0x01:    SBIC Power Control Bit
2423          *                      0x00 = Powered up
2424          *                      0x01 = Powered down
2425          * bank=1, bits 0xfc:   MSS ID (default=0x40)
2426          */
2427
2428 #ifdef DEBUGXL
2429         /* Debug printing */
2430         printk("Port 0xc45 (before): ");
2431         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2432         printk("%02x ", inb(0xc45));
2433         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2434         printk("%02x\n", inb(0xc45));
2435 #endif
2436
2437         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2438         outb((0x88), 0xc45);    /* FM base 7:0 = 0x88 */
2439         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2440         outb((0x10), 0xc45);    /* MSS ID = 0x10 (MSS port returns 0x04) */
2441
2442 #ifdef DEBUGXL
2443         /* Debug printing */
2444         printk("Port 0xc45 (after): ");
2445         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2446         printk("%02x ", inb(0xc45));
2447         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2448         printk("%02x\n", inb(0xc45));
2449 #endif
2450
2451
2452         /*
2453          * I/O port 0xc46 FM Address Decode/Address ASIC Revision Register.
2454          *
2455          * bank=0, bits 0xff:   FM synthesis Decode Compare bits 15:8 (default=0x03)
2456          * bank=1, bits 0xff:   Audio addressing ASIC id
2457          */
2458
2459 #ifdef DEBUGXL
2460         /* Debug printing */
2461         printk("Port 0xc46 (before): ");
2462         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2463         printk("%02x ", inb(0xc46));
2464         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2465         printk("%02x\n", inb(0xc46));
2466 #endif
2467
2468         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2469         outb((0x03), 0xc46);    /* FM base 15:8 = 0x03 */
2470         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2471         outb((0x11), 0xc46);    /* ASIC ID = 0x11 */
2472
2473 #ifdef DEBUGXL
2474         /* Debug printing */
2475         printk("Port 0xc46 (after): ");
2476         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2477         printk("%02x ", inb(0xc46));
2478         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2479         printk("%02x\n", inb(0xc46));
2480 #endif
2481
2482         /*
2483          * I/O port 0xc47 FM Address Decode Register.
2484          *
2485          * bank=0, bits 0xff:   Decode enable selection for various FM address bits
2486          * bank=1, bits 0xff:   Reserved
2487          */
2488
2489 #ifdef DEBUGXL
2490         /* Debug printing */
2491         printk("Port 0xc47 (before): ");
2492         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2493         printk("%02x ", inb(0xc47));
2494         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2495         printk("%02x\n", inb(0xc47));
2496 #endif
2497
2498         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2499         outb((0x7c), 0xc47);    /* FM decode enable bits = 0x7c */
2500         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2501         outb((0x00), 0xc47);    /* Reserved bank1 = 0x00 */
2502
2503 #ifdef DEBUGXL
2504         /* Debug printing */
2505         printk("Port 0xc47 (after): ");
2506         outb((tmp & ~0x04), 0xc44);     /* Select bank=0 */
2507         printk("%02x ", inb(0xc47));
2508         outb((tmp | 0x04), 0xc44);      /* Select bank=1 */
2509         printk("%02x\n", inb(0xc47));
2510 #endif
2511
2512         /*
2513          * I/O port 0xc6f = Audio Disable Function Register
2514          */
2515
2516 #ifdef DEBUGXL
2517         printk("Port 0xc6f (before) = %02x\n", inb(0xc6f));
2518 #endif
2519
2520         outb((0x80), 0xc6f);
2521
2522 #ifdef DEBUGXL
2523         printk("Port 0xc6f (after) = %02x\n", inb(0xc6f));
2524 #endif
2525
2526         return 1;
2527 }
2528
2529 int probe_ms_sound(struct address_info *hw_config)
2530 {
2531         unsigned char   tmp;
2532
2533         DDB(printk("Entered probe_ms_sound(%x, %d)\n", hw_config->io_base, hw_config->card_subtype));
2534
2535         if (check_region(hw_config->io_base, 8))
2536         {
2537                 printk(KERN_ERR "MSS: I/O port conflict\n");
2538                 return 0;
2539         }
2540         if (hw_config->card_subtype == 1)       /* Has no IRQ/DMA registers */
2541         {
2542                 /* check_opl3(0x388, hw_config); */
2543                 return ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp);
2544         }
2545
2546         if (deskpro_xl && hw_config->card_subtype == 2) /* Compaq Deskpro XL */
2547         {
2548                 if (!init_deskpro(hw_config))
2549                         return 0;
2550         }
2551
2552         if (deskpro_m)  /* Compaq Deskpro M */
2553         {
2554                 if (!init_deskpro_m(hw_config))
2555                         return 0;
2556         }
2557
2558         /*
2559            * Check if the IO port returns valid signature. The original MS Sound
2560            * system returns 0x04 while some cards (AudioTrix Pro for example)
2561            * return 0x00 or 0x0f.
2562          */
2563
2564         if ((tmp = inb(hw_config->io_base + 3)) == 0xff)        /* Bus float */
2565         {
2566                   int             ret;
2567
2568                   DDB(printk("I/O address is inactive (%x)\n", tmp));
2569                   if (!(ret = ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp)))
2570                           return 0;
2571                   return 1;
2572         }
2573         DDB(printk("MSS signature = %x\n", tmp & 0x3f));
2574         if ((tmp & 0x3f) != 0x04 &&
2575             (tmp & 0x3f) != 0x0f &&
2576             (tmp & 0x3f) != 0x00)
2577         {
2578                 int ret;
2579
2580                 MDB(printk(KERN_ERR "No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, (int) inb(hw_config->io_base + 3)));
2581                 DDB(printk("Trying to detect codec anyway but IRQ/DMA may not work\n"));
2582                 if (!(ret = ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp)))
2583                         return 0;
2584
2585                 hw_config->card_subtype = 1;
2586                 return 1;
2587         }
2588         if ((hw_config->irq != 5)  &&
2589             (hw_config->irq != 7)  &&
2590             (hw_config->irq != 9)  &&
2591             (hw_config->irq != 10) &&
2592             (hw_config->irq != 11) &&
2593             (hw_config->irq != 12))
2594         {
2595                 printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq);
2596                 return 0;
2597         }
2598         if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3)
2599         {
2600                   printk(KERN_ERR "MSS: Bad DMA %d\n", hw_config->dma);
2601                   return 0;
2602         }
2603         /*
2604          * Check that DMA0 is not in use with a 8 bit board.
2605          */
2606
2607         if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80)
2608         {
2609                 printk(KERN_ERR "MSS: Can't use DMA0 with a 8 bit card/slot\n");
2610                 return 0;
2611         }
2612         if (hw_config->irq > 7 && hw_config->irq != 9 && inb(hw_config->io_base + 3) & 0x80)
2613         {
2614                 printk(KERN_ERR "MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
2615                 return 0;
2616         }
2617         return ad1848_detect(hw_config->io_base + 4, NULL, hw_config->osp);
2618 }
2619
2620 void attach_ms_sound(struct address_info *hw_config, struct module *owner)
2621 {
2622         static signed char interrupt_bits[12] =
2623         {
2624                 -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20
2625         };
2626         signed char     bits;
2627         char            dma2_bit = 0;
2628
2629         static char     dma_bits[4] =
2630         {
2631                 1, 2, 0, 3
2632         };
2633
2634         int config_port = hw_config->io_base + 0;
2635         int version_port = hw_config->io_base + 3;
2636         int dma = hw_config->dma;
2637         int dma2 = hw_config->dma2;
2638
2639         if (hw_config->card_subtype == 1)       /* Has no IRQ/DMA registers */
2640         {
2641                 hw_config->slots[0] = ad1848_init("MS Sound System", hw_config->io_base + 4,
2642                                                     hw_config->irq,
2643                                                     hw_config->dma,
2644                                                     hw_config->dma2, 0,
2645                                                     hw_config->osp,
2646                                                     owner);
2647                 request_region(hw_config->io_base, 4, "WSS config");
2648                 return;
2649         }
2650         /*
2651          * Set the IRQ and DMA addresses.
2652          */
2653
2654         bits = interrupt_bits[hw_config->irq];
2655         if (bits == -1)
2656         {
2657                 printk(KERN_ERR "MSS: Bad IRQ %d\n", hw_config->irq);
2658                 return;
2659         }
2660         outb((bits | 0x40), config_port);
2661         if ((inb(version_port) & 0x40) == 0)
2662                 printk(KERN_ERR "[MSS: IRQ Conflict?]\n");
2663
2664 /*
2665  * Handle the capture DMA channel
2666  */
2667
2668         if (dma2 != -1 && dma2 != dma)
2669         {
2670                 if (!((dma == 0 && dma2 == 1) ||
2671                         (dma == 1 && dma2 == 0) ||
2672                         (dma == 3 && dma2 == 0)))
2673                 {       /* Unsupported combination. Try to swap channels */
2674                         int tmp = dma;
2675
2676                         dma = dma2;
2677                         dma2 = tmp;
2678                 }
2679                 if ((dma == 0 && dma2 == 1) ||
2680                         (dma == 1 && dma2 == 0) ||
2681                         (dma == 3 && dma2 == 0))
2682                 {
2683                         dma2_bit = 0x04;        /* Enable capture DMA */
2684                 }
2685                 else
2686                 {
2687                         printk(KERN_WARNING "MSS: Invalid capture DMA\n");
2688                         dma2 = dma;
2689                 }
2690         }
2691         else
2692         {
2693                 dma2 = dma;
2694         }
2695
2696         hw_config->dma = dma;
2697         hw_config->dma2 = dma2;
2698
2699         outb((bits | dma_bits[dma] | dma2_bit), config_port);   /* Write IRQ+DMA setup */
2700
2701         hw_config->slots[0] = ad1848_init("MS Sound System", hw_config->io_base + 4,
2702                                           hw_config->irq,
2703                                           dma, dma2, 0,
2704                                           hw_config->osp,
2705                                           THIS_MODULE);
2706         request_region(hw_config->io_base, 4, "WSS config");
2707 }
2708
2709 void unload_ms_sound(struct address_info *hw_config)
2710 {
2711         ad1848_unload(hw_config->io_base + 4,
2712                       hw_config->irq,
2713                       hw_config->dma,
2714                       hw_config->dma2, 0);
2715         sound_unload_audiodev(hw_config->slots[0]);
2716         release_region(hw_config->io_base, 4);
2717 }
2718
2719 #ifndef EXCLUDE_TIMERS
2720
2721 /*
2722  * Timer stuff (for /dev/music).
2723  */
2724
2725 static unsigned int current_interval = 0;
2726
2727 static unsigned int ad1848_tmr_start(int dev, unsigned int usecs)
2728 {
2729         unsigned long   flags;
2730         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
2731         unsigned long   xtal_nsecs;     /* nanoseconds per xtal oscillator tick */
2732         unsigned long   divider;
2733
2734         save_flags(flags);
2735         cli();
2736
2737         /*
2738          * Length of the timer interval (in nanoseconds) depends on the
2739          * selected crystal oscillator. Check this from bit 0x01 of I8.
2740          *
2741          * AD1845 has just one oscillator which has cycle time of 10.050 us
2742          * (when a 24.576 MHz xtal oscillator is used).
2743          *
2744          * Convert requested interval to nanoseconds before computing
2745          * the timer divider.
2746          */
2747
2748         if (devc->model == MD_1845 || devc->model == MD_1845_SSCAPE)
2749                 xtal_nsecs = 10050;
2750         else if (ad_read(devc, 8) & 0x01)
2751                 xtal_nsecs = 9920;
2752         else
2753                 xtal_nsecs = 9969;
2754
2755         divider = (usecs * 1000 + xtal_nsecs / 2) / xtal_nsecs;
2756
2757         if (divider < 100)      /* Don't allow shorter intervals than about 1ms */
2758                 divider = 100;
2759
2760         if (divider > 65535)    /* Overflow check */
2761                 divider = 65535;
2762
2763         ad_write(devc, 21, (divider >> 8) & 0xff);      /* Set upper bits */
2764         ad_write(devc, 20, divider & 0xff);     /* Set lower bits */
2765         ad_write(devc, 16, ad_read(devc, 16) | 0x40);   /* Start the timer */
2766         devc->timer_running = 1;
2767         restore_flags(flags);
2768
2769         return current_interval = (divider * xtal_nsecs + 500) / 1000;
2770 }
2771
2772 static void ad1848_tmr_reprogram(int dev)
2773 {
2774         /*
2775          *    Audio driver has changed sampling rate so that a different xtal
2776          *      oscillator was selected. We have to reprogram the timer rate.
2777          */
2778
2779         ad1848_tmr_start(dev, current_interval);
2780         sound_timer_syncinterval(current_interval);
2781 }
2782
2783 static void ad1848_tmr_disable(int dev)
2784 {
2785         unsigned long   flags;
2786         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
2787
2788         save_flags(flags);
2789         cli();
2790         ad_write(devc, 16, ad_read(devc, 16) & ~0x40);
2791         devc->timer_running = 0;
2792         restore_flags(flags);
2793 }
2794
2795 static void ad1848_tmr_restart(int dev)
2796 {
2797         unsigned long   flags;
2798         ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
2799
2800         if (current_interval == 0)
2801                 return;
2802
2803         save_flags(flags);
2804         cli();
2805         ad_write(devc, 16, ad_read(devc, 16) | 0x40);
2806         devc->timer_running = 1;
2807         restore_flags(flags);
2808 }
2809
2810 static struct sound_lowlev_timer ad1848_tmr =
2811 {
2812         0,
2813         2,
2814         ad1848_tmr_start,
2815         ad1848_tmr_disable,
2816         ad1848_tmr_restart
2817 };
2818
2819 static int ad1848_tmr_install(int dev)
2820 {
2821         if (timer_installed != -1)
2822                 return 0;       /* Don't install another timer */
2823
2824         timer_installed = ad1848_tmr.dev = dev;
2825         sound_timer_init(&ad1848_tmr, audio_devs[dev]->name);
2826
2827         return 1;
2828 }
2829 #endif /* EXCLUDE_TIMERS */
2830
2831 static int ad1848_suspend(ad1848_info *devc)
2832 {
2833         unsigned long flags;
2834
2835         save_flags(flags);
2836         cli();
2837
2838         ad_mute(devc);
2839
2840         restore_flags(flags);
2841         return 0;
2842 }
2843
2844 static int ad1848_resume(ad1848_info *devc)
2845 {
2846         unsigned long flags;
2847         int mixer_levels[32], i;
2848
2849         save_flags(flags);
2850         cli();
2851
2852         /* Thinkpad is a bit more of PITA than normal. The BIOS tends to
2853            restore it in a different config to the one we use.  Need to
2854            fix this somehow */
2855
2856         /* store old mixer levels */
2857         memcpy(mixer_levels, devc->levels, sizeof (mixer_levels));
2858         ad1848_init_hw(devc);
2859
2860         /* restore mixer levels */
2861         for (i = 0; i < 32; i++)
2862                 ad1848_mixer_set(devc, devc->dev_no, mixer_levels[i]);
2863
2864         if (!devc->subtype) {
2865                 static signed char interrupt_bits[12] = { -1, -1, -1, -1, -1, 0x00, -1, 0x08, -1, 0x10, 0x18, 0x20 };
2866                 static char dma_bits[4] = { 1, 2, 0, 3 };
2867
2868                 signed char bits;
2869                 char dma2_bit = 0;
2870
2871                 int config_port = devc->base + 0;
2872
2873                 bits = interrupt_bits[devc->irq];
2874                 if (bits == -1) {
2875                         printk(KERN_ERR "MSS: Bad IRQ %d\n", devc->irq);
2876                         restore_flags(flags);
2877                         return -1;
2878                 }
2879
2880                 outb((bits | 0x40), config_port);
2881
2882                 if (devc->dma2 != -1 && devc->dma2 != devc->dma1)
2883                         if ( (devc->dma1 == 0 && devc->dma2 == 1) ||
2884                              (devc->dma1 == 1 && devc->dma2 == 0) ||
2885                              (devc->dma1 == 3 && devc->dma2 == 0))
2886                                 dma2_bit = 0x04;
2887
2888                 outb((bits | dma_bits[devc->dma1] | dma2_bit), config_port);
2889         }
2890
2891         restore_flags(flags);
2892         return 0;
2893 }
2894
2895 static int ad1848_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
2896 {
2897         ad1848_info *devc = dev->data;
2898         if (devc) {
2899                 DEB(printk("ad1848: pm event received: 0x%x\n", rqst));
2900
2901                 switch (rqst) {
2902                 case PM_SUSPEND:
2903                         ad1848_suspend(devc);
2904                         break;
2905                 case PM_RESUME:
2906                         ad1848_resume(devc);
2907                         break;
2908                 }
2909         }
2910         return 0;
2911 }
2912
2913
2914 EXPORT_SYMBOL(ad1848_detect);
2915 EXPORT_SYMBOL(ad1848_init);
2916 EXPORT_SYMBOL(ad1848_unload);
2917 EXPORT_SYMBOL(ad1848_control);
2918 EXPORT_SYMBOL(adintr);
2919 EXPORT_SYMBOL(probe_ms_sound);
2920 EXPORT_SYMBOL(attach_ms_sound);
2921 EXPORT_SYMBOL(unload_ms_sound);
2922
2923 static int __initdata io = -1;
2924 static int __initdata irq = -1;
2925 static int __initdata dma = -1;
2926 static int __initdata dma2 = -1;
2927 static int __initdata type = 0;
2928
2929 MODULE_PARM(io, "i");                   /* I/O for a raw AD1848 card */
2930 MODULE_PARM(irq, "i");                  /* IRQ to use */
2931 MODULE_PARM(dma, "i");                  /* First DMA channel */
2932 MODULE_PARM(dma2, "i");                 /* Second DMA channel */
2933 MODULE_PARM(type, "i");                 /* Card type */
2934 MODULE_PARM(deskpro_xl, "i");           /* Special magic for Deskpro XL boxen */
2935 MODULE_PARM(deskpro_m, "i");            /* Special magic for Deskpro M box */
2936 MODULE_PARM(soundpro, "i");             /* More special magic for SoundPro chips */
2937
2938 #if defined CONFIG_ISAPNP || defined CONFIG_ISAPNP_MODULE
2939 MODULE_PARM(isapnp,     "i");
2940 MODULE_PARM(isapnpjump, "i");
2941 MODULE_PARM(reverse,    "i");
2942 MODULE_PARM_DESC(isapnp,        "When set to 0, Plug & Play support will be disabled");
2943 MODULE_PARM_DESC(isapnpjump,    "Jumps to a specific slot in the driver's PnP table. Use the source, Luke.");
2944 MODULE_PARM_DESC(reverse,       "When set to 1, will reverse ISAPnP search order");
2945
2946 struct pci_dev  *ad1848_dev  = NULL;
2947
2948 /* Please add new entries at the end of the table */
2949 static struct {
2950         char *name;
2951         unsigned short  card_vendor, card_device,
2952                         vendor, function;
2953         short mss_io, irq, dma, dma2;   /* index into isapnp table */
2954         int type;
2955 } ad1848_isapnp_list[] __initdata = {
2956         {"CMI 8330 SoundPRO",
2957                 ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001),
2958                 ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001),
2959                 0, 0, 0,-1, 0},
2960         {"CS4232 based card",
2961                 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2962                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000),
2963                 0, 0, 0, 1, 0},
2964         {"CS4232 based card",
2965                 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2966                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100),
2967                 0, 0, 0, 1, 0},
2968         {"OPL3-SA2 WSS mode",
2969                 ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2970                 ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021),
2971                 1, 0, 0, 1, 1},
2972         {0}
2973 };
2974
2975 static struct isapnp_device_id id_table[] __devinitdata = {
2976         {       ISAPNP_VENDOR('C','M','I'), ISAPNP_DEVICE(0x0001),
2977                 ISAPNP_VENDOR('@','@','@'), ISAPNP_FUNCTION(0x0001), 0 },
2978         {       ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2979                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0000), 0 },
2980         {       ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2981                 ISAPNP_VENDOR('C','S','C'), ISAPNP_FUNCTION(0x0100), 0 },
2982         {       ISAPNP_ANY_ID, ISAPNP_ANY_ID,
2983                 ISAPNP_VENDOR('Y','M','H'), ISAPNP_FUNCTION(0x0021), 0 },
2984         {0}
2985 };
2986
2987 MODULE_DEVICE_TABLE(isapnp, id_table);
2988
2989 static struct pci_dev *activate_dev(char *devname, char *resname, struct pci_dev *dev)
2990 {
2991         int err;
2992
2993         /* Device already active? Let's use it */
2994         if(dev->active)
2995                 return(dev);
2996
2997         if((err = dev->activate(dev)) < 0) {
2998                 printk(KERN_ERR "ad1848: %s %s config failed (out of resources?)[%d]\n", devname, resname, err);
2999
3000                 dev->deactivate(dev);
3001
3002                 return(NULL);
3003         }
3004         return(dev);
3005 }
3006
3007 static struct pci_dev *ad1848_init_generic(struct pci_dev *dev, struct address_info *hw_config, int slot)
3008 {
3009         /* Configure Audio device, point ad1848_dev to device found */
3010         if((ad1848_dev = dev))
3011         {
3012                 int ret;
3013                 ret = ad1848_dev->prepare(ad1848_dev);
3014                 /* If device is active, assume configured with /proc/isapnp
3015                  * and use anyway. Some other way to check this? */
3016                 if(ret && ret != -EBUSY) {
3017                         printk(KERN_ERR "ad1848: ISAPnP found device that could not be autoconfigured.\n");
3018                         return(NULL);
3019                 }
3020                 if(ret == -EBUSY)
3021                         audio_activated = 1;
3022
3023                 if((ad1848_dev = activate_dev(ad1848_isapnp_list[slot].name, "ad1848", ad1848_dev)))
3024                 {
3025                         hw_config->io_base      = ad1848_dev->resource[ad1848_isapnp_list[slot].mss_io].start;
3026                         hw_config->irq          = ad1848_dev->irq_resource[ad1848_isapnp_list[slot].irq].start;
3027                         hw_config->dma          = ad1848_dev->dma_resource[ad1848_isapnp_list[slot].dma].start;
3028                         if(ad1848_isapnp_list[slot].dma2 != -1)
3029                                 hw_config->dma2 = ad1848_dev->dma_resource[ad1848_isapnp_list[slot].dma2].start;
3030                         else
3031                                 hw_config->dma2 = -1;
3032                         hw_config->card_subtype = ad1848_isapnp_list[slot].type;
3033                 } else
3034                         return(NULL);
3035         } else
3036                 return(NULL);
3037
3038         return(ad1848_dev);
3039 }
3040
3041 static int __init ad1848_isapnp_init(struct address_info *hw_config, struct pci_dev *dev, int slot)
3042 {
3043         char *devname = dev->name[0] ? dev->name : ad1848_isapnp_list[slot].name;
3044
3045         printk(KERN_INFO "ad1848: %s detected\n", devname);
3046
3047         /* Initialize this baby. */
3048
3049         if(ad1848_init_generic(dev, hw_config, slot)) {
3050                 /* We got it. */
3051
3052                 printk(KERN_NOTICE "ad1848: ISAPnP reports '%s' at i/o %#x, irq %d, dma %d, %d\n",
3053                        devname,
3054                        hw_config->io_base, hw_config->irq, hw_config->dma,
3055                        hw_config->dma2);
3056                 return 1;
3057         }
3058         else
3059                 printk(KERN_INFO "ad1848: Failed to initialize %s\n", devname);
3060
3061         return 0;
3062 }
3063
3064 static int __init ad1848_isapnp_probe(struct address_info *hw_config)
3065 {
3066         static int first = 1;
3067         int i;
3068
3069         /* Count entries in sb_isapnp_list */
3070         for (i = 0; ad1848_isapnp_list[i].card_vendor != 0; i++);
3071         i--;
3072
3073         /* Check and adjust isapnpjump */
3074         if( isapnpjump < 0 || isapnpjump > i) {
3075                 isapnpjump = reverse ? i : 0;
3076                 printk(KERN_ERR "ad1848: Valid range for isapnpjump is 0-%d. Adjusted to %d.\n", i, isapnpjump);
3077         }
3078
3079         if(!first || !reverse)
3080                 i = isapnpjump;
3081         first = 0;
3082         while(ad1848_isapnp_list[i].card_vendor != 0) {
3083                 static struct pci_dev *dev = NULL;
3084
3085                 while ((dev = isapnp_find_dev(NULL,
3086                                 ad1848_isapnp_list[i].vendor,
3087                                 ad1848_isapnp_list[i].function,
3088                                 NULL))) {
3089
3090                         if(ad1848_isapnp_init(hw_config, dev, i)) {
3091                                 isapnpjump = i; /* start next search from here */
3092                                 return 0;
3093                         }
3094                 }
3095                 i += reverse ? -1 : 1;
3096         }
3097
3098         return -ENODEV;
3099 }
3100 #endif
3101
3102
3103 static int __init init_ad1848(void)
3104 {
3105         printk(KERN_INFO "ad1848/cs4248 codec driver Copyright (C) by Hannu Savolainen 1993-1996\n");
3106
3107 #if defined CONFIG_ISAPNP || defined CONFIG_ISAPNP_MODULE
3108         if(isapnp && (ad1848_isapnp_probe(&cfg) < 0) ) {
3109                 printk(KERN_NOTICE "ad1848: No ISAPnP cards found, trying standard ones...\n");
3110                 isapnp = 0;
3111         }
3112 #endif
3113
3114         if(io != -1) {
3115                 if( isapnp == 0 )
3116                 {
3117                         if(irq == -1 || dma == -1) {
3118                                 printk(KERN_WARNING "ad1848: must give I/O , IRQ and DMA.\n");
3119                                 return -EINVAL;
3120                         }
3121
3122                         cfg.irq = irq;
3123                         cfg.io_base = io;
3124                         cfg.dma = dma;
3125                         cfg.dma2 = dma2;
3126                         cfg.card_subtype = type;
3127                 }
3128
3129                 if(!probe_ms_sound(&cfg))
3130                         return -ENODEV;
3131                 attach_ms_sound(&cfg, THIS_MODULE);
3132                 loaded = 1;
3133         }
3134         return 0;
3135 }
3136
3137 static void __exit cleanup_ad1848(void)
3138 {
3139         if(loaded)
3140                 unload_ms_sound(&cfg);
3141
3142 #if defined CONFIG_ISAPNP || defined CONFIG_ISAPNP_MODULE
3143         if(audio_activated)
3144                 if(ad1848_dev)
3145                         ad1848_dev->deactivate(ad1848_dev);
3146 #endif
3147 }
3148
3149 module_init(init_ad1848);
3150 module_exit(cleanup_ad1848);
3151
3152 #ifndef MODULE
3153 static int __init setup_ad1848(char *str)
3154 {
3155         /* io, irq, dma, dma2, type */
3156         int ints[6];
3157
3158         str = get_options(str, ARRAY_SIZE(ints), ints);
3159
3160         io      = ints[1];
3161         irq     = ints[2];
3162         dma     = ints[3];
3163         dma2    = ints[4];
3164         type    = ints[5];
3165
3166         return 1;
3167 }
3168
3169 __setup("ad1848=", setup_ad1848);
3170 #endif
3171 MODULE_LICENSE("GPL");