drivers/sound/es1371.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      es1371.c  --  Creative Ensoniq ES1371.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to Ensoniq
  23  *
  24  *
  25  * Module command line parameters:
  26  *   joystick must be set to the base I/O-Port to be used for
  27  *   the gameport. Legal values are 0x200, 0x208, 0x210 and 0x218.
  28  *   The gameport is mirrored eight times.
  29  *
  30  *  Supported devices:
  31  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  32  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  33  *  /dev/dsp1   additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
  34  *  /dev/midi   simple MIDI UART interface, no ioctl
  35  *
  36  *  NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
  37  *  to be done in software. That is what /dev/dac is for. By now (Q2 1998)
  38  *  there are several MIDI to PCM (WAV) packages, one of them is timidity.
  39  *
  40  *  Revision history
  41  *    04.06.1998   0.1   Initial release
  42  *                       Mixer stuff should be overhauled; especially optional AC97 mixer bits
  43  *                       should be detected. This results in strange behaviour of some mixer
  44  *                       settings, like master volume and mic.
  45  *    08.06.1998   0.2   First release using Alan Cox' soundcore instead of miscdevice
  46  *    03.08.1998   0.3   Do not include modversions.h
  47  *                       Now mixer behaviour can basically be selected between
  48  *                       "OSS documented" and "OSS actual" behaviour
  49  *    31.08.1998   0.4   Fix realplayer problems - dac.count issues
  50  *    27.10.1998   0.5   Fix joystick support
  51  *                       -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
  52  *    10.12.1998   0.6   Fix drain_dac trying to wait on not yet initialized DMA
  53  *    23.12.1998   0.7   Fix a few f_file & FMODE_ bugs
  54  *                       Don't wake up app until there are fragsize bytes to read/write
  55  *    06.01.1999   0.8   remove the silly SA_INTERRUPT flag.
  56  *                       hopefully killed the egcs section type conflict
  57  *    12.03.1999   0.9   cinfo.blocks should be reset after GETxPTR ioctl.
  58  *                       reported by Johan Maes <joma@telindus.be>
  59  *    22.03.1999   0.10  return EAGAIN instead of EBUSY when O_NONBLOCK
  60  *                       read/write cannot be executed
  61  *    07.04.1999   0.11  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  62  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  63  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  64  *                       Another Alpha fix (wait_src_ready in init routine)
  65  *                       reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
  66  *                       Note: joystick address handling might still be wrong on archs
  67  *                       other than i386
  68  *    15.06.1999   0.12  Fix bad allocation bug.
  69  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  70  *    28.06.1999   0.13  Add pci_set_master
  71  *    03.08.1999   0.14  adapt to Linus' new __setup/__initcall
  72  *                       added kernel command line option "es1371=joystickaddr"
  73  *                       removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
  74  *    10.08.1999   0.15  (Re)added S/PDIF module option for cards revision >= 4.
  75  *                       Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
  76  *                       module_init/__setup fixes
  77  *    08.16.1999   0.16  Joe Cotellese <joec@ensoniq.com>
  78  *                       Added detection for ES1371 revision ID so that we can
  79  *                       detect the ES1373 and later parts.
  80  *                       added AC97 #defines for readability
  81  *                       added a /proc file system for dumping hardware state
  82  *                       updated SRC and CODEC w/r functions to accomodate bugs
  83  *                       in some versions of the ES137x chips.
  84  *    31.08.1999   0.17  add spin_lock_init
  85  *                       replaced current->state = x with set_current_state(x)
  86  *    03.09.1999   0.18  change read semantics for MIDI to match
  87  *                       OSS more closely; remove possible wakeup race
  88  *    21.10.1999   0.19  Round sampling rates, requested by
  89  *                       Kasamatsu Kenichi <t29w0267@ip.media.kyoto-u.ac.jp>
  90  *    27.10.1999   0.20  Added SigmaTel 3D enhancement string
  91  *                       Codec ID printing changes
  92  *    28.10.1999   0.21  More waitqueue races fixed
  93  *                       Joe Cotellese <joec@ensoniq.com>
  94  *                       Changed PCI detection routine so we can more easily
  95  *                       detect ES137x chip and derivatives.
  96  *    05.01.2000   0.22  Should now work with rev7 boards; patch by
  97  *                       Eric Lemar, elemar@cs.washington.edu
  98  *    08.01.2000   0.23  Prevent some ioctl's from returning bad count values on underrun/overrun;
  99  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
 100  *    07.02.2000   0.24  Use pci_alloc_consistent and pci_register_driver
 101  *    07.02.2000   0.25  Use ac97_codec
 102  *    01.03.2000   0.26  SPDIF patch by Mikael Bouillot <mikael.bouillot@bigfoot.com>
 103  *                       Use pci_module_init
 104  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
 105  *    12.12.2000   0.28  More dma buffer initializations, patch from
 106  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
 107  *    05.01.2001   0.29  Hopefully updates will not be required anymore when Creative bumps
 108  *                       the CT5880 revision.
 109  *                       suggested by Stephan Müller <smueller@chronox.de>
 110  *    31.01.2001   0.30  Register/Unregister gameport
 111  *                       Fix SETTRIGGER non OSS API conformity
 112  *    14.07.2001   0.31  Add list of laptops needing amplifier control
 113  *    03.01.2003   0.32  open_mode fixes from Georg Acher <acher@in.tum.de>
 114  */
 115
 116 /*****************************************************************************/
 117
 118 #include <linux/version.h>
 119 #include <linux/module.h>
 120 #include <linux/string.h>
 121 #include <linux/ioport.h>
 122 #include <linux/sched.h>
 123 #include <linux/delay.h>
 124 #include <linux/sound.h>
 125 #include <linux/slab.h>
 126 #include <linux/soundcard.h>
 127 #include <linux/pci.h>
 128 #include <linux/init.h>
 129 #include <linux/poll.h>
 130 #include <linux/bitops.h>
 131 #include <linux/proc_fs.h>
 132 #include <linux/spinlock.h>
 133 #include <linux/smp_lock.h>
 134 #include <linux/ac97_codec.h>
 135 #include <linux/wrapper.h>
 136 #include <asm/io.h>
 137 #include <asm/dma.h>
 138 #include <asm/uaccess.h>
 139 #include <asm/hardirq.h>
 140 #include <linux/gameport.h>
 141
 142 /* --------------------------------------------------------------------- */
 143
 144 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 145 #define ES1371_DEBUG
 146 #define DBG(x) {}
 147 /*#define DBG(x) {x}*/
 148
 149 /* --------------------------------------------------------------------- */
 150
 151 #ifndef PCI_VENDOR_ID_ENSONIQ
 152 #define PCI_VENDOR_ID_ENSONIQ        0x1274
 153 #endif
 154
 155 #ifndef PCI_VENDOR_ID_ECTIVA
 156 #define PCI_VENDOR_ID_ECTIVA         0x1102
 157 #endif
 158
 159 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
 160 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
 161 #endif
 162
 163 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
 164 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
 165 #endif
 166
 167 #ifndef PCI_DEVICE_ID_ECTIVA_EV1938
 168 #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
 169 #endif
 170
 171 /* ES1371 chip ID */
 172 /* This is a little confusing because all ES1371 compatible chips have the
 173    same DEVICE_ID, the only thing differentiating them is the REV_ID field.
 174    This is only significant if you want to enable features on the later parts.
 175    Yes, I know it's stupid and why didn't we use the sub IDs?
 176 */
 177 #define ES1371REV_ES1373_A  0x04
 178 #define ES1371REV_ES1373_B  0x06
 179 #define ES1371REV_CT5880_A  0x07
 180 #define CT5880REV_CT5880_C  0x02
 181 #define CT5880REV_CT5880_D  0x03
 182 #define ES1371REV_ES1371_B  0x09
 183 #define EV1938REV_EV1938_A  0x00
 184 #define ES1371REV_ES1373_8  0x08
 185
 186 #define ES1371_MAGIC  ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
 187
 188 #define ES1371_EXTENT             0x40
 189 #define JOY_EXTENT                8
 190
 191 #define ES1371_REG_CONTROL        0x00
 192 #define ES1371_REG_STATUS         0x04 /* on the 5880 it is control/status */
 193 #define ES1371_REG_UART_DATA      0x08
 194 #define ES1371_REG_UART_STATUS    0x09
 195 #define ES1371_REG_UART_CONTROL   0x09
 196 #define ES1371_REG_UART_TEST      0x0a
 197 #define ES1371_REG_MEMPAGE        0x0c
 198 #define ES1371_REG_SRCONV         0x10
 199 #define ES1371_REG_CODEC          0x14
 200 #define ES1371_REG_LEGACY         0x18
 201 #define ES1371_REG_SERIAL_CONTROL 0x20
 202 #define ES1371_REG_DAC1_SCOUNT    0x24
 203 #define ES1371_REG_DAC2_SCOUNT    0x28
 204 #define ES1371_REG_ADC_SCOUNT     0x2c
 205
 206 #define ES1371_REG_DAC1_FRAMEADR  0xc30
 207 #define ES1371_REG_DAC1_FRAMECNT  0xc34
 208 #define ES1371_REG_DAC2_FRAMEADR  0xc38
 209 #define ES1371_REG_DAC2_FRAMECNT  0xc3c
 210 #define ES1371_REG_ADC_FRAMEADR   0xd30
 211 #define ES1371_REG_ADC_FRAMECNT   0xd34
 212
 213 #define ES1371_FMT_U8_MONO     0
 214 #define ES1371_FMT_U8_STEREO   1
 215 #define ES1371_FMT_S16_MONO    2
 216 #define ES1371_FMT_S16_STEREO  3
 217 #define ES1371_FMT_STEREO      1
 218 #define ES1371_FMT_S16         2
 219 #define ES1371_FMT_MASK        3
 220
 221 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 222 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 223
 224 #define CTRL_RECEN_B    0x08000000  /* 1 = don't mix analog in to digital out */
 225 #define CTRL_SPDIFEN_B  0x04000000
 226 #define CTRL_JOY_SHIFT  24
 227 #define CTRL_JOY_MASK   3
 228 #define CTRL_JOY_200    0x00000000  /* joystick base address */
 229 #define CTRL_JOY_208    0x01000000
 230 #define CTRL_JOY_210    0x02000000
 231 #define CTRL_JOY_218    0x03000000
 232 #define CTRL_GPIO_IN0   0x00100000  /* general purpose inputs/outputs */
 233 #define CTRL_GPIO_IN1   0x00200000
 234 #define CTRL_GPIO_IN2   0x00400000
 235 #define CTRL_GPIO_IN3   0x00800000
 236 #define CTRL_GPIO_OUT0  0x00010000
 237 #define CTRL_GPIO_OUT1  0x00020000
 238 #define CTRL_GPIO_OUT2  0x00040000
 239 #define CTRL_GPIO_OUT3  0x00080000
 240 #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
 241 #define CTRL_SYNCRES    0x00004000  /* AC97 warm reset */
 242 #define CTRL_ADCSTOP    0x00002000  /* stop ADC transfers */
 243 #define CTRL_PWR_INTRM  0x00001000  /* 1 = power level ints enabled */
 244 #define CTRL_M_CB       0x00000800  /* recording source: 0 = ADC, 1 = MPEG */
 245 #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
 246 #define CTRL_PDLEV0     0x00000000  /* power down level */
 247 #define CTRL_PDLEV1     0x00000100
 248 #define CTRL_PDLEV2     0x00000200
 249 #define CTRL_PDLEV3     0x00000300
 250 #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
 251 #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
 252 #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
 253 #define CTRL_ADC_EN     0x00000010  /* enable ADC */
 254 #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
 255 #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port */
 256 #define CTRL_XTALCLKDIS 0x00000002  /* 1 = disable crystal clock input */
 257 #define CTRL_PCICLKDIS  0x00000001  /* 1 = disable PCI clock distribution */
 258
 259
 260 #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
 261 #define CSTAT_5880_AC97_RST 0x20000000 /* CT5880 Reset bit */
 262 #define STAT_EN_SPDIF   0x00040000  /* enable S/PDIF circuitry */
 263 #define STAT_TS_SPDIF   0x00020000  /* test S/PDIF circuitry */
 264 #define STAT_TESTMODE   0x00010000  /* test ASIC */
 265 #define STAT_SYNC_ERR   0x00000100  /* 1 = codec sync error */
 266 #define STAT_VC         0x000000c0  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
 267 #define STAT_SH_VC      6
 268 #define STAT_MPWR       0x00000020  /* power level interrupt */
 269 #define STAT_MCCB       0x00000010  /* CCB int pending */
 270 #define STAT_UART       0x00000008  /* UART int pending */
 271 #define STAT_DAC1       0x00000004  /* DAC1 int pending */
 272 #define STAT_DAC2       0x00000002  /* DAC2 int pending */
 273 #define STAT_ADC        0x00000001  /* ADC int pending */
 274
 275 #define USTAT_RXINT     0x80        /* UART rx int pending */
 276 #define USTAT_TXINT     0x04        /* UART tx int pending */
 277 #define USTAT_TXRDY     0x02        /* UART tx ready */
 278 #define USTAT_RXRDY     0x01        /* UART rx ready */
 279
 280 #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
 281 #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
 282 #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
 283 #define UCTRL_CNTRL     0x03        /* control field */
 284 #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
 285
 286 /* sample rate converter */
 287 #define SRC_OKSTATE        1
 288
 289 #define SRC_RAMADDR_MASK   0xfe000000
 290 #define SRC_RAMADDR_SHIFT  25
 291 #define SRC_DAC1FREEZE     (1UL << 21)
 292 #define SRC_DAC2FREEZE      (1UL << 20)
 293 #define SRC_ADCFREEZE      (1UL << 19)
 294
 295
 296 #define SRC_WE             0x01000000  /* read/write control for SRC RAM */
 297 #define SRC_BUSY           0x00800000  /* SRC busy */
 298 #define SRC_DIS            0x00400000  /* 1 = disable SRC */
 299 #define SRC_DDAC1          0x00200000  /* 1 = disable accum update for DAC1 */
 300 #define SRC_DDAC2          0x00100000  /* 1 = disable accum update for DAC2 */
 301 #define SRC_DADC           0x00080000  /* 1 = disable accum update for ADC2 */
 302 #define SRC_CTLMASK        0x00780000
 303 #define SRC_RAMDATA_MASK   0x0000ffff
 304 #define SRC_RAMDATA_SHIFT  0
 305
 306 #define SRCREG_ADC      0x78
 307 #define SRCREG_DAC1     0x70
 308 #define SRCREG_DAC2     0x74
 309 #define SRCREG_VOL_ADC  0x6c
 310 #define SRCREG_VOL_DAC1 0x7c
 311 #define SRCREG_VOL_DAC2 0x7e
 312
 313 #define SRCREG_TRUNC_N     0x00
 314 #define SRCREG_INT_REGS    0x01
 315 #define SRCREG_ACCUM_FRAC  0x02
 316 #define SRCREG_VFREQ_FRAC  0x03
 317
 318 #define CODEC_PIRD        0x00800000  /* 0 = write AC97 register */
 319 #define CODEC_PIADD_MASK  0x007f0000
 320 #define CODEC_PIADD_SHIFT 16
 321 #define CODEC_PIDAT_MASK  0x0000ffff
 322 #define CODEC_PIDAT_SHIFT 0
 323
 324 #define CODEC_RDY         0x80000000  /* AC97 read data valid */
 325 #define CODEC_WIP         0x40000000  /* AC97 write in progress */
 326 #define CODEC_PORD        0x00800000  /* 0 = write AC97 register */
 327 #define CODEC_POADD_MASK  0x007f0000
 328 #define CODEC_POADD_SHIFT 16
 329 #define CODEC_PODAT_MASK  0x0000ffff
 330 #define CODEC_PODAT_SHIFT 0
 331
 332
 333 #define LEGACY_JFAST      0x80000000  /* fast joystick timing */
 334 #define LEGACY_FIRQ       0x01000000  /* force IRQ */
 335
 336 #define SCTRL_DACTEST     0x00400000  /* 1 = DAC test, test vector generation purposes */
 337 #define SCTRL_P2ENDINC    0x00380000  /*  */
 338 #define SCTRL_SH_P2ENDINC 19
 339 #define SCTRL_P2STINC     0x00070000  /*  */
 340 #define SCTRL_SH_P2STINC  16
 341 #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
 342 #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
 343 #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
 344 #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
 345 #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
 346 #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
 347 #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
 348 #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
 349 #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
 350 #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
 351 #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
 352 #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
 353 #define SCTRL_R1FMT       0x00000030  /* format mask */
 354 #define SCTRL_SH_R1FMT    4
 355 #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
 356 #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
 357 #define SCTRL_P2FMT       0x0000000c  /* format mask */
 358 #define SCTRL_SH_P2FMT    2
 359 #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
 360 #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
 361 #define SCTRL_P1FMT       0x00000003  /* format mask */
 362 #define SCTRL_SH_P1FMT    0
 363
 364
 365 /* misc stuff */
 366 #define POLL_COUNT   0x1000
 367 #define FMODE_DAC         4           /* slight misuse of mode_t */
 368
 369 /* MIDI buffer sizes */
 370
 371 #define MIDIINBUF  256
 372 #define MIDIOUTBUF 256
 373
 374 #define FMODE_MIDI_SHIFT 3
 375 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 376 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 377
 378 #define ES1371_MODULE_NAME "es1371"
 379 #define PFX ES1371_MODULE_NAME ": "
 380
 381 /* --------------------------------------------------------------------- */
 382
 383 struct es1371_state {
 384         /* magic */
 385         unsigned int magic;
 386
 387         /* list of es1371 devices */
 388         struct list_head devs;
 389
 390         /* the corresponding pci_dev structure */
 391         struct pci_dev *dev;
 392
 393         /* soundcore stuff */
 394         int dev_audio;
 395         int dev_dac;
 396         int dev_midi;
 397
 398         /* hardware resources */
 399         unsigned long io; /* long for SPARC */
 400         unsigned int irq;
 401
 402         /* PCI ID's */
 403         u16 vendor;
 404         u16 device;
 405         u8 rev; /* the chip revision */
 406
 407         /* options */
 408         int spdif_volume; /* S/PDIF output is enabled if != -1 */
 409
 410 #ifdef ES1371_DEBUG
 411         /* debug /proc entry */
 412         struct proc_dir_entry *ps;
 413 #endif /* ES1371_DEBUG */
 414
 415         struct ac97_codec codec;
 416
 417         /* wave stuff */
 418         unsigned ctrl;
 419         unsigned sctrl;
 420         unsigned dac1rate, dac2rate, adcrate;
 421
 422         spinlock_t lock;
 423         struct semaphore open_sem;
 424         mode_t open_mode;
 425         wait_queue_head_t open_wait;
 426
 427         struct dmabuf {
 428                 void *rawbuf;
 429                 dma_addr_t dmaaddr;
 430                 unsigned buforder;
 431                 unsigned numfrag;
 432                 unsigned fragshift;
 433                 unsigned hwptr, swptr;
 434                 unsigned total_bytes;
 435                 int count;
 436                 unsigned error; /* over/underrun */
 437                 wait_queue_head_t wait;
 438                 /* redundant, but makes calculations easier */
 439                 unsigned fragsize;
 440                 unsigned dmasize;
 441                 unsigned fragsamples;
 442                 /* OSS stuff */
 443                 unsigned mapped:1;
 444                 unsigned ready:1;
 445                 unsigned endcleared:1;
 446                 unsigned enabled:1;
 447                 unsigned ossfragshift;
 448                 int ossmaxfrags;
 449                 unsigned subdivision;
 450         } dma_dac1, dma_dac2, dma_adc;
 451
 452         /* midi stuff */
 453         struct {
 454                 unsigned ird, iwr, icnt;
 455                 unsigned ord, owr, ocnt;
 456                 wait_queue_head_t iwait;
 457                 wait_queue_head_t owait;
 458                 unsigned char ibuf[MIDIINBUF];
 459                 unsigned char obuf[MIDIOUTBUF];
 460         } midi;
 461
 462         struct gameport gameport;
 463         struct semaphore sem;
 464 };
 465
 466 /* --------------------------------------------------------------------- */
 467
 468 static LIST_HEAD(devs);
 469
 470 /* --------------------------------------------------------------------- */
 471
 472 static inline unsigned ld2(unsigned int x)
 473 {
 474         unsigned r = 0;
 475
 476         if (x >= 0x10000) {
 477                 x >>= 16;
 478                 r += 16;
 479         }
 480         if (x >= 0x100) {
 481                 x >>= 8;
 482                 r += 8;
 483         }
 484         if (x >= 0x10) {
 485                 x >>= 4;
 486                 r += 4;
 487         }
 488         if (x >= 4) {
 489                 x >>= 2;
 490                 r += 2;
 491         }
 492         if (x >= 2)
 493                 r++;
 494         return r;
 495 }
 496
 497 /* --------------------------------------------------------------------- */
 498
 499 static unsigned wait_src_ready(struct es1371_state *s)
 500 {
 501         unsigned int t, r;
 502
 503         for (t = 0; t < POLL_COUNT; t++) {
 504                 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
 505                         return r;
 506                 udelay(1);
 507         }
 508         printk(KERN_DEBUG PFX "sample rate converter timeout r = 0x%08x\n", r);
 509         return r;
 510 }
 511
 512 static unsigned src_read(struct es1371_state *s, unsigned reg)
 513 {
 514         unsigned int temp,i,orig;
 515
 516         /* wait for ready */
 517         temp = wait_src_ready (s);
 518
 519         /* we can only access the SRC at certain times, make sure
 520            we're allowed to before we read */
 521
 522         orig = temp;
 523         /* expose the SRC state bits */
 524         outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
 525                s->io + ES1371_REG_SRCONV);
 526
 527         /* now, wait for busy and the correct time to read */
 528         temp = wait_src_ready (s);
 529
 530         if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
 531                 /* wait for the right state */
 532                 for (i=0; i<POLL_COUNT; i++){
 533                         temp = inl (s->io + ES1371_REG_SRCONV);
 534                         if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
 535                                 break;
 536                 }
 537         }
 538
 539         /* hide the state bits */
 540         outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
 541         return temp;
 542
 543
 544 }
 545
 546 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
 547 {
 548
 549         unsigned int r;
 550
 551         r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
 552         r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
 553         r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
 554         outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
 555
 556 }
 557
 558 /* --------------------------------------------------------------------- */
 559
 560 /* most of the following here is black magic */
 561 static void set_adc_rate(struct es1371_state *s, unsigned rate)
 562 {
 563         unsigned long flags;
 564         unsigned int n, truncm, freq;
 565
 566         if (rate > 48000)
 567                 rate = 48000;
 568         if (rate < 4000)
 569                 rate = 4000;
 570         n = rate / 3000;
 571         if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
 572                 n--;
 573         truncm = (21 * n - 1) | 1;
 574         freq = ((48000UL << 15) / rate) * n;
 575         s->adcrate = (48000UL << 15) / (freq / n);
 576         spin_lock_irqsave(&s->lock, flags);
 577         if (rate >= 24000) {
 578                 if (truncm > 239)
 579                         truncm = 239;
 580                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 581                           (((239 - truncm) >> 1) << 9) | (n << 4));
 582         } else {
 583                 if (truncm > 119)
 584                         truncm = 119;
 585                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 586                           0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
 587         }
 588         src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
 589                   (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
 590                   ((freq >> 5) & 0xfc00));
 591         src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 592         src_write(s, SRCREG_VOL_ADC, n << 8);
 593         src_write(s, SRCREG_VOL_ADC+1, n << 8);
 594         spin_unlock_irqrestore(&s->lock, flags);
 595 }
 596
 597
 598 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
 599 {
 600         unsigned long flags;
 601         unsigned int freq, r;
 602
 603         if (rate > 48000)
 604                 rate = 48000;
 605         if (rate < 4000)
 606                 rate = 4000;
 607         freq = ((rate << 15) + 1500) / 3000;
 608         s->dac1rate = (freq * 3000 + 16384) >> 15;
 609         spin_lock_irqsave(&s->lock, flags);
 610         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
 611         outl(r, s->io + ES1371_REG_SRCONV);
 612         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
 613                   (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
 614                   ((freq >> 5) & 0xfc00));
 615         src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 616         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
 617         outl(r, s->io + ES1371_REG_SRCONV);
 618         spin_unlock_irqrestore(&s->lock, flags);
 619 }
 620
 621 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
 622 {
 623         unsigned long flags;
 624         unsigned int freq, r;
 625
 626         if (rate > 48000)
 627                 rate = 48000;
 628         if (rate < 4000)
 629                 rate = 4000;
 630         freq = ((rate << 15) + 1500) / 3000;
 631         s->dac2rate = (freq * 3000 + 16384) >> 15;
 632         spin_lock_irqsave(&s->lock, flags);
 633         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
 634         outl(r, s->io + ES1371_REG_SRCONV);
 635         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
 636                   (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
 637                   ((freq >> 5) & 0xfc00));
 638         src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 639         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
 640         outl(r, s->io + ES1371_REG_SRCONV);
 641         spin_unlock_irqrestore(&s->lock, flags);
 642 }
 643
 644 /* --------------------------------------------------------------------- */
 645
 646 static void __init src_init(struct es1371_state *s)
 647 {
 648         unsigned int i;
 649
 650         /* before we enable or disable the SRC we need
 651            to wait for it to become ready */
 652         wait_src_ready(s);
 653
 654         outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
 655
 656         for (i = 0; i < 0x80; i++)
 657                 src_write(s, i, 0);
 658
 659         src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
 660         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
 661         src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
 662         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
 663         src_write(s, SRCREG_VOL_ADC, 1 << 12);
 664         src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
 665         src_write(s, SRCREG_VOL_DAC1, 1 << 12);
 666         src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
 667         src_write(s, SRCREG_VOL_DAC2, 1 << 12);
 668         src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
 669         set_adc_rate(s, 22050);
 670         set_dac1_rate(s, 22050);
 671         set_dac2_rate(s, 22050);
 672
 673         /* WARNING:
 674          * enabling the sample rate converter without properly programming
 675          * its parameters causes the chip to lock up (the SRC busy bit will
 676          * be stuck high, and I've found no way to rectify this other than
 677          * power cycle)
 678          */
 679         wait_src_ready(s);
 680         outl(0, s->io+ES1371_REG_SRCONV);
 681 }
 682
 683 /* --------------------------------------------------------------------- */
 684
 685 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 686 {
 687         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 688         unsigned long flags;
 689         unsigned t, x;
 690
 691         for (t = 0; t < POLL_COUNT; t++)
 692                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 693                         break;
 694         spin_lock_irqsave(&s->lock, flags);
 695
 696         /* save the current state for later */
 697         x = wait_src_ready(s);
 698
 699         /* enable SRC state data in SRC mux */
 700         outl((x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
 701              s->io+ES1371_REG_SRCONV);
 702
 703         /* wait for not busy (state 0) first to avoid
 704            transition states */
 705         for (t=0; t<POLL_COUNT; t++){
 706                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 707                     break;
 708                 udelay(1);
 709         }
 710
 711         /* wait for a SAFE time to write addr/data and then do it, dammit */
 712         for (t=0; t<POLL_COUNT; t++){
 713                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 714                     break;
 715                 udelay(1);
 716         }
 717
 718         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
 719              ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
 720
 721         /* restore SRC reg */
 722         wait_src_ready(s);
 723         outl(x, s->io+ES1371_REG_SRCONV);
 724         spin_unlock_irqrestore(&s->lock, flags);
 725 }
 726
 727 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 728 {
 729         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 730         unsigned long flags;
 731         unsigned t, x;
 732
 733         /* wait for WIP to go away */
 734         for (t = 0; t < 0x1000; t++)
 735                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 736                         break;
 737         spin_lock_irqsave(&s->lock, flags);
 738
 739         /* save the current state for later */
 740         x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
 741
 742         /* enable SRC state data in SRC mux */
 743         outl( x | 0x00010000,
 744               s->io+ES1371_REG_SRCONV);
 745
 746         /* wait for not busy (state 0) first to avoid
 747            transition states */
 748         for (t=0; t<POLL_COUNT; t++){
 749                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 750                     break;
 751                 udelay(1);
 752         }
 753
 754         /* wait for a SAFE time to write addr/data and then do it, dammit */
 755         for (t=0; t<POLL_COUNT; t++){
 756                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 757                     break;
 758                 udelay(1);
 759         }
 760
 761         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
 762         /* restore SRC reg */
 763         wait_src_ready(s);
 764         outl(x, s->io+ES1371_REG_SRCONV);
 765         spin_unlock_irqrestore(&s->lock, flags);
 766
 767         /* wait for WIP again */
 768         for (t = 0; t < 0x1000; t++)
 769                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 770                         break;
 771
 772         /* now wait for the stinkin' data (RDY) */
 773         for (t = 0; t < POLL_COUNT; t++)
 774                 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
 775                         break;
 776
 777         return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
 778 }
 779
 780 /* --------------------------------------------------------------------- */
 781
 782 static inline void stop_adc(struct es1371_state *s)
 783 {
 784         unsigned long flags;
 785
 786         spin_lock_irqsave(&s->lock, flags);
 787         s->ctrl &= ~CTRL_ADC_EN;
 788         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 789         spin_unlock_irqrestore(&s->lock, flags);
 790 }
 791
 792 static inline void stop_dac1(struct es1371_state *s)
 793 {
 794         unsigned long flags;
 795
 796         spin_lock_irqsave(&s->lock, flags);
 797         s->ctrl &= ~CTRL_DAC1_EN;
 798         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 799         spin_unlock_irqrestore(&s->lock, flags);
 800 }
 801
 802 static inline void stop_dac2(struct es1371_state *s)
 803 {
 804         unsigned long flags;
 805
 806         spin_lock_irqsave(&s->lock, flags);
 807         s->ctrl &= ~CTRL_DAC2_EN;
 808         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 809         spin_unlock_irqrestore(&s->lock, flags);
 810 }
 811
 812 static void start_dac1(struct es1371_state *s)
 813 {
 814         unsigned long flags;
 815         unsigned fragremain, fshift;
 816
 817         spin_lock_irqsave(&s->lock, flags);
 818         if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
 819             && s->dma_dac1.ready) {
 820                 s->ctrl |= CTRL_DAC1_EN;
 821                 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
 822                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 823                 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
 824                 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
 825                 if (fragremain < 2*fshift)
 826                         fragremain = s->dma_dac1.fragsize;
 827                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 828                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 829                 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 830         }
 831         spin_unlock_irqrestore(&s->lock, flags);
 832 }
 833
 834 static void start_dac2(struct es1371_state *s)
 835 {
 836         unsigned long flags;
 837         unsigned fragremain, fshift;
 838
 839         spin_lock_irqsave(&s->lock, flags);
 840         if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
 841             && s->dma_dac2.ready) {
 842                 s->ctrl |= CTRL_DAC2_EN;
 843                 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
 844                                          SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
 845                         (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
 846                         (0 << SCTRL_SH_P2STINC);
 847                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 848                 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
 849                 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
 850                 if (fragremain < 2*fshift)
 851                         fragremain = s->dma_dac2.fragsize;
 852                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 853                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 854                 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 855         }
 856         spin_unlock_irqrestore(&s->lock, flags);
 857 }
 858
 859 static void start_adc(struct es1371_state *s)
 860 {
 861         unsigned long flags;
 862         unsigned fragremain, fshift;
 863
 864         spin_lock_irqsave(&s->lock, flags);
 865         if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 866             && s->dma_adc.ready) {
 867                 s->ctrl |= CTRL_ADC_EN;
 868                 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
 869                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 870                 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
 871                 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
 872                 if (fragremain < 2*fshift)
 873                         fragremain = s->dma_adc.fragsize;
 874                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 875                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 876                 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 877         }
 878         spin_unlock_irqrestore(&s->lock, flags);
 879 }
 880
 881 /* --------------------------------------------------------------------- */
 882
 883 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 884 #define DMABUF_MINORDER 1
 885
 886
 887 static inline void dealloc_dmabuf(struct es1371_state *s, struct dmabuf *db)
 888 {
 889         struct page *page, *pend;
 890
 891         if (db->rawbuf) {
 892                 /* undo marking the pages as reserved */
 893                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 894                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 895                         mem_map_unreserve(page);
 896                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 897         }
 898         db->rawbuf = NULL;
 899         db->mapped = db->ready = 0;
 900 }
 901
 902 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
 903 {
 904         int order;
 905         unsigned bytepersec;
 906         unsigned bufs;
 907         struct page *page, *pend;
 908
 909         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 910         if (!db->rawbuf) {
 911                 db->ready = db->mapped = 0;
 912                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 913                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 914                                 break;
 915                 if (!db->rawbuf)
 916                         return -ENOMEM;
 917                 db->buforder = order;
 918                 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 919                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 920                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 921                         mem_map_reserve(page);
 922         }
 923         fmt &= ES1371_FMT_MASK;
 924         bytepersec = rate << sample_shift[fmt];
 925         bufs = PAGE_SIZE << db->buforder;
 926         if (db->ossfragshift) {
 927                 if ((1000 << db->ossfragshift) < bytepersec)
 928                         db->fragshift = ld2(bytepersec/1000);
 929                 else
 930                         db->fragshift = db->ossfragshift;
 931         } else {
 932                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 933                 if (db->fragshift < 3)
 934                         db->fragshift = 3;
 935         }
 936         db->numfrag = bufs >> db->fragshift;
 937         while (db->numfrag < 4 && db->fragshift > 3) {
 938                 db->fragshift--;
 939                 db->numfrag = bufs >> db->fragshift;
 940         }
 941         db->fragsize = 1 << db->fragshift;
 942         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 943                 db->numfrag = db->ossmaxfrags;
 944         db->fragsamples = db->fragsize >> sample_shift[fmt];
 945         db->dmasize = db->numfrag << db->fragshift;
 946         memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
 947         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 948         outl(db->dmaaddr, s->io+(reg & 0xff));
 949         outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
 950         db->enabled = 1;
 951         db->ready = 1;
 952         return 0;
 953 }
 954
 955 static inline int prog_dmabuf_adc(struct es1371_state *s)
 956 {
 957         stop_adc(s);
 958         return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
 959                            ES1371_REG_ADC_FRAMEADR);
 960 }
 961
 962 static inline int prog_dmabuf_dac2(struct es1371_state *s)
 963 {
 964         stop_dac2(s);
 965         return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
 966                            ES1371_REG_DAC2_FRAMEADR);
 967 }
 968
 969 static inline int prog_dmabuf_dac1(struct es1371_state *s)
 970 {
 971         stop_dac1(s);
 972         return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
 973                            ES1371_REG_DAC1_FRAMEADR);
 974 }
 975
 976 static inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
 977 {
 978         unsigned hwptr, diff;
 979
 980         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 981         hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
 982         diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
 983         db->hwptr = hwptr;
 984         return diff;
 985 }
 986
 987 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 988 {
 989         if (bptr + len > bsize) {
 990                 unsigned x = bsize - bptr;
 991                 memset(((char *)buf) + bptr, c, x);
 992                 bptr = 0;
 993                 len -= x;
 994         }
 995         memset(((char *)buf) + bptr, c, len);
 996 }
 997
 998 /* call with spinlock held! */
 999 static void es1371_update_ptr(struct es1371_state *s)
1000 {
1001         int diff;
1002
1003         /* update ADC pointer */
1004         if (s->ctrl & CTRL_ADC_EN) {
1005                 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
1006                 s->dma_adc.total_bytes += diff;
1007                 s->dma_adc.count += diff;
1008                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1009                         wake_up(&s->dma_adc.wait);
1010                 if (!s->dma_adc.mapped) {
1011                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1012                                 s->ctrl &= ~CTRL_ADC_EN;
1013                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1014                                 s->dma_adc.error++;
1015                         }
1016                 }
1017         }
1018         /* update DAC1 pointer */
1019         if (s->ctrl & CTRL_DAC1_EN) {
1020                 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1021                 s->dma_dac1.total_bytes += diff;
1022                 if (s->dma_dac1.mapped) {
1023                         s->dma_dac1.count += diff;
1024                         if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1025                                 wake_up(&s->dma_dac1.wait);
1026                 } else {
1027                         s->dma_dac1.count -= diff;
1028                         if (s->dma_dac1.count <= 0) {
1029                                 s->ctrl &= ~CTRL_DAC1_EN;
1030                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1031                                 s->dma_dac1.error++;
1032                         } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1033                                 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1034                                               s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1035                                 s->dma_dac1.endcleared = 1;
1036                         }
1037                         if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1038                                 wake_up(&s->dma_dac1.wait);
1039                 }
1040         }
1041         /* update DAC2 pointer */
1042         if (s->ctrl & CTRL_DAC2_EN) {
1043                 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1044                 s->dma_dac2.total_bytes += diff;
1045                 if (s->dma_dac2.mapped) {
1046                         s->dma_dac2.count += diff;
1047                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1048                                 wake_up(&s->dma_dac2.wait);
1049                 } else {
1050                         s->dma_dac2.count -= diff;
1051                         if (s->dma_dac2.count <= 0) {
1052                                 s->ctrl &= ~CTRL_DAC2_EN;
1053                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1054                                 s->dma_dac2.error++;
1055                         } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1056                                 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1057                                               s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1058                                 s->dma_dac2.endcleared = 1;
1059                         }
1060                         if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1061                                 wake_up(&s->dma_dac2.wait);
1062                 }
1063         }
1064 }
1065
1066 /* hold spinlock for the following! */
1067 static void es1371_handle_midi(struct es1371_state *s)
1068 {
1069         unsigned char ch;
1070         int wake;
1071
1072         if (!(s->ctrl & CTRL_UART_EN))
1073                 return;
1074         wake = 0;
1075         while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1076                 ch = inb(s->io+ES1371_REG_UART_DATA);
1077                 if (s->midi.icnt < MIDIINBUF) {
1078                         s->midi.ibuf[s->midi.iwr] = ch;
1079                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1080                         s->midi.icnt++;
1081                 }
1082                 wake = 1;
1083         }
1084         if (wake)
1085                 wake_up(&s->midi.iwait);
1086         wake = 0;
1087         while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1088                 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1089                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1090                 s->midi.ocnt--;
1091                 if (s->midi.ocnt < MIDIOUTBUF-16)
1092                         wake = 1;
1093         }
1094         if (wake)
1095                 wake_up(&s->midi.owait);
1096         outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1097 }
1098
1099 static void es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1100 {
1101         struct es1371_state *s = (struct es1371_state *)dev_id;
1102         unsigned int intsrc, sctl;
1103
1104         /* fastpath out, to ease interrupt sharing */
1105         intsrc = inl(s->io+ES1371_REG_STATUS);
1106         if (!(intsrc & 0x80000000))
1107                 return;
1108         spin_lock(&s->lock);
1109         /* clear audio interrupts first */
1110         sctl = s->sctrl;
1111         if (intsrc & STAT_ADC)
1112                 sctl &= ~SCTRL_R1INTEN;
1113         if (intsrc & STAT_DAC1)
1114                 sctl &= ~SCTRL_P1INTEN;
1115         if (intsrc & STAT_DAC2)
1116                 sctl &= ~SCTRL_P2INTEN;
1117         outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1118         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1119         es1371_update_ptr(s);
1120         es1371_handle_midi(s);
1121         spin_unlock(&s->lock);
1122 }
1123
1124 /* --------------------------------------------------------------------- */
1125
1126 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value\n";
1127
1128 #define VALIDATE_STATE(s)                         \
1129 ({                                                \
1130         if (!(s) || (s)->magic != ES1371_MAGIC) { \
1131                 printk(invalid_magic);            \
1132                 return -ENXIO;                    \
1133         }                                         \
1134 })
1135
1136 /* --------------------------------------------------------------------- */
1137
1138 /* Conversion table for S/PDIF PCM volume emulation through the SRC */
1139 /* dB-linear table of DAC vol values; -0dB to -46.5dB with mute */
1140 static const unsigned short DACVolTable[101] =
1141 {
1142         0x1000, 0x0f2a, 0x0e60, 0x0da0, 0x0cea, 0x0c3e, 0x0b9a, 0x0aff,
1143         0x0a6d, 0x09e1, 0x095e, 0x08e1, 0x086a, 0x07fa, 0x078f, 0x072a,
1144         0x06cb, 0x0670, 0x061a, 0x05c9, 0x057b, 0x0532, 0x04ed, 0x04ab,
1145         0x046d, 0x0432, 0x03fa, 0x03c5, 0x0392, 0x0363, 0x0335, 0x030b,
1146         0x02e2, 0x02bc, 0x0297, 0x0275, 0x0254, 0x0235, 0x0217, 0x01fb,
1147         0x01e1, 0x01c8, 0x01b0, 0x0199, 0x0184, 0x0170, 0x015d, 0x014b,
1148         0x0139, 0x0129, 0x0119, 0x010b, 0x00fd, 0x00f0, 0x00e3, 0x00d7,
1149         0x00cc, 0x00c1, 0x00b7, 0x00ae, 0x00a5, 0x009c, 0x0094, 0x008c,
1150         0x0085, 0x007e, 0x0077, 0x0071, 0x006b, 0x0066, 0x0060, 0x005b,
1151         0x0057, 0x0052, 0x004e, 0x004a, 0x0046, 0x0042, 0x003f, 0x003c,
1152         0x0038, 0x0036, 0x0033, 0x0030, 0x002e, 0x002b, 0x0029, 0x0027,
1153         0x0025, 0x0023, 0x0021, 0x001f, 0x001e, 0x001c, 0x001b, 0x0019,
1154         0x0018, 0x0017, 0x0016, 0x0014, 0x0000
1155 };
1156
1157 /*
1158  * when we are in S/PDIF mode, we want to disable any analog output so
1159  * we filter the mixer ioctls
1160  */
1161 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
1162 {
1163         struct es1371_state *s = (struct es1371_state *)codec->private_data;
1164         int val;
1165         unsigned long flags;
1166         unsigned int left, right;
1167
1168         VALIDATE_STATE(s);
1169         /* filter mixer ioctls to catch PCM and MASTER volume when in S/PDIF mode */
1170         if (s->spdif_volume == -1)
1171                 return codec->mixer_ioctl(codec, cmd, arg);
1172         switch (cmd) {
1173         case SOUND_MIXER_WRITE_VOLUME:
1174                 return 0;
1175
1176         case SOUND_MIXER_WRITE_PCM:   /* use SRC for PCM volume */
1177                 if (get_user(val, (int *)arg))
1178                         return -EFAULT;
1179                 right = ((val >> 8)  & 0xff);
1180                 left = (val  & 0xff);
1181                 if (right > 100)
1182                         right = 100;
1183                 if (left > 100)
1184                         left = 100;
1185                 s->spdif_volume = (right << 8) | left;
1186                 spin_lock_irqsave(&s->lock, flags);
1187                 src_write(s, SRCREG_VOL_DAC2, DACVolTable[100 - left]);
1188                 src_write(s, SRCREG_VOL_DAC2+1, DACVolTable[100 - right]);
1189                 spin_unlock_irqrestore(&s->lock, flags);
1190                 return 0;
1191
1192         case SOUND_MIXER_READ_PCM:
1193                 return put_user(s->spdif_volume, (int *)arg);
1194         }
1195         return codec->mixer_ioctl(codec, cmd, arg);
1196 }
1197
1198 /* --------------------------------------------------------------------- */
1199
1200 /*
1201  * AC97 Mixer Register to Connections mapping of the Concert 97 board
1202  *
1203  * AC97_MASTER_VOL_STEREO   Line Out
1204  * AC97_MASTER_VOL_MONO     TAD Output
1205  * AC97_PCBEEP_VOL          none
1206  * AC97_PHONE_VOL           TAD Input (mono)
1207  * AC97_MIC_VOL             MIC Input (mono)
1208  * AC97_LINEIN_VOL          Line Input (stereo)
1209  * AC97_CD_VOL              CD Input (stereo)
1210  * AC97_VIDEO_VOL           none
1211  * AC97_AUX_VOL             Aux Input (stereo)
1212  * AC97_PCMOUT_VOL          Wave Output (stereo)
1213  */
1214
1215 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1216 {
1217         int minor = MINOR(inode->i_rdev);
1218         struct list_head *list;
1219         struct es1371_state *s;
1220
1221         for (list = devs.next; ; list = list->next) {
1222                 if (list == &devs)
1223                         return -ENODEV;
1224                 s = list_entry(list, struct es1371_state, devs);
1225                 if (s->codec.dev_mixer == minor)
1226                         break;
1227         }
1228         VALIDATE_STATE(s);
1229         file->private_data = s;
1230         return 0;
1231 }
1232
1233 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1234 {
1235         struct es1371_state *s = (struct es1371_state *)file->private_data;
1236
1237         VALIDATE_STATE(s);
1238         return 0;
1239 }
1240
1241 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1242 {
1243         struct es1371_state *s = (struct es1371_state *)file->private_data;
1244         struct ac97_codec *codec = &s->codec;
1245
1246         return mixdev_ioctl(codec, cmd, arg);
1247 }
1248
1249 static /*const*/ struct file_operations es1371_mixer_fops = {
1250         owner:          THIS_MODULE,
1251         llseek:         no_llseek,
1252         ioctl:          es1371_ioctl_mixdev,
1253         open:           es1371_open_mixdev,
1254         release:        es1371_release_mixdev,
1255 };
1256
1257 /* --------------------------------------------------------------------- */
1258
1259 static int drain_dac1(struct es1371_state *s, int nonblock)
1260 {
1261         DECLARE_WAITQUEUE(wait, current);
1262         unsigned long flags;
1263         int count, tmo;
1264
1265         if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1266                 return 0;
1267         add_wait_queue(&s->dma_dac1.wait, &wait);
1268         for (;;) {
1269                 __set_current_state(TASK_INTERRUPTIBLE);
1270                 spin_lock_irqsave(&s->lock, flags);
1271                 count = s->dma_dac1.count;
1272                 spin_unlock_irqrestore(&s->lock, flags);
1273                 if (count <= 0)
1274                         break;
1275                 if (signal_pending(current))
1276                         break;
1277                 if (nonblock) {
1278                         remove_wait_queue(&s->dma_dac1.wait, &wait);
1279                         set_current_state(TASK_RUNNING);
1280                         return -EBUSY;
1281                 }
1282                 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1283                 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1284                 if (!schedule_timeout(tmo + 1))
1285                         DBG(printk(KERN_DEBUG PFX "dac1 dma timed out??\n");)
1286         }
1287         remove_wait_queue(&s->dma_dac1.wait, &wait);
1288         set_current_state(TASK_RUNNING);
1289         if (signal_pending(current))
1290                 return -ERESTARTSYS;
1291         return 0;
1292 }
1293
1294 static int drain_dac2(struct es1371_state *s, int nonblock)
1295 {
1296         DECLARE_WAITQUEUE(wait, current);
1297         unsigned long flags;
1298         int count, tmo;
1299
1300         if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1301                 return 0;
1302         add_wait_queue(&s->dma_dac2.wait, &wait);
1303         for (;;) {
1304                 __set_current_state(TASK_UNINTERRUPTIBLE);
1305                 spin_lock_irqsave(&s->lock, flags);
1306                 count = s->dma_dac2.count;
1307                 spin_unlock_irqrestore(&s->lock, flags);
1308                 if (count <= 0)
1309                         break;
1310                 if (signal_pending(current))
1311                         break;
1312                 if (nonblock) {
1313                         remove_wait_queue(&s->dma_dac2.wait, &wait);
1314                         set_current_state(TASK_RUNNING);
1315                         return -EBUSY;
1316                 }
1317                 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1318                 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1319                 if (!schedule_timeout(tmo + 1))
1320                         DBG(printk(KERN_DEBUG PFX "dac2 dma timed out??\n");)
1321         }
1322         remove_wait_queue(&s->dma_dac2.wait, &wait);
1323         set_current_state(TASK_RUNNING);
1324         if (signal_pending(current))
1325                 return -ERESTARTSYS;
1326         return 0;
1327 }
1328
1329 /* --------------------------------------------------------------------- */
1330
1331 static ssize_t es1371_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1332 {
1333         struct es1371_state *s = (struct es1371_state *)file->private_data;
1334         DECLARE_WAITQUEUE(wait, current);
1335         ssize_t ret = 0;
1336         unsigned long flags;
1337         unsigned swptr;
1338         int cnt;
1339
1340         VALIDATE_STATE(s);
1341         if (ppos != &file->f_pos)
1342                 return -ESPIPE;
1343         if (s->dma_adc.mapped)
1344                 return -ENXIO;
1345         if (!access_ok(VERIFY_WRITE, buffer, count))
1346                 return -EFAULT;
1347         down(&s->sem);
1348         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1349                 goto out2;
1350
1351         add_wait_queue(&s->dma_adc.wait, &wait);
1352         while (count > 0) {
1353                 spin_lock_irqsave(&s->lock, flags);
1354                 swptr = s->dma_adc.swptr;
1355                 cnt = s->dma_adc.dmasize-swptr;
1356                 if (s->dma_adc.count < cnt)
1357                         cnt = s->dma_adc.count;
1358                 if (cnt <= 0)
1359                         __set_current_state(TASK_INTERRUPTIBLE);
1360                 spin_unlock_irqrestore(&s->lock, flags);
1361                 if (cnt > count)
1362                         cnt = count;
1363                 if (cnt <= 0) {
1364                         if (s->dma_adc.enabled)
1365                                 start_adc(s);
1366                         if (file->f_flags & O_NONBLOCK) {
1367                                 if (!ret)
1368                                         ret = -EAGAIN;
1369                                 goto out;
1370                         }
1371                         up(&s->sem);
1372                         schedule();
1373                         if (signal_pending(current)) {
1374                                 if (!ret)
1375                                         ret = -ERESTARTSYS;
1376                                 goto out2;
1377                         }
1378                         down(&s->sem);
1379                         if (s->dma_adc.mapped)
1380                         {
1381                                 ret = -ENXIO;
1382                                 goto out;
1383                         }
1384                         continue;
1385                 }
1386                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1387                         if (!ret)
1388                                 ret = -EFAULT;
1389                         goto out;
1390                 }
1391                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1392                 spin_lock_irqsave(&s->lock, flags);
1393                 s->dma_adc.swptr = swptr;
1394                 s->dma_adc.count -= cnt;
1395                 spin_unlock_irqrestore(&s->lock, flags);
1396                 count -= cnt;
1397                 buffer += cnt;
1398                 ret += cnt;
1399                 if (s->dma_adc.enabled)
1400                         start_adc(s);
1401         }
1402 out:
1403         up(&s->sem);
1404 out2:
1405         remove_wait_queue(&s->dma_adc.wait, &wait);
1406         set_current_state(TASK_RUNNING);
1407         return ret;
1408 }
1409
1410 static ssize_t es1371_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1411 {
1412         struct es1371_state *s = (struct es1371_state *)file->private_data;
1413         DECLARE_WAITQUEUE(wait, current);
1414         ssize_t ret;
1415         unsigned long flags;
1416         unsigned swptr;
1417         int cnt;
1418
1419         VALIDATE_STATE(s);
1420         if (ppos != &file->f_pos)
1421                 return -ESPIPE;
1422         if (s->dma_dac2.mapped)
1423                 return -ENXIO;
1424         if (!access_ok(VERIFY_READ, buffer, count))
1425                 return -EFAULT;
1426         down(&s->sem);
1427         if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1428                 goto out3;
1429         ret = 0;
1430         add_wait_queue(&s->dma_dac2.wait, &wait);
1431         while (count > 0) {
1432                 spin_lock_irqsave(&s->lock, flags);
1433                 if (s->dma_dac2.count < 0) {
1434                         s->dma_dac2.count = 0;
1435                         s->dma_dac2.swptr = s->dma_dac2.hwptr;
1436                 }
1437                 swptr = s->dma_dac2.swptr;
1438                 cnt = s->dma_dac2.dmasize-swptr;
1439                 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1440                         cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1441                 if (cnt <= 0)
1442                         __set_current_state(TASK_INTERRUPTIBLE);
1443                 spin_unlock_irqrestore(&s->lock, flags);
1444                 if (cnt > count)
1445                         cnt = count;
1446                 if (cnt <= 0) {
1447                         if (s->dma_dac2.enabled)
1448                                 start_dac2(s);
1449                         if (file->f_flags & O_NONBLOCK) {
1450                                 if (!ret)
1451                                         ret = -EAGAIN;
1452                                 goto out;
1453                         }
1454                         up(&s->sem);
1455                         schedule();
1456                         if (signal_pending(current)) {
1457                                 if (!ret)
1458                                         ret = -ERESTARTSYS;
1459                                 goto out2;
1460                         }
1461                         down(&s->sem);
1462                         if (s->dma_dac2.mapped)
1463                         {
1464                                 ret = -ENXIO;
1465                                 goto out;
1466                         }
1467                         continue;
1468                 }
1469                 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
1470                         if (!ret)
1471                                 ret = -EFAULT;
1472                         goto out;
1473                 }
1474                 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1475                 spin_lock_irqsave(&s->lock, flags);
1476                 s->dma_dac2.swptr = swptr;
1477                 s->dma_dac2.count += cnt;
1478                 s->dma_dac2.endcleared = 0;
1479                 spin_unlock_irqrestore(&s->lock, flags);
1480                 count -= cnt;
1481                 buffer += cnt;
1482                 ret += cnt;
1483                 if (s->dma_dac2.enabled)
1484                         start_dac2(s);
1485         }
1486 out:
1487         up(&s->sem);
1488 out2:
1489         remove_wait_queue(&s->dma_dac2.wait, &wait);
1490 out3:
1491         set_current_state(TASK_RUNNING);
1492         return ret;
1493 }
1494
1495 /* No kernel lock - we have our own spinlock */
1496 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1497 {
1498         struct es1371_state *s = (struct es1371_state *)file->private_data;
1499         unsigned long flags;
1500         unsigned int mask = 0;
1501
1502         VALIDATE_STATE(s);
1503         if (file->f_mode & FMODE_WRITE) {
1504                 if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
1505                         return 0;
1506                 poll_wait(file, &s->dma_dac2.wait, wait);
1507         }
1508         if (file->f_mode & FMODE_READ) {
1509                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1510                         return 0;
1511                 poll_wait(file, &s->dma_adc.wait, wait);
1512         }
1513         spin_lock_irqsave(&s->lock, flags);
1514         es1371_update_ptr(s);
1515         if (file->f_mode & FMODE_READ) {
1516                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1517                                 mask |= POLLIN | POLLRDNORM;
1518         }
1519         if (file->f_mode & FMODE_WRITE) {
1520                 if (s->dma_dac2.mapped) {
1521                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1522                                 mask |= POLLOUT | POLLWRNORM;
1523                 } else {
1524                         if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1525                                 mask |= POLLOUT | POLLWRNORM;
1526                 }
1527         }
1528         spin_unlock_irqrestore(&s->lock, flags);
1529         return mask;
1530 }
1531
1532 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1533 {
1534         struct es1371_state *s = (struct es1371_state *)file->private_data;
1535         struct dmabuf *db;
1536         int ret = 0;
1537         unsigned long size;
1538
1539         VALIDATE_STATE(s);
1540         lock_kernel();
1541         down(&s->sem);
1542
1543         if (vma->vm_flags & VM_WRITE) {
1544                 if ((ret = prog_dmabuf_dac2(s)) != 0) {
1545                         goto out;
1546                 }
1547                 db = &s->dma_dac2;
1548         } else if (vma->vm_flags & VM_READ) {
1549                 if ((ret = prog_dmabuf_adc(s)) != 0) {
1550                         goto out;
1551                 }
1552                 db = &s->dma_adc;
1553         } else {
1554                 ret = -EINVAL;
1555                 goto out;
1556         }
1557         if (vma->vm_pgoff != 0) {
1558                 ret = -EINVAL;
1559                 goto out;
1560         }
1561         size = vma->vm_end - vma->vm_start;
1562         if (size > (PAGE_SIZE << db->buforder)) {
1563                 ret = -EINVAL;
1564                 goto out;
1565         }
1566         if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot)) {
1567                 ret = -EAGAIN;
1568                 goto out;
1569         }
1570         db->mapped = 1;
1571 out:
1572         up(&s->sem);
1573         unlock_kernel();
1574         return ret;
1575 }
1576
1577 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1578 {
1579         struct es1371_state *s = (struct es1371_state *)file->private_data;
1580         unsigned long flags;
1581         audio_buf_info abinfo;
1582         count_info cinfo;
1583         int count;
1584         int val, mapped, ret;
1585
1586         VALIDATE_STATE(s);
1587         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1588                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1589         switch (cmd) {
1590         case OSS_GETVERSION:
1591                 return put_user(SOUND_VERSION, (int *)arg);
1592
1593         case SNDCTL_DSP_SYNC:
1594                 if (file->f_mode & FMODE_WRITE)
1595                         return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1596                 return 0;
1597
1598         case SNDCTL_DSP_SETDUPLEX:
1599                 return 0;
1600
1601         case SNDCTL_DSP_GETCAPS:
1602                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1603
1604         case SNDCTL_DSP_RESET:
1605                 if (file->f_mode & FMODE_WRITE) {
1606                         stop_dac2(s);
1607                         synchronize_irq();
1608                         s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1609                 }
1610                 if (file->f_mode & FMODE_READ) {
1611                         stop_adc(s);
1612                         synchronize_irq();
1613                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1614                 }
1615                 return 0;
1616
1617         case SNDCTL_DSP_SPEED:
1618                 if (get_user(val, (int *)arg))
1619                         return -EFAULT;
1620                 if (val >= 0) {
1621                         if (file->f_mode & FMODE_READ) {
1622                                 stop_adc(s);
1623                                 s->dma_adc.ready = 0;
1624                                 set_adc_rate(s, val);
1625                         }
1626                         if (file->f_mode & FMODE_WRITE) {
1627                                 stop_dac2(s);
1628                                 s->dma_dac2.ready = 0;
1629                                 set_dac2_rate(s, val);
1630                         }
1631                 }
1632                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1633
1634         case SNDCTL_DSP_STEREO:
1635                 if (get_user(val, (int *)arg))
1636                         return -EFAULT;
1637                 if (file->f_mode & FMODE_READ) {
1638                         stop_adc(s);
1639                         s->dma_adc.ready = 0;
1640                         spin_lock_irqsave(&s->lock, flags);
1641                         if (val)
1642                                 s->sctrl |= SCTRL_R1SMB;
1643                         else
1644                                 s->sctrl &= ~SCTRL_R1SMB;
1645                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1646                         spin_unlock_irqrestore(&s->lock, flags);
1647                 }
1648                 if (file->f_mode & FMODE_WRITE) {
1649                         stop_dac2(s);
1650                         s->dma_dac2.ready = 0;
1651                         spin_lock_irqsave(&s->lock, flags);
1652                         if (val)
1653                                 s->sctrl |= SCTRL_P2SMB;
1654                         else
1655                                 s->sctrl &= ~SCTRL_P2SMB;
1656                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1657                         spin_unlock_irqrestore(&s->lock, flags);
1658                 }
1659                 return 0;
1660
1661         case SNDCTL_DSP_CHANNELS:
1662                 if (get_user(val, (int *)arg))
1663                         return -EFAULT;
1664                 if (val != 0) {
1665                         if (file->f_mode & FMODE_READ) {
1666                                 stop_adc(s);
1667                                 s->dma_adc.ready = 0;
1668                                 spin_lock_irqsave(&s->lock, flags);
1669                                 if (val >= 2)
1670                                         s->sctrl |= SCTRL_R1SMB;
1671                                 else
1672                                         s->sctrl &= ~SCTRL_R1SMB;
1673                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1674                                 spin_unlock_irqrestore(&s->lock, flags);
1675                         }
1676                         if (file->f_mode & FMODE_WRITE) {
1677                                 stop_dac2(s);
1678                                 s->dma_dac2.ready = 0;
1679                                 spin_lock_irqsave(&s->lock, flags);
1680                                 if (val >= 2)
1681                                         s->sctrl |= SCTRL_P2SMB;
1682                                 else
1683                                         s->sctrl &= ~SCTRL_P2SMB;
1684                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1685                                 spin_unlock_irqrestore(&s->lock, flags);
1686                         }
1687                 }
1688                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1689
1690         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1691                 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1692
1693         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1694                 if (get_user(val, (int *)arg))
1695                         return -EFAULT;
1696                 if (val != AFMT_QUERY) {
1697                         if (file->f_mode & FMODE_READ) {
1698                                 stop_adc(s);
1699                                 s->dma_adc.ready = 0;
1700                                 spin_lock_irqsave(&s->lock, flags);
1701                                 if (val == AFMT_S16_LE)
1702                                         s->sctrl |= SCTRL_R1SEB;
1703                                 else
1704                                         s->sctrl &= ~SCTRL_R1SEB;
1705                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1706                                 spin_unlock_irqrestore(&s->lock, flags);
1707                         }
1708                         if (file->f_mode & FMODE_WRITE) {
1709                                 stop_dac2(s);
1710                                 s->dma_dac2.ready = 0;
1711                                 spin_lock_irqsave(&s->lock, flags);
1712                                 if (val == AFMT_S16_LE)
1713                                         s->sctrl |= SCTRL_P2SEB;
1714                                 else
1715                                         s->sctrl &= ~SCTRL_P2SEB;
1716                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1717                                 spin_unlock_irqrestore(&s->lock, flags);
1718                         }
1719                 }
1720                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1721                                 AFMT_S16_LE : AFMT_U8, (int *)arg);
1722
1723         case SNDCTL_DSP_POST:
1724                 return 0;
1725
1726         case SNDCTL_DSP_GETTRIGGER:
1727                 val = 0;
1728                 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1729                         val |= PCM_ENABLE_INPUT;
1730                 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1731                         val |= PCM_ENABLE_OUTPUT;
1732                 return put_user(val, (int *)arg);
1733
1734         case SNDCTL_DSP_SETTRIGGER:
1735                 if (get_user(val, (int *)arg))
1736                         return -EFAULT;
1737                 if (file->f_mode & FMODE_READ) {
1738                         if (val & PCM_ENABLE_INPUT) {
1739                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1740                                         return ret;
1741                                 s->dma_adc.enabled = 1;
1742                                 start_adc(s);
1743                         } else {
1744                                 s->dma_adc.enabled = 0;
1745                                 stop_adc(s);
1746                         }
1747                 }
1748                 if (file->f_mode & FMODE_WRITE) {
1749                         if (val & PCM_ENABLE_OUTPUT) {
1750                                 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1751                                         return ret;
1752                                 s->dma_dac2.enabled = 1;
1753                                 start_dac2(s);
1754                         } else {
1755                                 s->dma_dac2.enabled = 0;
1756                                 stop_dac2(s);
1757                         }
1758                 }
1759                 return 0;
1760
1761         case SNDCTL_DSP_GETOSPACE:
1762                 if (!(file->f_mode & FMODE_WRITE))
1763                         return -EINVAL;
1764                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1765                         return val;
1766                 spin_lock_irqsave(&s->lock, flags);
1767                 es1371_update_ptr(s);
1768                 abinfo.fragsize = s->dma_dac2.fragsize;
1769                 count = s->dma_dac2.count;
1770                 if (count < 0)
1771                         count = 0;
1772                 abinfo.bytes = s->dma_dac2.dmasize - count;
1773                 abinfo.fragstotal = s->dma_dac2.numfrag;
1774                 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1775                 spin_unlock_irqrestore(&s->lock, flags);
1776                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1777
1778         case SNDCTL_DSP_GETISPACE:
1779                 if (!(file->f_mode & FMODE_READ))
1780                         return -EINVAL;
1781                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1782                         return val;
1783                 spin_lock_irqsave(&s->lock, flags);
1784                 es1371_update_ptr(s);
1785                 abinfo.fragsize = s->dma_adc.fragsize;
1786                 count = s->dma_adc.count;
1787                 if (count < 0)
1788                         count = 0;
1789                 abinfo.bytes = count;
1790                 abinfo.fragstotal = s->dma_adc.numfrag;
1791                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1792                 spin_unlock_irqrestore(&s->lock, flags);
1793                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1794
1795         case SNDCTL_DSP_NONBLOCK:
1796                 file->f_flags |= O_NONBLOCK;
1797                 return 0;
1798
1799         case SNDCTL_DSP_GETODELAY:
1800                 if (!(file->f_mode & FMODE_WRITE))
1801                         return -EINVAL;
1802                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1803                         return val;
1804                 spin_lock_irqsave(&s->lock, flags);
1805                 es1371_update_ptr(s);
1806                 count = s->dma_dac2.count;
1807                 spin_unlock_irqrestore(&s->lock, flags);
1808                 if (count < 0)
1809                         count = 0;
1810                 return put_user(count, (int *)arg);
1811
1812         case SNDCTL_DSP_GETIPTR:
1813                 if (!(file->f_mode & FMODE_READ))
1814                         return -EINVAL;
1815                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1816                         return val;
1817                 spin_lock_irqsave(&s->lock, flags);
1818                 es1371_update_ptr(s);
1819                 cinfo.bytes = s->dma_adc.total_bytes;
1820                 count = s->dma_adc.count;
1821                 if (count < 0)
1822                         count = 0;
1823                 cinfo.blocks = count >> s->dma_adc.fragshift;
1824                 cinfo.ptr = s->dma_adc.hwptr;
1825                 if (s->dma_adc.mapped)
1826                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1827                 spin_unlock_irqrestore(&s->lock, flags);
1828                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1829
1830         case SNDCTL_DSP_GETOPTR:
1831                 if (!(file->f_mode & FMODE_WRITE))
1832                         return -EINVAL;
1833                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1834                         return val;
1835                 spin_lock_irqsave(&s->lock, flags);
1836                 es1371_update_ptr(s);
1837                 cinfo.bytes = s->dma_dac2.total_bytes;
1838                 count = s->dma_dac2.count;
1839                 if (count < 0)
1840                         count = 0;
1841                 cinfo.blocks = count >> s->dma_dac2.fragshift;
1842                 cinfo.ptr = s->dma_dac2.hwptr;
1843                 if (s->dma_dac2.mapped)
1844                         s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1845                 spin_unlock_irqrestore(&s->lock, flags);
1846                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1847
1848         case SNDCTL_DSP_GETBLKSIZE:
1849                 if (file->f_mode & FMODE_WRITE) {
1850                         if ((val = prog_dmabuf_dac2(s)))
1851                                 return val;
1852                         return put_user(s->dma_dac2.fragsize, (int *)arg);
1853                 }
1854                 if ((val = prog_dmabuf_adc(s)))
1855                         return val;
1856                 return put_user(s->dma_adc.fragsize, (int *)arg);
1857
1858         case SNDCTL_DSP_SETFRAGMENT:
1859                 if (get_user(val, (int *)arg))
1860                         return -EFAULT;
1861                 if (file->f_mode & FMODE_READ) {
1862                         s->dma_adc.ossfragshift = val & 0xffff;
1863                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1864                         if (s->dma_adc.ossfragshift < 4)
1865                                 s->dma_adc.ossfragshift = 4;
1866                         if (s->dma_adc.ossfragshift > 15)
1867                                 s->dma_adc.ossfragshift = 15;
1868                         if (s->dma_adc.ossmaxfrags < 4)
1869                                 s->dma_adc.ossmaxfrags = 4;
1870                 }
1871                 if (file->f_mode & FMODE_WRITE) {
1872                         s->dma_dac2.ossfragshift = val & 0xffff;
1873                         s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1874                         if (s->dma_dac2.ossfragshift < 4)
1875                                 s->dma_dac2.ossfragshift = 4;
1876                         if (s->dma_dac2.ossfragshift > 15)
1877                                 s->dma_dac2.ossfragshift = 15;
1878                         if (s->dma_dac2.ossmaxfrags < 4)
1879                                 s->dma_dac2.ossmaxfrags = 4;
1880                 }
1881                 return 0;
1882
1883         case SNDCTL_DSP_SUBDIVIDE:
1884                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1885                     (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1886                         return -EINVAL;
1887                 if (get_user(val, (int *)arg))
1888                         return -EFAULT;
1889                 if (val != 1 && val != 2 && val != 4)
1890                         return -EINVAL;
1891                 if (file->f_mode & FMODE_READ)
1892                         s->dma_adc.subdivision = val;
1893                 if (file->f_mode & FMODE_WRITE)
1894                         s->dma_dac2.subdivision = val;
1895                 return 0;
1896
1897         case SOUND_PCM_READ_RATE:
1898                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1899
1900         case SOUND_PCM_READ_CHANNELS:
1901                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1902
1903         case SOUND_PCM_READ_BITS:
1904                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, (int *)arg);
1905
1906         case SOUND_PCM_WRITE_FILTER:
1907         case SNDCTL_DSP_SETSYNCRO:
1908         case SOUND_PCM_READ_FILTER:
1909                 return -EINVAL;
1910
1911         }
1912         return mixdev_ioctl(&s->codec, cmd, arg);
1913 }
1914
1915 static int es1371_open(struct inode *inode, struct file *file)
1916 {
1917         int minor = MINOR(inode->i_rdev);
1918         DECLARE_WAITQUEUE(wait, current);
1919         unsigned long flags;
1920         struct list_head *list;
1921         struct es1371_state *s;
1922
1923         for (list = devs.next; ; list = list->next) {
1924                 if (list == &devs)
1925                         return -ENODEV;
1926                 s = list_entry(list, struct es1371_state, devs);
1927                 if (!((s->dev_audio ^ minor) & ~0xf))
1928                         break;
1929         }
1930         VALIDATE_STATE(s);
1931         file->private_data = s;
1932         /* wait for device to become free */
1933         down(&s->open_sem);
1934         while (s->open_mode & file->f_mode) {
1935                 if (file->f_flags & O_NONBLOCK) {
1936                         up(&s->open_sem);
1937                         return -EBUSY;
1938                 }
1939                 add_wait_queue(&s->open_wait, &wait);
1940                 __set_current_state(TASK_INTERRUPTIBLE);
1941                 up(&s->open_sem);
1942                 schedule();
1943                 remove_wait_queue(&s->open_wait, &wait);
1944                 set_current_state(TASK_RUNNING);
1945                 if (signal_pending(current))
1946                         return -ERESTARTSYS;
1947                 down(&s->open_sem);
1948         }
1949         if (file->f_mode & FMODE_READ) {
1950                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1951                 s->dma_adc.enabled = 1;
1952                 set_adc_rate(s, 8000);
1953         }
1954         if (file->f_mode & FMODE_WRITE) {
1955                 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1956                 s->dma_dac2.enabled = 1;
1957                 set_dac2_rate(s, 8000);
1958         }
1959         spin_lock_irqsave(&s->lock, flags);
1960         if (file->f_mode & FMODE_READ) {
1961                 s->sctrl &= ~SCTRL_R1FMT;
1962                 if ((minor & 0xf) == SND_DEV_DSP16)
1963                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
1964                 else
1965                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
1966         }
1967         if (file->f_mode & FMODE_WRITE) {
1968                 s->sctrl &= ~SCTRL_P2FMT;
1969                 if ((minor & 0xf) == SND_DEV_DSP16)
1970                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
1971                 else
1972                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
1973         }
1974         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1975         spin_unlock_irqrestore(&s->lock, flags);
1976         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1977         up(&s->open_sem);
1978         init_MUTEX(&s->sem);
1979         return 0;
1980 }
1981
1982 static int es1371_release(struct inode *inode, struct file *file)
1983 {
1984         struct es1371_state *s = (struct es1371_state *)file->private_data;
1985
1986         VALIDATE_STATE(s);
1987         lock_kernel();
1988         if (file->f_mode & FMODE_WRITE)
1989                 drain_dac2(s, file->f_flags & O_NONBLOCK);
1990         down(&s->open_sem);
1991         if (file->f_mode & FMODE_WRITE) {
1992                 stop_dac2(s);
1993                 dealloc_dmabuf(s, &s->dma_dac2);
1994         }
1995         if (file->f_mode & FMODE_READ) {
1996                 stop_adc(s);
1997                 dealloc_dmabuf(s, &s->dma_adc);
1998         }
1999         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
2000         up(&s->open_sem);
2001         wake_up(&s->open_wait);
2002         unlock_kernel();
2003         return 0;
2004 }
2005
2006 static /*const*/ struct file_operations es1371_audio_fops = {
2007         owner:          THIS_MODULE,
2008         llseek:         no_llseek,
2009         read:           es1371_read,
2010         write:          es1371_write,
2011         poll:           es1371_poll,
2012         ioctl:          es1371_ioctl,
2013         mmap:           es1371_mmap,
2014         open:           es1371_open,
2015         release:        es1371_release,
2016 };
2017
2018 /* --------------------------------------------------------------------- */
2019
2020 static ssize_t es1371_write_dac(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2021 {
2022         struct es1371_state *s = (struct es1371_state *)file->private_data;
2023         DECLARE_WAITQUEUE(wait, current);
2024         ssize_t ret = 0;
2025         unsigned long flags;
2026         unsigned swptr;
2027         int cnt;
2028
2029         VALIDATE_STATE(s);
2030         if (ppos != &file->f_pos)
2031                 return -ESPIPE;
2032         if (s->dma_dac1.mapped)
2033                 return -ENXIO;
2034         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2035                 return ret;
2036         if (!access_ok(VERIFY_READ, buffer, count))
2037                 return -EFAULT;
2038         add_wait_queue(&s->dma_dac1.wait, &wait);
2039         while (count > 0) {
2040                 spin_lock_irqsave(&s->lock, flags);
2041                 if (s->dma_dac1.count < 0) {
2042                         s->dma_dac1.count = 0;
2043                         s->dma_dac1.swptr = s->dma_dac1.hwptr;
2044                 }
2045                 swptr = s->dma_dac1.swptr;
2046                 cnt = s->dma_dac1.dmasize-swptr;
2047                 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2048                         cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2049                 if (cnt <= 0)
2050                         __set_current_state(TASK_INTERRUPTIBLE);
2051                 spin_unlock_irqrestore(&s->lock, flags);
2052                 if (cnt > count)
2053                         cnt = count;
2054                 if (cnt <= 0) {
2055                         if (s->dma_dac1.enabled)
2056                                 start_dac1(s);
2057                         if (file->f_flags & O_NONBLOCK) {
2058                                 if (!ret)
2059                                         ret = -EAGAIN;
2060                                 break;
2061                         }
2062                         schedule();
2063                         if (signal_pending(current)) {
2064                                 if (!ret)
2065                                         ret = -ERESTARTSYS;
2066                                 break;
2067                         }
2068                         continue;
2069                 }
2070                 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
2071                         if (!ret)
2072                                 ret = -EFAULT;
2073                         break;
2074                 }
2075                 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2076                 spin_lock_irqsave(&s->lock, flags);
2077                 s->dma_dac1.swptr = swptr;
2078                 s->dma_dac1.count += cnt;
2079                 s->dma_dac1.endcleared = 0;
2080                 spin_unlock_irqrestore(&s->lock, flags);
2081                 count -= cnt;
2082                 buffer += cnt;
2083                 ret += cnt;
2084                 if (s->dma_dac1.enabled)
2085                         start_dac1(s);
2086         }
2087         remove_wait_queue(&s->dma_dac1.wait, &wait);
2088         set_current_state(TASK_RUNNING);
2089         return ret;
2090 }
2091
2092 /* No kernel lock - we have our own spinlock */
2093 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2094 {
2095         struct es1371_state *s = (struct es1371_state *)file->private_data;
2096         unsigned long flags;
2097         unsigned int mask = 0;
2098
2099         VALIDATE_STATE(s);
2100         if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
2101                 return 0;
2102         poll_wait(file, &s->dma_dac1.wait, wait);
2103         spin_lock_irqsave(&s->lock, flags);
2104         es1371_update_ptr(s);
2105         if (s->dma_dac1.mapped) {
2106                 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2107                         mask |= POLLOUT | POLLWRNORM;
2108         } else {
2109                 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2110                         mask |= POLLOUT | POLLWRNORM;
2111         }
2112         spin_unlock_irqrestore(&s->lock, flags);
2113         return mask;
2114 }
2115
2116 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2117 {
2118         struct es1371_state *s = (struct es1371_state *)file->private_data;
2119         int ret;
2120         unsigned long size;
2121
2122         VALIDATE_STATE(s);
2123         if (!(vma->vm_flags & VM_WRITE))
2124                 return -EINVAL;
2125         lock_kernel();
2126         if ((ret = prog_dmabuf_dac1(s)) != 0)
2127                 goto out;
2128         ret = -EINVAL;
2129         if (vma->vm_pgoff != 0)
2130                 goto out;
2131         size = vma->vm_end - vma->vm_start;
2132         if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2133                 goto out;
2134         ret = -EAGAIN;
2135         if (remap_page_range(vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
2136                 goto out;
2137         s->dma_dac1.mapped = 1;
2138         ret = 0;
2139 out:
2140         unlock_kernel();
2141         return ret;
2142 }
2143
2144 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2145 {
2146         struct es1371_state *s = (struct es1371_state *)file->private_data;
2147         unsigned long flags;
2148         audio_buf_info abinfo;
2149         count_info cinfo;
2150         int count;
2151         int val, ret;
2152
2153         VALIDATE_STATE(s);
2154         switch (cmd) {
2155         case OSS_GETVERSION:
2156                 return put_user(SOUND_VERSION, (int *)arg);
2157
2158         case SNDCTL_DSP_SYNC:
2159                 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2160
2161         case SNDCTL_DSP_SETDUPLEX:
2162                 return -EINVAL;
2163
2164         case SNDCTL_DSP_GETCAPS:
2165                 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
2166
2167         case SNDCTL_DSP_RESET:
2168                 stop_dac1(s);
2169                 synchronize_irq();
2170                 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2171                 return 0;
2172
2173         case SNDCTL_DSP_SPEED:
2174                 if (get_user(val, (int *)arg))
2175                         return -EFAULT;
2176                 if (val >= 0) {
2177                         stop_dac1(s);
2178                         s->dma_dac1.ready = 0;
2179                         set_dac1_rate(s, val);
2180                 }
2181                 return put_user(s->dac1rate, (int *)arg);
2182
2183         case SNDCTL_DSP_STEREO:
2184                 if (get_user(val, (int *)arg))
2185                         return -EFAULT;
2186                 stop_dac1(s);
2187                 s->dma_dac1.ready = 0;
2188                 spin_lock_irqsave(&s->lock, flags);
2189                 if (val)
2190                         s->sctrl |= SCTRL_P1SMB;
2191                 else
2192                         s->sctrl &= ~SCTRL_P1SMB;
2193                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2194                 spin_unlock_irqrestore(&s->lock, flags);
2195                 return 0;
2196
2197         case SNDCTL_DSP_CHANNELS:
2198                 if (get_user(val, (int *)arg))
2199                         return -EFAULT;
2200                 if (val != 0) {
2201                         stop_dac1(s);
2202                         s->dma_dac1.ready = 0;
2203                         spin_lock_irqsave(&s->lock, flags);
2204                         if (val >= 2)
2205                                 s->sctrl |= SCTRL_P1SMB;
2206                         else
2207                                 s->sctrl &= ~SCTRL_P1SMB;
2208                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2209                         spin_unlock_irqrestore(&s->lock, flags);
2210                 }
2211                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2212
2213         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2214                 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
2215
2216         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2217                 if (get_user(val, (int *)arg))
2218                         return -EFAULT;
2219                 if (val != AFMT_QUERY) {
2220                         stop_dac1(s);
2221                         s->dma_dac1.ready = 0;
2222                         spin_lock_irqsave(&s->lock, flags);
2223                         if (val == AFMT_S16_LE)
2224                                 s->sctrl |= SCTRL_P1SEB;
2225                         else
2226                                 s->sctrl &= ~SCTRL_P1SEB;
2227                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2228                         spin_unlock_irqrestore(&s->lock, flags);
2229                 }
2230                 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
2231
2232         case SNDCTL_DSP_POST:
2233                 return 0;
2234
2235         case SNDCTL_DSP_GETTRIGGER:
2236                 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, (int *)arg);
2237
2238         case SNDCTL_DSP_SETTRIGGER:
2239                 if (get_user(val, (int *)arg))
2240                         return -EFAULT;
2241                 if (val & PCM_ENABLE_OUTPUT) {
2242                         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2243                                 return ret;
2244                         s->dma_dac1.enabled = 1;
2245                         start_dac1(s);
2246                 } else {
2247                         s->dma_dac1.enabled = 0;
2248                         stop_dac1(s);
2249                 }
2250                 return 0;
2251
2252         case SNDCTL_DSP_GETOSPACE:
2253                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2254                         return val;
2255                 spin_lock_irqsave(&s->lock, flags);
2256                 es1371_update_ptr(s);
2257                 abinfo.fragsize = s->dma_dac1.fragsize;
2258                 count = s->dma_dac1.count;
2259                 if (count < 0)
2260                         count = 0;
2261                 abinfo.bytes = s->dma_dac1.dmasize - count;
2262                 abinfo.fragstotal = s->dma_dac1.numfrag;
2263                 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2264                 spin_unlock_irqrestore(&s->lock, flags);
2265                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2266
2267         case SNDCTL_DSP_NONBLOCK:
2268                 file->f_flags |= O_NONBLOCK;
2269                 return 0;
2270
2271         case SNDCTL_DSP_GETODELAY:
2272                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2273                         return val;
2274                 spin_lock_irqsave(&s->lock, flags);
2275                 es1371_update_ptr(s);
2276                 count = s->dma_dac1.count;
2277                 spin_unlock_irqrestore(&s->lock, flags);
2278                 if (count < 0)
2279                         count = 0;
2280                 return put_user(count, (int *)arg);
2281
2282         case SNDCTL_DSP_GETOPTR:
2283                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2284                         return val;
2285                 spin_lock_irqsave(&s->lock, flags);
2286                 es1371_update_ptr(s);
2287                 cinfo.bytes = s->dma_dac1.total_bytes;
2288                 count = s->dma_dac1.count;
2289                 if (count < 0)
2290                         count = 0;
2291                 cinfo.blocks = count >> s->dma_dac1.fragshift;
2292                 cinfo.ptr = s->dma_dac1.hwptr;
2293                 if (s->dma_dac1.mapped)
2294                         s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2295                 spin_unlock_irqrestore(&s->lock, flags);
2296                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2297
2298         case SNDCTL_DSP_GETBLKSIZE:
2299                 if ((val = prog_dmabuf_dac1(s)))
2300                         return val;
2301                 return put_user(s->dma_dac1.fragsize, (int *)arg);
2302
2303         case SNDCTL_DSP_SETFRAGMENT:
2304                 if (get_user(val, (int *)arg))
2305                         return -EFAULT;
2306                 s->dma_dac1.ossfragshift = val & 0xffff;
2307                 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2308                 if (s->dma_dac1.ossfragshift < 4)
2309                         s->dma_dac1.ossfragshift = 4;
2310                 if (s->dma_dac1.ossfragshift > 15)
2311                         s->dma_dac1.ossfragshift = 15;
2312                 if (s->dma_dac1.ossmaxfrags < 4)
2313                         s->dma_dac1.ossmaxfrags = 4;
2314                 return 0;
2315
2316         case SNDCTL_DSP_SUBDIVIDE:
2317                 if (s->dma_dac1.subdivision)
2318                         return -EINVAL;
2319                 if (get_user(val, (int *)arg))
2320                         return -EFAULT;
2321                 if (val != 1 && val != 2 && val != 4)
2322                         return -EINVAL;
2323                 s->dma_dac1.subdivision = val;
2324                 return 0;
2325
2326         case SOUND_PCM_READ_RATE:
2327                 return put_user(s->dac1rate, (int *)arg);
2328
2329         case SOUND_PCM_READ_CHANNELS:
2330                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2331
2332         case SOUND_PCM_READ_BITS:
2333                 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, (int *)arg);
2334
2335         case SOUND_PCM_WRITE_FILTER:
2336         case SNDCTL_DSP_SETSYNCRO:
2337         case SOUND_PCM_READ_FILTER:
2338                 return -EINVAL;
2339
2340         }
2341         return mixdev_ioctl(&s->codec, cmd, arg);
2342 }
2343
2344 static int es1371_open_dac(struct inode *inode, struct file *file)
2345 {
2346         int minor = MINOR(inode->i_rdev);
2347         DECLARE_WAITQUEUE(wait, current);
2348         unsigned long flags;
2349         struct list_head *list;
2350         struct es1371_state *s;
2351
2352         for (list = devs.next; ; list = list->next) {
2353                 if (list == &devs)
2354                         return -ENODEV;
2355                 s = list_entry(list, struct es1371_state, devs);
2356                 if (!((s->dev_dac ^ minor) & ~0xf))
2357                         break;
2358         }
2359         VALIDATE_STATE(s);
2360         /* we allow opening with O_RDWR, most programs do it although they will only write */
2361 #if 0
2362         if (file->f_mode & FMODE_READ)
2363                 return -EPERM;
2364 #endif
2365         if (!(file->f_mode & FMODE_WRITE))
2366                 return -EINVAL;
2367         file->private_data = s;
2368         /* wait for device to become free */
2369         down(&s->open_sem);
2370         while (s->open_mode & FMODE_DAC) {
2371                 if (file->f_flags & O_NONBLOCK) {
2372                         up(&s->open_sem);
2373                         return -EBUSY;
2374                 }
2375                 add_wait_queue(&s->open_wait, &wait);
2376                 __set_current_state(TASK_INTERRUPTIBLE);
2377                 up(&s->open_sem);
2378                 schedule();
2379                 remove_wait_queue(&s->open_wait, &wait);
2380                 set_current_state(TASK_RUNNING);
2381                 if (signal_pending(current))
2382                         return -ERESTARTSYS;
2383                 down(&s->open_sem);
2384         }
2385         s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2386         s->dma_dac1.enabled = 1;
2387         set_dac1_rate(s, 8000);
2388         spin_lock_irqsave(&s->lock, flags);
2389         s->sctrl &= ~SCTRL_P1FMT;
2390         if ((minor & 0xf) == SND_DEV_DSP16)
2391                 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2392         else
2393                 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2394         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2395         spin_unlock_irqrestore(&s->lock, flags);
2396         s->open_mode |= FMODE_DAC;
2397         up(&s->open_sem);
2398         return 0;
2399 }
2400
2401 static int es1371_release_dac(struct inode *inode, struct file *file)
2402 {
2403         struct es1371_state *s = (struct es1371_state *)file->private_data;
2404
2405         VALIDATE_STATE(s);
2406         lock_kernel();
2407         drain_dac1(s, file->f_flags & O_NONBLOCK);
2408         down(&s->open_sem);
2409         stop_dac1(s);
2410         dealloc_dmabuf(s, &s->dma_dac1);
2411         s->open_mode &= ~FMODE_DAC;
2412         up(&s->open_sem);
2413         wake_up(&s->open_wait);
2414         unlock_kernel();
2415         return 0;
2416 }
2417
2418 static /*const*/ struct file_operations es1371_dac_fops = {
2419         owner:          THIS_MODULE,
2420         llseek:         no_llseek,
2421         write:          es1371_write_dac,
2422         poll:           es1371_poll_dac,
2423         ioctl:          es1371_ioctl_dac,
2424         mmap:           es1371_mmap_dac,
2425         open:           es1371_open_dac,
2426         release:        es1371_release_dac,
2427 };
2428
2429 /* --------------------------------------------------------------------- */
2430
2431 static ssize_t es1371_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2432 {
2433         struct es1371_state *s = (struct es1371_state *)file->private_data;
2434         DECLARE_WAITQUEUE(wait, current);
2435         ssize_t ret;
2436         unsigned long flags;
2437         unsigned ptr;
2438         int cnt;
2439
2440         VALIDATE_STATE(s);
2441         if (ppos != &file->f_pos)
2442                 return -ESPIPE;
2443         if (!access_ok(VERIFY_WRITE, buffer, count))
2444                 return -EFAULT;
2445         if (count == 0)
2446                 return 0;
2447         ret = 0;
2448         add_wait_queue(&s->midi.iwait, &wait);
2449         while (count > 0) {
2450                 spin_lock_irqsave(&s->lock, flags);
2451                 ptr = s->midi.ird;
2452                 cnt = MIDIINBUF - ptr;
2453                 if (s->midi.icnt < cnt)
2454                         cnt = s->midi.icnt;
2455                 if (cnt <= 0)
2456                         __set_current_state(TASK_INTERRUPTIBLE);
2457                 spin_unlock_irqrestore(&s->lock, flags);
2458                 if (cnt > count)
2459                         cnt = count;
2460                 if (cnt <= 0) {
2461                         if (file->f_flags & O_NONBLOCK) {
2462                                 if (!ret)
2463                                         ret = -EAGAIN;
2464                                 break;
2465                         }
2466                         schedule();
2467                         if (signal_pending(current)) {
2468                                 if (!ret)
2469                                         ret = -ERESTARTSYS;
2470                                 break;
2471                         }
2472                         continue;
2473                 }
2474                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2475                         if (!ret)
2476                                 ret = -EFAULT;
2477                         break;
2478                 }
2479                 ptr = (ptr + cnt) % MIDIINBUF;
2480                 spin_lock_irqsave(&s->lock, flags);
2481                 s->midi.ird = ptr;
2482                 s->midi.icnt -= cnt;
2483                 spin_unlock_irqrestore(&s->lock, flags);
2484                 count -= cnt;
2485                 buffer += cnt;
2486                 ret += cnt;
2487                 break;
2488         }
2489         __set_current_state(TASK_RUNNING);
2490         remove_wait_queue(&s->midi.iwait, &wait);
2491         return ret;
2492 }
2493
2494 static ssize_t es1371_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2495 {
2496         struct es1371_state *s = (struct es1371_state *)file->private_data;
2497         DECLARE_WAITQUEUE(wait, current);
2498         ssize_t ret;
2499         unsigned long flags;
2500         unsigned ptr;
2501         int cnt;
2502
2503         VALIDATE_STATE(s);
2504         if (ppos != &file->f_pos)
2505                 return -ESPIPE;
2506         if (!access_ok(VERIFY_READ, buffer, count))
2507                 return -EFAULT;
2508         if (count == 0)
2509                 return 0;
2510         ret = 0;
2511         add_wait_queue(&s->midi.owait, &wait);
2512         while (count > 0) {
2513                 spin_lock_irqsave(&s->lock, flags);
2514                 ptr = s->midi.owr;
2515                 cnt = MIDIOUTBUF - ptr;
2516                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2517                         cnt = MIDIOUTBUF - s->midi.ocnt;
2518                 if (cnt <= 0) {
2519                         __set_current_state(TASK_INTERRUPTIBLE);
2520                         es1371_handle_midi(s);
2521                 }
2522                 spin_unlock_irqrestore(&s->lock, flags);
2523                 if (cnt > count)
2524                         cnt = count;
2525                 if (cnt <= 0) {
2526                         if (file->f_flags & O_NONBLOCK) {
2527                                 if (!ret)
2528                                         ret = -EAGAIN;
2529                                 break;
2530                         }
2531                         schedule();
2532                         if (signal_pending(current)) {
2533                                 if (!ret)
2534                                         ret = -ERESTARTSYS;
2535                                 break;
2536                         }
2537                         continue;
2538                 }
2539                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2540                         if (!ret)
2541                                 ret = -EFAULT;
2542                         break;
2543                 }
2544                 ptr = (ptr + cnt) % MIDIOUTBUF;
2545                 spin_lock_irqsave(&s->lock, flags);
2546                 s->midi.owr = ptr;
2547                 s->midi.ocnt += cnt;
2548                 spin_unlock_irqrestore(&s->lock, flags);
2549                 count -= cnt;
2550                 buffer += cnt;
2551                 ret += cnt;
2552                 spin_lock_irqsave(&s->lock, flags);
2553                 es1371_handle_midi(s);
2554                 spin_unlock_irqrestore(&s->lock, flags);
2555         }
2556         __set_current_state(TASK_RUNNING);
2557         remove_wait_queue(&s->midi.owait, &wait);
2558         return ret;
2559 }
2560
2561 /* No kernel lock - we have our own spinlock */
2562 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2563 {
2564         struct es1371_state *s = (struct es1371_state *)file->private_data;
2565         unsigned long flags;
2566         unsigned int mask = 0;
2567
2568         VALIDATE_STATE(s);
2569         if (file->f_mode & FMODE_WRITE)
2570                 poll_wait(file, &s->midi.owait, wait);
2571         if (file->f_mode & FMODE_READ)
2572                 poll_wait(file, &s->midi.iwait, wait);
2573         spin_lock_irqsave(&s->lock, flags);
2574         if (file->f_mode & FMODE_READ) {
2575                 if (s->midi.icnt > 0)
2576                         mask |= POLLIN | POLLRDNORM;
2577         }
2578         if (file->f_mode & FMODE_WRITE) {
2579                 if (s->midi.ocnt < MIDIOUTBUF)
2580                         mask |= POLLOUT | POLLWRNORM;
2581         }
2582         spin_unlock_irqrestore(&s->lock, flags);
2583         return mask;
2584 }
2585
2586 static int es1371_midi_open(struct inode *inode, struct file *file)
2587 {
2588         int minor = MINOR(inode->i_rdev);
2589         DECLARE_WAITQUEUE(wait, current);
2590         unsigned long flags;
2591         struct list_head *list;
2592         struct es1371_state *s;
2593
2594         for (list = devs.next; ; list = list->next) {
2595                 if (list == &devs)
2596                         return -ENODEV;
2597                 s = list_entry(list, struct es1371_state, devs);
2598                 if (s->dev_midi == minor)
2599                         break;
2600         }
2601         VALIDATE_STATE(s);
2602         file->private_data = s;
2603         /* wait for device to become free */
2604         down(&s->open_sem);
2605         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2606                 if (file->f_flags & O_NONBLOCK) {
2607                         up(&s->open_sem);
2608                         return -EBUSY;
2609                 }
2610                 add_wait_queue(&s->open_wait, &wait);
2611                 __set_current_state(TASK_INTERRUPTIBLE);
2612                 up(&s->open_sem);
2613                 schedule();
2614                 remove_wait_queue(&s->open_wait, &wait);
2615                 set_current_state(TASK_RUNNING);
2616                 if (signal_pending(current))
2617                         return -ERESTARTSYS;
2618                 down(&s->open_sem);
2619         }
2620         spin_lock_irqsave(&s->lock, flags);
2621         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2622                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2623                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2624                 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2625                 outb(0, s->io+ES1371_REG_UART_CONTROL);
2626                 outb(0, s->io+ES1371_REG_UART_TEST);
2627         }
2628         if (file->f_mode & FMODE_READ) {
2629                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2630         }
2631         if (file->f_mode & FMODE_WRITE) {
2632                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2633         }
2634         s->ctrl |= CTRL_UART_EN;
2635         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2636         es1371_handle_midi(s);
2637         spin_unlock_irqrestore(&s->lock, flags);
2638         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2639         up(&s->open_sem);
2640         return 0;
2641 }
2642
2643 static int es1371_midi_release(struct inode *inode, struct file *file)
2644 {
2645         struct es1371_state *s = (struct es1371_state *)file->private_data;
2646         DECLARE_WAITQUEUE(wait, current);
2647         unsigned long flags;
2648         unsigned count, tmo;
2649
2650         VALIDATE_STATE(s);
2651         lock_kernel();
2652         if (file->f_mode & FMODE_WRITE) {
2653                 add_wait_queue(&s->midi.owait, &wait);
2654                 for (;;) {
2655                         __set_current_state(TASK_INTERRUPTIBLE);
2656                         spin_lock_irqsave(&s->lock, flags);
2657                         count = s->midi.ocnt;
2658                         spin_unlock_irqrestore(&s->lock, flags);
2659                         if (count <= 0)
2660                                 break;
2661                         if (signal_pending(current))
2662                                 break;
2663                         if (file->f_flags & O_NONBLOCK) {
2664                                 break;
2665                         }
2666                         tmo = (count * HZ) / 3100;
2667                         if (!schedule_timeout(tmo ? : 1) && tmo)
2668                                 printk(KERN_DEBUG PFX "midi timed out??\n");
2669                 }
2670                 remove_wait_queue(&s->midi.owait, &wait);
2671                 set_current_state(TASK_RUNNING);
2672         }
2673         down(&s->open_sem);
2674         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2675         spin_lock_irqsave(&s->lock, flags);
2676         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2677                 s->ctrl &= ~CTRL_UART_EN;
2678                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2679         }
2680         spin_unlock_irqrestore(&s->lock, flags);
2681         up(&s->open_sem);
2682         wake_up(&s->open_wait);
2683         unlock_kernel();
2684         return 0;
2685 }
2686
2687 static /*const*/ struct file_operations es1371_midi_fops = {
2688         owner:          THIS_MODULE,
2689         llseek:         no_llseek,
2690         read:           es1371_midi_read,
2691         write:          es1371_midi_write,
2692         poll:           es1371_midi_poll,
2693         open:           es1371_midi_open,
2694         release:        es1371_midi_release,
2695 };
2696
2697 /* --------------------------------------------------------------------- */
2698
2699 /*
2700  * for debugging purposes, we'll create a proc device that dumps the
2701  * CODEC chipstate
2702  */
2703
2704 #ifdef ES1371_DEBUG
2705 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2706 {
2707         struct es1371_state *s;
2708         int cnt, len = 0;
2709
2710         if (list_empty(&devs))
2711                 return 0;
2712         s = list_entry(devs.next, struct es1371_state, devs);
2713         /* print out header */
2714         len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2715
2716         /* print out CODEC state */
2717         len += sprintf (buf + len, "AC97 CODEC state\n");
2718         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2719                 len+= sprintf (buf + len, "reg:0x%02x  val:0x%04x\n", cnt, rdcodec(&s->codec, cnt));
2720
2721         if (fpos >=len){
2722                 *start = buf;
2723                 *eof =1;
2724                 return 0;
2725         }
2726         *start = buf + fpos;
2727         if ((len -= fpos) > length)
2728                 return length;
2729         *eof =1;
2730         return len;
2731
2732 }
2733 #endif /* ES1371_DEBUG */
2734
2735 /* --------------------------------------------------------------------- */
2736
2737 /* maximum number of devices; only used for command line params */
2738 #define NR_DEVICE 5
2739
2740 static int joystick[NR_DEVICE] = { 0, };
2741 static int spdif[NR_DEVICE] = { 0, };
2742 static int nomix[NR_DEVICE] = { 0, };
2743
2744 static unsigned int devindex = 0;
2745 static int amplifier = 0;
2746
2747 MODULE_PARM(joystick, "1-" __MODULE_STRING(NR_DEVICE) "i");
2748 MODULE_PARM_DESC(joystick, "sets address and enables joystick interface (still need separate driver)");
2749 MODULE_PARM(spdif, "1-" __MODULE_STRING(NR_DEVICE) "i");
2750 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2751 MODULE_PARM(nomix, "1-" __MODULE_STRING(NR_DEVICE) "i");
2752 MODULE_PARM_DESC(nomix, "if 1 no analog audio is mixed to the digital output");
2753 MODULE_PARM(amplifier, "i");
2754 MODULE_PARM_DESC(amplifier, "Set to 1 if the machine needs the amp control enabling (many laptops)");
2755
2756 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2757 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2758 MODULE_LICENSE("GPL");
2759
2760
2761 /* --------------------------------------------------------------------- */
2762
2763 static struct initvol {
2764         int mixch;
2765         int vol;
2766 } initvol[] __initdata = {
2767         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2768         { SOUND_MIXER_WRITE_CD, 0x4040 },
2769         { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2770         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2771         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2772         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2773         { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2774         { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2775         { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2776         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2777         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2778         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2779         { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2780 };
2781
2782 static struct
2783 {
2784         short svid, sdid;
2785 } amplifier_needed[] =
2786 {
2787         { 0x107B, 0x2150 },             /* Gateway Solo 2150 */
2788         { 0x13BD, 0x100C },             /* Mebius PC-MJ100V */
2789         { 0x1102, 0x5938 },             /* Targa Xtender 300 */
2790         { 0x1102, 0x8938 },             /* IPC notebook */
2791         { PCI_ANY_ID, PCI_ANY_ID }
2792 };
2793
2794
2795 static int __devinit es1371_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2796 {
2797         struct es1371_state *s;
2798         mm_segment_t fs;
2799         int i, val, res = -1;
2800         int idx;
2801         unsigned long tmo;
2802         signed long tmo2;
2803         unsigned int cssr;
2804
2805         if ((res=pci_enable_device(pcidev)))
2806                 return res;
2807
2808         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO))
2809                 return -ENODEV;
2810         if (pcidev->irq == 0)
2811                 return -ENODEV;
2812         i = pci_set_dma_mask(pcidev, 0xffffffff);
2813         if (i) {
2814                 printk(KERN_WARNING "es1371: architecture does not support 32bit PCI busmaster DMA\n");
2815                 return i;
2816         }
2817         if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2818                 printk(KERN_WARNING PFX "out of memory\n");
2819                 return -ENOMEM;
2820         }
2821         memset(s, 0, sizeof(struct es1371_state));
2822         init_waitqueue_head(&s->dma_adc.wait);
2823         init_waitqueue_head(&s->dma_dac1.wait);
2824         init_waitqueue_head(&s->dma_dac2.wait);
2825         init_waitqueue_head(&s->open_wait);
2826         init_waitqueue_head(&s->midi.iwait);
2827         init_waitqueue_head(&s->midi.owait);
2828         init_MUTEX(&s->open_sem);
2829         spin_lock_init(&s->lock);
2830         s->magic = ES1371_MAGIC;
2831         s->dev = pcidev;
2832         s->io = pci_resource_start(pcidev, 0);
2833         s->irq = pcidev->irq;
2834         s->vendor = pcidev->vendor;
2835         s->device = pcidev->device;
2836         pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2837         s->codec.private_data = s;
2838         s->codec.id = 0;
2839         s->codec.codec_read = rdcodec;
2840         s->codec.codec_write = wrcodec;
2841         printk(KERN_INFO PFX "found chip, vendor id 0x%04x device id 0x%04x revision 0x%02x\n",
2842                s->vendor, s->device, s->rev);
2843         if (!request_region(s->io, ES1371_EXTENT, "es1371")) {
2844                 printk(KERN_ERR PFX "io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2845                 res = -EBUSY;
2846                 goto err_region;
2847         }
2848         if ((res=request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371",s))) {
2849                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
2850                 goto err_irq;
2851         }
2852         printk(KERN_INFO PFX "found es1371 rev %d at io %#lx irq %u\n"
2853                KERN_INFO PFX "features: joystick 0x%x\n", s->rev, s->io, s->irq, joystick[devindex]);
2854         /* register devices */
2855         if ((res=(s->dev_audio = register_sound_dsp(&es1371_audio_fops,-1))<0))
2856                 goto err_dev1;
2857         if ((res=(s->codec.dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1)) < 0))
2858                 goto err_dev2;
2859         if ((res=(s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1)) < 0))
2860                 goto err_dev3;
2861         if ((res=(s->dev_midi = register_sound_midi(&es1371_midi_fops, -1))<0 ))
2862                 goto err_dev4;
2863 #ifdef ES1371_DEBUG
2864         /* intialize the debug proc device */
2865         s->ps = create_proc_read_entry("es1371",0,NULL,proc_es1371_dump,NULL);
2866 #endif /* ES1371_DEBUG */
2867
2868         /* initialize codec registers */
2869         s->ctrl = 0;
2870
2871         /* Check amplifier requirements */
2872
2873         if(amplifier)
2874                 s->ctrl |= CTRL_GPIO_OUT0;
2875         else for(idx = 0; amplifier_needed[idx].svid != PCI_ANY_ID; idx++)
2876         {
2877                 if(pcidev->subsystem_vendor == amplifier_needed[idx].svid &&
2878                    pcidev->subsystem_device == amplifier_needed[idx].sdid)
2879                 {
2880                         s->ctrl |= CTRL_GPIO_OUT0;   /* turn internal amplifier on */
2881                         printk(KERN_INFO PFX "Enabling internal amplifier.\n");
2882                 }
2883         }
2884         s->gameport.io = 0;
2885         if ((joystick[devindex] & ~0x18) == 0x200) {
2886                 if (!request_region(joystick[devindex], JOY_EXTENT, "es1371"))
2887                         printk(KERN_ERR PFX "joystick address 0x%x already in use\n", joystick[devindex]);
2888                 else {
2889                         s->ctrl |= CTRL_JYSTK_EN | (((joystick[devindex] >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2890                         s->gameport.io = joystick[devindex];
2891                 }
2892         } else if (joystick[devindex] == 1) {
2893                 for (i = 0x218; i >= 0x200; i -= 0x08) {
2894                         if (request_region(i, JOY_EXTENT, "es1371")) {
2895                                 s->ctrl |= CTRL_JYSTK_EN | (((i >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2896                                 s->gameport.io = i;
2897                                 break;
2898                         }
2899                 }
2900                 if (!s->gameport.io)
2901                         printk(KERN_ERR PFX "no free joystick address found\n");
2902         }
2903         s->sctrl = 0;
2904         cssr = 0;
2905         s->spdif_volume = -1;
2906         /* check to see if s/pdif mode is being requested */
2907         if (spdif[devindex]) {
2908                 if (s->rev >= 4) {
2909                         printk(KERN_INFO PFX "enabling S/PDIF output\n");
2910                         s->spdif_volume = 0;
2911                         cssr |= STAT_EN_SPDIF;
2912                         s->ctrl |= CTRL_SPDIFEN_B;
2913                         if (nomix[devindex]) /* don't mix analog inputs to s/pdif output */
2914                                 s->ctrl |= CTRL_RECEN_B;
2915                 } else {
2916                         printk(KERN_ERR PFX "revision %d does not support S/PDIF\n", s->rev);
2917                 }
2918         }
2919         /* initialize the chips */
2920         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2921         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2922         outl(0, s->io+ES1371_REG_LEGACY);
2923         pci_set_master(pcidev);  /* enable bus mastering */
2924         /* if we are a 5880 turn on the AC97 */
2925         if (s->vendor == PCI_VENDOR_ID_ENSONIQ &&
2926             ((s->device == PCI_DEVICE_ID_ENSONIQ_CT5880 && s->rev >= CT5880REV_CT5880_C) ||
2927              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_CT5880_A) ||
2928              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_ES1373_8))) {
2929                 cssr |= CSTAT_5880_AC97_RST;
2930                 outl(cssr, s->io+ES1371_REG_STATUS);
2931                 /* need to delay around 20ms(bleech) to give
2932                    some CODECs enough time to wakeup */
2933                 tmo = jiffies + (HZ / 50) + 1;
2934                 for (;;) {
2935                         tmo2 = tmo - jiffies;
2936                         if (tmo2 <= 0)
2937                                 break;
2938                         schedule_timeout(tmo2);
2939                 }
2940         }
2941         /* AC97 warm reset to start the bitclk */
2942         outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2943         udelay(2);
2944         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2945         /* init the sample rate converter */
2946         src_init(s);
2947         /* codec init */
2948         if (!ac97_probe_codec(&s->codec)) {
2949                 res = -ENODEV;
2950                 goto err_gp;
2951         }
2952         /* set default values */
2953
2954         fs = get_fs();
2955         set_fs(KERNEL_DS);
2956         val = SOUND_MASK_LINE;
2957         mixdev_ioctl(&s->codec, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2958         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2959                 val = initvol[i].vol;
2960                 mixdev_ioctl(&s->codec, initvol[i].mixch, (unsigned long)&val);
2961         }
2962         /* mute master and PCM when in S/PDIF mode */
2963         if (s->spdif_volume != -1) {
2964                 val = 0x0000;
2965                 s->codec.mixer_ioctl(&s->codec, SOUND_MIXER_WRITE_VOLUME, (unsigned long)&val);
2966                 s->codec.mixer_ioctl(&s->codec, SOUND_MIXER_WRITE_PCM, (unsigned long)&val);
2967         }
2968         set_fs(fs);
2969         /* turn on S/PDIF output driver if requested */
2970         outl(cssr, s->io+ES1371_REG_STATUS);
2971         /* register gameport */
2972         if(s->gameport.io)
2973                 gameport_register_port(&s->gameport);
2974         /* store it in the driver field */
2975         pci_set_drvdata(pcidev, s);
2976         /* put it into driver list */
2977         list_add_tail(&s->devs, &devs);
2978         /* increment devindex */
2979         if (devindex < NR_DEVICE-1)
2980                 devindex++;
2981         return 0;
2982
2983  err_gp:
2984         if (s->gameport.io)
2985                 release_region(s->gameport.io, JOY_EXTENT);
2986  err_dev4:
2987         unregister_sound_dsp(s->dev_dac);
2988  err_dev3:
2989         unregister_sound_mixer(s->codec.dev_mixer);
2990  err_dev2:
2991         unregister_sound_dsp(s->dev_audio);
2992  err_dev1:
2993         printk(KERN_ERR PFX "cannot register misc device\n");
2994         free_irq(s->irq, s);
2995  err_irq:
2996         release_region(s->io, ES1371_EXTENT);
2997  err_region:
2998         kfree(s);
2999         return res;
3000 }
3001
3002 static void __devinit es1371_remove(struct pci_dev *dev)
3003 {
3004         struct es1371_state *s = pci_get_drvdata(dev);
3005
3006         if (!s)
3007                 return;
3008         list_del(&s->devs);
3009 #ifdef ES1371_DEBUG
3010         if (s->ps)
3011                 remove_proc_entry("es1371", NULL);
3012 #endif /* ES1371_DEBUG */
3013         outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3014         outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3015         synchronize_irq();
3016         free_irq(s->irq, s);
3017         if (s->gameport.io) {
3018                 gameport_unregister_port(&s->gameport);
3019                 release_region(s->gameport.io, JOY_EXTENT);
3020         }
3021         release_region(s->io, ES1371_EXTENT);
3022         unregister_sound_dsp(s->dev_audio);
3023         unregister_sound_mixer(s->codec.dev_mixer);
3024         unregister_sound_dsp(s->dev_dac);
3025         unregister_sound_midi(s->dev_midi);
3026         kfree(s);
3027         pci_set_drvdata(dev, NULL);
3028 }
3029
3030 static struct pci_device_id id_table[] __devinitdata = {
3031         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3032         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3033         { PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3034         { 0, }
3035 };
3036
3037 MODULE_DEVICE_TABLE(pci, id_table);
3038
3039 static struct pci_driver es1371_driver = {
3040         name: "es1371",
3041         id_table: id_table,
3042         probe: es1371_probe,
3043         remove: es1371_remove
3044 };
3045
3046 static int __init init_es1371(void)
3047 {
3048         if (!pci_present())   /* No PCI bus in this machine! */
3049                 return -ENODEV;
3050         printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n");
3051         return pci_module_init(&es1371_driver);
3052 }
3053
3054 static void __exit cleanup_es1371(void)
3055 {
3056         printk(KERN_INFO PFX "unloading\n");
3057         pci_unregister_driver(&es1371_driver);
3058 }
3059
3060 module_init(init_es1371);
3061 module_exit(cleanup_es1371);
3062
3063 /* --------------------------------------------------------------------- */
3064
3065 #ifndef MODULE
3066
3067 /* format is: es1371=[joystick] */
3068
3069 static int __init es1371_setup(char *str)
3070 {
3071         static unsigned __initdata nr_dev = 0;
3072
3073         if (nr_dev >= NR_DEVICE)
3074                 return 0;
3075         if (get_option(&str, &joystick[nr_dev]) == 2)
3076                 (void)get_option(&str, &spdif[nr_dev]);
3077         nr_dev++;
3078         return 1;
3079 }
3080
3081 __setup("es1371=", es1371_setup);
3082
3083 #endif /* MODULE */