drivers/sound/hal2.c

   1 /*
   2  *  Driver for HAL2 sound processors
   3  *  Copyright (c) 2001, 2002 Ladislav Michl <ladis@psi.cz>
   4  *
   5  *  Based on Ulf Carlsson's code.
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2 as
   9  *  published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *  Supported devices:
  21  *  /dev/dsp    standard dsp device, (mostly) OSS compatible
  22  *  /dev/mixer  standard mixer device, (mostly) OSS compatible
  23  *
  24  *  BUGS:
  25  *  + Driver currently supports indigo mode only.
  26  *  + Recording doesn't work. I guess that it is caused by PBUS channel
  27  *    misconfiguration, but until I get relevant info I'm unable to fix it.
  28  */
  29
  30 #include <linux/module.h>
  31 #include <linux/sched.h>
  32 #include <linux/init.h>
  33 #include <linux/slab.h>
  34 #include <linux/poll.h>
  35 #include <linux/sound.h>
  36 #include <linux/soundcard.h>
  37 #include <asm/io.h>
  38 #include <asm/uaccess.h>
  39 #include <asm/sgi/sgint23.h>
  40
  41 #include "hal2.h"
  42
  43 #if 0
  44 #define DEBUG(args...)          printk(args)
  45 #else
  46 #define DEBUG(args...)
  47 #endif
  48
  49 #if 0
  50 #define DEBUG_MIX(args...)      printk(args)
  51 #else
  52 #define DEBUG_MIX(args...)
  53 #endif
  54
  55 #define H2_INDIRECT_WAIT(regs)  while (regs->isr & H2_ISR_TSTATUS);
  56
  57 #define H2_READ_ADDR(addr)      (addr | (1<<7))
  58 #define H2_WRITE_ADDR(addr)     (addr)
  59
  60 static char *hal2str = "HAL2 audio";
  61 static int ibuffers = 32;
  62 static int obuffers = 32;
  63
  64 /* I doubt anyone has a machine with two HAL2 cards. It's possible to
  65  * have two HPC's, so it is probably possible to have two HAL2 cards.
  66  * Try to deal with it, but note that it is not tested.
  67  */
  68 #define MAXCARDS        2
  69 static hal2_card_t* hal2_card[MAXCARDS];
  70
  71 static const struct {
  72         unsigned char idx:4, avail:1;
  73 } mixtable[SOUND_MIXER_NRDEVICES] = {
  74         [SOUND_MIXER_PCM] = { H2_MIX_OUTPUT_ATT, 1 },   /* voice */
  75         [SOUND_MIXER_MIC] = { H2_MIX_INPUT_GAIN, 1 },   /* mic */
  76 };
  77
  78 #define H2_SUPPORTED_FORMATS    (AFMT_S16_LE | AFMT_S16_BE)
  79
  80 static inline void hal2_isr_write(hal2_card_t *hal2, u32 val)
  81 {
  82         hal2->ctl_regs->isr = val;
  83 }
  84
  85 static inline u32 hal2_isr_look(hal2_card_t *hal2)
  86 {
  87         return hal2->ctl_regs->isr;
  88 }
  89
  90 static inline u32 hal2_rev_look(hal2_card_t *hal2)
  91 {
  92         return hal2->ctl_regs->rev;
  93 }
  94
  95 #if 0
  96 static u16 hal2_i_look16(hal2_card_t *hal2, u32 addr)
  97 {
  98         hal2_ctl_regs_t *regs = hal2->ctl_regs;
  99
 100         regs->iar = H2_READ_ADDR(addr);
 101         H2_INDIRECT_WAIT(regs);
 102         return (regs->idr0 & 0xffff);
 103 }
 104 #endif
 105
 106 static u32 hal2_i_look32(hal2_card_t *hal2, u32 addr)
 107 {
 108         u32 ret;
 109         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 110
 111         regs->iar = H2_READ_ADDR(addr);
 112         H2_INDIRECT_WAIT(regs);
 113         ret = regs->idr0 & 0xffff;
 114         regs->iar = H2_READ_ADDR(addr | 0x1);
 115         H2_INDIRECT_WAIT(regs);
 116         ret |= (regs->idr0 & 0xffff) << 16;
 117         return ret;
 118 }
 119
 120 static void hal2_i_write16(hal2_card_t *hal2, u32 addr, u16 val)
 121 {
 122         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 123
 124         regs->idr0 = val;
 125         regs->idr1 = 0;
 126         regs->idr2 = 0;
 127         regs->idr3 = 0;
 128         regs->iar = H2_WRITE_ADDR(addr);
 129         H2_INDIRECT_WAIT(regs);
 130 }
 131
 132 static void hal2_i_write32(hal2_card_t *hal2, u32 addr, u32 val)
 133 {
 134         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 135
 136         regs->idr0 = val & 0xffff;
 137         regs->idr1 = val >> 16;
 138         regs->idr2 = 0;
 139         regs->idr3 = 0;
 140         regs->iar = H2_WRITE_ADDR(addr);
 141         H2_INDIRECT_WAIT(regs);
 142 }
 143
 144 static void hal2_i_setbit16(hal2_card_t *hal2, u32 addr, u16 bit)
 145 {
 146         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 147
 148         regs->iar = H2_READ_ADDR(addr);
 149         H2_INDIRECT_WAIT(regs);
 150         regs->idr0 = regs->idr0 | bit;
 151         regs->idr1 = 0;
 152         regs->idr2 = 0;
 153         regs->idr3 = 0;
 154         regs->iar = H2_WRITE_ADDR(addr);
 155         H2_INDIRECT_WAIT(regs);
 156 }
 157
 158 static void hal2_i_setbit32(hal2_card_t *hal2, u32 addr, u32 bit)
 159 {
 160         u32 tmp;
 161         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 162
 163         regs->iar = H2_READ_ADDR(addr);
 164         H2_INDIRECT_WAIT(regs);
 165         tmp = regs->idr0 | (regs->idr1 << 16) | bit;
 166         regs->idr0 = tmp & 0xffff;
 167         regs->idr1 = tmp >> 16;
 168         regs->idr2 = 0;
 169         regs->idr3 = 0;
 170         regs->iar = H2_WRITE_ADDR(addr);
 171         H2_INDIRECT_WAIT(regs);
 172 }
 173
 174 static void hal2_i_clearbit16(hal2_card_t *hal2, u32 addr, u16 bit)
 175 {
 176         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 177
 178         regs->iar = H2_READ_ADDR(addr);
 179         H2_INDIRECT_WAIT(regs);
 180         regs->idr0 = regs->idr0 & ~bit;
 181         regs->idr1 = 0;
 182         regs->idr2 = 0;
 183         regs->idr3 = 0;
 184         regs->iar = H2_WRITE_ADDR(addr);
 185         H2_INDIRECT_WAIT(regs);
 186 }
 187
 188 #if 0
 189 static void hal2_i_clearbit32(hal2_card_t *hal2, u32 addr, u32 bit)
 190 {
 191         u32 tmp;
 192         hal2_ctl_regs_t *regs = hal2->ctl_regs;
 193
 194         regs->iar = H2_READ_ADDR(addr);
 195         H2_INDIRECT_WAIT(regs);
 196         tmp = (regs->idr0 | (regs->idr1 << 16)) & ~bit;
 197         regs->idr0 = tmp & 0xffff;
 198         regs->idr1 = tmp >> 16;
 199         regs->idr2 = 0;
 200         regs->idr3 = 0;
 201         regs->iar = H2_WRITE_ADDR(addr);
 202         H2_INDIRECT_WAIT(regs);
 203 }
 204 #endif
 205
 206 #ifdef HAL2_DEBUG
 207 static void hal2_dump_regs(hal2_card_t *hal2)
 208 {
 209         printk("isr: %08hx ", hal2_isr_look(hal2));
 210         printk("rev: %08hx\n", hal2_rev_look(hal2));
 211         printk("relay: %04hx\n", hal2_i_look16(hal2, H2I_RELAY_C));
 212         printk("port en: %04hx ", hal2_i_look16(hal2, H2I_DMA_PORT_EN));
 213         printk("dma end: %04hx ", hal2_i_look16(hal2, H2I_DMA_END));
 214         printk("dma drv: %04hx\n", hal2_i_look16(hal2, H2I_DMA_DRV));
 215         printk("syn ctl: %04hx ", hal2_i_look16(hal2, H2I_SYNTH_C));
 216         printk("aesrx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESRX_C));
 217         printk("aestx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESTX_C));
 218         printk("dac ctl1: %04hx ", hal2_i_look16(hal2, H2I_ADC_C1));
 219         printk("dac ctl2: %08lx ", hal2_i_look32(hal2, H2I_ADC_C2));
 220         printk("adc ctl1: %04hx ", hal2_i_look16(hal2, H2I_DAC_C1));
 221         printk("adc ctl2: %08lx ", hal2_i_look32(hal2, H2I_DAC_C2));
 222         printk("syn map: %04hx\n", hal2_i_look16(hal2, H2I_SYNTH_MAP_C));
 223         printk("bres1 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES1_C1));
 224         printk("bres1 ctl2: %04lx ", hal2_i_look32(hal2, H2I_BRES1_C2));
 225         printk("bres2 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES2_C1));
 226         printk("bres2 ctl2: %04lx ", hal2_i_look32(hal2, H2I_BRES2_C2));
 227         printk("bres3 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES3_C1));
 228         printk("bres3 ctl2: %04lx\n", hal2_i_look32(hal2, H2I_BRES3_C2));
 229 }
 230 #endif
 231
 232 static hal2_card_t* hal2_dsp_find_card(int minor)
 233 {
 234         int i;
 235
 236         for (i = 0; i < MAXCARDS; i++)
 237                 if (hal2_card[i] != NULL && hal2_card[i]->dev_dsp == minor)
 238                         return hal2_card[i];
 239         return NULL;
 240 }
 241
 242 static hal2_card_t* hal2_mixer_find_card(int minor)
 243 {
 244         int i;
 245
 246         for (i = 0; i < MAXCARDS; i++)
 247                 if (hal2_card[i] != NULL && hal2_card[i]->dev_mixer == minor)
 248                         return hal2_card[i];
 249         return NULL;
 250 }
 251
 252
 253 static void hal2_dac_interrupt(hal2_codec_t *dac)
 254 {
 255         int running;
 256
 257         spin_lock(&dac->lock);
 258
 259         /* if tail buffer contains zero samples DMA stream was already
 260          * stopped */
 261         running = dac->tail->info.cnt;
 262         dac->tail->info.cnt = 0;
 263         dac->tail->info.desc.cntinfo = HPCDMA_XIE | HPCDMA_EOX;
 264         dma_cache_wback_inv((unsigned long) dac->tail,
 265                             sizeof(struct hpc_dma_desc));
 266         /* we just proccessed empty buffer, don't update tail pointer */
 267         if (running)
 268                 dac->tail = dac->tail->info.next;
 269
 270         spin_unlock(&dac->lock);
 271
 272         wake_up(&dac->dma_wait);
 273 }
 274
 275 static void hal2_adc_interrupt(hal2_codec_t *adc)
 276 {
 277         int running;
 278
 279         spin_lock(&adc->lock);
 280
 281         /* if head buffer contains nonzero samples DMA stream was already
 282          * stopped */
 283         running = !adc->head->info.cnt;
 284         adc->head->info.cnt = H2_BUFFER_SIZE;
 285         adc->head->info.desc.cntinfo = HPCDMA_XIE | HPCDMA_EOX;
 286         dma_cache_wback_inv((unsigned long) adc->head,
 287                             sizeof(struct hpc_dma_desc));
 288         /* we just proccessed empty buffer, don't update head pointer */
 289         if (running) {
 290                 dma_cache_inv((unsigned long) adc->head->data, H2_BUFFER_SIZE);
 291                 adc->head = adc->head->info.next;
 292         }
 293
 294         spin_unlock(&adc->lock);
 295
 296         wake_up(&adc->dma_wait);
 297 }
 298
 299 static void hal2_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 300 {
 301         hal2_card_t *hal2 = (hal2_card_t*)dev_id;
 302
 303         /* decide what caused this interrupt */
 304         if (hal2->dac.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT)
 305                 hal2_dac_interrupt(&hal2->dac);
 306         if (hal2->adc.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT)
 307                 hal2_adc_interrupt(&hal2->adc);
 308 }
 309
 310 static int hal2_compute_rate(hal2_codec_t *codec, unsigned int rate)
 311 {
 312         unsigned short inc;
 313
 314         /* We default to 44.1 kHz and if it isn't possible to fall back to
 315          * 48.0 kHz with the needed adjustments of real_rate.
 316          */
 317
 318         DEBUG("rate: %d\n", rate);
 319
 320         /* Refer to CS4216 data sheet */
 321         if (rate < 4000)
 322                 rate = 4000;
 323         if (rate > 50000)
 324                 rate = 50000;
 325
 326         /* Note: This is NOT the way they set up the bresenham clock generators
 327          * in the specification. I've tried to implement that method but it
 328          * doesn't work. It's probably another silly bug in the spec.
 329          *
 330          * I accidently discovered this method while I was testing and it seems
 331          * to work very well with all frequencies, and thee shall follow rule #1
 332          * of programming :-)
 333          */
 334
 335         if (44100 % rate == 0) {
 336                 inc = 44100 / rate;
 337                 if (inc < 1) inc = 1;
 338                 codec->master = 44100;
 339         } else {
 340                 inc = 48000 / rate;
 341                 if (inc < 1) inc = 1;
 342                 rate = 48000 / inc;
 343                 codec->master = 48000;
 344         }
 345         codec->inc = inc;
 346         codec->mod = 1;
 347
 348         DEBUG("real_rate: %d\n", rate);
 349
 350         return rate;
 351 }
 352
 353 static void hal2_set_dac_rate(hal2_card_t *hal2)
 354 {
 355         unsigned int master = hal2->dac.master;
 356         int inc = hal2->dac.inc;
 357         int mod = hal2->dac.mod;
 358
 359         DEBUG("master: %d inc: %d mod: %d\n", master, inc, mod);
 360
 361         hal2_i_write16(hal2, H2I_BRES1_C1, (master == 44100) ? 1 : 0);
 362         hal2_i_write32(hal2, H2I_BRES1_C2, ((0xffff & (mod - inc - 1)) << 16) | 1);
 363 }
 364
 365 static void hal2_set_adc_rate(hal2_card_t *hal2)
 366 {
 367         unsigned int master = hal2->adc.master;
 368         int inc = hal2->adc.inc;
 369         int mod = hal2->adc.mod;
 370
 371         DEBUG("master: %d inc: %d mod: %d\n", master, inc, mod);
 372
 373         hal2_i_write16(hal2, H2I_BRES2_C1, (master == 44100) ? 1 : 0);
 374         hal2_i_write32(hal2, H2I_BRES2_C2, ((0xffff & (mod - inc - 1)) << 16) | 1);
 375 }
 376
 377 static void hal2_setup_dac(hal2_card_t *hal2)
 378 {
 379         unsigned int fifobeg, fifoend, highwater, sample_size;
 380         hal2_pbus_t *pbus = &hal2->dac.pbus;
 381
 382         DEBUG("hal2_setup_dac\n");
 383
 384         /* Now we set up some PBUS information. The PBUS needs information about
 385          * what portion of the fifo it will use. If it's receiving or
 386          * transmitting, and finally whether the stream is little endian or big
 387          * endian. The information is written later, on the start call.
 388          */
 389         sample_size = 2 * hal2->dac.voices;
 390
 391         /* Fifo should be set to hold exactly four samples. Highwater mark
 392          * should be set to two samples. */
 393         highwater = (sample_size * 2) >> 1;     /* halfwords */
 394         fifobeg = 0;                            /* playback is first */
 395         fifoend = (sample_size * 4) >> 3;       /* doublewords */
 396         pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_LD |
 397                      (highwater << 8) | (fifobeg << 16) | (fifoend << 24);
 398         /* We disable everything before we do anything at all */
 399         pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
 400         hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX);
 401         hal2_i_clearbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr));
 402         /* Setup the HAL2 for playback */
 403         hal2_set_dac_rate(hal2);
 404         /* We are using 1st Bresenham clock generator for playback */
 405         hal2_i_write16(hal2, H2I_DAC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT)
 406                         | (1 << H2I_C1_CLKID_SHIFT)
 407                         | (hal2->dac.voices << H2I_C1_DATAT_SHIFT));
 408 }
 409
 410 static void hal2_setup_adc(hal2_card_t *hal2)
 411 {
 412         unsigned int fifobeg, fifoend, highwater, sample_size;
 413         hal2_pbus_t *pbus = &hal2->adc.pbus;
 414
 415         DEBUG("hal2_setup_adc\n");
 416
 417         sample_size = 2 * hal2->adc.voices;
 418
 419         highwater = (sample_size * 2) >> 1;             /* halfwords */
 420         fifobeg = (4 * 4) >> 3;                         /* record is second */
 421         fifoend = (4 * 4 + sample_size * 4) >> 3;       /* doublewords */
 422         pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_RCV | HPC3_PDMACTRL_LD |
 423                      (highwater << 8) | (fifobeg << 16) | (fifoend << 24);
 424         pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
 425         hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR);
 426         hal2_i_clearbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr));
 427         /* Setup the HAL2 for record */
 428         hal2_set_adc_rate(hal2);
 429         /* We are using 2nd Bresenham clock generator for record */
 430         hal2_i_write16(hal2, H2I_ADC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT)
 431                         | (2 << H2I_C1_CLKID_SHIFT)
 432                         | (hal2->adc.voices << H2I_C1_DATAT_SHIFT));
 433 }
 434
 435 static void hal2_start_dac(hal2_card_t *hal2)
 436 {
 437         hal2_pbus_t *pbus = &hal2->dac.pbus;
 438
 439         DEBUG("hal2_start_dac\n");
 440
 441         pbus->pbus->pbdma_dptr = PHYSADDR(hal2->dac.tail);
 442         pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT;
 443
 444         /* set endianess */
 445         if (hal2->dac.format & AFMT_S16_LE)
 446                 hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX);
 447         else
 448                 hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX);
 449         /* set DMA bus */
 450         hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr));
 451         /* enable DAC */
 452         hal2_i_setbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX);
 453 }
 454
 455 static void hal2_start_adc(hal2_card_t *hal2)
 456 {
 457         hal2_pbus_t *pbus = &hal2->adc.pbus;
 458
 459         DEBUG("hal2_start_adc\n");
 460
 461         pbus->pbus->pbdma_dptr = PHYSADDR(hal2->adc.head);
 462         pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT;
 463
 464         /* set endianess */
 465         if (hal2->adc.format & AFMT_S16_LE)
 466                 hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR);
 467         else
 468                 hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR);
 469         /* set DMA bus */
 470         hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr));
 471         /* enable ADC */
 472         hal2_i_setbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR);
 473 }
 474
 475 static inline void hal2_stop_dac(hal2_card_t *hal2)
 476 {
 477         DEBUG("hal2_stop_dac\n");
 478
 479         hal2->dac.pbus.pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
 480         /* The HAL2 itself may remain enabled safely */
 481 }
 482
 483 static inline void hal2_stop_adc(hal2_card_t *hal2)
 484 {
 485         DEBUG("hal2_stop_adc\n");
 486
 487         hal2->adc.pbus.pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
 488 }
 489
 490 #define hal2_alloc_dac_dmabuf(hal2)     hal2_alloc_dmabuf(hal2, 1)
 491 #define hal2_alloc_adc_dmabuf(hal2)     hal2_alloc_dmabuf(hal2, 0)
 492 static int hal2_alloc_dmabuf(hal2_card_t *hal2, int is_dac)
 493 {
 494         int buffers, cntinfo;
 495         hal2_buf_t *buf, *prev;
 496         hal2_codec_t *codec;
 497
 498         if (is_dac) {
 499                 codec = &hal2->dac;
 500                 buffers = obuffers;
 501                 cntinfo = HPCDMA_XIE | HPCDMA_EOX;
 502         } else {
 503                 codec = &hal2->adc;
 504                 buffers = ibuffers;
 505                 cntinfo = HPCDMA_XIE | H2_BUFFER_SIZE;
 506         }
 507
 508         DEBUG("allocating %d DMA buffers.\n", buffers);
 509
 510         buf = (hal2_buf_t*) get_zeroed_page(GFP_KERNEL);
 511         if (!buf)
 512                 return -ENOMEM;
 513         codec->head = buf;
 514         codec->tail = buf;
 515
 516         while (--buffers) {
 517                 buf->info.desc.pbuf = PHYSADDR(&buf->data);
 518                 buf->info.desc.cntinfo = cntinfo;
 519                 buf->info.cnt = 0;
 520                 prev = buf;
 521                 buf = (hal2_buf_t*) get_zeroed_page(GFP_KERNEL);
 522                 if (!buf) {
 523                         printk("HAL2: Not enough memory for DMA buffer.\n");
 524                         buf = codec->head;
 525                         while (buf) {
 526                                 prev = buf;
 527                                 free_page((unsigned long) buf);
 528                                 buf = prev->info.next;
 529                         }
 530                         return -ENOMEM;
 531                 }
 532                 prev->info.next = buf;
 533                 prev->info.desc.pnext = PHYSADDR(buf);
 534                 /* The PBUS can prolly not read this stuff when it's in
 535                  * the cache so we have to flush it back to main memory
 536                  */
 537                 dma_cache_wback_inv((unsigned long) prev, PAGE_SIZE);
 538         }
 539         buf->info.desc.pbuf = PHYSADDR(&buf->data);
 540         buf->info.desc.cntinfo = cntinfo;
 541         buf->info.cnt = 0;
 542         buf->info.next = codec->head;
 543         buf->info.desc.pnext = PHYSADDR(codec->head);
 544         dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 545
 546         return 0;
 547 }
 548
 549 #define hal2_free_dac_dmabuf(hal2)      hal2_free_dmabuf(hal2, 1)
 550 #define hal2_free_adc_dmabuf(hal2)      hal2_free_dmabuf(hal2, 0)
 551 static void hal2_free_dmabuf(hal2_card_t *hal2, int is_dac)
 552 {
 553         hal2_buf_t *buf, *next;
 554         hal2_codec_t *codec = (is_dac) ? &hal2->dac : &hal2->adc;
 555
 556         if (!codec->head)
 557                 return;
 558
 559         buf = codec->head->info.next;
 560         codec->head->info.next = NULL;
 561         while (buf) {
 562                 next = buf->info.next;
 563                 free_page((unsigned long) buf);
 564                 buf = next;
 565         }
 566         codec->head = codec->tail = NULL;
 567 }
 568
 569 /*
 570  * Add 'count' bytes to 'buffer' from DMA ring buffers. Return number of
 571  * bytes added or -EFAULT if copy_from_user failed.
 572  */
 573 static int hal2_get_buffer(hal2_card_t *hal2, char *buffer, int count)
 574 {
 575         unsigned long flags;
 576         int size, ret = 0;
 577         hal2_codec_t *adc = &hal2->adc;
 578
 579         spin_lock_irqsave(&adc->lock, flags);
 580
 581         DEBUG("getting %d bytes ", count);
 582
 583         /* enable DMA stream if there are no data */
 584         if (!(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) &&
 585             adc->tail->info.cnt == 0)
 586                 hal2_start_adc(hal2);
 587
 588         DEBUG("... ");
 589
 590         while (adc->tail->info.cnt > 0 && count > 0) {
 591                 size = min(adc->tail->info.cnt, count);
 592                 spin_unlock_irqrestore(&adc->lock, flags);
 593
 594                 if (copy_to_user(buffer, &adc->tail->data[H2_BUFFER_SIZE-size],
 595                                  size)) {
 596                         ret = -EFAULT;
 597                         goto out;
 598                 }
 599
 600                 spin_lock_irqsave(&adc->lock, flags);
 601
 602                 adc->tail->info.cnt -= size;
 603                 /* buffer is empty, update tail pointer */
 604                 if (adc->tail->info.cnt == 0) {
 605                         adc->tail->info.desc.cntinfo = HPCDMA_XIE |
 606                                                        H2_BUFFER_SIZE;
 607                         dma_cache_wback_inv((unsigned long) adc->tail,
 608                                             sizeof(struct hpc_dma_desc));
 609                         adc->tail = adc->tail->info.next;
 610                         /* enable DMA stream again if needed */
 611                         if (!(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT))
 612                                 hal2_start_adc(hal2);
 613
 614                 }
 615                 buffer += size;
 616                 ret += size;
 617                 count -= size;
 618
 619                 DEBUG("(%d) ", size);
 620         }
 621         spin_unlock_irqrestore(&adc->lock, flags);
 622 out:
 623         DEBUG("\n");
 624
 625         return ret;
 626 }
 627
 628 /*
 629  * Add 'count' bytes from 'buffer' to DMA ring buffers. Return number of
 630  * bytes added or -EFAULT if copy_from_user failed.
 631  */
 632 static int hal2_add_buffer(hal2_card_t *hal2, char *buffer, int count)
 633 {
 634         unsigned long flags;
 635         int size, ret = 0;
 636         hal2_codec_t *dac = &hal2->dac;
 637
 638         spin_lock_irqsave(&dac->lock, flags);
 639
 640         DEBUG("adding %d bytes ", count);
 641
 642         while (dac->head->info.cnt == 0 && count > 0) {
 643                 size = min((int)H2_BUFFER_SIZE, count);
 644                 spin_unlock_irqrestore(&dac->lock, flags);
 645
 646                 if (copy_from_user(dac->head->data, buffer, size)) {
 647                         ret = -EFAULT;
 648                         goto out;
 649                 }
 650                 spin_lock_irqsave(&dac->lock, flags);
 651
 652                 dac->head->info.desc.cntinfo = size | HPCDMA_XIE;
 653                 dac->head->info.cnt = size;
 654                 dma_cache_wback_inv((unsigned long) dac->head,
 655                                     size + PAGE_SIZE - H2_BUFFER_SIZE);
 656                 buffer += size;
 657                 ret += size;
 658                 count -= size;
 659                 dac->head = dac->head->info.next;
 660
 661                 DEBUG("(%d) ", size);
 662         }
 663         if (!(dac->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) && ret > 0)
 664                 hal2_start_dac(hal2);
 665
 666         spin_unlock_irqrestore(&dac->lock, flags);
 667 out:
 668         DEBUG("\n");
 669
 670         return ret;
 671 }
 672
 673 #define hal2_reset_dac_pointer(hal2)    hal2_reset_pointer(hal2, 1)
 674 #define hal2_reset_adc_pointer(hal2)    hal2_reset_pointer(hal2, 0)
 675 static void hal2_reset_pointer(hal2_card_t *hal2, int is_dac)
 676 {
 677         hal2_codec_t *codec = (is_dac) ? &hal2->dac : &hal2->adc;
 678
 679         DEBUG("hal2_reset_pointer\n");
 680
 681         codec->tail = codec->head;
 682         do {
 683                 codec->tail->info.desc.cntinfo = HPCDMA_XIE | (is_dac) ?
 684                                                  HPCDMA_EOX : H2_BUFFER_SIZE;
 685                 codec->tail->info.cnt = 0;
 686                 dma_cache_wback_inv((unsigned long) codec->tail,
 687                                     sizeof(struct hpc_dma_desc));
 688                 codec->tail = codec->tail->info.next;
 689         } while (codec->tail != codec->head);
 690 }
 691
 692 static int hal2_sync_dac(hal2_card_t *hal2)
 693 {
 694         DECLARE_WAITQUEUE(wait, current);
 695         hal2_codec_t *dac = &hal2->dac;
 696         int ret = 0;
 697         signed long timeout = 1000 * H2_BUFFER_SIZE * 2 * dac->voices *
 698                               HZ / dac->sample_rate / 900;
 699
 700         down(&dac->sem);
 701
 702         while (dac->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) {
 703                 add_wait_queue(&dac->dma_wait, &wait);
 704                 set_current_state(TASK_INTERRUPTIBLE);
 705                 if (!schedule_timeout(timeout))
 706                         /* We may get bogus timeout when system is
 707                          * heavily loaded */
 708                         if (dac->tail->info.cnt) {
 709                                 printk("HAL2: timeout...\n");
 710                                 ret = -ETIME;
 711                         }
 712                 if (signal_pending(current))
 713                         ret = -ERESTARTSYS;
 714                 if (ret) {
 715                         hal2_stop_dac(hal2);
 716                         hal2_reset_dac_pointer(hal2);
 717                 }
 718                 remove_wait_queue(&dac->dma_wait, &wait);
 719         }
 720
 721         up(&dac->sem);
 722
 723         return ret;
 724 }
 725
 726 static int hal2_write_mixer(hal2_card_t *hal2, int index, int vol)
 727 {
 728         unsigned int l, r;
 729
 730         DEBUG_MIX("mixer %d write\n", index);
 731
 732         if (index >= SOUND_MIXER_NRDEVICES || !mixtable[index].avail)
 733                 return -EINVAL;
 734
 735         r = (vol >> 8) & 0xff;
 736         if (r > 100)
 737                 r = 100;
 738         l = vol & 0xff;
 739         if (l > 100)
 740                 l = 100;
 741
 742         hal2->mixer.volume[mixtable[index].idx] = l | (r << 8);
 743
 744         switch (mixtable[index].idx) {
 745         case H2_MIX_OUTPUT_ATT: {
 746
 747                 DEBUG_MIX("output attenuator %d,%d\n", l, r);
 748
 749                 if (r | l) {
 750                         unsigned int tmp = hal2_i_look32(hal2, H2I_DAC_C2);
 751
 752                         tmp &= ~(H2I_C2_L_ATT_M | H2I_C2_R_ATT_M | H2I_C2_MUTE);
 753
 754                         /* Attenuator has five bits */
 755                         l = (31 * (100 - l) / 99);
 756                         r = (31 * (100 - r) / 99);
 757
 758                         DEBUG_MIX("left: %d, right %d\n", l, r);
 759
 760                         tmp |= (l << H2I_C2_L_ATT_SHIFT) & H2I_C2_L_ATT_M;
 761                         tmp |= (r << H2I_C2_R_ATT_SHIFT) & H2I_C2_R_ATT_M;
 762                         hal2_i_write32(hal2, H2I_DAC_C2, tmp);
 763                 } else
 764                         hal2_i_setbit32(hal2, H2I_DAC_C2, H2I_C2_MUTE);
 765         }
 766         case H2_MIX_INPUT_GAIN: {
 767                 /* TODO */
 768         }
 769         }
 770         return 0;
 771 }
 772
 773 static void hal2_init_mixer(hal2_card_t *hal2)
 774 {
 775         int i;
 776
 777         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
 778                 hal2_write_mixer(hal2, i, 100 | (100 << 8));
 779
 780 }
 781
 782 static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd,
 783                             unsigned long arg)
 784 {
 785         int val;
 786
 787         if (cmd == SOUND_MIXER_INFO) {
 788                 mixer_info info;
 789
 790                 strncpy(info.id, hal2str, sizeof(info.id));
 791                 strncpy(info.name, hal2str, sizeof(info.name));
 792                 info.modify_counter = hal2->mixer.modcnt;
 793                 if (copy_to_user((void *)arg, &info, sizeof(info)))
 794                         return -EFAULT;
 795                 return 0;
 796         }
 797         if (cmd == SOUND_OLD_MIXER_INFO) {
 798                 _old_mixer_info info;
 799
 800                 strncpy(info.id, hal2str, sizeof(info.id));
 801                 strncpy(info.name, hal2str, sizeof(info.name));
 802                 if (copy_to_user((void *)arg, &info, sizeof(info)))
 803                         return -EFAULT;
 804                 return 0;
 805         }
 806         if (cmd == OSS_GETVERSION)
 807                 return put_user(SOUND_VERSION, (int *)arg);
 808
 809         if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
 810                 return -EINVAL;
 811
 812         if (_IOC_DIR(cmd) == _IOC_READ) {
 813                 switch (_IOC_NR(cmd)) {
 814                 /* Give the current record source */
 815                 case SOUND_MIXER_RECSRC:
 816                         val = 0;        /* FIXME */
 817                         break;
 818                 /* Give the supported mixers, all of them support stereo */
 819                 case SOUND_MIXER_DEVMASK:
 820                 case SOUND_MIXER_STEREODEVS: {
 821                         int i;
 822
 823                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
 824                                 if (mixtable[i].avail)
 825                                         val |= 1 << i;
 826                         break;
 827                         }
 828                 /* Arg contains a bit for each supported recording source */
 829                 case SOUND_MIXER_RECMASK:
 830                         val = 0;
 831                         break;
 832                 case SOUND_MIXER_CAPS:
 833                         val = 0;
 834                         break;
 835                 /* Read a specific mixer */
 836                 default: {
 837                         int i = _IOC_NR(cmd);
 838
 839                         if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail)
 840                                 return -EINVAL;
 841                         val = hal2->mixer.volume[mixtable[i].idx];
 842                         break;
 843                         }
 844                 }
 845                 return put_user(val, (int *)arg);
 846         }
 847
 848         if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ))
 849                 return -EINVAL;
 850
 851         hal2->mixer.modcnt++;
 852
 853         if (get_user(val, (int *)arg))
 854                 return -EFAULT;
 855
 856         switch (_IOC_NR(cmd)) {
 857         /* Arg contains a bit for each recording source */
 858         case SOUND_MIXER_RECSRC:
 859                 return 0;       /* FIXME */
 860         default:
 861                 return hal2_write_mixer(hal2, _IOC_NR(cmd), val);
 862         }
 863
 864         return 0;
 865 }
 866
 867 static int hal2_open_mixdev(struct inode *inode, struct file *file)
 868 {
 869         hal2_card_t *hal2 = hal2_mixer_find_card(MINOR(inode->i_rdev));
 870
 871         if (hal2) {
 872                 file->private_data = hal2;
 873                 return 0;
 874         }
 875         return -ENODEV;
 876 }
 877
 878 static int hal2_release_mixdev(struct inode *inode, struct file *file)
 879 {
 880         return 0;
 881 }
 882
 883 static int hal2_ioctl_mixdev(struct inode *inode, struct file *file,
 884                              unsigned int cmd, unsigned long arg)
 885 {
 886         return hal2_mixer_ioctl((hal2_card_t *)file->private_data, cmd, arg);
 887 }
 888
 889
 890 static int hal2_ioctl(struct inode *inode, struct file *file,
 891                       unsigned int cmd, unsigned long arg)
 892 {
 893         int val;
 894         hal2_card_t *hal2 = (hal2_card_t *) file->private_data;
 895
 896         switch (cmd) {
 897         case OSS_GETVERSION:
 898                 return put_user(SOUND_VERSION, (int *)arg);
 899
 900         case SNDCTL_DSP_SYNC:
 901                 if (file->f_mode & FMODE_WRITE)
 902                         return hal2_sync_dac(hal2);
 903                 return 0;
 904
 905         case SNDCTL_DSP_SETDUPLEX:
 906                 return 0;
 907
 908         case SNDCTL_DSP_GETCAPS:
 909                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_MULTI, (int *)arg);
 910
 911         case SNDCTL_DSP_RESET:
 912                 if (file->f_mode & FMODE_READ) {
 913                         hal2_stop_adc(hal2);
 914                         hal2_reset_adc_pointer(hal2);
 915                 }
 916                 if (file->f_mode & FMODE_WRITE) {
 917                         hal2_stop_dac(hal2);
 918                         hal2_reset_dac_pointer(hal2);
 919                 }
 920                 return 0;
 921
 922         case SNDCTL_DSP_SPEED:
 923                 if (get_user(val, (int *)arg))
 924                         return -EFAULT;
 925                 if (file->f_mode & FMODE_READ) {
 926                         hal2_stop_adc(hal2);
 927                         val = hal2_compute_rate(&hal2->adc, val);
 928                         hal2->adc.sample_rate = val;
 929                         hal2_set_adc_rate(hal2);
 930                 }
 931                 if (file->f_mode & FMODE_WRITE) {
 932                         hal2_stop_dac(hal2);
 933                         val = hal2_compute_rate(&hal2->dac, val);
 934                         hal2->dac.sample_rate = val;
 935                         hal2_set_dac_rate(hal2);
 936                 }
 937                 return put_user(val, (int *)arg);
 938
 939         case SNDCTL_DSP_STEREO:
 940                 if (get_user(val, (int *)arg))
 941                         return -EFAULT;
 942                 if (file->f_mode & FMODE_READ) {
 943                         hal2_stop_adc(hal2);
 944                         hal2->adc.voices = (val) ? 2 : 1;
 945                         hal2_setup_adc(hal2);
 946                 }
 947                 if (file->f_mode & FMODE_WRITE) {
 948                         hal2_stop_dac(hal2);
 949                         hal2->dac.voices = (val) ? 2 : 1;
 950                         hal2_setup_dac(hal2);
 951                 }
 952                 return 0;
 953
 954         case SNDCTL_DSP_CHANNELS:
 955                 if (get_user(val, (int *)arg))
 956                         return -EFAULT;
 957                 if (val != 0) {
 958                         if (file->f_mode & FMODE_READ) {
 959                                 hal2_stop_adc(hal2);
 960                                 hal2->adc.voices = (val == 1) ? 1 : 2;
 961                                 hal2_setup_adc(hal2);
 962                         }
 963                         if (file->f_mode & FMODE_WRITE) {
 964                                 hal2_stop_dac(hal2);
 965                                 hal2->dac.voices = (val == 1) ? 1 : 2;
 966                                 hal2_setup_dac(hal2);
 967                         }
 968                 }
 969                 val = -EINVAL;
 970                 if (file->f_mode & FMODE_READ)
 971                         val = hal2->adc.voices;
 972                 if (file->f_mode & FMODE_WRITE)
 973                         val = hal2->dac.voices;
 974                 return put_user(val, (int *)arg);
 975
 976         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
 977                 return put_user(H2_SUPPORTED_FORMATS, (int *)arg);
 978
 979         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
 980                 if (get_user(val, (int *)arg))
 981                         return -EFAULT;
 982                 if (val != AFMT_QUERY) {
 983                         if (!(val & H2_SUPPORTED_FORMATS))
 984                                 return -EINVAL;
 985                         if (file->f_mode & FMODE_READ) {
 986                                 hal2_stop_adc(hal2);
 987                                 hal2->adc.format = val;
 988                                 hal2_setup_adc(hal2);
 989                         }
 990                         if (file->f_mode & FMODE_WRITE) {
 991                                 hal2_stop_dac(hal2);
 992                                 hal2->dac.format = val;
 993                                 hal2_setup_dac(hal2);
 994                         }
 995                 } else {
 996                         val = -EINVAL;
 997                         if (file->f_mode & FMODE_READ)
 998                                 val = hal2->adc.format;
 999                         if (file->f_mode & FMODE_WRITE)
1000                                 val = hal2->dac.format;
1001                 }
1002                 return put_user(val, (int *)arg);
1003
1004         case SNDCTL_DSP_POST:
1005                 return 0;
1006
1007         case SNDCTL_DSP_GETOSPACE: {
1008                 unsigned long flags;
1009                 audio_buf_info info;
1010                 hal2_buf_t *buf;
1011                 hal2_codec_t *dac = &hal2->dac;
1012
1013                 if (!(file->f_mode & FMODE_WRITE))
1014                         return -EINVAL;
1015
1016                 spin_lock_irqsave(&dac->lock, flags);
1017                 info.fragments = 0;
1018                 buf = dac->head;
1019                 while (buf->info.cnt == 0 && buf != dac->tail) {
1020                         info.fragments++;
1021                         buf = buf->info.next;
1022                 }
1023                 spin_unlock_irqrestore(&dac->lock, flags);
1024
1025                 info.fragstotal = obuffers;
1026                 info.fragsize = H2_BUFFER_SIZE;
1027                 info.bytes = info.fragsize * info.fragments;
1028
1029                 return copy_to_user((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
1030         }
1031
1032         case SNDCTL_DSP_GETISPACE: {
1033                 unsigned long flags;
1034                 audio_buf_info info;
1035                 hal2_buf_t *buf;
1036                 hal2_codec_t *adc = &hal2->adc;
1037
1038                 if (!(file->f_mode & FMODE_READ))
1039                         return -EINVAL;
1040
1041                 spin_lock_irqsave(&adc->lock, flags);
1042                 info.fragments = 0;
1043                 info.bytes = 0;
1044                 buf = adc->tail;
1045                 while (buf->info.cnt > 0 && buf != adc->head) {
1046                         info.fragments++;
1047                         info.bytes += buf->info.cnt;
1048                         buf = buf->info.next;
1049                 }
1050                 spin_unlock_irqrestore(&adc->lock, flags);
1051
1052                 info.fragstotal = ibuffers;
1053                 info.fragsize = H2_BUFFER_SIZE;
1054
1055                 return copy_to_user((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
1056         }
1057
1058         case SNDCTL_DSP_NONBLOCK:
1059                 file->f_flags |= O_NONBLOCK;
1060                 return 0;
1061
1062         case SNDCTL_DSP_GETBLKSIZE:
1063                 return put_user(H2_BUFFER_SIZE, (int *)arg);
1064
1065         case SNDCTL_DSP_SETFRAGMENT:
1066                 return 0;
1067
1068         case SOUND_PCM_READ_RATE:
1069                 val = -EINVAL;
1070                 if (file->f_mode & FMODE_READ)
1071                         val = hal2->adc.sample_rate;
1072                 if (file->f_mode & FMODE_WRITE)
1073                         val = hal2->dac.sample_rate;
1074                 return put_user(val, (int *)arg);
1075
1076         case SOUND_PCM_READ_CHANNELS:
1077                 val = -EINVAL;
1078                 if (file->f_mode & FMODE_READ)
1079                         val = hal2->adc.voices;
1080                 if (file->f_mode & FMODE_WRITE)
1081                         val = hal2->dac.voices;
1082                 return put_user(val, (int *)arg);
1083
1084         case SOUND_PCM_READ_BITS:
1085                 val = 16;
1086                 return put_user(val, (int *)arg);
1087         }
1088
1089         return hal2_mixer_ioctl(hal2, cmd, arg);
1090 }
1091
1092 static ssize_t hal2_read(struct file *file, char *buffer,
1093                          size_t count, loff_t *ppos)
1094 {
1095         ssize_t err;
1096         hal2_card_t *hal2 = (hal2_card_t *) file->private_data;
1097         hal2_codec_t *adc = &hal2->adc;
1098
1099         if (count == 0)
1100                 return 0;
1101         if (ppos != &file->f_pos)
1102                 return -ESPIPE;
1103
1104         down(&adc->sem);
1105
1106         if (file->f_flags & O_NONBLOCK) {
1107                 err = hal2_get_buffer(hal2, buffer, count);
1108                 err = err == 0 ? -EAGAIN : err;
1109         } else {
1110                 do {
1111                         /* ~10% longer */
1112                         signed long timeout = 1000 * H2_BUFFER_SIZE *
1113                                 2 * adc->voices * HZ / adc->sample_rate / 900;
1114                         DECLARE_WAITQUEUE(wait, current);
1115                         ssize_t cnt = 0;
1116
1117                         err = hal2_get_buffer(hal2, buffer, count);
1118                         if (err > 0) {
1119                                 count -= err;
1120                                 cnt += err;
1121                                 buffer += err;
1122                                 err = cnt;
1123                         }
1124                         if (count > 0 && err >= 0) {
1125                                 add_wait_queue(&adc->dma_wait, &wait);
1126                                 set_current_state(TASK_INTERRUPTIBLE);
1127                                 /* Well, it is possible, that interrupt already
1128                                  * arrived. Hmm, shit happens, we have one more
1129                                  * buffer filled ;) */
1130                                 if (!schedule_timeout(timeout))
1131                                         /* We may get bogus timeout when system
1132                                          * is heavily loaded */
1133                                         if (!adc->tail->info.cnt) {
1134                                                 printk("HAL2: timeout...\n");
1135                                                 hal2_stop_adc(hal2);
1136                                                 hal2_reset_adc_pointer(hal2);
1137                                                 err = -EAGAIN;
1138                                         }
1139                                 if (signal_pending(current))
1140                                         err = -ERESTARTSYS;
1141                                 remove_wait_queue(&adc->dma_wait, &wait);
1142                         }
1143                 } while (count > 0 && err >= 0);
1144
1145         }
1146
1147         up(&adc->sem);
1148
1149         return err;
1150 }
1151
1152 static ssize_t hal2_write(struct file *file, const char *buffer,
1153                           size_t count, loff_t *ppos)
1154 {
1155         ssize_t err;
1156         char *buf = (char*) buffer;
1157         hal2_card_t *hal2 = (hal2_card_t *) file->private_data;
1158         hal2_codec_t *dac = &hal2->dac;
1159
1160         if (count == 0)
1161                 return 0;
1162         if (ppos != &file->f_pos)
1163                 return -ESPIPE;
1164
1165         down(&dac->sem);
1166
1167         if (file->f_flags & O_NONBLOCK) {
1168                 err = hal2_add_buffer(hal2, buf, count);
1169                 err = err == 0 ? -EAGAIN : err;
1170         } else {
1171                 do {
1172                         /* ~10% longer */
1173                         signed long timeout = 1000 * H2_BUFFER_SIZE *
1174                                 2 * dac->voices * HZ / dac->sample_rate / 900;
1175                         DECLARE_WAITQUEUE(wait, current);
1176                         ssize_t cnt = 0;
1177
1178                         err = hal2_add_buffer(hal2, buf, count);
1179                         if (err > 0) {
1180                                 count -= err;
1181                                 cnt += err;
1182                                 buf += err;
1183                                 err = cnt;
1184                         }
1185                         if (count > 0 && err >= 0) {
1186                                 add_wait_queue(&dac->dma_wait, &wait);
1187                                 set_current_state(TASK_INTERRUPTIBLE);
1188                                 /* Well, it is possible, that interrupt already
1189                                  * arrived. Hmm, shit happens, we have one more
1190                                  * buffer free ;) */
1191                                 if (!schedule_timeout(timeout))
1192                                         /* We may get bogus timeout when system
1193                                          * is heavily loaded */
1194                                         if (dac->head->info.cnt) {
1195                                                 printk("HAL2: timeout...\n");
1196                                                 hal2_stop_dac(hal2);
1197                                                 hal2_reset_dac_pointer(hal2);
1198                                                 err = -EAGAIN;
1199                                         }
1200                                 if (signal_pending(current))
1201                                         err = -ERESTARTSYS;
1202                                 remove_wait_queue(&dac->dma_wait, &wait);
1203                         }
1204                 } while (count > 0 && err >= 0);
1205         }
1206
1207         up(&dac->sem);
1208
1209         return err;
1210 }
1211
1212 static unsigned int hal2_poll(struct file *file, struct poll_table_struct *wait)
1213 {
1214         unsigned long flags;
1215         unsigned int mask = 0;
1216         hal2_card_t *hal2 = (hal2_card_t *) file->private_data;
1217
1218         if (file->f_mode & FMODE_READ) {
1219                 hal2_codec_t *adc = &hal2->adc;
1220
1221                 poll_wait(file, &hal2->adc.dma_wait, wait);
1222                 spin_lock_irqsave(&adc->lock, flags);
1223                 if (adc->tail->info.cnt > 0)
1224                         mask |= POLLIN;
1225                 spin_unlock_irqrestore(&adc->lock, flags);
1226         }
1227
1228         if (file->f_mode & FMODE_WRITE) {
1229                 hal2_codec_t *dac = &hal2->dac;
1230
1231                 poll_wait(file, &dac->dma_wait, wait);
1232                 spin_lock_irqsave(&dac->lock, flags);
1233                 if (dac->head->info.cnt == 0)
1234                         mask |= POLLOUT;
1235                 spin_unlock_irqrestore(&dac->lock, flags);
1236         }
1237
1238         return mask;
1239 }
1240
1241 static int hal2_open(struct inode *inode, struct file *file)
1242 {
1243         int err;
1244         hal2_card_t *hal2 = hal2_dsp_find_card(MINOR(inode->i_rdev));
1245
1246         DEBUG("opening audio device.\n");
1247
1248         if (!hal2) {
1249                 printk("HAL2: Whee?! Open door and go away!\n");
1250                 return -ENODEV;
1251         }
1252         file->private_data = hal2;
1253
1254         if (file->f_mode & FMODE_READ) {
1255                 if (hal2->adc.usecount)
1256                         return -EBUSY;
1257
1258                 /* OSS spec wanted us to use 8 bit, 8 kHz mono by default,
1259                  * but HAL2 can't do 8bit audio */
1260                 hal2->adc.format = AFMT_S16_BE;
1261                 hal2->adc.voices = 1;
1262                 hal2->adc.sample_rate = hal2_compute_rate(&hal2->adc, 8000);
1263                 hal2_set_adc_rate(hal2);
1264
1265                 /* alloc DMA buffers */
1266                 err = hal2_alloc_adc_dmabuf(hal2);
1267                 if (err)
1268                         return err;
1269                 hal2_setup_adc(hal2);
1270
1271                 hal2->adc.usecount++;
1272         }
1273
1274         if (file->f_mode & FMODE_WRITE) {
1275                 if (hal2->dac.usecount)
1276                         return -EBUSY;
1277
1278                 hal2->dac.format = AFMT_S16_BE;
1279                 hal2->dac.voices = 1;
1280                 hal2->dac.sample_rate = hal2_compute_rate(&hal2->dac, 8000);
1281                 hal2_set_dac_rate(hal2);
1282
1283                 /* alloc DMA buffers */
1284                 err = hal2_alloc_dac_dmabuf(hal2);
1285                 if (err)
1286                         return err;
1287                 hal2_setup_dac(hal2);
1288
1289                 hal2->dac.usecount++;
1290         }
1291
1292         return 0;
1293 }
1294
1295 static int hal2_release(struct inode *inode, struct file *file)
1296 {
1297         hal2_card_t *hal2 = (hal2_card_t *) file->private_data;
1298
1299         if (file->f_mode & FMODE_READ) {
1300                 hal2_stop_adc(hal2);
1301                 hal2_free_adc_dmabuf(hal2);
1302                 hal2->adc.usecount--;
1303         }
1304
1305         if (file->f_mode & FMODE_WRITE) {
1306                 hal2_sync_dac(hal2);
1307                 hal2_free_dac_dmabuf(hal2);
1308                 hal2->dac.usecount--;
1309         }
1310
1311         return 0;
1312 }
1313
1314 static struct file_operations hal2_audio_fops = {
1315         owner:          THIS_MODULE,
1316         llseek:         no_llseek,
1317         read:           hal2_read,
1318         write:          hal2_write,
1319         poll:           hal2_poll,
1320         ioctl:          hal2_ioctl,
1321         open:           hal2_open,
1322         release:        hal2_release,
1323 };
1324
1325 static struct file_operations hal2_mixer_fops = {
1326         owner:          THIS_MODULE,
1327         llseek:         no_llseek,
1328         ioctl:          hal2_ioctl_mixdev,
1329         open:           hal2_open_mixdev,
1330         release:        hal2_release_mixdev,
1331 };
1332
1333 static int hal2_request_irq(hal2_card_t *hal2, int irq)
1334 {
1335         unsigned long flags;
1336         int ret = 0;
1337
1338         save_and_cli(flags);
1339         if (request_irq(irq, hal2_interrupt, SA_SHIRQ, hal2str, hal2)) {
1340                 printk(KERN_ERR "HAL2: Can't get irq %d\n", irq);
1341                 ret = -EAGAIN;
1342         }
1343         restore_flags(flags);
1344         return ret;
1345 }
1346
1347 static int hal2_alloc_resources(hal2_card_t *hal2, struct hpc3_regs *hpc3)
1348 {
1349         hal2_pbus_t *pbus;
1350
1351         pbus = &hal2->dac.pbus;
1352         pbus->pbusnr = 0;
1353         pbus->pbus = &hpc3->pbdma[pbus->pbusnr];
1354         /* The spec says that we should write 0x08248844 but that's WRONG. HAL2
1355          * does 8 bit DMA, not 16 bit even if it generates 16 bit audio. */
1356         hpc3->pbus_dmacfgs[pbus->pbusnr][0] = 0x08208844;       /* Magic :-) */
1357
1358         pbus = &hal2->adc.pbus;
1359         pbus->pbusnr = 1;
1360         pbus->pbus = &hpc3->pbdma[pbus->pbusnr];
1361         hpc3->pbus_dmacfgs[pbus->pbusnr][0] = 0x08208844;       /* Magic :-) */
1362
1363         return hal2_request_irq(hal2, SGI_HPCDMA_IRQ);
1364 }
1365
1366 static void hal2_init_codec(hal2_codec_t *codec)
1367 {
1368         init_waitqueue_head(&codec->dma_wait);
1369         init_MUTEX(&codec->sem);
1370         spin_lock_init(&codec->lock);
1371 }
1372
1373 static void hal2_free_resources(hal2_card_t *hal2)
1374 {
1375         free_irq(SGI_HPCDMA_IRQ, hal2);
1376 }
1377
1378 static int hal2_detect(hal2_card_t *hal2)
1379 {
1380         unsigned short board, major, minor;
1381         unsigned short rev;
1382
1383         /* reset HAL2 */
1384         hal2_isr_write(hal2, 0);
1385
1386         /* release reset */
1387         hal2_isr_write(hal2, H2_ISR_GLOBAL_RESET_N | H2_ISR_CODEC_RESET_N);
1388
1389         hal2_i_write16(hal2, H2I_RELAY_C, H2I_RELAY_C_STATE);
1390
1391         if ((rev = hal2_rev_look(hal2)) & H2_REV_AUDIO_PRESENT) {
1392                 DEBUG("HAL2: no device detected, rev: 0x%04hx\n", rev);
1393                 return -ENODEV;
1394         }
1395
1396         board = (rev & H2_REV_BOARD_M) >> 12;
1397         major = (rev & H2_REV_MAJOR_CHIP_M) >> 4;
1398         minor = (rev & H2_REV_MINOR_CHIP_M);
1399
1400         printk("SGI HAL2 Processor revision %i.%i.%i detected\n",
1401                board, major, minor);
1402
1403         if (board != 4 || major != 1 || minor != 0)
1404                 printk( "Other revision than 4.1.0 detected. "
1405                         "Your card is probably unsupported\n");
1406
1407         return 0;
1408 }
1409
1410 static int hal2_init_card(hal2_card_t **phal2, struct hpc3_regs *hpc3,
1411                           unsigned long hpc3_base)
1412 {
1413         int ret = 0;
1414         hal2_card_t *hal2;
1415
1416         hal2 = (hal2_card_t *) kmalloc(sizeof(hal2_card_t), GFP_KERNEL);
1417         if (!hal2)
1418                 return -ENOMEM;
1419         memset(hal2, 0, sizeof(hal2_card_t));
1420
1421         hal2->ctl_regs = (hal2_ctl_regs_t *) KSEG1ADDR(hpc3_base + H2_CTL_PIO);
1422         hal2->aes_regs = (hal2_aes_regs_t *) KSEG1ADDR(hpc3_base + H2_AES_PIO);
1423         hal2->vol_regs = (hal2_vol_regs_t *) KSEG1ADDR(hpc3_base + H2_VOL_PIO);
1424         hal2->syn_regs = (hal2_syn_regs_t *) KSEG1ADDR(hpc3_base + H2_SYN_PIO);
1425
1426         if (hal2_detect(hal2) < 0) {
1427                 printk("HAL2 audio processor not found\n");
1428                 ret = -ENODEV;
1429                 goto fail1;
1430         }
1431
1432         hal2_init_codec(&hal2->dac);
1433         hal2_init_codec(&hal2->adc);
1434
1435         ret = hal2_alloc_resources(hal2, hpc3);
1436         if (ret)
1437                 goto fail1;
1438
1439         hal2_init_mixer(hal2);
1440
1441         hal2->dev_dsp = register_sound_dsp(&hal2_audio_fops, -1);
1442         if (hal2->dev_dsp < 0) {
1443                 ret = hal2->dev_dsp;
1444                 goto fail2;
1445         }
1446
1447         hal2->dev_mixer = register_sound_mixer(&hal2_mixer_fops, -1);
1448         if (hal2->dev_mixer < 0) {
1449                 ret = hal2->dev_mixer;
1450                 goto fail3;
1451         }
1452
1453         *phal2 = hal2;
1454         return 0;
1455 fail3:
1456         unregister_sound_dsp(hal2->dev_dsp);
1457 fail2:
1458         hal2_free_resources(hal2);
1459 fail1:
1460         kfree(hal2);
1461
1462         return ret;
1463 }
1464
1465 /*
1466  * We are assuming only one HAL2 card. If you ever meet machine with more than
1467  * one, tell immediately about it to someone. Preferably to me. --ladis
1468  */
1469 static int __init init_hal2(void)
1470 {
1471         int i;
1472
1473         for (i = 0; i < MAXCARDS; i++)
1474                 hal2_card[i] = NULL;
1475
1476         return hal2_init_card(&hal2_card[0], hpc3c0, HPC3_CHIP0_PBASE);
1477 }
1478
1479 static void __exit exit_hal2(void)
1480 {
1481         int i;
1482
1483         for (i = 0; i < MAXCARDS; i++)
1484                 if (hal2_card[i]) {
1485                         hal2_free_resources(hal2_card[i]);
1486                         unregister_sound_dsp(hal2_card[i]->dev_dsp);
1487                         unregister_sound_mixer(hal2_card[i]->dev_mixer);
1488                         kfree(hal2_card[i]);
1489         }
1490 }
1491
1492 module_init(init_hal2);
1493 module_exit(exit_hal2);
1494
1495 MODULE_DESCRIPTION("OSS compatible driver for SGI HAL2 audio");
1496 MODULE_AUTHOR("Ladislav Michl");
1497 MODULE_LICENSE("GPL");