drivers/sound/i810_audio.c

   1 /*
   2  *      Intel i810 and friends ICH driver for Linux
   3  *      Alan Cox <alan@redhat.com>
   4  *
   5  *  Built from:
   6  *      Low level code:  Zach Brown (original nonworking i810 OSS driver)
   7  *                       Jaroslav Kysela <perex@suse.cz> (working ALSA driver)
   8  *
   9  *      Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
  10  *      Extended by: Zach Brown <zab@redhat.com>
  11  *                      and others..
  12  *
  13  *  Hardware Provided By:
  14  *      Analog Devices (A major AC97 codec maker)
  15  *      Intel Corp  (you've probably heard of them already)
  16  *
  17  *  AC97 clues and assistance provided by
  18  *      Analog Devices
  19  *      Zach 'Fufu' Brown
  20  *      Jeff Garzik
  21  *
  22  *      This program is free software; you can redistribute it and/or modify
  23  *      it under the terms of the GNU General Public License as published by
  24  *      the Free Software Foundation; either version 2 of the License, or
  25  *      (at your option) any later version.
  26  *
  27  *      This program is distributed in the hope that it will be useful,
  28  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  29  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  30  *      GNU General Public License for more details.
  31  *
  32  *      You should have received a copy of the GNU General Public License
  33  *      along with this program; if not, write to the Free Software
  34  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  35  *
  36  *
  37  *      Intel 810 theory of operation
  38  *
  39  *      The chipset provides three DMA channels that talk to an AC97
  40  *      CODEC (AC97 is a digital/analog mixer standard). At its simplest
  41  *      you get 48Khz audio with basic volume and mixer controls. At the
  42  *      best you get rate adaption in the codec. We set the card up so
  43  *      that we never take completion interrupts but instead keep the card
  44  *      chasing its tail around a ring buffer. This is needed for mmap
  45  *      mode audio and happens to work rather well for non-mmap modes too.
  46  *
  47  *      The board has one output channel for PCM audio (supported) and
  48  *      a stereo line in and mono microphone input. Again these are normally
  49  *      locked to 48Khz only. Right now recording is not finished.
  50  *
  51  *      There is no midi support, no synth support. Use timidity. To get
  52  *      esd working you need to use esd -r 48000 as it won't probe 48KHz
  53  *      by default. mpg123 can't handle 48Khz only audio so use xmms.
  54  *
  55  *      Fix The Sound On Dell
  56  *
  57  *      Not everyone uses 48KHz. We know of no way to detect this reliably
  58  *      and certainly not to get the right data. If your i810 audio sounds
  59  *      stupid you may need to investigate other speeds. According to Analog
  60  *      they tend to use a 14.318MHz clock which gives you a base rate of
  61  *      41194Hz.
  62  *
  63  *      This is available via the 'ftsodell=1' option.
  64  *
  65  *      If you need to force a specific rate set the clocking= option
  66  *
  67  *      This driver is cursed. (Ben LaHaise)
  68  *
  69  *
  70  *  ICH 4 caveats
  71  *
  72  *      The ICH4 has the feature, that the codec ID doesn't have to be
  73  *      congruent with the IO connection.
  74  *
  75  *      Therefore, from driver version 0.23 on, there is a "codec ID" <->
  76  *      "IO register base offset" mapping (card->ac97_id_map) field.
  77  *
  78  *      Juergen "George" Sawinski (jsaw)
  79  */
  80
  81 #include <linux/module.h>
  82 #include <linux/version.h>
  83 #include <linux/string.h>
  84 #include <linux/ctype.h>
  85 #include <linux/ioport.h>
  86 #include <linux/sched.h>
  87 #include <linux/delay.h>
  88 #include <linux/sound.h>
  89 #include <linux/slab.h>
  90 #include <linux/soundcard.h>
  91 #include <linux/pci.h>
  92 #include <asm/io.h>
  93 #include <asm/dma.h>
  94 #include <linux/init.h>
  95 #include <linux/poll.h>
  96 #include <linux/spinlock.h>
  97 #include <linux/smp_lock.h>
  98 #include <linux/ac97_codec.h>
  99 #include <linux/wrapper.h>
 100 #include <asm/uaccess.h>
 101 #include <asm/hardirq.h>
 102
 103 #ifndef PCI_DEVICE_ID_INTEL_82801
 104 #define PCI_DEVICE_ID_INTEL_82801       0x2415
 105 #endif
 106 #ifndef PCI_DEVICE_ID_INTEL_82901
 107 #define PCI_DEVICE_ID_INTEL_82901       0x2425
 108 #endif
 109 #ifndef PCI_DEVICE_ID_INTEL_ICH2
 110 #define PCI_DEVICE_ID_INTEL_ICH2        0x2445
 111 #endif
 112 #ifndef PCI_DEVICE_ID_INTEL_ICH3
 113 #define PCI_DEVICE_ID_INTEL_ICH3        0x2485
 114 #endif
 115 #ifndef PCI_DEVICE_ID_INTEL_ICH4
 116 #define PCI_DEVICE_ID_INTEL_ICH4        0x24c5
 117 #endif
 118 #ifndef PCI_DEVICE_ID_INTEL_440MX
 119 #define PCI_DEVICE_ID_INTEL_440MX       0x7195
 120 #endif
 121 #ifndef PCI_DEVICE_ID_SI_7012
 122 #define PCI_DEVICE_ID_SI_7012           0x7012
 123 #endif
 124 #ifndef PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO
 125 #define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1
 126 #endif
 127 #ifndef PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO
 128 #define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO 0x006a
 129 #endif
 130 #ifndef PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO
 131 #define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
 132 #endif
 133 #ifndef PCI_DEVICE_ID_AMD_768_AUDIO
 134 #define PCI_DEVICE_ID_AMD_768_AUDIO     0x7445
 135 #endif
 136 #ifndef PCI_DEVICE_ID_AMD_8111_AC97
 137 #define PCI_DEVICE_ID_AMD_8111_AC97     0x746d
 138 #endif
 139
 140 static int ftsodell=0;
 141 static int strict_clocking=0;
 142 static unsigned int clocking=0;
 143 static int spdif_locked=0;
 144
 145 //#define DEBUG
 146 //#define DEBUG2
 147 //#define DEBUG_INTERRUPTS
 148 //#define DEBUG_MMAP
 149 //#define DEBUG_MMIO
 150
 151 #define ADC_RUNNING     1
 152 #define DAC_RUNNING     2
 153
 154 #define I810_FMT_16BIT  1
 155 #define I810_FMT_STEREO 2
 156 #define I810_FMT_MASK   3
 157
 158 #define SPDIF_ON        0x0004
 159 #define SURR_ON         0x0010
 160 #define CENTER_LFE_ON   0x0020
 161 #define VOL_MUTED       0x8000
 162
 163 /* the 810's array of pointers to data buffers */
 164
 165 struct sg_item {
 166 #define BUSADDR_MASK    0xFFFFFFFE
 167         u32 busaddr;
 168 #define CON_IOC         0x80000000 /* interrupt on completion */
 169 #define CON_BUFPAD      0x40000000 /* pad underrun with last sample, else 0 */
 170 #define CON_BUFLEN_MASK 0x0000ffff /* buffer length in samples */
 171         u32 control;
 172 };
 173
 174 /* an instance of the i810 channel */
 175 #define SG_LEN 32
 176 struct i810_channel
 177 {
 178         /* these sg guys should probably be allocated
 179            seperately as nocache. Must be 8 byte aligned */
 180         struct sg_item sg[SG_LEN];      /* 32*8 */
 181         u32 offset;                     /* 4 */
 182         u32 port;                       /* 4 */
 183         u32 used;
 184         u32 num;
 185 };
 186
 187 /*
 188  * we have 3 seperate dma engines.  pcm in, pcm out, and mic.
 189  * each dma engine has controlling registers.  These goofy
 190  * names are from the datasheet, but make it easy to write
 191  * code while leafing through it.
 192  *
 193  * ICH4 has 6 dma engines, pcm in, pcm out, mic, pcm in 2,
 194  * mic in 2, s/pdif.   Of special interest is the fact that
 195  * the upper 3 DMA engines on the ICH4 *must* be accessed
 196  * via mmio access instead of pio access.
 197  */
 198
 199 #define ENUM_ENGINE(PRE,DIG)                                                                    \
 200 enum {                                                                                          \
 201         PRE##_BDBAR =   0x##DIG##0,             /* Buffer Descriptor list Base Address */       \
 202         PRE##_CIV =     0x##DIG##4,             /* Current Index Value */                       \
 203         PRE##_LVI =     0x##DIG##5,             /* Last Valid Index */                          \
 204         PRE##_SR =      0x##DIG##6,             /* Status Register */                           \
 205         PRE##_PICB =    0x##DIG##8,             /* Position In Current Buffer */                \
 206         PRE##_PIV =     0x##DIG##a,             /* Prefetched Index Value */                    \
 207         PRE##_CR =      0x##DIG##b              /* Control Register */                          \
 208 }
 209
 210 ENUM_ENGINE(OFF,0);     /* Offsets */
 211 ENUM_ENGINE(PI,0);      /* PCM In */
 212 ENUM_ENGINE(PO,1);      /* PCM Out */
 213 ENUM_ENGINE(MC,2);      /* Mic In */
 214
 215 enum {
 216         GLOB_CNT =      0x2c,                   /* Global Control */
 217         GLOB_STA =      0x30,                   /* Global Status */
 218         CAS      =      0x34                    /* Codec Write Semaphore Register */
 219 };
 220
 221 ENUM_ENGINE(MC2,4);     /* Mic In 2 */
 222 ENUM_ENGINE(PI2,5);     /* PCM In 2 */
 223 ENUM_ENGINE(SP,6);      /* S/PDIF */
 224
 225 enum {
 226         SDM =           0x80                    /* SDATA_IN Map Register */
 227 };
 228
 229 /* interrupts for a dma engine */
 230 #define DMA_INT_FIFO            (1<<4)  /* fifo under/over flow */
 231 #define DMA_INT_COMPLETE        (1<<3)  /* buffer read/write complete and ioc set */
 232 #define DMA_INT_LVI             (1<<2)  /* last valid done */
 233 #define DMA_INT_CELV            (1<<1)  /* last valid is current */
 234 #define DMA_INT_DCH             (1)     /* DMA Controller Halted (happens on LVI interrupts) */
 235 #define DMA_INT_MASK (DMA_INT_FIFO|DMA_INT_COMPLETE|DMA_INT_LVI)
 236
 237 /* interrupts for the whole chip */
 238 #define INT_SEC         (1<<11)
 239 #define INT_PRI         (1<<10)
 240 #define INT_MC          (1<<7)
 241 #define INT_PO          (1<<6)
 242 #define INT_PI          (1<<5)
 243 #define INT_MO          (1<<2)
 244 #define INT_NI          (1<<1)
 245 #define INT_GPI         (1<<0)
 246 #define INT_MASK (INT_SEC|INT_PRI|INT_MC|INT_PO|INT_PI|INT_MO|INT_NI|INT_GPI)
 247
 248 #define DRIVER_VERSION "0.24"
 249
 250 /* magic numbers to protect our data structures */
 251 #define I810_CARD_MAGIC         0x5072696E /* "Prin" */
 252 #define I810_STATE_MAGIC        0x63657373 /* "cess" */
 253 #define I810_DMA_MASK           0xffffffff /* DMA buffer mask for pci_alloc_consist */
 254 #define NR_HW_CH                3
 255
 256 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
 257 #define NR_AC97                 4
 258
 259 /* Please note that an 8bit mono stream is not valid on this card, you must have a 16bit */
 260 /* stream at a minimum for this card to be happy */
 261 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 262 /* Samples are 16bit values, so we are shifting to a word, not to a byte, hence shift */
 263 /* values are one less than might be expected */
 264 static const unsigned sample_shift[] = { -1, 0, 0, 1 };
 265
 266 enum {
 267         ICH82801AA = 0,
 268         ICH82901AB,
 269         INTEL440MX,
 270         INTELICH2,
 271         INTELICH3,
 272         INTELICH4,
 273         SI7012,
 274         NVIDIA_NFORCE,
 275         AMD768,
 276         AMD8111
 277 };
 278
 279 static char * card_names[] = {
 280         "Intel ICH 82801AA",
 281         "Intel ICH 82901AB",
 282         "Intel 440MX",
 283         "Intel ICH2",
 284         "Intel ICH3",
 285         "Intel ICH4",
 286         "SiS 7012",
 287         "NVIDIA nForce Audio",
 288         "AMD 768",
 289         "AMD-8111 IOHub"
 290 };
 291
 292 /* These are capabilities (and bugs) the chipsets _can_ have */
 293 static struct {
 294         int16_t      nr_ac97;
 295 #define CAP_MMIO                 0x0001
 296 #define CAP_20BIT_AUDIO_SUPPORT  0x0002
 297         u_int16_t flags;
 298 } card_cap[] = {
 299         {  1, 0x0000 }, /* ICH82801AA */
 300         {  1, 0x0000 }, /* ICH82901AB */
 301         {  1, 0x0000 }, /* INTEL440MX */
 302         {  1, 0x0000 }, /* INTELICH2 */
 303         {  2, 0x0000 }, /* INTELICH3 */
 304         {  3, 0x0003 }, /* INTELICH4 */
 305         /*@FIXME to be verified*/       {  2, 0x0000 }, /* SI7012 */
 306         /*@FIXME to be verified*/       {  2, 0x0000 }, /* NVIDIA_NFORCE */
 307         /*@FIXME to be verified*/       {  2, 0x0000 }, /* AMD768 */
 308         /*@FIXME to be verified*/       {  3, 0x0001 }, /* AMD8111 */
 309 };
 310
 311 static struct pci_device_id i810_pci_tbl [] __initdata = {
 312         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801,
 313          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82801AA},
 314         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82901,
 315          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82901AB},
 316         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_440MX,
 317          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTEL440MX},
 318         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2,
 319          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH2},
 320         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH3,
 321          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH3},
 322         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4,
 323          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
 324         {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7012,
 325          PCI_ANY_ID, PCI_ANY_ID, 0, 0, SI7012},
 326         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO,
 327          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 328         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO,
 329          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 330         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO,
 331          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 332         {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_768_AUDIO,
 333          PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768},
 334         {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_AC97,
 335          PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111},
 336         {0,}
 337 };
 338
 339 MODULE_DEVICE_TABLE (pci, i810_pci_tbl);
 340
 341 #ifdef CONFIG_PM
 342 #define PM_SUSPENDED(card) (card->pm_suspended)
 343 #else
 344 #define PM_SUSPENDED(card) (0)
 345 #endif
 346
 347 /* "software" or virtual channel, an instance of opened /dev/dsp */
 348 struct i810_state {
 349         unsigned int magic;
 350         struct i810_card *card; /* Card info */
 351
 352         /* single open lock mechanism, only used for recording */
 353         struct semaphore open_sem;
 354         wait_queue_head_t open_wait;
 355
 356         /* file mode */
 357         mode_t open_mode;
 358
 359         /* virtual channel number */
 360         int virt;
 361
 362 #ifdef CONFIG_PM
 363         unsigned int pm_saved_dac_rate,pm_saved_adc_rate;
 364 #endif
 365         struct dmabuf {
 366                 /* wave sample stuff */
 367                 unsigned int rate;
 368                 unsigned char fmt, enable, trigger;
 369
 370                 /* hardware channel */
 371                 struct i810_channel *read_channel;
 372                 struct i810_channel *write_channel;
 373
 374                 /* OSS buffer management stuff */
 375                 void *rawbuf;
 376                 dma_addr_t dma_handle;
 377                 unsigned buforder;
 378                 unsigned numfrag;
 379                 unsigned fragshift;
 380
 381                 /* our buffer acts like a circular ring */
 382                 unsigned hwptr;         /* where dma last started, updated by update_ptr */
 383                 unsigned swptr;         /* where driver last clear/filled, updated by read/write */
 384                 int count;              /* bytes to be consumed or been generated by dma machine */
 385                 unsigned total_bytes;   /* total bytes dmaed by hardware */
 386
 387                 unsigned error;         /* number of over/underruns */
 388                 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
 389
 390                 /* redundant, but makes calculations easier */
 391                 /* what the hardware uses */
 392                 unsigned dmasize;
 393                 unsigned fragsize;
 394                 unsigned fragsamples;
 395
 396                 /* what we tell the user to expect */
 397                 unsigned userfrags;
 398                 unsigned userfragsize;
 399
 400                 /* OSS stuff */
 401                 unsigned mapped:1;
 402                 unsigned ready:1;
 403                 unsigned update_flag;
 404                 unsigned ossfragsize;
 405                 unsigned ossmaxfrags;
 406                 unsigned subdivision;
 407         } dmabuf;
 408 };
 409
 410
 411 struct i810_card {
 412         unsigned int magic;
 413
 414         /* We keep i810 cards in a linked list */
 415         struct i810_card *next;
 416
 417         /* The i810 has a certain amount of cross channel interaction
 418            so we use a single per card lock */
 419         spinlock_t lock;
 420
 421         /* PCI device stuff */
 422         struct pci_dev * pci_dev;
 423         u16 pci_id;
 424         u16 pci_id_internal; /* used to access card_cap[] */
 425 #ifdef CONFIG_PM
 426         u16 pm_suspended;
 427         u32 pm_save_state[64/sizeof(u32)];
 428         int pm_saved_mixer_settings[SOUND_MIXER_NRDEVICES][NR_AC97];
 429 #endif
 430         /* soundcore stuff */
 431         int dev_audio;
 432
 433         /* structures for abstraction of hardware facilities, codecs, banks and channels*/
 434         u16    ac97_id_map[NR_AC97];
 435         struct ac97_codec *ac97_codec[NR_AC97];
 436         struct i810_state *states[NR_HW_CH];
 437         struct i810_channel *channel;   /* 1:1 to states[] but diff. lifetime */
 438         dma_addr_t chandma;
 439
 440         u16 ac97_features;
 441         u16 ac97_status;
 442         u16 channels;
 443
 444         /* hardware resources */
 445         unsigned long ac97base;
 446         unsigned long iobase;
 447         u32 irq;
 448
 449         unsigned long ac97base_mmio_phys;
 450         unsigned long iobase_mmio_phys;
 451         u_int8_t *ac97base_mmio;
 452         u_int8_t *iobase_mmio;
 453
 454         int           use_mmio;
 455
 456         /* Function support */
 457         struct i810_channel *(*alloc_pcm_channel)(struct i810_card *);
 458         struct i810_channel *(*alloc_rec_pcm_channel)(struct i810_card *);
 459         struct i810_channel *(*alloc_rec_mic_channel)(struct i810_card *);
 460         void (*free_pcm_channel)(struct i810_card *, int chan);
 461
 462         /* We have a *very* long init time possibly, so use this to block */
 463         /* attempts to open our devices before we are ready (stops oops'es) */
 464         int initializing;
 465 };
 466
 467 /* extract register offset from codec struct */
 468 #define IO_REG_OFF(codec) (((struct i810_card *) codec->private_data)->ac97_id_map[codec->id])
 469
 470 /* set LVI from CIV */
 471 #define CIV_TO_LVI(port, off) outb((inb(port+OFF_CIV)+off) & 31, port+OFF_LVI)
 472
 473 static struct i810_card *devs = NULL;
 474
 475 static int i810_open_mixdev(struct inode *inode, struct file *file);
 476 static int i810_ioctl_mixdev(struct inode *inode, struct file *file,
 477                              unsigned int cmd, unsigned long arg);
 478 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg);
 479 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data);
 480 static u16 i810_ac97_get_mmio(struct ac97_codec *dev, u8 reg);
 481 static void i810_ac97_set_mmio(struct ac97_codec *dev, u8 reg, u16 data);
 482 static u16 i810_ac97_get_io(struct ac97_codec *dev, u8 reg);
 483 static void i810_ac97_set_io(struct ac97_codec *dev, u8 reg, u16 data);
 484
 485 static struct i810_channel *i810_alloc_pcm_channel(struct i810_card *card)
 486 {
 487         if(card->channel[1].used==1)
 488                 return NULL;
 489         card->channel[1].used=1;
 490         return &card->channel[1];
 491 }
 492
 493 static struct i810_channel *i810_alloc_rec_pcm_channel(struct i810_card *card)
 494 {
 495         if(card->channel[0].used==1)
 496                 return NULL;
 497         card->channel[0].used=1;
 498         return &card->channel[0];
 499 }
 500
 501 static struct i810_channel *i810_alloc_rec_mic_channel(struct i810_card *card)
 502 {
 503         if(card->channel[2].used==1)
 504                 return NULL;
 505         card->channel[2].used=1;
 506         return &card->channel[2];
 507 }
 508
 509 static void i810_free_pcm_channel(struct i810_card *card, int channel)
 510 {
 511         card->channel[channel].used=0;
 512 }
 513
 514 static int i810_valid_spdif_rate ( struct ac97_codec *codec, int rate )
 515 {
 516         unsigned long id = 0L;
 517
 518         id = (i810_ac97_get(codec, AC97_VENDOR_ID1) << 16);
 519         id |= i810_ac97_get(codec, AC97_VENDOR_ID2) & 0xffff;
 520 #ifdef DEBUG
 521         printk ( "i810_audio: codec = %s, codec_id = 0x%08lx\n", codec->name, id);
 522 #endif
 523         switch ( id ) {
 524                 case 0x41445361: /* AD1886 */
 525                         if (rate == 48000) {
 526                                 return 1;
 527                         }
 528                         break;
 529                 default: /* all other codecs, until we know otherwiae */
 530                         if (rate == 48000 || rate == 44100 || rate == 32000) {
 531                                 return 1;
 532                         }
 533                         break;
 534         }
 535         return (0);
 536 }
 537
 538 /* i810_set_spdif_output
 539  *
 540  *  Configure the S/PDIF output transmitter. When we turn on
 541  *  S/PDIF, we turn off the analog output. This may not be
 542  *  the right thing to do.
 543  *
 544  *  Assumptions:
 545  *     The DSP sample rate must already be set to a supported
 546  *     S/PDIF rate (32kHz, 44.1kHz, or 48kHz) or we abort.
 547  */
 548 static void i810_set_spdif_output(struct i810_state *state, int slots, int rate)
 549 {
 550         int     vol;
 551         int     aud_reg;
 552         struct ac97_codec *codec = state->card->ac97_codec[0];
 553
 554         if(!(state->card->ac97_features & 4)) {
 555 #ifdef DEBUG
 556                 printk(KERN_WARNING "i810_audio: S/PDIF transmitter not available.\n");
 557 #endif
 558                 state->card->ac97_status &= ~SPDIF_ON;
 559         } else {
 560                 if ( slots == -1 ) { /* Turn off S/PDIF */
 561                         aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 562                         i810_ac97_set(codec, AC97_EXTENDED_STATUS, (aud_reg & ~AC97_EA_SPDIF));
 563
 564                         /* If the volume wasn't muted before we turned on S/PDIF, unmute it */
 565                         if ( !(state->card->ac97_status & VOL_MUTED) ) {
 566                                 aud_reg = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
 567                                 i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (aud_reg & ~VOL_MUTED));
 568                         }
 569                         state->card->ac97_status &= ~(VOL_MUTED | SPDIF_ON);
 570                         return;
 571                 }
 572
 573                 vol = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
 574                 state->card->ac97_status = vol & VOL_MUTED;
 575
 576                 /* Set S/PDIF transmitter sample rate */
 577                 aud_reg = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
 578                 switch ( rate ) {
 579                         case 32000:
 580                                 aud_reg = (aud_reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_32K;
 581                                 break;
 582                          case 44100:
 583                                 aud_reg = (aud_reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_44K;
 584                                 break;
 585                         case 48000:
 586                                 aud_reg = (aud_reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_48K;
 587                                 break;
 588                         default:
 589 #ifdef DEBUG
 590                                 printk(KERN_WARNING "i810_audio: %d sample rate not supported by S/PDIF.\n", rate);
 591 #endif
 592                                 /* turn off S/PDIF */
 593                                 aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 594                                 i810_ac97_set(codec, AC97_EXTENDED_STATUS, (aud_reg & ~AC97_EA_SPDIF));
 595                                 state->card->ac97_status &= ~SPDIF_ON;
 596                                 return;
 597                 }
 598
 599                 i810_ac97_set(codec, AC97_SPDIF_CONTROL, aud_reg);
 600
 601                 aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 602                 aud_reg = (aud_reg & AC97_EA_SLOT_MASK) | slots | AC97_EA_VRA | AC97_EA_SPDIF;
 603                 i810_ac97_set(codec, AC97_EXTENDED_STATUS, aud_reg);
 604                 state->card->ac97_status |= SPDIF_ON;
 605
 606                 /* Check to make sure the configuration is valid */
 607                 aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 608                 if ( ! (aud_reg & 0x0400) ) {
 609 #ifdef DEBUG
 610                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter configuration not valid (0x%04x).\n", aud_reg);
 611 #endif
 612
 613                         /* turn off S/PDIF */
 614                         i810_ac97_set(codec, AC97_EXTENDED_STATUS, (aud_reg & ~AC97_EA_SPDIF));
 615                         state->card->ac97_status &= ~SPDIF_ON;
 616                         return;
 617                 }
 618                 /* Mute the analog output */
 619                 /* Should this only mute the PCM volume??? */
 620                 i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (vol | VOL_MUTED));
 621         }
 622 }
 623
 624 /* i810_set_dac_channels
 625  *
 626  *  Configure the codec's multi-channel DACs
 627  *
 628  *  The logic is backwards. Setting the bit to 1 turns off the DAC.
 629  *
 630  *  What about the ICH? We currently configure it using the
 631  *  SNDCTL_DSP_CHANNELS ioctl.  If we're turnning on the DAC,
 632  *  does that imply that we want the ICH set to support
 633  *  these channels?
 634  *
 635  *  TODO:
 636  *    vailidate that the codec really supports these DACs
 637  *    before turning them on.
 638  */
 639 static void i810_set_dac_channels(struct i810_state *state, int channel)
 640 {
 641         int     aud_reg;
 642         struct ac97_codec *codec = state->card->ac97_codec[0];
 643
 644         /* No codec, no setup */
 645
 646         if(codec == NULL)
 647                 return;
 648
 649         aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 650         aud_reg |= AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK;
 651         state->card->ac97_status &= ~(SURR_ON | CENTER_LFE_ON);
 652
 653         switch ( channel ) {
 654                 case 2: /* always enabled */
 655                         break;
 656                 case 4:
 657                         aud_reg &= ~AC97_EA_PRJ;
 658                         state->card->ac97_status |= SURR_ON;
 659                         break;
 660                 case 6:
 661                         aud_reg &= ~(AC97_EA_PRJ | AC97_EA_PRI | AC97_EA_PRK);
 662                         state->card->ac97_status |= SURR_ON | CENTER_LFE_ON;
 663                         break;
 664                 default:
 665                         break;
 666         }
 667         i810_ac97_set(codec, AC97_EXTENDED_STATUS, aud_reg);
 668
 669 }
 670
 671
 672 /* set playback sample rate */
 673 static unsigned int i810_set_dac_rate(struct i810_state * state, unsigned int rate)
 674 {
 675         struct dmabuf *dmabuf = &state->dmabuf;
 676         u32 new_rate;
 677         struct ac97_codec *codec=state->card->ac97_codec[0];
 678
 679         if(!(state->card->ac97_features&0x0001))
 680         {
 681                 dmabuf->rate = clocking;
 682 #ifdef DEBUG
 683                 printk("Asked for %d Hz, but ac97_features says we only do %dHz.  Sorry!\n",
 684                        rate,clocking);
 685 #endif
 686                 return clocking;
 687         }
 688
 689         if (rate > 48000)
 690                 rate = 48000;
 691         if (rate < 8000)
 692                 rate = 8000;
 693         dmabuf->rate = rate;
 694
 695         /*
 696          *      Adjust for misclocked crap
 697          */
 698         rate = ( rate * clocking)/48000;
 699         if(strict_clocking && rate < 8000) {
 700                 rate = 8000;
 701                 dmabuf->rate = (rate * 48000)/clocking;
 702         }
 703
 704         new_rate=ac97_set_dac_rate(codec, rate);
 705         if(new_rate != rate) {
 706                 dmabuf->rate = (new_rate * 48000)/clocking;
 707         }
 708 #ifdef DEBUG
 709         printk("i810_audio: called i810_set_dac_rate : asked for %d, got %d\n", rate, dmabuf->rate);
 710 #endif
 711         rate = new_rate;
 712         return dmabuf->rate;
 713 }
 714
 715 /* set recording sample rate */
 716 static unsigned int i810_set_adc_rate(struct i810_state * state, unsigned int rate)
 717 {
 718         struct dmabuf *dmabuf = &state->dmabuf;
 719         u32 new_rate;
 720         struct ac97_codec *codec=state->card->ac97_codec[0];
 721
 722         if(!(state->card->ac97_features&0x0001))
 723         {
 724                 dmabuf->rate = clocking;
 725                 return clocking;
 726         }
 727
 728         if (rate > 48000)
 729                 rate = 48000;
 730         if (rate < 8000)
 731                 rate = 8000;
 732         dmabuf->rate = rate;
 733
 734         /*
 735          *      Adjust for misclocked crap
 736          */
 737
 738         rate = ( rate * clocking)/48000;
 739         if(strict_clocking && rate < 8000) {
 740                 rate = 8000;
 741                 dmabuf->rate = (rate * 48000)/clocking;
 742         }
 743
 744         new_rate = ac97_set_adc_rate(codec, rate);
 745
 746         if(new_rate != rate) {
 747                 dmabuf->rate = (new_rate * 48000)/clocking;
 748                 rate = new_rate;
 749         }
 750 #ifdef DEBUG
 751         printk("i810_audio: called i810_set_adc_rate : rate = %d/%d\n", dmabuf->rate, rate);
 752 #endif
 753         return dmabuf->rate;
 754 }
 755
 756 /* get current playback/recording dma buffer pointer (byte offset from LBA),
 757    called with spinlock held! */
 758
 759 static inline unsigned i810_get_dma_addr(struct i810_state *state, int rec)
 760 {
 761         struct dmabuf *dmabuf = &state->dmabuf;
 762         unsigned int civ, offset, port, port_picb, bytes = 2;
 763
 764         if (!dmabuf->enable)
 765                 return 0;
 766
 767         if (rec)
 768                 port = state->card->iobase + dmabuf->read_channel->port;
 769         else
 770                 port = state->card->iobase + dmabuf->write_channel->port;
 771
 772         if(state->card->pci_id == PCI_DEVICE_ID_SI_7012) {
 773                 port_picb = port + OFF_SR;
 774                 bytes = 1;
 775         } else
 776                 port_picb = port + OFF_PICB;
 777
 778         do {
 779                 civ = inb(port+OFF_CIV) & 31;
 780                 offset = inw(port_picb);
 781                 /* Must have a delay here! */
 782                 if(offset == 0)
 783                         udelay(1);
 784                 /* Reread both registers and make sure that that total
 785                  * offset from the first reading to the second is 0.
 786                  * There is an issue with SiS hardware where it will count
 787                  * picb down to 0, then update civ to the next value,
 788                  * then set the new picb to fragsize bytes.  We can catch
 789                  * it between the civ update and the picb update, making
 790                  * it look as though we are 1 fragsize ahead of where we
 791                  * are.  The next to we get the address though, it will
 792                  * be back in the right place, and we will suddenly think
 793                  * we just went forward dmasize - fragsize bytes, causing
 794                  * totally stupid *huge* dma overrun messages.  We are
 795                  * assuming that the 1us delay is more than long enough
 796                  * that we won't have to worry about the chip still being
 797                  * out of sync with reality ;-)
 798                  */
 799         } while (civ != (inb(port+OFF_CIV) & 31) || offset != inw(port_picb));
 800
 801         return (((civ + 1) * dmabuf->fragsize - (bytes * offset))
 802                 % dmabuf->dmasize);
 803 }
 804
 805 /* Stop recording (lock held) */
 806 static inline void __stop_adc(struct i810_state *state)
 807 {
 808         struct dmabuf *dmabuf = &state->dmabuf;
 809         struct i810_card *card = state->card;
 810
 811         dmabuf->enable &= ~ADC_RUNNING;
 812         outb(0, card->iobase + PI_CR);
 813         // wait for the card to acknowledge shutdown
 814         while( inb(card->iobase + PI_CR) != 0 ) ;
 815         // now clear any latent interrupt bits (like the halt bit)
 816         if(card->pci_id == PCI_DEVICE_ID_SI_7012)
 817                 outb( inb(card->iobase + PI_PICB), card->iobase + PI_PICB );
 818         else
 819                 outb( inb(card->iobase + PI_SR), card->iobase + PI_SR );
 820         outl( inl(card->iobase + GLOB_STA) & INT_PI, card->iobase + GLOB_STA);
 821 }
 822
 823 static void stop_adc(struct i810_state *state)
 824 {
 825         struct i810_card *card = state->card;
 826         unsigned long flags;
 827
 828         spin_lock_irqsave(&card->lock, flags);
 829         __stop_adc(state);
 830         spin_unlock_irqrestore(&card->lock, flags);
 831 }
 832
 833 static inline void __start_adc(struct i810_state *state)
 834 {
 835         struct dmabuf *dmabuf = &state->dmabuf;
 836
 837         if (dmabuf->count < dmabuf->dmasize && dmabuf->ready && !dmabuf->enable &&
 838             (dmabuf->trigger & PCM_ENABLE_INPUT)) {
 839                 dmabuf->enable |= ADC_RUNNING;
 840                 // Interrupt enable, LVI enable, DMA enable
 841                 outb(0x10 | 0x04 | 0x01, state->card->iobase + PI_CR);
 842         }
 843 }
 844
 845 static void start_adc(struct i810_state *state)
 846 {
 847         struct i810_card *card = state->card;
 848         unsigned long flags;
 849
 850         spin_lock_irqsave(&card->lock, flags);
 851         __start_adc(state);
 852         spin_unlock_irqrestore(&card->lock, flags);
 853 }
 854
 855 /* stop playback (lock held) */
 856 static inline void __stop_dac(struct i810_state *state)
 857 {
 858         struct dmabuf *dmabuf = &state->dmabuf;
 859         struct i810_card *card = state->card;
 860
 861         dmabuf->enable &= ~DAC_RUNNING;
 862         outb(0, card->iobase + PO_CR);
 863         // wait for the card to acknowledge shutdown
 864         while( inb(card->iobase + PO_CR) != 0 ) ;
 865         // now clear any latent interrupt bits (like the halt bit)
 866         if(card->pci_id == PCI_DEVICE_ID_SI_7012)
 867                 outb( inb(card->iobase + PO_PICB), card->iobase + PO_PICB );
 868         else
 869                 outb( inb(card->iobase + PO_SR), card->iobase + PO_SR );
 870         outl( inl(card->iobase + GLOB_STA) & INT_PO, card->iobase + GLOB_STA);
 871 }
 872
 873 static void stop_dac(struct i810_state *state)
 874 {
 875         struct i810_card *card = state->card;
 876         unsigned long flags;
 877
 878         spin_lock_irqsave(&card->lock, flags);
 879         __stop_dac(state);
 880         spin_unlock_irqrestore(&card->lock, flags);
 881 }
 882
 883 static inline void __start_dac(struct i810_state *state)
 884 {
 885         struct dmabuf *dmabuf = &state->dmabuf;
 886
 887         if (dmabuf->count > 0 && dmabuf->ready && !dmabuf->enable &&
 888             (dmabuf->trigger & PCM_ENABLE_OUTPUT)) {
 889                 dmabuf->enable |= DAC_RUNNING;
 890                 // Interrupt enable, LVI enable, DMA enable
 891                 outb(0x10 | 0x04 | 0x01, state->card->iobase + PO_CR);
 892         }
 893 }
 894 static void start_dac(struct i810_state *state)
 895 {
 896         struct i810_card *card = state->card;
 897         unsigned long flags;
 898
 899         spin_lock_irqsave(&card->lock, flags);
 900         __start_dac(state);
 901         spin_unlock_irqrestore(&card->lock, flags);
 902 }
 903
 904 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
 905 #define DMABUF_MINORDER 1
 906
 907 /* allocate DMA buffer, playback and recording buffer should be allocated seperately */
 908 static int alloc_dmabuf(struct i810_state *state)
 909 {
 910         struct dmabuf *dmabuf = &state->dmabuf;
 911         void *rawbuf= NULL;
 912         int order, size;
 913         struct page *page, *pend;
 914
 915         /* If we don't have any oss frag params, then use our default ones */
 916         if(dmabuf->ossmaxfrags == 0)
 917                 dmabuf->ossmaxfrags = 4;
 918         if(dmabuf->ossfragsize == 0)
 919                 dmabuf->ossfragsize = (PAGE_SIZE<<DMABUF_DEFAULTORDER)/dmabuf->ossmaxfrags;
 920         size = dmabuf->ossfragsize * dmabuf->ossmaxfrags;
 921
 922         if(dmabuf->rawbuf && (PAGE_SIZE << dmabuf->buforder) == size)
 923                 return 0;
 924         /* alloc enough to satisfy the oss params */
 925         for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
 926                 if ( (PAGE_SIZE<<order) > size )
 927                         continue;
 928                 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
 929                                                    PAGE_SIZE << order,
 930                                                    &dmabuf->dma_handle)))
 931                         break;
 932         }
 933         if (!rawbuf)
 934                 return -ENOMEM;
 935
 936
 937 #ifdef DEBUG
 938         printk("i810_audio: allocated %ld (order = %d) bytes at %p\n",
 939                PAGE_SIZE << order, order, rawbuf);
 940 #endif
 941
 942         dmabuf->ready  = dmabuf->mapped = 0;
 943         dmabuf->rawbuf = rawbuf;
 944         dmabuf->buforder = order;
 945
 946         /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 947         pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
 948         for (page = virt_to_page(rawbuf); page <= pend; page++)
 949                 mem_map_reserve(page);
 950
 951         return 0;
 952 }
 953
 954 /* free DMA buffer */
 955 static void dealloc_dmabuf(struct i810_state *state)
 956 {
 957         struct dmabuf *dmabuf = &state->dmabuf;
 958         struct page *page, *pend;
 959
 960         if (dmabuf->rawbuf) {
 961                 /* undo marking the pages as reserved */
 962                 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
 963                 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
 964                         mem_map_unreserve(page);
 965                 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
 966                                     dmabuf->rawbuf, dmabuf->dma_handle);
 967         }
 968         dmabuf->rawbuf = NULL;
 969         dmabuf->mapped = dmabuf->ready = 0;
 970 }
 971
 972 static int prog_dmabuf(struct i810_state *state, unsigned rec)
 973 {
 974         struct dmabuf *dmabuf = &state->dmabuf;
 975         struct i810_channel *c;
 976         struct sg_item *sg;
 977         unsigned long flags;
 978         int ret;
 979         unsigned fragint;
 980         int i;
 981
 982         spin_lock_irqsave(&state->card->lock, flags);
 983         if(dmabuf->enable & DAC_RUNNING)
 984                 __stop_dac(state);
 985         if(dmabuf->enable & ADC_RUNNING)
 986                 __stop_adc(state);
 987         dmabuf->total_bytes = 0;
 988         dmabuf->count = dmabuf->error = 0;
 989         dmabuf->swptr = dmabuf->hwptr = 0;
 990         spin_unlock_irqrestore(&state->card->lock, flags);
 991
 992         /* allocate DMA buffer, let alloc_dmabuf determine if we are already
 993          * allocated well enough or if we should replace the current buffer
 994          * (assuming one is already allocated, if it isn't, then allocate it).
 995          */
 996         if ((ret = alloc_dmabuf(state)))
 997                 return ret;
 998
 999         /* FIXME: figure out all this OSS fragment stuff */
1000         /* I did, it now does what it should according to the OSS API.  DL */
1001         /* We may not have realloced our dmabuf, but the fragment size to
1002          * fragment number ratio may have changed, so go ahead and reprogram
1003          * things
1004          */
1005         dmabuf->dmasize = PAGE_SIZE << dmabuf->buforder;
1006         dmabuf->numfrag = SG_LEN;
1007         dmabuf->fragsize = dmabuf->dmasize/dmabuf->numfrag;
1008         dmabuf->fragsamples = dmabuf->fragsize >> 1;
1009         dmabuf->userfragsize = dmabuf->ossfragsize;
1010         dmabuf->userfrags = dmabuf->dmasize/dmabuf->ossfragsize;
1011
1012         memset(dmabuf->rawbuf, 0, dmabuf->dmasize);
1013
1014         if(dmabuf->ossmaxfrags == 4) {
1015                 fragint = 8;
1016                 dmabuf->fragshift = 2;
1017         } else if (dmabuf->ossmaxfrags == 8) {
1018                 fragint = 4;
1019                 dmabuf->fragshift = 3;
1020         } else if (dmabuf->ossmaxfrags == 16) {
1021                 fragint = 2;
1022                 dmabuf->fragshift = 4;
1023         } else {
1024                 fragint = 1;
1025                 dmabuf->fragshift = 5;
1026         }
1027         /*
1028          *      Now set up the ring
1029          */
1030         if(dmabuf->read_channel)
1031                 c = dmabuf->read_channel;
1032         else
1033                 c = dmabuf->write_channel;
1034         while(c != NULL) {
1035                 sg=&c->sg[0];
1036                 /*
1037                  *      Load up 32 sg entries and take an interrupt at half
1038                  *      way (we might want more interrupts later..)
1039                  */
1040
1041                 for(i=0;i<dmabuf->numfrag;i++)
1042                 {
1043                         sg->busaddr=(u32)dmabuf->dma_handle+dmabuf->fragsize*i;
1044                         // the card will always be doing 16bit stereo
1045                         sg->control=dmabuf->fragsamples;
1046                         if(state->card->pci_id == PCI_DEVICE_ID_SI_7012)
1047                                 sg->control <<= 1;
1048                         sg->control|=CON_BUFPAD;
1049                         // set us up to get IOC interrupts as often as needed to
1050                         // satisfy numfrag requirements, no more
1051                         if( ((i+1) % fragint) == 0) {
1052                                 sg->control|=CON_IOC;
1053                         }
1054                         sg++;
1055                 }
1056                 spin_lock_irqsave(&state->card->lock, flags);
1057                 outb(2, state->card->iobase+c->port+OFF_CR);   /* reset DMA machine */
1058                 while( inb(state->card->iobase+c->port+OFF_CR) & 0x02 ) ;
1059                 outl((u32)state->card->chandma +
1060                     c->num*sizeof(struct i810_channel),
1061                     state->card->iobase+c->port+OFF_BDBAR);
1062                 CIV_TO_LVI(state->card->iobase+c->port, 0);
1063
1064                 spin_unlock_irqrestore(&state->card->lock, flags);
1065
1066                 if(c != dmabuf->write_channel)
1067                         c = dmabuf->write_channel;
1068                 else
1069                         c = NULL;
1070         }
1071
1072         /* set the ready flag for the dma buffer */
1073         dmabuf->ready = 1;
1074
1075 #ifdef DEBUG
1076         printk("i810_audio: prog_dmabuf, sample rate = %d, format = %d,\n\tnumfrag = %d, "
1077                "fragsize = %d dmasize = %d\n",
1078                dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1079                dmabuf->fragsize, dmabuf->dmasize);
1080 #endif
1081
1082         return 0;
1083 }
1084
1085 static void __i810_update_lvi(struct i810_state *state, int rec)
1086 {
1087         struct dmabuf *dmabuf = &state->dmabuf;
1088         int x, port;
1089
1090         port = state->card->iobase;
1091         if(rec)
1092                 port += dmabuf->read_channel->port;
1093         else
1094                 port += dmabuf->write_channel->port;
1095
1096         /* if we are currently stopped, then our CIV is actually set to our
1097          * *last* sg segment and we are ready to wrap to the next.  However,
1098          * if we set our LVI to the last sg segment, then it won't wrap to
1099          * the next sg segment, it won't even get a start.  So, instead, when
1100          * we are stopped, we set both the LVI value and also we increment
1101          * the CIV value to the next sg segment to be played so that when
1102          * we call start_{dac,adc}, things will operate properly
1103          */
1104         if (!dmabuf->enable && dmabuf->ready) {
1105                 if(rec && dmabuf->count < dmabuf->dmasize &&
1106                    (dmabuf->trigger & PCM_ENABLE_INPUT))
1107                 {
1108                         CIV_TO_LVI(port, 1);
1109                         __start_adc(state);
1110                         while( !(inb(port + OFF_CR) & ((1<<4) | (1<<2))) ) ;
1111                 } else if (!rec && dmabuf->count &&
1112                            (dmabuf->trigger & PCM_ENABLE_OUTPUT))
1113                 {
1114                         CIV_TO_LVI(port, 1);
1115                         __start_dac(state);
1116                         while( !(inb(port + OFF_CR) & ((1<<4) | (1<<2))) ) ;
1117                 }
1118         }
1119
1120         /* swptr - 1 is the tail of our transfer */
1121         x = (dmabuf->dmasize + dmabuf->swptr - 1) % dmabuf->dmasize;
1122         x /= dmabuf->fragsize;
1123         outb(x, port+OFF_LVI);
1124 }
1125
1126 static void i810_update_lvi(struct i810_state *state, int rec)
1127 {
1128         struct dmabuf *dmabuf = &state->dmabuf;
1129         unsigned long flags;
1130
1131         if(!dmabuf->ready)
1132                 return;
1133         spin_lock_irqsave(&state->card->lock, flags);
1134         __i810_update_lvi(state, rec);
1135         spin_unlock_irqrestore(&state->card->lock, flags);
1136 }
1137
1138 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1139 static void i810_update_ptr(struct i810_state *state)
1140 {
1141         struct dmabuf *dmabuf = &state->dmabuf;
1142         unsigned hwptr;
1143         int diff;
1144
1145         /* error handling and process wake up for DAC */
1146         if (dmabuf->enable == ADC_RUNNING) {
1147                 /* update hardware pointer */
1148                 hwptr = i810_get_dma_addr(state, 1);
1149                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1150 #if defined(DEBUG_INTERRUPTS) || defined(DEBUG_MMAP)
1151                 printk("ADC HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
1152 #endif
1153                 dmabuf->hwptr = hwptr;
1154                 dmabuf->total_bytes += diff;
1155                 dmabuf->count += diff;
1156                 if (dmabuf->count > dmabuf->dmasize) {
1157                         /* buffer underrun or buffer overrun */
1158                         /* this is normal for the end of a read */
1159                         /* only give an error if we went past the */
1160                         /* last valid sg entry */
1161                         if((inb(state->card->iobase + PI_CIV) & 31) !=
1162                            (inb(state->card->iobase + PI_LVI) & 31)) {
1163                                 printk(KERN_WARNING "i810_audio: DMA overrun on read\n");
1164                                 dmabuf->error++;
1165                         }
1166                 }
1167                 if (dmabuf->count > dmabuf->userfragsize)
1168                         wake_up(&dmabuf->wait);
1169         }
1170         /* error handling and process wake up for DAC */
1171         if (dmabuf->enable == DAC_RUNNING) {
1172                 /* update hardware pointer */
1173                 hwptr = i810_get_dma_addr(state, 0);
1174                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1175 #if defined(DEBUG_INTERRUPTS) || defined(DEBUG_MMAP)
1176                 printk("DAC HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
1177 #endif
1178                 dmabuf->hwptr = hwptr;
1179                 dmabuf->total_bytes += diff;
1180                 dmabuf->count -= diff;
1181                 if (dmabuf->count < 0) {
1182                         /* buffer underrun or buffer overrun */
1183                         /* this is normal for the end of a write */
1184                         /* only give an error if we went past the */
1185                         /* last valid sg entry */
1186                         if((inb(state->card->iobase + PO_CIV) & 31) !=
1187                            (inb(state->card->iobase + PO_LVI) & 31)) {
1188                                 printk(KERN_WARNING "i810_audio: DMA overrun on write\n");
1189                                 printk("i810_audio: CIV %d, LVI %d, hwptr %x, "
1190                                         "count %d\n",
1191                                         inb(state->card->iobase + PO_CIV) & 31,
1192                                         inb(state->card->iobase + PO_LVI) & 31,
1193                                         dmabuf->hwptr, dmabuf->count);
1194                                 dmabuf->error++;
1195                         }
1196                 }
1197                 if (dmabuf->count < (dmabuf->dmasize-dmabuf->userfragsize))
1198                         wake_up(&dmabuf->wait);
1199         }
1200 }
1201
1202 static inline int i810_get_free_write_space(struct i810_state *state)
1203 {
1204         struct dmabuf *dmabuf = &state->dmabuf;
1205         int free;
1206
1207         i810_update_ptr(state);
1208         // catch underruns during playback
1209         if (dmabuf->count < 0) {
1210                 dmabuf->count = 0;
1211                 dmabuf->swptr = dmabuf->hwptr;
1212         }
1213         free = dmabuf->dmasize - dmabuf->count;
1214         free -= (dmabuf->hwptr % dmabuf->fragsize);
1215         if(free < 0)
1216                 return(0);
1217         return(free);
1218 }
1219
1220 static inline int i810_get_available_read_data(struct i810_state *state)
1221 {
1222         struct dmabuf *dmabuf = &state->dmabuf;
1223         int avail;
1224
1225         i810_update_ptr(state);
1226         // catch overruns during record
1227         if (dmabuf->count > dmabuf->dmasize) {
1228                 dmabuf->count = dmabuf->dmasize;
1229                 dmabuf->swptr = dmabuf->hwptr;
1230         }
1231         avail = dmabuf->count;
1232         avail -= (dmabuf->hwptr % dmabuf->fragsize);
1233         if(avail < 0)
1234                 return(0);
1235         return(avail);
1236 }
1237
1238 static int drain_dac(struct i810_state *state, int signals_allowed)
1239 {
1240         DECLARE_WAITQUEUE(wait, current);
1241         struct dmabuf *dmabuf = &state->dmabuf;
1242         unsigned long flags;
1243         unsigned long tmo;
1244         int count;
1245
1246         if (!dmabuf->ready)
1247                 return 0;
1248         if(dmabuf->mapped) {
1249                 stop_dac(state);
1250                 return 0;
1251         }
1252         add_wait_queue(&dmabuf->wait, &wait);
1253         for (;;) {
1254
1255                 spin_lock_irqsave(&state->card->lock, flags);
1256                 i810_update_ptr(state);
1257                 count = dmabuf->count;
1258                 spin_unlock_irqrestore(&state->card->lock, flags);
1259
1260                 if (count <= 0)
1261                         break;
1262
1263                 /*
1264                  * This will make sure that our LVI is correct, that our
1265                  * pointer is updated, and that the DAC is running.  We
1266                  * have to force the setting of dmabuf->trigger to avoid
1267                  * any possible deadlocks.
1268                  */
1269                 if(!dmabuf->enable) {
1270                         dmabuf->trigger = PCM_ENABLE_OUTPUT;
1271                         i810_update_lvi(state,0);
1272                 }
1273                 if (signal_pending(current) && signals_allowed) {
1274                         break;
1275                 }
1276
1277                 /* It seems that we have to set the current state to
1278                  * TASK_INTERRUPTIBLE every time to make the process
1279                  * really go to sleep.  This also has to be *after* the
1280                  * update_ptr() call because update_ptr is likely to
1281                  * do a wake_up() which will unset this before we ever
1282                  * try to sleep, resuling in a tight loop in this code
1283                  * instead of actually sleeping and waiting for an
1284                  * interrupt to wake us up!
1285                  */
1286                 set_current_state(TASK_INTERRUPTIBLE);
1287                 /*
1288                  * set the timeout to significantly longer than it *should*
1289                  * take for the DAC to drain the DMA buffer
1290                  */
1291                 tmo = (count * HZ) / (dmabuf->rate);
1292                 if (!schedule_timeout(tmo >= 2 ? tmo : 2)){
1293                         printk(KERN_ERR "i810_audio: drain_dac, dma timeout?\n");
1294                         count = 0;
1295                         break;
1296                 }
1297         }
1298         set_current_state(TASK_RUNNING);
1299         remove_wait_queue(&dmabuf->wait, &wait);
1300         if(count > 0 && signal_pending(current) && signals_allowed)
1301                 return -ERESTARTSYS;
1302         stop_dac(state);
1303         return 0;
1304 }
1305
1306 static void i810_channel_interrupt(struct i810_card *card)
1307 {
1308         int i, count;
1309
1310 #ifdef DEBUG_INTERRUPTS
1311         printk("CHANNEL ");
1312 #endif
1313         for(i=0;i<NR_HW_CH;i++)
1314         {
1315                 struct i810_state *state = card->states[i];
1316                 struct i810_channel *c;
1317                 struct dmabuf *dmabuf;
1318                 unsigned long port = card->iobase;
1319                 u16 status;
1320
1321                 if(!state)
1322                         continue;
1323                 if(!state->dmabuf.ready)
1324                         continue;
1325                 dmabuf = &state->dmabuf;
1326                 if(dmabuf->enable & DAC_RUNNING) {
1327                         c=dmabuf->write_channel;
1328                 } else if(dmabuf->enable & ADC_RUNNING) {
1329                         c=dmabuf->read_channel;
1330                 } else  /* This can occur going from R/W to close */
1331                         continue;
1332
1333                 port+=c->port;
1334
1335                 if(card->pci_id == PCI_DEVICE_ID_SI_7012)
1336                         status = inw(port + OFF_PICB);
1337                 else
1338                         status = inw(port + OFF_SR);
1339
1340 #ifdef DEBUG_INTERRUPTS
1341                 printk("NUM %d PORT %X IRQ ( ST%d ", c->num, c->port, status);
1342 #endif
1343                 if(status & DMA_INT_COMPLETE)
1344                 {
1345                         /* only wake_up() waiters if this interrupt signals
1346                          * us being beyond a userfragsize of data open or
1347                          * available, and i810_update_ptr() does that for
1348                          * us
1349                          */
1350                         i810_update_ptr(state);
1351 #ifdef DEBUG_INTERRUPTS
1352                         printk("COMP %d ", dmabuf->hwptr /
1353                                         dmabuf->fragsize);
1354 #endif
1355                 }
1356                 if(status & (DMA_INT_LVI | DMA_INT_DCH))
1357                 {
1358                         /* wake_up() unconditionally on LVI and DCH */
1359                         i810_update_ptr(state);
1360                         wake_up(&dmabuf->wait);
1361 #ifdef DEBUG_INTERRUPTS
1362                         if(status & DMA_INT_LVI)
1363                                 printk("LVI ");
1364                         if(status & DMA_INT_DCH)
1365                                 printk("DCH -");
1366 #endif
1367                         if(dmabuf->enable & DAC_RUNNING)
1368                                 count = dmabuf->count;
1369                         else
1370                                 count = dmabuf->dmasize - dmabuf->count;
1371                         if(count > 0) {
1372                                 outb(inb(port+OFF_CR) | 1, port+OFF_CR);
1373 #ifdef DEBUG_INTERRUPTS
1374                                 printk(" CONTINUE ");
1375 #endif
1376                         } else {
1377                                 if (dmabuf->enable & DAC_RUNNING)
1378                                         __stop_dac(state);
1379                                 if (dmabuf->enable & ADC_RUNNING)
1380                                         __stop_adc(state);
1381                                 dmabuf->enable = 0;
1382 #ifdef DEBUG_INTERRUPTS
1383                                 printk(" STOP ");
1384 #endif
1385                         }
1386                 }
1387                 if(card->pci_id == PCI_DEVICE_ID_SI_7012)
1388                         outw(status & DMA_INT_MASK, port + OFF_PICB);
1389                 else
1390                         outw(status & DMA_INT_MASK, port + OFF_SR);
1391         }
1392 #ifdef DEBUG_INTERRUPTS
1393         printk(")\n");
1394 #endif
1395 }
1396
1397 static void i810_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1398 {
1399         struct i810_card *card = (struct i810_card *)dev_id;
1400         u32 status;
1401
1402         spin_lock(&card->lock);
1403
1404         status = inl(card->iobase + GLOB_STA);
1405
1406         if(!(status & INT_MASK))
1407         {
1408                 spin_unlock(&card->lock);
1409                 return;  /* not for us */
1410         }
1411
1412         if(status & (INT_PO|INT_PI|INT_MC))
1413                 i810_channel_interrupt(card);
1414
1415         /* clear 'em */
1416         outl(status & INT_MASK, card->iobase + GLOB_STA);
1417         spin_unlock(&card->lock);
1418 }
1419
1420 /* in this loop, dmabuf.count signifies the amount of data that is
1421    waiting to be copied to the user's buffer.  It is filled by the dma
1422    machine and drained by this loop. */
1423
1424 static ssize_t i810_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1425 {
1426         struct i810_state *state = (struct i810_state *)file->private_data;
1427         struct i810_card *card=state ? state->card : 0;
1428         struct dmabuf *dmabuf = &state->dmabuf;
1429         ssize_t ret;
1430         unsigned long flags;
1431         unsigned int swptr;
1432         int cnt;
1433         DECLARE_WAITQUEUE(waita, current);
1434
1435 #ifdef DEBUG2
1436         printk("i810_audio: i810_read called, count = %d\n", count);
1437 #endif
1438
1439         if (ppos != &file->f_pos)
1440                 return -ESPIPE;
1441         if (dmabuf->mapped)
1442                 return -ENXIO;
1443         if (dmabuf->enable & DAC_RUNNING)
1444                 return -ENODEV;
1445         if (!dmabuf->read_channel) {
1446                 dmabuf->ready = 0;
1447                 dmabuf->read_channel = card->alloc_rec_pcm_channel(card);
1448                 if (!dmabuf->read_channel) {
1449                         return -EBUSY;
1450                 }
1451         }
1452         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1453                 return ret;
1454         if (!access_ok(VERIFY_WRITE, buffer, count))
1455                 return -EFAULT;
1456         ret = 0;
1457
1458         add_wait_queue(&dmabuf->wait, &waita);
1459         while (count > 0) {
1460                 set_current_state(TASK_INTERRUPTIBLE);
1461                 spin_lock_irqsave(&card->lock, flags);
1462                 if (PM_SUSPENDED(card)) {
1463                         spin_unlock_irqrestore(&card->lock, flags);
1464                         schedule();
1465                         if (signal_pending(current)) {
1466                                 if (!ret) ret = -EAGAIN;
1467                                 break;
1468                         }
1469                         continue;
1470                 }
1471                 swptr = dmabuf->swptr;
1472                 cnt = i810_get_available_read_data(state);
1473                 // this is to make the copy_to_user simpler below
1474                 if(cnt > (dmabuf->dmasize - swptr))
1475                         cnt = dmabuf->dmasize - swptr;
1476                 spin_unlock_irqrestore(&card->lock, flags);
1477
1478                 if (cnt > count)
1479                         cnt = count;
1480                 /* Lop off the last two bits to force the code to always
1481                  * write in full samples.  This keeps software that sets
1482                  * O_NONBLOCK but doesn't check the return value of the
1483                  * write call from getting things out of state where they
1484                  * think a full 4 byte sample was written when really only
1485                  * a portion was, resulting in odd sound and stereo
1486                  * hysteresis.
1487                  */
1488                 cnt &= ~0x3;
1489                 if (cnt <= 0) {
1490                         unsigned long tmo;
1491                         /*
1492                          * Don't let us deadlock.  The ADC won't start if
1493                          * dmabuf->trigger isn't set.  A call to SETTRIGGER
1494                          * could have turned it off after we set it to on
1495                          * previously.
1496                          */
1497                         dmabuf->trigger = PCM_ENABLE_INPUT;
1498                         /*
1499                          * This does three things.  Updates LVI to be correct,
1500                          * makes sure the ADC is running, and updates the
1501                          * hwptr.
1502                          */
1503                         i810_update_lvi(state,1);
1504                         if (file->f_flags & O_NONBLOCK) {
1505                                 if (!ret) ret = -EAGAIN;
1506                                 goto done;
1507                         }
1508                         /* Set the timeout to how long it would take to fill
1509                          * two of our buffers.  If we haven't been woke up
1510                          * by then, then we know something is wrong.
1511                          */
1512                         tmo = (dmabuf->dmasize * HZ * 2) / (dmabuf->rate * 4);
1513                         /* There are two situations when sleep_on_timeout returns, one is when
1514                            the interrupt is serviced correctly and the process is waked up by
1515                            ISR ON TIME. Another is when timeout is expired, which means that
1516                            either interrupt is NOT serviced correctly (pending interrupt) or it
1517                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1518                            which results in a (potential) buffer overrun. And worse, there is
1519                            NOTHING we can do to prevent it. */
1520                         if (!schedule_timeout(tmo >= 2 ? tmo : 2)) {
1521 #ifdef DEBUG
1522                                 printk(KERN_ERR "i810_audio: recording schedule timeout, "
1523                                        "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1524                                        dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1525                                        dmabuf->hwptr, dmabuf->swptr);
1526 #endif
1527                                 /* a buffer overrun, we delay the recovery until next time the
1528                                    while loop begin and we REALLY have space to record */
1529                         }
1530                         if (signal_pending(current)) {
1531                                 ret = ret ? ret : -ERESTARTSYS;
1532                                 goto done;
1533                         }
1534                         continue;
1535                 }
1536
1537                 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1538                         if (!ret) ret = -EFAULT;
1539                         goto done;
1540                 }
1541
1542                 swptr = (swptr + cnt) % dmabuf->dmasize;
1543
1544                 spin_lock_irqsave(&card->lock, flags);
1545
1546                 if (PM_SUSPENDED(card)) {
1547                         spin_unlock_irqrestore(&card->lock, flags);
1548                         continue;
1549                 }
1550                 dmabuf->swptr = swptr;
1551                 dmabuf->count -= cnt;
1552                 spin_unlock_irqrestore(&card->lock, flags);
1553
1554                 count -= cnt;
1555                 buffer += cnt;
1556                 ret += cnt;
1557         }
1558  done:
1559         i810_update_lvi(state,1);
1560         set_current_state(TASK_RUNNING);
1561         remove_wait_queue(&dmabuf->wait, &waita);
1562
1563         return ret;
1564 }
1565
1566 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1567    the soundcard.  it is drained by the dma machine and filled by this loop. */
1568 static ssize_t i810_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1569 {
1570         struct i810_state *state = (struct i810_state *)file->private_data;
1571         struct i810_card *card=state ? state->card : 0;
1572         struct dmabuf *dmabuf = &state->dmabuf;
1573         ssize_t ret;
1574         unsigned long flags;
1575         unsigned int swptr = 0;
1576         int cnt, x;
1577         DECLARE_WAITQUEUE(waita, current);
1578
1579 #ifdef DEBUG2
1580         printk("i810_audio: i810_write called, count = %d\n", count);
1581 #endif
1582
1583         if (ppos != &file->f_pos)
1584                 return -ESPIPE;
1585         if (dmabuf->mapped)
1586                 return -ENXIO;
1587         if (dmabuf->enable & ADC_RUNNING)
1588                 return -ENODEV;
1589         if (!dmabuf->write_channel) {
1590                 dmabuf->ready = 0;
1591                 dmabuf->write_channel = card->alloc_pcm_channel(card);
1592                 if(!dmabuf->write_channel)
1593                         return -EBUSY;
1594         }
1595         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1596                 return ret;
1597         if (!access_ok(VERIFY_READ, buffer, count))
1598                 return -EFAULT;
1599         ret = 0;
1600
1601         add_wait_queue(&dmabuf->wait, &waita);
1602         while (count > 0) {
1603                 set_current_state(TASK_INTERRUPTIBLE);
1604                 spin_lock_irqsave(&state->card->lock, flags);
1605                 if (PM_SUSPENDED(card)) {
1606                         spin_unlock_irqrestore(&card->lock, flags);
1607                         schedule();
1608                         if (signal_pending(current)) {
1609                                 if (!ret) ret = -EAGAIN;
1610                                 break;
1611                         }
1612                         continue;
1613                 }
1614
1615                 swptr = dmabuf->swptr;
1616                 cnt = i810_get_free_write_space(state);
1617                 /* Bound the maximum size to how much we can copy to the
1618                  * dma buffer before we hit the end.  If we have more to
1619                  * copy then it will get done in a second pass of this
1620                  * loop starting from the beginning of the buffer.
1621                  */
1622                 if(cnt > (dmabuf->dmasize - swptr))
1623                         cnt = dmabuf->dmasize - swptr;
1624                 spin_unlock_irqrestore(&state->card->lock, flags);
1625
1626 #ifdef DEBUG2
1627                 printk(KERN_INFO "i810_audio: i810_write: %d bytes available space\n", cnt);
1628 #endif
1629                 if (cnt > count)
1630                         cnt = count;
1631                 /* Lop off the last two bits to force the code to always
1632                  * write in full samples.  This keeps software that sets
1633                  * O_NONBLOCK but doesn't check the return value of the
1634                  * write call from getting things out of state where they
1635                  * think a full 4 byte sample was written when really only
1636                  * a portion was, resulting in odd sound and stereo
1637                  * hysteresis.
1638                  */
1639                 cnt &= ~0x3;
1640                 if (cnt <= 0) {
1641                         unsigned long tmo;
1642                         // There is data waiting to be played
1643                         /*
1644                          * Force the trigger setting since we would
1645                          * deadlock with it set any other way
1646                          */
1647                         dmabuf->trigger = PCM_ENABLE_OUTPUT;
1648                         i810_update_lvi(state,0);
1649                         if (file->f_flags & O_NONBLOCK) {
1650                                 if (!ret) ret = -EAGAIN;
1651                                 goto ret;
1652                         }
1653                         /* Not strictly correct but works */
1654                         tmo = (dmabuf->dmasize * HZ * 2) / (dmabuf->rate * 4);
1655                         /* There are two situations when sleep_on_timeout returns, one is when
1656                            the interrupt is serviced correctly and the process is waked up by
1657                            ISR ON TIME. Another is when timeout is expired, which means that
1658                            either interrupt is NOT serviced correctly (pending interrupt) or it
1659                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1660                            which results in a (potential) buffer underrun. And worse, there is
1661                            NOTHING we can do to prevent it. */
1662                         if (!schedule_timeout(tmo >= 2 ? tmo : 2)) {
1663 #ifdef DEBUG
1664                                 printk(KERN_ERR "i810_audio: playback schedule timeout, "
1665                                        "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1666                                        dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1667                                        dmabuf->hwptr, dmabuf->swptr);
1668 #endif
1669                                 /* a buffer underrun, we delay the recovery until next time the
1670                                    while loop begin and we REALLY have data to play */
1671                                 //return ret;
1672                         }
1673                         if (signal_pending(current)) {
1674                                 if (!ret) ret = -ERESTARTSYS;
1675                                 goto ret;
1676                         }
1677                         continue;
1678                 }
1679                 if (copy_from_user(dmabuf->rawbuf+swptr,buffer,cnt)) {
1680                         if (!ret) ret = -EFAULT;
1681                         goto ret;
1682                 }
1683
1684                 swptr = (swptr + cnt) % dmabuf->dmasize;
1685
1686                 spin_lock_irqsave(&state->card->lock, flags);
1687                 if (PM_SUSPENDED(card)) {
1688                         spin_unlock_irqrestore(&card->lock, flags);
1689                         continue;
1690                 }
1691
1692                 dmabuf->swptr = swptr;
1693                 dmabuf->count += cnt;
1694
1695                 count -= cnt;
1696                 buffer += cnt;
1697                 ret += cnt;
1698                 spin_unlock_irqrestore(&state->card->lock, flags);
1699         }
1700         if (swptr % dmabuf->fragsize) {
1701                 x = dmabuf->fragsize - (swptr % dmabuf->fragsize);
1702                 memset(dmabuf->rawbuf + swptr, '\0', x);
1703         }
1704 ret:
1705         i810_update_lvi(state,0);
1706         set_current_state(TASK_RUNNING);
1707         remove_wait_queue(&dmabuf->wait, &waita);
1708
1709         return ret;
1710 }
1711
1712 /* No kernel lock - we have our own spinlock */
1713 static unsigned int i810_poll(struct file *file, struct poll_table_struct *wait)
1714 {
1715         struct i810_state *state = (struct i810_state *)file->private_data;
1716         struct dmabuf *dmabuf = &state->dmabuf;
1717         unsigned long flags;
1718         unsigned int mask = 0;
1719
1720         if(!dmabuf->ready)
1721                 return 0;
1722         poll_wait(file, &dmabuf->wait, wait);
1723         spin_lock_irqsave(&state->card->lock, flags);
1724         if (dmabuf->enable & ADC_RUNNING ||
1725             dmabuf->trigger & PCM_ENABLE_INPUT) {
1726                 if (i810_get_available_read_data(state) >=
1727                     (signed)dmabuf->userfragsize)
1728                         mask |= POLLIN | POLLRDNORM;
1729         }
1730         if (dmabuf->enable & DAC_RUNNING ||
1731             dmabuf->trigger & PCM_ENABLE_OUTPUT) {
1732                 if (i810_get_free_write_space(state) >=
1733                     (signed)dmabuf->userfragsize)
1734                         mask |= POLLOUT | POLLWRNORM;
1735         }
1736         spin_unlock_irqrestore(&state->card->lock, flags);
1737         return mask;
1738 }
1739
1740 static int i810_mmap(struct file *file, struct vm_area_struct *vma)
1741 {
1742         struct i810_state *state = (struct i810_state *)file->private_data;
1743         struct dmabuf *dmabuf = &state->dmabuf;
1744         int ret = -EINVAL;
1745         unsigned long size;
1746
1747         lock_kernel();
1748         if (vma->vm_flags & VM_WRITE) {
1749                 if (!dmabuf->write_channel &&
1750                     (dmabuf->write_channel =
1751                      state->card->alloc_pcm_channel(state->card)) == NULL) {
1752                         ret = -EBUSY;
1753                         goto out;
1754                 }
1755         }
1756         if (vma->vm_flags & VM_READ) {
1757                 if (!dmabuf->read_channel &&
1758                     (dmabuf->read_channel =
1759                      state->card->alloc_rec_pcm_channel(state->card)) == NULL) {
1760                         ret = -EBUSY;
1761                         goto out;
1762                 }
1763         }
1764         if ((ret = prog_dmabuf(state, 0)) != 0)
1765                 goto out;
1766
1767         ret = -EINVAL;
1768         if (vma->vm_pgoff != 0)
1769                 goto out;
1770         size = vma->vm_end - vma->vm_start;
1771         if (size > (PAGE_SIZE << dmabuf->buforder))
1772                 goto out;
1773         ret = -EAGAIN;
1774         if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1775                              size, vma->vm_page_prot))
1776                 goto out;
1777         dmabuf->mapped = 1;
1778         dmabuf->trigger = 0;
1779         ret = 0;
1780 #ifdef DEBUG_MMAP
1781         printk("i810_audio: mmap'ed %ld bytes of data space\n", size);
1782 #endif
1783 out:
1784         unlock_kernel();
1785         return ret;
1786 }
1787
1788 static int i810_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1789 {
1790         struct i810_state *state = (struct i810_state *)file->private_data;
1791         struct i810_channel *c = NULL;
1792         struct dmabuf *dmabuf = &state->dmabuf;
1793         unsigned long flags;
1794         audio_buf_info abinfo;
1795         count_info cinfo;
1796         unsigned int i_glob_cnt;
1797         int val = 0, ret;
1798         struct ac97_codec *codec = state->card->ac97_codec[0];
1799
1800 #ifdef DEBUG
1801         printk("i810_audio: i810_ioctl, arg=0x%x, cmd=", arg ? *(int *)arg : 0);
1802 #endif
1803
1804         switch (cmd)
1805         {
1806         case OSS_GETVERSION:
1807 #ifdef DEBUG
1808                 printk("OSS_GETVERSION\n");
1809 #endif
1810                 return put_user(SOUND_VERSION, (int *)arg);
1811
1812         case SNDCTL_DSP_RESET:
1813 #ifdef DEBUG
1814                 printk("SNDCTL_DSP_RESET\n");
1815 #endif
1816                 spin_lock_irqsave(&state->card->lock, flags);
1817                 if (dmabuf->enable == DAC_RUNNING) {
1818                         c = dmabuf->write_channel;
1819                         __stop_dac(state);
1820                 }
1821                 if (dmabuf->enable == ADC_RUNNING) {
1822                         c = dmabuf->read_channel;
1823                         __stop_adc(state);
1824                 }
1825                 if (c != NULL) {
1826                         outb(2, state->card->iobase+c->port+OFF_CR);   /* reset DMA machine */
1827                         while ( inb(state->card->iobase+c->port+OFF_CR) & 2 );
1828                         outl((u32)state->card->chandma +
1829                             c->num*sizeof(struct i810_channel),
1830                             state->card->iobase+c->port+OFF_BDBAR);
1831                         CIV_TO_LVI(state->card->iobase+c->port, 0);
1832                 }
1833
1834                 spin_unlock_irqrestore(&state->card->lock, flags);
1835                 synchronize_irq();
1836                 dmabuf->ready = 0;
1837                 dmabuf->swptr = dmabuf->hwptr = 0;
1838                 dmabuf->count = dmabuf->total_bytes = 0;
1839                 return 0;
1840
1841         case SNDCTL_DSP_SYNC:
1842 #ifdef DEBUG
1843                 printk("SNDCTL_DSP_SYNC\n");
1844 #endif
1845                 if (dmabuf->enable != DAC_RUNNING || file->f_flags & O_NONBLOCK)
1846                         return 0;
1847                 if((val = drain_dac(state, 1)))
1848                         return val;
1849                 dmabuf->total_bytes = 0;
1850                 return 0;
1851
1852         case SNDCTL_DSP_SPEED: /* set smaple rate */
1853 #ifdef DEBUG
1854                 printk("SNDCTL_DSP_SPEED\n");
1855 #endif
1856                 if (get_user(val, (int *)arg))
1857                         return -EFAULT;
1858                 if (val >= 0) {
1859                         if (file->f_mode & FMODE_WRITE) {
1860                                 if ( (state->card->ac97_status & SPDIF_ON) ) {  /* S/PDIF Enabled */
1861                                         /* AD1886 only supports 48000, need to check that */
1862                                         if ( i810_valid_spdif_rate ( codec, val ) ) {
1863                                                 /* Set DAC rate */
1864                                                 i810_set_spdif_output ( state, -1, 0 );
1865                                                 stop_dac(state);
1866                                                 dmabuf->ready = 0;
1867                                                 spin_lock_irqsave(&state->card->lock, flags);
1868                                                 i810_set_dac_rate(state, val);
1869                                                 spin_unlock_irqrestore(&state->card->lock, flags);
1870                                                 /* Set S/PDIF transmitter rate. */
1871                                                 i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, val );
1872                                                 if ( ! (state->card->ac97_status & SPDIF_ON) ) {
1873                                                         val = dmabuf->rate;
1874                                                 }
1875                                         } else { /* Not a valid rate for S/PDIF, ignore it */
1876                                                 val = dmabuf->rate;
1877                                         }
1878                                 } else {
1879                                         stop_dac(state);
1880                                         dmabuf->ready = 0;
1881                                         spin_lock_irqsave(&state->card->lock, flags);
1882                                         i810_set_dac_rate(state, val);
1883                                         spin_unlock_irqrestore(&state->card->lock, flags);
1884                                 }
1885                         }
1886                         if (file->f_mode & FMODE_READ) {
1887                                 stop_adc(state);
1888                                 dmabuf->ready = 0;
1889                                 spin_lock_irqsave(&state->card->lock, flags);
1890                                 i810_set_adc_rate(state, val);
1891                                 spin_unlock_irqrestore(&state->card->lock, flags);
1892                         }
1893                 }
1894                 return put_user(dmabuf->rate, (int *)arg);
1895
1896         case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1897 #ifdef DEBUG
1898                 printk("SNDCTL_DSP_STEREO\n");
1899 #endif
1900                 if (dmabuf->enable & DAC_RUNNING) {
1901                         stop_dac(state);
1902                 }
1903                 if (dmabuf->enable & ADC_RUNNING) {
1904                         stop_adc(state);
1905                 }
1906                 return put_user(1, (int *)arg);
1907
1908         case SNDCTL_DSP_GETBLKSIZE:
1909                 if (file->f_mode & FMODE_WRITE) {
1910                         if (!dmabuf->ready && (val = prog_dmabuf(state, 0)))
1911                                 return val;
1912                 }
1913                 if (file->f_mode & FMODE_READ) {
1914                         if (!dmabuf->ready && (val = prog_dmabuf(state, 1)))
1915                                 return val;
1916                 }
1917 #ifdef DEBUG
1918                 printk("SNDCTL_DSP_GETBLKSIZE %d\n", dmabuf->userfragsize);
1919 #endif
1920                 return put_user(dmabuf->userfragsize, (int *)arg);
1921
1922         case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1923 #ifdef DEBUG
1924                 printk("SNDCTL_DSP_GETFMTS\n");
1925 #endif
1926                 return put_user(AFMT_S16_LE, (int *)arg);
1927
1928         case SNDCTL_DSP_SETFMT: /* Select sample format */
1929 #ifdef DEBUG
1930                 printk("SNDCTL_DSP_SETFMT\n");
1931 #endif
1932                 return put_user(AFMT_S16_LE, (int *)arg);
1933
1934         case SNDCTL_DSP_CHANNELS:
1935 #ifdef DEBUG
1936                 printk("SNDCTL_DSP_CHANNELS\n");
1937 #endif
1938                 if (get_user(val, (int *)arg))
1939                         return -EFAULT;
1940
1941                 if (val > 0) {
1942                         if (dmabuf->enable & DAC_RUNNING) {
1943                                 stop_dac(state);
1944                         }
1945                         if (dmabuf->enable & ADC_RUNNING) {
1946                                 stop_adc(state);
1947                         }
1948                 } else {
1949                         return put_user(state->card->channels, (int *)arg);
1950                 }
1951
1952                 /* ICH and ICH0 only support 2 channels */
1953                 if ( state->card->pci_id == PCI_DEVICE_ID_INTEL_82801
1954                      || state->card->pci_id == PCI_DEVICE_ID_INTEL_82901)
1955                         return put_user(2, (int *)arg);
1956
1957                 /* Multi-channel support was added with ICH2. Bits in */
1958                 /* Global Status and Global Control register are now  */
1959                 /* used to indicate this.                             */
1960
1961                 i_glob_cnt = inl(state->card->iobase + GLOB_CNT);
1962
1963                 /* Current # of channels enabled */
1964                 if ( i_glob_cnt & 0x0100000 )
1965                         ret = 4;
1966                 else if ( i_glob_cnt & 0x0200000 )
1967                         ret = 6;
1968                 else
1969                         ret = 2;
1970
1971                 switch ( val ) {
1972                         case 2: /* 2 channels is always supported */
1973                                 outl(i_glob_cnt & 0xffcfffff,
1974                                      state->card->iobase + GLOB_CNT);
1975                                 /* Do we need to change mixer settings????  */
1976                                 break;
1977                         case 4: /* Supported on some chipsets, better check first */
1978                                 if ( state->card->channels >= 4 ) {
1979                                         outl((i_glob_cnt & 0xffcfffff) | 0x100000,
1980                                               state->card->iobase + GLOB_CNT);
1981                                         /* Do we need to change mixer settings??? */
1982                                 } else {
1983                                         val = ret;
1984                                 }
1985                                 break;
1986                         case 6: /* Supported on some chipsets, better check first */
1987                                 if ( state->card->channels >= 6 ) {
1988                                         outl((i_glob_cnt & 0xffcfffff) | 0x200000,
1989                                               state->card->iobase + GLOB_CNT);
1990                                         /* Do we need to change mixer settings??? */
1991                                 } else {
1992                                         val = ret;
1993                                 }
1994                                 break;
1995                         default: /* nothing else is ever supported by the chipset */
1996                                 val = ret;
1997                                 break;
1998                 }
1999
2000                 return put_user(val, (int *)arg);
2001
2002         case SNDCTL_DSP_POST: /* the user has sent all data and is notifying us */
2003                 /* we update the swptr to the end of the last sg segment then return */
2004 #ifdef DEBUG
2005                 printk("SNDCTL_DSP_POST\n");
2006 #endif
2007                 if(!dmabuf->ready || (dmabuf->enable != DAC_RUNNING))
2008                         return 0;
2009                 if((dmabuf->swptr % dmabuf->fragsize) != 0) {
2010                         val = dmabuf->fragsize - (dmabuf->swptr % dmabuf->fragsize);
2011                         dmabuf->swptr += val;
2012                         dmabuf->count += val;
2013                 }
2014                 return 0;
2015
2016         case SNDCTL_DSP_SUBDIVIDE:
2017                 if (dmabuf->subdivision)
2018                         return -EINVAL;
2019                 if (get_user(val, (int *)arg))
2020                         return -EFAULT;
2021                 if (val != 1 && val != 2 && val != 4)
2022                         return -EINVAL;
2023 #ifdef DEBUG
2024                 printk("SNDCTL_DSP_SUBDIVIDE %d\n", val);
2025 #endif
2026                 dmabuf->subdivision = val;
2027                 dmabuf->ready = 0;
2028                 return 0;
2029
2030         case SNDCTL_DSP_SETFRAGMENT:
2031                 if (get_user(val, (int *)arg))
2032                         return -EFAULT;
2033
2034                 dmabuf->ossfragsize = 1<<(val & 0xffff);
2035                 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2036                 if (!dmabuf->ossfragsize || !dmabuf->ossmaxfrags)
2037                         return -EINVAL;
2038                 /*
2039                  * Bound the frag size into our allowed range of 256 - 4096
2040                  */
2041                 if (dmabuf->ossfragsize < 256)
2042                         dmabuf->ossfragsize = 256;
2043                 else if (dmabuf->ossfragsize > 4096)
2044                         dmabuf->ossfragsize = 4096;
2045                 /*
2046                  * The numfrags could be something reasonable, or it could
2047                  * be 0xffff meaning "Give me as much as possible".  So,
2048                  * we check the numfrags * fragsize doesn't exceed our
2049                  * 64k buffer limit, nor is it less than our 8k minimum.
2050                  * If it fails either one of these checks, then adjust the
2051                  * number of fragments, not the size of them.  It's OK if
2052                  * our number of fragments doesn't equal 32 or anything
2053                  * like our hardware based number now since we are using
2054                  * a different frag count for the hardware.  Before we get
2055                  * into this though, bound the maxfrags to avoid overflow
2056                  * issues.  A reasonable bound would be 64k / 256 since our
2057                  * maximum buffer size is 64k and our minimum frag size is
2058                  * 256.  On the other end, our minimum buffer size is 8k and
2059                  * our maximum frag size is 4k, so the lower bound should
2060                  * be 2.
2061                  */
2062
2063                 if(dmabuf->ossmaxfrags > 256)
2064                         dmabuf->ossmaxfrags = 256;
2065                 else if (dmabuf->ossmaxfrags < 2)
2066                         dmabuf->ossmaxfrags = 2;
2067
2068                 val = dmabuf->ossfragsize * dmabuf->ossmaxfrags;
2069                 while (val < 8192) {
2070                     val <<= 1;
2071                     dmabuf->ossmaxfrags <<= 1;
2072                 }
2073                 while (val > 65536) {
2074                     val >>= 1;
2075                     dmabuf->ossmaxfrags >>= 1;
2076                 }
2077                 dmabuf->ready = 0;
2078 #ifdef DEBUG
2079                 printk("SNDCTL_DSP_SETFRAGMENT 0x%x, %d, %d\n", val,
2080                         dmabuf->ossfragsize, dmabuf->ossmaxfrags);
2081 #endif
2082
2083                 return 0;
2084
2085         case SNDCTL_DSP_GETOSPACE:
2086                 if (!(file->f_mode & FMODE_WRITE))
2087                         return -EINVAL;
2088                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2089                         return val;
2090                 spin_lock_irqsave(&state->card->lock, flags);
2091                 i810_update_ptr(state);
2092                 abinfo.fragsize = dmabuf->userfragsize;
2093                 abinfo.fragstotal = dmabuf->userfrags;
2094                 if (dmabuf->mapped)
2095                         abinfo.bytes = dmabuf->dmasize;
2096                 else
2097                         abinfo.bytes = i810_get_free_write_space(state);
2098                 abinfo.fragments = abinfo.bytes / dmabuf->userfragsize;
2099                 spin_unlock_irqrestore(&state->card->lock, flags);
2100 #if defined(DEBUG) || defined(DEBUG_MMAP)
2101                 printk("SNDCTL_DSP_GETOSPACE %d, %d, %d, %d\n", abinfo.bytes,
2102                         abinfo.fragsize, abinfo.fragments, abinfo.fragstotal);
2103 #endif
2104                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2105
2106         case SNDCTL_DSP_GETOPTR:
2107                 if (!(file->f_mode & FMODE_WRITE))
2108                         return -EINVAL;
2109                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2110                         return val;
2111                 spin_lock_irqsave(&state->card->lock, flags);
2112                 val = i810_get_free_write_space(state);
2113                 cinfo.bytes = dmabuf->total_bytes;
2114                 cinfo.ptr = dmabuf->hwptr;
2115                 cinfo.blocks = val/dmabuf->userfragsize;
2116                 if (dmabuf->mapped && (dmabuf->trigger & PCM_ENABLE_OUTPUT)) {
2117                         dmabuf->count += val;
2118                         dmabuf->swptr = (dmabuf->swptr + val) % dmabuf->dmasize;
2119                         __i810_update_lvi(state, 0);
2120                 }
2121                 spin_unlock_irqrestore(&state->card->lock, flags);
2122 #if defined(DEBUG) || defined(DEBUG_MMAP)
2123                 printk("SNDCTL_DSP_GETOPTR %d, %d, %d, %d\n", cinfo.bytes,
2124                         cinfo.blocks, cinfo.ptr, dmabuf->count);
2125 #endif
2126                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2127
2128         case SNDCTL_DSP_GETISPACE:
2129                 if (!(file->f_mode & FMODE_READ))
2130                         return -EINVAL;
2131                 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2132                         return val;
2133                 spin_lock_irqsave(&state->card->lock, flags);
2134                 abinfo.bytes = i810_get_available_read_data(state);
2135                 abinfo.fragsize = dmabuf->userfragsize;
2136                 abinfo.fragstotal = dmabuf->userfrags;
2137                 abinfo.fragments = abinfo.bytes / dmabuf->userfragsize;
2138                 spin_unlock_irqrestore(&state->card->lock, flags);
2139 #if defined(DEBUG) || defined(DEBUG_MMAP)
2140                 printk("SNDCTL_DSP_GETISPACE %d, %d, %d, %d\n", abinfo.bytes,
2141                         abinfo.fragsize, abinfo.fragments, abinfo.fragstotal);
2142 #endif
2143                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2144
2145         case SNDCTL_DSP_GETIPTR:
2146                 if (!(file->f_mode & FMODE_READ))
2147                         return -EINVAL;
2148                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2149                         return val;
2150                 spin_lock_irqsave(&state->card->lock, flags);
2151                 val = i810_get_available_read_data(state);
2152                 cinfo.bytes = dmabuf->total_bytes;
2153                 cinfo.blocks = val/dmabuf->userfragsize;
2154                 cinfo.ptr = dmabuf->hwptr;
2155                 if (dmabuf->mapped && (dmabuf->trigger & PCM_ENABLE_INPUT)) {
2156                         dmabuf->count -= val;
2157                         dmabuf->swptr = (dmabuf->swptr + val) % dmabuf->dmasize;
2158                         __i810_update_lvi(state, 1);
2159                 }
2160                 spin_unlock_irqrestore(&state->card->lock, flags);
2161 #if defined(DEBUG) || defined(DEBUG_MMAP)
2162                 printk("SNDCTL_DSP_GETIPTR %d, %d, %d, %d\n", cinfo.bytes,
2163                         cinfo.blocks, cinfo.ptr, dmabuf->count);
2164 #endif
2165                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2166
2167         case SNDCTL_DSP_NONBLOCK:
2168 #ifdef DEBUG
2169                 printk("SNDCTL_DSP_NONBLOCK\n");
2170 #endif
2171                 file->f_flags |= O_NONBLOCK;
2172                 return 0;
2173
2174         case SNDCTL_DSP_GETCAPS:
2175 #ifdef DEBUG
2176                 printk("SNDCTL_DSP_GETCAPS\n");
2177 #endif
2178             return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
2179                             (int *)arg);
2180
2181         case SNDCTL_DSP_GETTRIGGER:
2182                 val = 0;
2183 #ifdef DEBUG
2184                 printk("SNDCTL_DSP_GETTRIGGER 0x%x\n", dmabuf->trigger);
2185 #endif
2186                 return put_user(dmabuf->trigger, (int *)arg);
2187
2188         case SNDCTL_DSP_SETTRIGGER:
2189                 if (get_user(val, (int *)arg))
2190                         return -EFAULT;
2191 #if defined(DEBUG) || defined(DEBUG_MMAP)
2192                 printk("SNDCTL_DSP_SETTRIGGER 0x%x\n", val);
2193 #endif
2194                 if((file->f_mode & FMODE_READ) && !(val & PCM_ENABLE_INPUT) && dmabuf->enable == ADC_RUNNING) {
2195                         stop_adc(state);
2196                 }
2197                 if((file->f_mode & FMODE_WRITE) && !(val & PCM_ENABLE_OUTPUT) && dmabuf->enable == DAC_RUNNING) {
2198                         stop_dac(state);
2199                 }
2200                 dmabuf->trigger = val;
2201                 if((file->f_mode & FMODE_WRITE) && (val & PCM_ENABLE_OUTPUT) && !(dmabuf->enable & DAC_RUNNING)) {
2202                         if (!dmabuf->write_channel) {
2203                                 dmabuf->ready = 0;
2204                                 dmabuf->write_channel = state->card->alloc_pcm_channel(state->card);
2205                                 if (!dmabuf->write_channel)
2206                                         return -EBUSY;
2207                         }
2208                         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
2209                                 return ret;
2210                         if (dmabuf->mapped) {
2211                                 spin_lock_irqsave(&state->card->lock, flags);
2212                                 i810_update_ptr(state);
2213                                 dmabuf->count = 0;
2214                                 dmabuf->swptr = dmabuf->hwptr;
2215                                 dmabuf->count = i810_get_free_write_space(state);
2216                                 dmabuf->swptr = (dmabuf->swptr + dmabuf->count) % dmabuf->dmasize;
2217                                 __i810_update_lvi(state, 0);
2218                                 spin_unlock_irqrestore(&state->card->lock, flags);
2219                         } else
2220                                 start_dac(state);
2221                 }
2222                 if((file->f_mode & FMODE_READ) && (val & PCM_ENABLE_INPUT) && !(dmabuf->enable & ADC_RUNNING)) {
2223                         if (!dmabuf->read_channel) {
2224                                 dmabuf->ready = 0;
2225                                 dmabuf->read_channel = state->card->alloc_rec_pcm_channel(state->card);
2226                                 if (!dmabuf->read_channel)
2227                                         return -EBUSY;
2228                         }
2229                         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
2230                                 return ret;
2231                         if (dmabuf->mapped) {
2232                                 spin_lock_irqsave(&state->card->lock, flags);
2233                                 i810_update_ptr(state);
2234                                 dmabuf->swptr = dmabuf->hwptr;
2235                                 dmabuf->count = 0;
2236                                 spin_unlock_irqrestore(&state->card->lock, flags);
2237                         }
2238                         i810_update_lvi(state, 1);
2239                         start_adc(state);
2240                 }
2241                 return 0;
2242
2243         case SNDCTL_DSP_SETDUPLEX:
2244 #ifdef DEBUG
2245                 printk("SNDCTL_DSP_SETDUPLEX\n");
2246 #endif
2247                 return -EINVAL;
2248
2249         case SNDCTL_DSP_GETODELAY:
2250                 if (!(file->f_mode & FMODE_WRITE))
2251                         return -EINVAL;
2252                 spin_lock_irqsave(&state->card->lock, flags);
2253                 i810_update_ptr(state);
2254                 val = dmabuf->count;
2255                 spin_unlock_irqrestore(&state->card->lock, flags);
2256 #ifdef DEBUG
2257                 printk("SNDCTL_DSP_GETODELAY %d\n", dmabuf->count);
2258 #endif
2259                 return put_user(val, (int *)arg);
2260
2261         case SOUND_PCM_READ_RATE:
2262 #ifdef DEBUG
2263                 printk("SOUND_PCM_READ_RATE %d\n", dmabuf->rate);
2264 #endif
2265                 return put_user(dmabuf->rate, (int *)arg);
2266
2267         case SOUND_PCM_READ_CHANNELS:
2268 #ifdef DEBUG
2269                 printk("SOUND_PCM_READ_CHANNELS\n");
2270 #endif
2271                 return put_user(2, (int *)arg);
2272
2273         case SOUND_PCM_READ_BITS:
2274 #ifdef DEBUG
2275                 printk("SOUND_PCM_READ_BITS\n");
2276 #endif
2277                 return put_user(AFMT_S16_LE, (int *)arg);
2278
2279         case SNDCTL_DSP_SETSPDIF: /* Set S/PDIF Control register */
2280 #ifdef DEBUG
2281                 printk("SNDCTL_DSP_SETSPDIF\n");
2282 #endif
2283                 if (get_user(val, (int *)arg))
2284                         return -EFAULT;
2285
2286                 /* Check to make sure the codec supports S/PDIF transmitter */
2287
2288                 if((state->card->ac97_features & 4)) {
2289                         /* mask out the transmitter speed bits so the user can't set them */
2290                         val &= ~0x3000;
2291
2292                         /* Add the current transmitter speed bits to the passed value */
2293                         ret = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
2294                         val |= (ret & 0x3000);
2295
2296                         i810_ac97_set(codec, AC97_SPDIF_CONTROL, val);
2297                         if(i810_ac97_get(codec, AC97_SPDIF_CONTROL) != val ) {
2298                                 printk(KERN_ERR "i810_audio: Unable to set S/PDIF configuration to 0x%04x.\n", val);
2299                                 return -EFAULT;
2300                         }
2301                 }
2302 #ifdef DEBUG
2303                 else
2304                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
2305 #endif
2306                 return put_user(val, (int *)arg);
2307
2308         case SNDCTL_DSP_GETSPDIF: /* Get S/PDIF Control register */
2309 #ifdef DEBUG
2310                 printk("SNDCTL_DSP_GETSPDIF\n");
2311 #endif
2312                 if (get_user(val, (int *)arg))
2313                         return -EFAULT;
2314
2315                 /* Check to make sure the codec supports S/PDIF transmitter */
2316
2317                 if(!(state->card->ac97_features & 4)) {
2318 #ifdef DEBUG
2319                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
2320 #endif
2321                         val = 0;
2322                 } else {
2323                         val = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
2324                 }
2325                 //return put_user((val & 0xcfff), (int *)arg);
2326                 return put_user(val, (int *)arg);
2327
2328         case SNDCTL_DSP_GETCHANNELMASK:
2329 #ifdef DEBUG
2330                 printk("SNDCTL_DSP_GETCHANNELMASK\n");
2331 #endif
2332                 if (get_user(val, (int *)arg))
2333                         return -EFAULT;
2334
2335                 /* Based on AC'97 DAC support, not ICH hardware */
2336                 val = DSP_BIND_FRONT;
2337                 if ( state->card->ac97_features & 0x0004 )
2338                         val |= DSP_BIND_SPDIF;
2339
2340                 if ( state->card->ac97_features & 0x0080 )
2341                         val |= DSP_BIND_SURR;
2342                 if ( state->card->ac97_features & 0x0140 )
2343                         val |= DSP_BIND_CENTER_LFE;
2344
2345                 return put_user(val, (int *)arg);
2346
2347         case SNDCTL_DSP_BIND_CHANNEL:
2348 #ifdef DEBUG
2349                 printk("SNDCTL_DSP_BIND_CHANNEL\n");
2350 #endif
2351                 if (get_user(val, (int *)arg))
2352                         return -EFAULT;
2353                 if ( val == DSP_BIND_QUERY ) {
2354                         val = DSP_BIND_FRONT; /* Always report this as being enabled */
2355                         if ( state->card->ac97_status & SPDIF_ON )
2356                                 val |= DSP_BIND_SPDIF;
2357                         else {
2358                                 if ( state->card->ac97_status & SURR_ON )
2359                                         val |= DSP_BIND_SURR;
2360                                 if ( state->card->ac97_status & CENTER_LFE_ON )
2361                                         val |= DSP_BIND_CENTER_LFE;
2362                         }
2363                 } else {  /* Not a query, set it */
2364                         if (!(file->f_mode & FMODE_WRITE))
2365                                 return -EINVAL;
2366                         if ( dmabuf->enable == DAC_RUNNING ) {
2367                                 stop_dac(state);
2368                         }
2369                         if ( val & DSP_BIND_SPDIF ) {  /* Turn on SPDIF */
2370                                 /*  Ok, this should probably define what slots
2371                                  *  to use. For now, we'll only set it to the
2372                                  *  defaults:
2373                                  *
2374                                  *   non multichannel codec maps to slots 3&4
2375                                  *   2 channel codec maps to slots 7&8
2376                                  *   4 channel codec maps to slots 6&9
2377                                  *   6 channel codec maps to slots 10&11
2378                                  *
2379                                  *  there should be some way for the app to
2380                                  *  select the slot assignment.
2381                                  */
2382
2383                                 i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, dmabuf->rate );
2384                                 if ( !(state->card->ac97_status & SPDIF_ON) )
2385                                         val &= ~DSP_BIND_SPDIF;
2386                         } else {
2387                                 int mask;
2388                                 int channels;
2389
2390                                 /* Turn off S/PDIF if it was on */
2391                                 if ( state->card->ac97_status & SPDIF_ON )
2392                                         i810_set_spdif_output ( state, -1, 0 );
2393
2394                                 mask = val & (DSP_BIND_FRONT | DSP_BIND_SURR | DSP_BIND_CENTER_LFE);
2395                                 switch (mask) {
2396                                         case DSP_BIND_FRONT:
2397                                                 channels = 2;
2398                                                 break;
2399                                         case DSP_BIND_FRONT|DSP_BIND_SURR:
2400                                                 channels = 4;
2401                                                 break;
2402                                         case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
2403                                                 channels = 6;
2404                                                 break;
2405                                         default:
2406                                                 val = DSP_BIND_FRONT;
2407                                                 channels = 2;
2408                                                 break;
2409                                 }
2410                                 i810_set_dac_channels ( state, channels );
2411
2412                                 /* check that they really got turned on */
2413                                 if ( !state->card->ac97_status & SURR_ON )
2414                                         val &= ~DSP_BIND_SURR;
2415                                 if ( !state->card->ac97_status & CENTER_LFE_ON )
2416                                         val &= ~DSP_BIND_CENTER_LFE;
2417                         }
2418                 }
2419                 return put_user(val, (int *)arg);
2420
2421         case SNDCTL_DSP_MAPINBUF:
2422         case SNDCTL_DSP_MAPOUTBUF:
2423         case SNDCTL_DSP_SETSYNCRO:
2424         case SOUND_PCM_WRITE_FILTER:
2425         case SOUND_PCM_READ_FILTER:
2426 #ifdef DEBUG
2427                 printk("SNDCTL_* -EINVAL\n");
2428 #endif
2429                 return -EINVAL;
2430         }
2431         return -EINVAL;
2432 }
2433
2434 static int i810_open(struct inode *inode, struct file *file)
2435 {
2436         int i = 0;
2437         struct i810_card *card = devs;
2438         struct i810_state *state = NULL;
2439         struct dmabuf *dmabuf = NULL;
2440
2441         /* find an avaiable virtual channel (instance of /dev/dsp) */
2442         while (card != NULL) {
2443                 /*
2444                  * If we are initializing and then fail, card could go
2445                  * away unuexpectedly while we are in the for() loop.
2446                  * So, check for card on each iteration before we check
2447                  * for card->initializing to avoid a possible oops.
2448                  * This usually only matters for times when the driver is
2449                  * autoloaded by kmod.
2450                  */
2451                 for (i = 0; i < 50 && card && card->initializing; i++) {
2452                         set_current_state(TASK_UNINTERRUPTIBLE);
2453                         schedule_timeout(HZ/20);
2454                 }
2455                 for (i = 0; i < NR_HW_CH && card && !card->initializing; i++) {
2456                         if (card->states[i] == NULL) {
2457                                 state = card->states[i] = (struct i810_state *)
2458                                         kmalloc(sizeof(struct i810_state), GFP_KERNEL);
2459                                 if (state == NULL)
2460                                         return -ENOMEM;
2461                                 memset(state, 0, sizeof(struct i810_state));
2462                                 dmabuf = &state->dmabuf;
2463                                 goto found_virt;
2464                         }
2465                 }
2466                 card = card->next;
2467         }
2468         /* no more virtual channel avaiable */
2469         if (!state)
2470                 return -ENODEV;
2471
2472 found_virt:
2473         /* initialize the virtual channel */
2474         state->virt = i;
2475         state->card = card;
2476         state->magic = I810_STATE_MAGIC;
2477         init_waitqueue_head(&dmabuf->wait);
2478         init_MUTEX(&state->open_sem);
2479         file->private_data = state;
2480         dmabuf->trigger = 0;
2481
2482         /* allocate hardware channels */
2483         if(file->f_mode & FMODE_READ) {
2484                 if((dmabuf->read_channel = card->alloc_rec_pcm_channel(card)) == NULL) {
2485                         kfree (card->states[i]);
2486                         card->states[i] = NULL;;
2487                         return -EBUSY;
2488                 }
2489                 dmabuf->trigger |= PCM_ENABLE_INPUT;
2490                 i810_set_adc_rate(state, 8000);
2491         }
2492         if(file->f_mode & FMODE_WRITE) {
2493                 if((dmabuf->write_channel = card->alloc_pcm_channel(card)) == NULL) {
2494                         kfree (card->states[i]);
2495                         card->states[i] = NULL;;
2496                         return -EBUSY;
2497                 }
2498                 /* Initialize to 8kHz?  What if we don't support 8kHz? */
2499                 /*  Let's change this to check for S/PDIF stuff */
2500
2501                 dmabuf->trigger |= PCM_ENABLE_OUTPUT;
2502                 if ( spdif_locked ) {
2503                         i810_set_dac_rate(state, spdif_locked);
2504                         i810_set_spdif_output(state, AC97_EA_SPSA_3_4, spdif_locked);
2505                 } else {
2506                         i810_set_dac_rate(state, 8000);
2507                         /* Put the ACLink in 2 channel mode by default */
2508                         i = inl(card->iobase + GLOB_CNT);
2509                         outl(i & 0xffcfffff, card->iobase + GLOB_CNT);
2510                 }
2511         }
2512
2513         /* set default sample format. According to OSS Programmer's Guide  /dev/dsp
2514            should be default to unsigned 8-bits, mono, with sample rate 8kHz and
2515            /dev/dspW will accept 16-bits sample, but we don't support those so we
2516            set it immediately to stereo and 16bit, which is all we do support */
2517         dmabuf->fmt |= I810_FMT_16BIT | I810_FMT_STEREO;
2518         dmabuf->ossfragsize = 0;
2519         dmabuf->ossmaxfrags  = 0;
2520         dmabuf->subdivision  = 0;
2521
2522         state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2523
2524         return 0;
2525 }
2526
2527 static int i810_release(struct inode *inode, struct file *file)
2528 {
2529         struct i810_state *state = (struct i810_state *)file->private_data;
2530         struct i810_card *card = state->card;
2531         struct dmabuf *dmabuf = &state->dmabuf;
2532         unsigned long flags;
2533
2534         lock_kernel();
2535
2536         /* stop DMA state machine and free DMA buffers/channels */
2537         if(dmabuf->trigger & PCM_ENABLE_OUTPUT) {
2538                 drain_dac(state, 0);
2539         }
2540         if(dmabuf->trigger & PCM_ENABLE_INPUT) {
2541                 stop_adc(state);
2542         }
2543         spin_lock_irqsave(&card->lock, flags);
2544         dealloc_dmabuf(state);
2545         if (file->f_mode & FMODE_WRITE) {
2546                 state->card->free_pcm_channel(state->card, dmabuf->write_channel->num);
2547         }
2548         if (file->f_mode & FMODE_READ) {
2549                 state->card->free_pcm_channel(state->card, dmabuf->read_channel->num);
2550         }
2551
2552         state->card->states[state->virt] = NULL;
2553         kfree(state);
2554         spin_unlock_irqrestore(&card->lock, flags);
2555         unlock_kernel();
2556
2557         return 0;
2558 }
2559
2560 static /*const*/ struct file_operations i810_audio_fops = {
2561         owner:          THIS_MODULE,
2562         llseek:         no_llseek,
2563         read:           i810_read,
2564         write:          i810_write,
2565         poll:           i810_poll,
2566         ioctl:          i810_ioctl,
2567         mmap:           i810_mmap,
2568         open:           i810_open,
2569         release:        i810_release,
2570 };
2571
2572 /* Write AC97 codec registers */
2573
2574 static u16 i810_ac97_get_mmio(struct ac97_codec *dev, u8 reg)
2575 {
2576         struct i810_card *card = dev->private_data;
2577         int count = 100;
2578         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2579
2580         while(count-- && (readb(card->iobase_mmio + CAS) & 1))
2581                 udelay(1);
2582
2583 #ifdef DEBUG_MMIO
2584         {
2585                 u16 ans = readw(card->ac97base_mmio + reg_set);
2586                 printk(KERN_DEBUG "i810_audio: ac97_get_mmio(%d) -> 0x%04X\n", ((int) reg_set) & 0xffff, (u32) ans);
2587                 return ans;
2588         }
2589 #else
2590         return readw(card->ac97base_mmio + reg_set);
2591 #endif
2592 }
2593
2594 static u16 i810_ac97_get_io(struct ac97_codec *dev, u8 reg)
2595 {
2596         struct i810_card *card = dev->private_data;
2597         int count = 100;
2598         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2599
2600         while(count-- && (inb(card->iobase + CAS) & 1))
2601                 udelay(1);
2602
2603         return inw(card->ac97base + reg_set);
2604 }
2605
2606 static void i810_ac97_set_mmio(struct ac97_codec *dev, u8 reg, u16 data)
2607 {
2608         struct i810_card *card = dev->private_data;
2609         int count = 100;
2610         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2611
2612         while(count-- && (readb(card->iobase_mmio + CAS) & 1))
2613                 udelay(1);
2614
2615         writew(data, card->ac97base_mmio + reg_set);
2616
2617 #ifdef DEBUG_MMIO
2618         printk(KERN_DEBUG "i810_audio: ac97_set_mmio(0x%04X, %d)\n", (u32) data, ((int) reg_set) & 0xffff);
2619 #endif
2620 }
2621
2622 static void i810_ac97_set_io(struct ac97_codec *dev, u8 reg, u16 data)
2623 {
2624         struct i810_card *card = dev->private_data;
2625         int count = 100;
2626         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2627
2628         while(count-- && (inb(card->iobase + CAS) & 1))
2629                 udelay(1);
2630
2631         outw(data, card->ac97base + reg_set);
2632 }
2633
2634 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg)
2635 {
2636         struct i810_card *card = dev->private_data;
2637         if (card->use_mmio) {
2638                 return i810_ac97_get_mmio(dev, reg);
2639         }
2640         else {
2641                 return i810_ac97_get_io(dev, reg);
2642         }
2643 }
2644
2645 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data)
2646 {
2647         struct i810_card *card = dev->private_data;
2648         if (card->use_mmio) {
2649                 i810_ac97_set_mmio(dev, reg, data);
2650         }
2651         else {
2652                 i810_ac97_set_io(dev, reg, data);
2653         }
2654 }
2655
2656
2657 /* OSS /dev/mixer file operation methods */
2658
2659 static int i810_open_mixdev(struct inode *inode, struct file *file)
2660 {
2661         int i;
2662         int minor = MINOR(inode->i_rdev);
2663         struct i810_card *card = devs;
2664
2665         for (card = devs; card != NULL; card = card->next) {
2666                 /*
2667                  * If we are initializing and then fail, card could go
2668                  * away unuexpectedly while we are in the for() loop.
2669                  * So, check for card on each iteration before we check
2670                  * for card->initializing to avoid a possible oops.
2671                  * This usually only matters for times when the driver is
2672                  * autoloaded by kmod.
2673                  */
2674                 for (i = 0; i < 50 && card && card->initializing; i++) {
2675                         set_current_state(TASK_UNINTERRUPTIBLE);
2676                         schedule_timeout(HZ/20);
2677                 }
2678                 for (i = 0; i < NR_AC97 && card && !card->initializing; i++)
2679                         if (card->ac97_codec[i] != NULL &&
2680                             card->ac97_codec[i]->dev_mixer == minor) {
2681                                 file->private_data = card->ac97_codec[i];
2682                                 return 0;
2683                         }
2684         }
2685         return -ENODEV;
2686 }
2687
2688 static int i810_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2689                                 unsigned long arg)
2690 {
2691         struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2692
2693         return codec->mixer_ioctl(codec, cmd, arg);
2694 }
2695
2696 static /*const*/ struct file_operations i810_mixer_fops = {
2697         owner:          THIS_MODULE,
2698         llseek:         no_llseek,
2699         ioctl:          i810_ioctl_mixdev,
2700         open:           i810_open_mixdev,
2701 };
2702
2703 /* AC97 codec initialisation.  These small functions exist so we don't
2704    duplicate code between module init and apm resume */
2705
2706 static inline int i810_ac97_exists(struct i810_card *card, int ac97_number)
2707 {
2708         u32 reg = inl(card->iobase + GLOB_STA);
2709         switch (ac97_number) {
2710         case 0:
2711                 return reg & (1<<8);
2712         case 1:
2713                 return reg & (1<<9);
2714         case 2:
2715                 return reg & (1<<28);
2716         }
2717         return 0;
2718 }
2719
2720 static inline int i810_ac97_enable_variable_rate(struct ac97_codec *codec)
2721 {
2722         i810_ac97_set(codec, AC97_EXTENDED_STATUS, 9);
2723         i810_ac97_set(codec,AC97_EXTENDED_STATUS,
2724                       i810_ac97_get(codec, AC97_EXTENDED_STATUS)|0xE800);
2725
2726         return (i810_ac97_get(codec, AC97_EXTENDED_STATUS)&1);
2727 }
2728
2729
2730 static int i810_ac97_probe_and_powerup(struct i810_card *card,struct ac97_codec *codec)
2731 {
2732         /* Returns 0 on failure */
2733         int i;
2734
2735         if (ac97_probe_codec(codec) == 0) return 0;
2736
2737         /* power it all up */
2738         i810_ac97_set(codec, AC97_POWER_CONTROL,
2739                       i810_ac97_get(codec, AC97_POWER_CONTROL) & ~0x7f00);
2740
2741         /* wait for analog ready */
2742         for (i=10; i && ((i810_ac97_get(codec, AC97_POWER_CONTROL) & 0xf) != 0xf); i--)
2743         {
2744                 set_current_state(TASK_UNINTERRUPTIBLE);
2745                 schedule_timeout(HZ/20);
2746         }
2747         return i;
2748 }
2749
2750 /**
2751  *      i810_ac97_power_up_bus  -       bring up AC97 link
2752  *      @card : ICH audio device to power up
2753  *
2754  *      Bring up the ACLink AC97 codec bus
2755  */
2756
2757 static int i810_ac97_power_up_bus(struct i810_card *card)
2758 {
2759         u32 reg = inl(card->iobase + GLOB_CNT);
2760         int i;
2761         int primary_codec_id = 0;
2762
2763         if((reg&2)==0)  /* Cold required */
2764                 reg|=2;
2765         else
2766                 reg|=4; /* Warm */
2767
2768         reg&=~8;        /* ACLink on */
2769
2770         /* At this point we deassert AC_RESET # */
2771         outl(reg , card->iobase + GLOB_CNT);
2772
2773         /* We must now allow time for the Codec initialisation.
2774            600mS is the specified time */
2775
2776         for(i=0;i<10;i++)
2777         {
2778                 if((inl(card->iobase+GLOB_CNT)&4)==0)
2779                         break;
2780
2781                 set_current_state(TASK_UNINTERRUPTIBLE);
2782                 schedule_timeout(HZ/20);
2783         }
2784         if(i==10)
2785         {
2786                 printk(KERN_ERR "i810_audio: AC'97 reset failed.\n");
2787                 return 0;
2788         }
2789
2790         set_current_state(TASK_UNINTERRUPTIBLE);
2791         schedule_timeout(HZ/2);
2792
2793         /*
2794          *      See if the primary codec comes ready. This must happen
2795          *      before we start doing DMA stuff
2796          */
2797         /* see i810_ac97_init for the next 7 lines (jsaw) */
2798         inw(card->ac97base);
2799         if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4)
2800             && (card->use_mmio)) {
2801                 primary_codec_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
2802                 printk(KERN_INFO "i810_audio: Primary codec has ID %d\n",
2803                        primary_codec_id);
2804         }
2805
2806         if(! i810_ac97_exists(card, primary_codec_id))
2807         {
2808                 printk(KERN_INFO "i810_audio: Codec not ready.. wait.. ");
2809                 set_current_state(TASK_UNINTERRUPTIBLE);
2810                 schedule_timeout(HZ);   /* actually 600mS by the spec */
2811
2812                 if(i810_ac97_exists(card, primary_codec_id))
2813                         printk("OK\n");
2814                 else
2815                         printk("no response.\n");
2816         }
2817         inw(card->ac97base);
2818         return 1;
2819 }
2820
2821 static int __init i810_ac97_init(struct i810_card *card)
2822 {
2823         int num_ac97 = 0;
2824         int ac97_id;
2825         int total_channels = 0;
2826         int nr_ac97_max = card_cap[card->pci_id_internal].nr_ac97;
2827         struct ac97_codec *codec;
2828         u16 eid;
2829         u32 reg;
2830
2831         if(!i810_ac97_power_up_bus(card)) return 0;
2832
2833         /* Number of channels supported */
2834         /* What about the codec?  Just because the ICH supports */
2835         /* multiple channels doesn't mean the codec does.       */
2836         /* we'll have to modify this in the codec section below */
2837         /* to reflect what the codec has.                       */
2838         /* ICH and ICH0 only support 2 channels so don't bother */
2839         /* to check....                                         */
2840
2841         card->channels = 2;
2842         reg = inl(card->iobase + GLOB_STA);
2843         if ( reg & 0x0200000 )
2844                 card->channels = 6;
2845         else if ( reg & 0x0100000 )
2846                 card->channels = 4;
2847         printk(KERN_INFO "i810_audio: Audio Controller supports %d channels.\n", card->channels);
2848         printk(KERN_INFO "i810_audio: Defaulting to base 2 channel mode.\n");
2849         reg = inl(card->iobase + GLOB_CNT);
2850         outl(reg & 0xffcfffff, card->iobase + GLOB_CNT);
2851
2852         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++)
2853                 card->ac97_codec[num_ac97] = NULL;
2854
2855         /*@FIXME I don't know, if I'm playing to safe here... (jsaw) */
2856         if ((nr_ac97_max > 2) && !card->use_mmio) nr_ac97_max = 2;
2857
2858         for (num_ac97 = 0; num_ac97 < nr_ac97_max; num_ac97++) {
2859                 /* codec reset */
2860                 printk(KERN_INFO "i810_audio: Resetting connection %d\n", num_ac97);
2861                 if (card->use_mmio) readw(card->ac97base_mmio + 0x80*num_ac97);
2862                 else inw(card->ac97base + 0x80*num_ac97);
2863
2864                 /* If we have the SDATA_IN Map Register, as on ICH4, we
2865                    do not loop thru all possible codec IDs but thru all
2866                    possible IO channels. Bit 0:1 of SDM then holds the
2867                    last codec ID spoken to.
2868                 */
2869                 if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4)
2870                     && (card->use_mmio)) {
2871                         ac97_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
2872                         printk(KERN_INFO "i810_audio: Connection %d with codec id %d\n",
2873                                num_ac97, ac97_id);
2874                 }
2875                 else {
2876                         ac97_id = num_ac97;
2877                 }
2878
2879                 /* The ICH programmer's reference says you should   */
2880                 /* check the ready status before probing. So we chk */
2881                 /*   What do we do if it's not ready?  Wait and try */
2882                 /*   again, or abort?                               */
2883                 if (!i810_ac97_exists(card, ac97_id)) {
2884                         if(num_ac97 == 0)
2885                                 printk(KERN_ERR "i810_audio: Primary codec not ready.\n");
2886                 }
2887
2888                 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
2889                         return -ENOMEM;
2890                 memset(codec, 0, sizeof(struct ac97_codec));
2891
2892                 /* initialize some basic codec information, other fields will be filled
2893                    in ac97_probe_codec */
2894                 codec->private_data = card;
2895                 codec->id = ac97_id;
2896                 card->ac97_id_map[ac97_id] = num_ac97 * 0x80;
2897
2898                 if (card->use_mmio) {
2899                         codec->codec_read = i810_ac97_get_mmio;
2900                         codec->codec_write = i810_ac97_set_mmio;
2901                 }
2902                 else {
2903                         codec->codec_read = i810_ac97_get_io;
2904                         codec->codec_write = i810_ac97_set_io;
2905                 }
2906
2907                 if(!i810_ac97_probe_and_powerup(card,codec)) {
2908                         printk(KERN_ERR "i810_audio: timed out waiting for codec %d analog ready.\n", ac97_id);
2909                         kfree(codec);
2910                         break;  /* it didn't work */
2911                 }
2912                 /* Store state information about S/PDIF transmitter */
2913                 card->ac97_status = 0;
2914
2915                 /* Don't attempt to get eid until powerup is complete */
2916                 eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
2917
2918                 if(eid==0xFFFFFF)
2919                 {
2920                         printk(KERN_WARNING "i810_audio: no codec attached ?\n");
2921                         kfree(codec);
2922                         break;
2923                 }
2924
2925                 /* Check for an AC97 1.0 soft modem (ID1) */
2926
2927                 if(codec->codec_read(codec, AC97_RESET) & 2)
2928                 {
2929                         printk(KERN_WARNING "i810_audio: codec %d is an AC97 1.0 softmodem - skipping.\n", ac97_id);
2930                         kfree(codec);
2931                         continue;
2932                 }
2933
2934                 /* Check for an AC97 2.x soft modem */
2935
2936                 codec->codec_write(codec, AC97_EXTENDED_MODEM_ID, 0L);
2937                 if(codec->codec_read(codec, AC97_EXTENDED_MODEM_ID) & 1)
2938                 {
2939                         printk(KERN_WARNING "i810_audio: codec %d is an AC97 2.x softmodem - skipping.\n", ac97_id);
2940                         kfree(codec);
2941                         continue;
2942                 }
2943
2944                 card->ac97_features = eid;
2945
2946                 /* Now check the codec for useful features to make up for
2947                    the dumbness of the 810 hardware engine */
2948
2949                 if(!(eid&0x0001))
2950                         printk(KERN_WARNING "i810_audio: only 48Khz playback available.\n");
2951                 else
2952                 {
2953                         if(!i810_ac97_enable_variable_rate(codec)) {
2954                                 printk(KERN_WARNING "i810_audio: Codec refused to allow VRA, using 48Khz only.\n");
2955                                 card->ac97_features&=~1;
2956                         }
2957                 }
2958
2959                 /* Turn on the amplifier */
2960
2961                 codec->codec_write(codec, AC97_POWER_CONTROL,
2962                          codec->codec_read(codec, AC97_POWER_CONTROL) & ~0x8000);
2963
2964                 /* Determine how many channels the codec(s) support   */
2965                 /*   - The primary codec always supports 2            */
2966                 /*   - If the codec supports AMAP, surround DACs will */
2967                 /*     automaticlly get assigned to slots.            */
2968                 /*     * Check for surround DACs and increment if     */
2969                 /*       found.                                       */
2970                 /*   - Else check if the codec is revision 2.2        */
2971                 /*     * If surround DACs exist, assign them to slots */
2972                 /*       and increment channel count.                 */
2973
2974                 /* All of this only applies to ICH2 and above. ICH    */
2975                 /* and ICH0 only support 2 channels.  ICH2 will only  */
2976                 /* support multiple codecs in a "split audio" config. */
2977                 /* as described above.                                */
2978
2979                 /* TODO: Remove all the debugging messages!           */
2980
2981                 if((eid & 0xc000) == 0) /* primary codec */
2982                         total_channels += 2;
2983
2984                 if(eid & 0x200) { /* GOOD, AMAP support */
2985                         if (eid & 0x0080) /* L/R Surround channels */
2986                                 total_channels += 2;
2987                         if (eid & 0x0140) /* LFE and Center channels */
2988                                 total_channels += 2;
2989                         printk("i810_audio: AC'97 codec %d supports AMAP, total channels = %d\n", ac97_id, total_channels);
2990                 } else if (eid & 0x0400) {  /* this only works on 2.2 compliant codecs */
2991                         eid &= 0xffcf;
2992                         if((eid & 0xc000) != 0) {
2993                                 switch ( total_channels ) {
2994                                         case 2:
2995                                                 /* Set dsa1, dsa0 to 01 */
2996                                                 eid |= 0x0010;
2997                                                 break;
2998                                         case 4:
2999                                                 /* Set dsa1, dsa0 to 10 */
3000                                                 eid |= 0x0020;
3001                                                 break;
3002                                         case 6:
3003                                                 /* Set dsa1, dsa0 to 11 */
3004                                                 eid |= 0x0030;
3005                                                 break;
3006                                 }
3007                                 total_channels += 2;
3008                         }
3009                         i810_ac97_set(codec, AC97_EXTENDED_ID, eid);
3010                         eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
3011                         printk("i810_audio: AC'97 codec %d, new EID value = 0x%04x\n", ac97_id, eid);
3012                         if (eid & 0x0080) /* L/R Surround channels */
3013                                 total_channels += 2;
3014                         if (eid & 0x0140) /* LFE and Center channels */
3015                                 total_channels += 2;
3016                         printk("i810_audio: AC'97 codec %d, DAC map configured, total channels = %d\n", ac97_id, total_channels);
3017                 } else {
3018                         printk("i810_audio: AC'97 codec %d Unable to map surround DAC's (or DAC's not present), total channels = %d\n", ac97_id, total_channels);
3019                 }
3020
3021                 if ((codec->dev_mixer = register_sound_mixer(&i810_mixer_fops, -1)) < 0) {
3022                         printk(KERN_ERR "i810_audio: couldn't register mixer!\n");
3023                         kfree(codec);
3024                         break;
3025                 }
3026
3027                 card->ac97_codec[num_ac97] = codec;
3028         }
3029
3030         /* pick the minimum of channels supported by ICHx or codec(s) */
3031         card->channels = (card->channels > total_channels)?total_channels:card->channels;
3032
3033         return num_ac97;
3034 }
3035
3036 static void __init i810_configure_clocking (void)
3037 {
3038         struct i810_card *card;
3039         struct i810_state *state;
3040         struct dmabuf *dmabuf;
3041         unsigned int i, offset, new_offset;
3042         unsigned long flags;
3043
3044         card = devs;
3045         /* We could try to set the clocking for multiple cards, but can you even have
3046          * more than one i810 in a machine?  Besides, clocking is global, so unless
3047          * someone actually thinks more than one i810 in a machine is possible and
3048          * decides to rewrite that little bit, setting the rate for more than one card
3049          * is a waste of time.
3050          */
3051         if(card != NULL) {
3052                 state = card->states[0] = (struct i810_state *)
3053                                         kmalloc(sizeof(struct i810_state), GFP_KERNEL);
3054                 if (state == NULL)
3055                         return;
3056                 memset(state, 0, sizeof(struct i810_state));
3057                 dmabuf = &state->dmabuf;
3058
3059                 dmabuf->write_channel = card->alloc_pcm_channel(card);
3060                 state->virt = 0;
3061                 state->card = card;
3062                 state->magic = I810_STATE_MAGIC;
3063                 init_waitqueue_head(&dmabuf->wait);
3064                 init_MUTEX(&state->open_sem);
3065                 dmabuf->fmt = I810_FMT_STEREO | I810_FMT_16BIT;
3066                 dmabuf->trigger = PCM_ENABLE_OUTPUT;
3067                 i810_set_spdif_output(state, -1, 0);
3068                 i810_set_dac_channels(state, 2);
3069                 i810_set_dac_rate(state, 48000);
3070                 if(prog_dmabuf(state, 0) != 0) {
3071                         goto config_out_nodmabuf;
3072                 }
3073                 if(dmabuf->dmasize < 16384) {
3074                         goto config_out;
3075                 }
3076                 dmabuf->count = dmabuf->dmasize;
3077                 CIV_TO_LVI(card->iobase+dmabuf->write_channel->port, 31);
3078                 save_flags(flags);
3079                 cli();
3080                 start_dac(state);
3081                 offset = i810_get_dma_addr(state, 0);
3082                 mdelay(50);
3083                 new_offset = i810_get_dma_addr(state, 0);
3084                 stop_dac(state);
3085                 restore_flags(flags);
3086                 i = new_offset - offset;
3087 #ifdef DEBUG_INTERRUPTS
3088                 printk("i810_audio: %d bytes in 50 milliseconds\n", i);
3089 #endif
3090                 if(i == 0)
3091                         goto config_out;
3092                 i = i / 4 * 20;
3093                 if (i > 48500 || i < 47500) {
3094                         clocking = clocking * clocking / i;
3095                         printk("i810_audio: setting clocking to %d\n", clocking);
3096                 }
3097 config_out:
3098                 dealloc_dmabuf(state);
3099 config_out_nodmabuf:
3100                 state->card->free_pcm_channel(state->card,state->dmabuf.write_channel->num);
3101                 kfree(state);
3102                 card->states[0] = NULL;
3103         }
3104 }
3105
3106 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
3107    until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
3108
3109 static int __init i810_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
3110 {
3111         struct i810_card *card;
3112
3113         if (pci_enable_device(pci_dev))
3114                 return -EIO;
3115
3116         if (pci_set_dma_mask(pci_dev, I810_DMA_MASK)) {
3117                 printk(KERN_ERR "intel810: architecture does not support"
3118                        " 32bit PCI busmaster DMA\n");
3119                 return -ENODEV;
3120         }
3121
3122         if ((card = kmalloc(sizeof(struct i810_card), GFP_KERNEL)) == NULL) {
3123                 printk(KERN_ERR "i810_audio: out of memory\n");
3124                 return -ENOMEM;
3125         }
3126         memset(card, 0, sizeof(*card));
3127
3128         card->initializing = 1;
3129         card->pci_dev = pci_dev;
3130         card->pci_id = pci_id->device;
3131         card->ac97base = pci_resource_start (pci_dev, 0);
3132         card->iobase = pci_resource_start (pci_dev, 1);
3133
3134         /* if chipset could have mmio capability, check it */
3135         if (card_cap[pci_id->driver_data].flags & CAP_MMIO) {
3136                 card->ac97base_mmio_phys = pci_resource_start (pci_dev, 2);
3137                 card->iobase_mmio_phys = pci_resource_start (pci_dev, 3);
3138
3139                 if ((card->ac97base_mmio_phys) && (card->iobase_mmio_phys)) {
3140                         card->use_mmio = 1;
3141                 }
3142                 else {
3143                         card->ac97base_mmio_phys = 0;
3144                         card->iobase_mmio_phys = 0;
3145                 }
3146         }
3147
3148         card->irq = pci_dev->irq;
3149         card->next = devs;
3150         card->magic = I810_CARD_MAGIC;
3151 #ifdef CONFIG_PM
3152         card->pm_suspended=0;
3153 #endif
3154         spin_lock_init(&card->lock);
3155         devs = card;
3156
3157         pci_set_master(pci_dev);
3158
3159         printk(KERN_INFO "i810: %s found at IO 0x%04lx and 0x%04lx, "
3160                "MEM 0x%04lx and 0x%04lx, IRQ %d\n",
3161                card_names[pci_id->driver_data],
3162                card->iobase, card->ac97base,
3163                card->ac97base_mmio_phys, card->iobase_mmio_phys,
3164                card->irq);
3165
3166         card->alloc_pcm_channel = i810_alloc_pcm_channel;
3167         card->alloc_rec_pcm_channel = i810_alloc_rec_pcm_channel;
3168         card->alloc_rec_mic_channel = i810_alloc_rec_mic_channel;
3169         card->free_pcm_channel = i810_free_pcm_channel;
3170
3171         if ((card->channel = pci_alloc_consistent(pci_dev,
3172             sizeof(struct i810_channel)*NR_HW_CH, &card->chandma)) == NULL) {
3173                 printk(KERN_ERR "i810: cannot allocate channel DMA memory\n");
3174                 goto out_mem;
3175         }
3176
3177         { /* We may dispose of this altogether some time soon, so... */
3178                 struct i810_channel *cp = card->channel;
3179
3180                 cp[0].offset = 0;
3181                 cp[0].port = 0x00;
3182                 cp[0].num = 0;
3183                 cp[1].offset = 0;
3184                 cp[1].port = 0x10;
3185                 cp[1].num = 1;
3186                 cp[2].offset = 0;
3187                 cp[2].port = 0x20;
3188                 cp[2].num = 2;
3189         }
3190
3191         /* claim our iospace and irq */
3192         request_region(card->iobase, 64, card_names[pci_id->driver_data]);
3193         request_region(card->ac97base, 256, card_names[pci_id->driver_data]);
3194
3195         if (request_irq(card->irq, &i810_interrupt, SA_SHIRQ,
3196                         card_names[pci_id->driver_data], card)) {
3197                 printk(KERN_ERR "i810_audio: unable to allocate irq %d\n", card->irq);
3198                 goto out_pio;
3199         }
3200
3201         if (card->use_mmio) {
3202                 if (request_mem_region(card->ac97base_mmio_phys, 512, "ich_audio MMBAR")) {
3203                         if ((card->ac97base_mmio = ioremap(card->ac97base_mmio_phys, 512))) { /*@FIXME can ioremap fail? don't know (jsaw) */
3204                                 if (request_mem_region(card->iobase_mmio_phys, 256, "ich_audio MBBAR")) {
3205                                         if ((card->iobase_mmio = ioremap(card->iobase_mmio_phys, 256))) {
3206                                                 printk(KERN_INFO "i810: %s mmio at 0x%04lx and 0x%04lx\n",
3207                                                        card_names[pci_id->driver_data],
3208                                                        (unsigned long) card->ac97base_mmio,
3209                                                        (unsigned long) card->iobase_mmio);
3210                                         }
3211                                         else {
3212                                                 iounmap(card->ac97base_mmio);
3213                                                 release_mem_region(card->ac97base_mmio_phys, 512);
3214                                                 release_mem_region(card->iobase_mmio_phys, 512);
3215                                                 card->use_mmio = 0;
3216                                         }
3217                                 }
3218                                 else {
3219                                         iounmap(card->ac97base_mmio);
3220                                         release_mem_region(card->ac97base_mmio_phys, 512);
3221                                         card->use_mmio = 0;
3222                                 }
3223                         }
3224                 }
3225                 else {
3226                         card->use_mmio = 0;
3227                 }
3228         }
3229
3230         /* initialize AC97 codec and register /dev/mixer */
3231         if (i810_ac97_init(card) <= 0) {
3232                 free_irq(card->irq, card);
3233                 goto out_iospace;
3234         }
3235         pci_set_drvdata(pci_dev, card);
3236
3237         if(clocking == 0) {
3238                 clocking = 48000;
3239                 i810_configure_clocking();
3240         }
3241
3242         /* register /dev/dsp */
3243         if ((card->dev_audio = register_sound_dsp(&i810_audio_fops, -1)) < 0) {
3244                 int i;
3245                 printk(KERN_ERR "i810_audio: couldn't register DSP device!\n");
3246                 free_irq(card->irq, card);
3247                 for (i = 0; i < NR_AC97; i++)
3248                 if (card->ac97_codec[i] != NULL) {
3249                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
3250                         kfree (card->ac97_codec[i]);
3251                 }
3252                 goto out_iospace;
3253         }
3254
3255         card->initializing = 0;
3256         return 0;
3257
3258 out_iospace:
3259         if (card->use_mmio) {
3260                 iounmap(card->ac97base_mmio);
3261                 iounmap(card->iobase_mmio);
3262                 release_mem_region(card->ac97base_mmio_phys, 512);
3263                 release_mem_region(card->iobase_mmio_phys, 256);
3264         }
3265 out_pio:
3266         release_region(card->iobase, 64);
3267         release_region(card->ac97base, 256);
3268 out_chan:
3269         pci_free_consistent(pci_dev, sizeof(struct i810_channel)*NR_HW_CH,
3270             card->channel, card->chandma);
3271 out_mem:
3272         kfree(card);
3273         return -ENODEV;
3274 }
3275
3276 static void __devexit i810_remove(struct pci_dev *pci_dev)
3277 {
3278         int i;
3279         struct i810_card *card = pci_get_drvdata(pci_dev);
3280         /* free hardware resources */
3281         free_irq(card->irq, devs);
3282         release_region(card->iobase, 64);
3283         release_region(card->ac97base, 256);
3284         if (card->use_mmio) {
3285                 iounmap(card->ac97base_mmio);
3286                 iounmap(card->iobase_mmio);
3287                 release_mem_region(card->ac97base_mmio_phys, 512);
3288                 release_mem_region(card->iobase_mmio_phys, 256);
3289         }
3290
3291         /* unregister audio devices */
3292         for (i = 0; i < NR_AC97; i++)
3293                 if (card->ac97_codec[i] != NULL) {
3294                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
3295                         kfree (card->ac97_codec[i]);
3296                         card->ac97_codec[i] = NULL;
3297                 }
3298         unregister_sound_dsp(card->dev_audio);
3299         kfree(card);
3300 }
3301
3302 #ifdef CONFIG_PM
3303 static int i810_pm_suspend(struct pci_dev *dev, u32 pm_state)
3304 {
3305         struct i810_card *card = pci_get_drvdata(dev);
3306         struct i810_state *state;
3307         unsigned long flags;
3308         struct dmabuf *dmabuf;
3309         int i,num_ac97;
3310 #ifdef DEBUG
3311         printk("i810_audio: i810_pm_suspend called\n");
3312 #endif
3313         if(!card) return 0;
3314         spin_lock_irqsave(&card->lock, flags);
3315         card->pm_suspended=1;
3316         for(i=0;i<NR_HW_CH;i++) {
3317                 state = card->states[i];
3318                 if(!state) continue;
3319                 /* this happens only if there are open files */
3320                 dmabuf = &state->dmabuf;
3321                 if(dmabuf->enable & DAC_RUNNING ||
3322                    (dmabuf->count && (dmabuf->trigger & PCM_ENABLE_OUTPUT))) {
3323                         state->pm_saved_dac_rate=dmabuf->rate;
3324                         stop_dac(state);
3325                 } else {
3326                         state->pm_saved_dac_rate=0;
3327                 }
3328                 if(dmabuf->enable & ADC_RUNNING) {
3329                         state->pm_saved_adc_rate=dmabuf->rate;
3330                         stop_adc(state);
3331                 } else {
3332                         state->pm_saved_adc_rate=0;
3333                 }
3334                 dmabuf->ready = 0;
3335                 dmabuf->swptr = dmabuf->hwptr = 0;
3336                 dmabuf->count = dmabuf->total_bytes = 0;
3337         }
3338
3339         spin_unlock_irqrestore(&card->lock, flags);
3340
3341         /* save mixer settings */
3342         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3343                 struct ac97_codec *codec = card->ac97_codec[num_ac97];
3344                 if(!codec) continue;
3345                 for(i=0;i< SOUND_MIXER_NRDEVICES ;i++) {
3346                         if((supported_mixer(codec,i)) &&
3347                            (codec->read_mixer)) {
3348                                 card->pm_saved_mixer_settings[i][num_ac97]=
3349                                         codec->read_mixer(codec,i);
3350                         }
3351                 }
3352         }
3353         pci_save_state(dev,card->pm_save_state); /* XXX do we need this? */
3354         pci_disable_device(dev); /* disable busmastering */
3355         pci_set_power_state(dev,3); /* Zzz. */
3356
3357         return 0;
3358 }
3359
3360
3361 static int i810_pm_resume(struct pci_dev *dev)
3362 {
3363         int num_ac97,i=0;
3364         struct i810_card *card=pci_get_drvdata(dev);
3365         pci_enable_device(dev);
3366         pci_restore_state (dev,card->pm_save_state);
3367
3368         /* observation of a toshiba portege 3440ct suggests that the
3369            hardware has to be more or less completely reinitialized from
3370            scratch after an apm suspend.  Works For Me.   -dan */
3371
3372         i810_ac97_power_up_bus(card);
3373
3374         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3375                 struct ac97_codec *codec = card->ac97_codec[num_ac97];
3376                 /* check they haven't stolen the hardware while we were
3377                    away */
3378                 if(!codec || !i810_ac97_exists(card,num_ac97)) {
3379                         if(num_ac97) continue;
3380                         else BUG();
3381                 }
3382                 if(!i810_ac97_probe_and_powerup(card,codec)) BUG();
3383
3384                 if((card->ac97_features&0x0001)) {
3385                         /* at probe time we found we could do variable
3386                            rates, but APM suspend has made it forget
3387                            its magical powers */
3388                         if(!i810_ac97_enable_variable_rate(codec)) BUG();
3389                 }
3390                 /* we lost our mixer settings, so restore them */
3391                 for(i=0;i< SOUND_MIXER_NRDEVICES ;i++) {
3392                         if(supported_mixer(codec,i)){
3393                                 int val=card->
3394                                         pm_saved_mixer_settings[i][num_ac97];
3395                                 codec->mixer_state[i]=val;
3396                                 codec->write_mixer(codec,i,
3397                                                    (val  & 0xff) ,
3398                                                    ((val >> 8)  & 0xff) );
3399                         }
3400                 }
3401         }
3402
3403         /* we need to restore the sample rate from whatever it was */
3404         for(i=0;i<NR_HW_CH;i++) {
3405                 struct i810_state * state=card->states[i];
3406                 if(state) {
3407                         if(state->pm_saved_adc_rate)
3408                                 i810_set_adc_rate(state,state->pm_saved_adc_rate);
3409                         if(state->pm_saved_dac_rate)
3410                                 i810_set_dac_rate(state,state->pm_saved_dac_rate);
3411                 }
3412         }
3413
3414
3415         card->pm_suspended = 0;
3416
3417         /* any processes that were reading/writing during the suspend
3418            probably ended up here */
3419         for(i=0;i<NR_HW_CH;i++) {
3420                 struct i810_state *state = card->states[i];
3421                 if(state) wake_up(&state->dmabuf.wait);
3422         }
3423
3424         return 0;
3425 }
3426 #endif /* CONFIG_PM */
3427
3428 MODULE_AUTHOR("");
3429 MODULE_DESCRIPTION("Intel 810 audio support");
3430 MODULE_LICENSE("GPL");
3431 MODULE_PARM(ftsodell, "i");
3432 MODULE_PARM(clocking, "i");
3433 MODULE_PARM(strict_clocking, "i");
3434 MODULE_PARM(spdif_locked, "i");
3435
3436 #define I810_MODULE_NAME "intel810_audio"
3437
3438 static struct pci_driver i810_pci_driver = {
3439         name:           I810_MODULE_NAME,
3440         id_table:       i810_pci_tbl,
3441         probe:          i810_probe,
3442         remove:         __devexit_p(i810_remove),
3443 #ifdef CONFIG_PM
3444         suspend:        i810_pm_suspend,
3445         resume:         i810_pm_resume,
3446 #endif /* CONFIG_PM */
3447 };
3448
3449
3450 static int __init i810_init_module (void)
3451 {
3452         if (!pci_present())   /* No PCI bus in this machine! */
3453                 return -ENODEV;
3454
3455         printk(KERN_INFO "Intel 810 + AC97 Audio, version "
3456                DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
3457
3458         if (!pci_register_driver(&i810_pci_driver)) {
3459                 pci_unregister_driver(&i810_pci_driver);
3460                 return -ENODEV;
3461         }
3462         if(ftsodell != 0) {
3463                 printk("i810_audio: ftsodell is now a deprecated option.\n");
3464         }
3465         if(spdif_locked > 0 ) {
3466                 if(spdif_locked == 32000 || spdif_locked == 44100 || spdif_locked == 48000) {
3467                         printk("i810_audio: Enabling S/PDIF at sample rate %dHz.\n", spdif_locked);
3468                 } else {
3469                         printk("i810_audio: S/PDIF can only be locked to 32000, 44100, or 48000Hz.\n");
3470                         spdif_locked = 0;
3471                 }
3472         }
3473
3474         return 0;
3475 }
3476
3477 static void __exit i810_cleanup_module (void)
3478 {
3479         pci_unregister_driver(&i810_pci_driver);
3480 }
3481
3482 module_init(i810_init_module);
3483 module_exit(i810_cleanup_module);
3484
3485 /*
3486 Local Variables:
3487 c-basic-offset: 8
3488 End:
3489 */