1 /***********************************************************************
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
5 * drivers/sound/nec_vrc5477.c
6 * AC97 sound dirver for NEC Vrc5477 chip (an integrated,
7 * multi-function controller chip for MIPS CPUs)
9 * VRA support Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 ***********************************************************************
19 * This code is derived from ite8172.c, which is written by Steve Longerbeam.
22 * Currently we only support the following capabilities:
23 * . mono output to PCM L/R (line out).
24 * . stereo output to PCM L/R (line out).
25 * . mono input from PCM L (line in).
26 * . stereo output from PCM (line in).
27 * . sampling rate at 48k or variable sampling rate
28 * . support /dev/dsp, /dev/mixer devices, standard OSS devices.
29 * . only support 16-bit PCM format (hardware limit, no software
31 * . support duplex, but no trigger or realtime.
33 * Specifically the following are not supported:
34 * . app-set frag size.
35 * . mmap'ed buffer access
39 * Original comments from ite8172.c file.
46 * 1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
47 * taken, slightly modified or not at all, from the ES1371 driver,
48 * so refer to the credits in es1371.c for those. The rest of the
49 * code (probe, open, read, write, the ISR, etc.) is new.
50 * 2. The following support is untested:
51 * * Memory mapping the audio buffers, and the ioctl controls that go
54 * 3. The following is not supported:
56 * * legacy audio mode.
57 * 4. Support for volume button interrupts is implemented but doesn't
61 * 02.08.2001 0.1 Initial release
64 #include <linux/version.h>
65 #include <linux/module.h>
66 #include <linux/string.h>
67 #include <linux/kernel.h>
68 #include <linux/ioport.h>
69 #include <linux/sched.h>
70 #include <linux/delay.h>
71 #include <linux/sound.h>
72 #include <linux/slab.h>
73 #include <linux/soundcard.h>
74 #include <linux/pci.h>
75 #include <linux/init.h>
76 #include <linux/poll.h>
77 #include <linux/bitops.h>
78 #include <linux/proc_fs.h>
79 #include <linux/spinlock.h>
80 #include <linux/smp_lock.h>
81 #include <linux/ac97_codec.h>
82 #include <linux/wrapper.h>
85 #include <asm/uaccess.h>
86 #include <asm/hardirq.h>
88 /* -------------------debug macros -------------------------------------- */
89 /* #undef VRC5477_AC97_DEBUG */
90 #define VRC5477_AC97_DEBUG
92 #undef VRC5477_AC97_VERBOSE_DEBUG
93 /* #define VRC5477_AC97_VERBOSE_DEBUG */
95 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
96 #define VRC5477_AC97_DEBUG
99 #if defined(VRC5477_AC97_DEBUG)
100 #include <linux/kernel.h>
101 #define ASSERT(x) if (!(x)) { \
102 panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); }
105 #endif /* VRC5477_AC97_DEBUG */
107 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
108 static u16 inTicket=0; /* check sync between intr & write */
109 static u16 outTicket=0;
112 /* --------------------------------------------------------------------- */
114 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
116 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
118 #define VRC5477_INT_CLR 0x0
119 #define VRC5477_INT_STATUS 0x0
120 #define VRC5477_CODEC_WR 0x4
121 #define VRC5477_CODEC_RD 0x8
122 #define VRC5477_CTRL 0x18
123 #define VRC5477_ACLINK_CTRL 0x1c
124 #define VRC5477_INT_MASK 0x24
126 #define VRC5477_DAC1_CTRL 0x30
127 #define VRC5477_DAC1L 0x34
128 #define VRC5477_DAC1_BADDR 0x38
129 #define VRC5477_DAC2_CTRL 0x3c
130 #define VRC5477_DAC2L 0x40
131 #define VRC5477_DAC2_BADDR 0x44
132 #define VRC5477_DAC3_CTRL 0x48
133 #define VRC5477_DAC3L 0x4c
134 #define VRC5477_DAC3_BADDR 0x50
136 #define VRC5477_ADC1_CTRL 0x54
137 #define VRC5477_ADC1L 0x58
138 #define VRC5477_ADC1_BADDR 0x5c
139 #define VRC5477_ADC2_CTRL 0x60
140 #define VRC5477_ADC2L 0x64
141 #define VRC5477_ADC2_BADDR 0x68
142 #define VRC5477_ADC3_CTRL 0x6c
143 #define VRC5477_ADC3L 0x70
144 #define VRC5477_ADC3_BADDR 0x74
146 #define VRC5477_CODEC_WR_RWC (1 << 23)
148 #define VRC5477_CODEC_RD_RRDYA (1 << 31)
149 #define VRC5477_CODEC_RD_RRDYD (1 << 30)
151 #define VRC5477_ACLINK_CTRL_RST_ON (1 << 15)
152 #define VRC5477_ACLINK_CTRL_RST_TIME 0x7f
153 #define VRC5477_ACLINK_CTRL_SYNC_ON (1 << 30)
154 #define VRC5477_ACLINK_CTRL_CK_STOP_ON (1 << 31)
156 #define VRC5477_CTRL_DAC2ENB (1 << 15)
157 #define VRC5477_CTRL_ADC2ENB (1 << 14)
158 #define VRC5477_CTRL_DAC1ENB (1 << 13)
159 #define VRC5477_CTRL_ADC1ENB (1 << 12)
161 #define VRC5477_INT_MASK_NMASK (1 << 31)
162 #define VRC5477_INT_MASK_DAC1END (1 << 5)
163 #define VRC5477_INT_MASK_DAC2END (1 << 4)
164 #define VRC5477_INT_MASK_DAC3END (1 << 3)
165 #define VRC5477_INT_MASK_ADC1END (1 << 2)
166 #define VRC5477_INT_MASK_ADC2END (1 << 1)
167 #define VRC5477_INT_MASK_ADC3END (1 << 0)
169 #define VRC5477_DMA_ACTIVATION (1 << 31)
170 #define VRC5477_DMA_WIP (1 << 30)
173 #define VRC5477_AC97_MODULE_NAME "NEC_Vrc5477_audio"
174 #define PFX VRC5477_AC97_MODULE_NAME ": "
176 /* --------------------------------------------------------------------- */
178 struct vrc5477_ac97_state {
179 /* list of vrc5477_ac97 devices */
180 struct list_head devs;
182 /* the corresponding pci_dev structure */
185 /* soundcore stuff */
188 /* hardware resources */
192 #ifdef VRC5477_AC97_DEBUG
193 /* debug /proc entry */
194 struct proc_dir_entry *ps;
195 struct proc_dir_entry *ac97_ps;
196 #endif /* VRC5477_AC97_DEBUG */
198 struct ac97_codec codec;
200 unsigned dacChannels, adcChannels;
201 unsigned short dacRate, adcRate;
202 unsigned short extended_status;
205 struct semaphore open_sem;
207 wait_queue_head_t open_wait;
211 dma_addr_t lbufDma, rbufDma;
215 unsigned fragSize; /* redundant */
216 unsigned fragTotalSize; /* = numFrag * fragSize(real) */
220 unsigned error; /* over/underrun */
221 wait_queue_head_t wait;
227 #define WORK_BUF_SIZE 2048
231 } workBuf[WORK_BUF_SIZE/4];
234 /* --------------------------------------------------------------------- */
236 static LIST_HEAD(devs);
238 /* --------------------------------------------------------------------- */
240 static inline unsigned ld2(unsigned int x)
265 /* --------------------------------------------------------------------- */
267 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
269 struct vrc5477_ac97_state *s =
270 (struct vrc5477_ac97_state *)codec->private_data;
274 spin_lock_irqsave(&s->lock, flags);
276 /* wait until we can access codec registers */
277 while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
279 /* write the address and "read" command to codec */
281 outl((addr << 16) | VRC5477_CODEC_WR_RWC, s->io + VRC5477_CODEC_WR);
283 /* get the return result */
284 udelay(100); /* workaround hardware bug */
285 while ( (result = inl(s->io + VRC5477_CODEC_RD)) &
286 (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) {
287 /* we get either addr or data, or both */
288 if (result & VRC5477_CODEC_RD_RRDYA) {
289 ASSERT(addr == ((result >> 16) & 0x7f) );
291 if (result & VRC5477_CODEC_RD_RRDYD) {
296 spin_unlock_irqrestore(&s->lock, flags);
298 return result & 0xffff;;
302 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
304 struct vrc5477_ac97_state *s =
305 (struct vrc5477_ac97_state *)codec->private_data;
308 spin_lock_irqsave(&s->lock, flags);
310 /* wait until we can access codec registers */
311 while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
313 /* write the address and value to codec */
314 outl((addr << 16) | data, s->io + VRC5477_CODEC_WR);
316 spin_unlock_irqrestore(&s->lock, flags);
320 static void waitcodec(struct ac97_codec *codec)
322 struct vrc5477_ac97_state *s =
323 (struct vrc5477_ac97_state *)codec->private_data;
325 /* wait until we can access codec registers */
326 while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
329 static int ac97_codec_not_present(struct ac97_codec *codec)
331 struct vrc5477_ac97_state *s =
332 (struct vrc5477_ac97_state *)codec->private_data;
334 unsigned short count = 0xffff;
336 spin_lock_irqsave(&s->lock, flags);
338 /* wait until we can access codec registers */
340 if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
345 spin_unlock_irqrestore(&s->lock, flags);
349 /* write 0 to reset */
350 outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
352 /* test whether we get a response from ac97 chip */
355 if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
360 spin_unlock_irqrestore(&s->lock, flags);
363 spin_unlock_irqrestore(&s->lock, flags);
367 /* --------------------------------------------------------------------- */
369 static void vrc5477_ac97_delay(int msec)
377 tmo = jiffies + (msec*HZ)/1000;
379 tmo2 = tmo - jiffies;
382 schedule_timeout(tmo2);
387 static void set_adc_rate(struct vrc5477_ac97_state *s, unsigned rate)
389 wrcodec(&s->codec, AC97_PCM_LR_ADC_RATE, rate);
394 static void set_dac_rate(struct vrc5477_ac97_state *s, unsigned rate)
396 if(s->extended_status & AC97_EXTSTAT_VRA) {
397 wrcodec(&s->codec, AC97_PCM_FRONT_DAC_RATE, rate);
398 s->dacRate = rdcodec(&s->codec, AC97_PCM_FRONT_DAC_RATE);
403 /* --------------------------------------------------------------------- */
406 stop_dac(struct vrc5477_ac97_state *s)
408 struct dmabuf* db = &s->dma_dac;
412 spin_lock_irqsave(&s->lock, flags);
415 spin_unlock_irqrestore(&s->lock, flags);
419 /* deactivate the dma */
420 outl(0, s->io + VRC5477_DAC1_CTRL);
421 outl(0, s->io + VRC5477_DAC2_CTRL);
423 /* wait for DAM completely stop */
424 while (inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
425 while (inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
427 /* disable dac slots in aclink */
428 temp = inl(s->io + VRC5477_CTRL);
429 temp &= ~ (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
430 outl (temp, s->io + VRC5477_CTRL);
432 /* disable interrupts */
433 temp = inl(s->io + VRC5477_INT_MASK);
434 temp &= ~ (VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END);
435 outl (temp, s->io + VRC5477_INT_MASK);
437 /* clear pending ones */
438 outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
439 s->io + VRC5477_INT_CLR);
443 spin_unlock_irqrestore(&s->lock, flags);
446 static void start_dac(struct vrc5477_ac97_state *s)
448 struct dmabuf* db = &s->dma_dac;
453 spin_lock_irqsave(&s->lock, flags);
456 spin_unlock_irqrestore(&s->lock, flags);
460 /* we should have some data to do the DMA trasnfer */
461 ASSERT(db->count >= db->fragSize);
463 /* clear pending fales interrupts */
464 outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
465 s->io + VRC5477_INT_CLR);
467 /* enable interrupts */
468 temp = inl(s->io + VRC5477_INT_MASK);
469 temp |= VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
470 outl(temp, s->io + VRC5477_INT_MASK);
472 /* setup dma base addr */
473 outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC1_BADDR);
474 if (s->dacChannels == 1) {
475 outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
477 outl(db->rbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
480 /* set dma length, in the unit of 0x10 bytes */
481 dmaLength = db->fragSize >> 4;
482 outl(dmaLength, s->io + VRC5477_DAC1L);
483 outl(dmaLength, s->io + VRC5477_DAC2L);
486 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC1_CTRL);
487 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC2_CTRL);
489 /* enable dac slots - we should hear the music now! */
490 temp = inl(s->io + VRC5477_CTRL);
491 temp |= (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
492 outl (temp, s->io + VRC5477_CTRL);
494 /* it is time to setup next dma transfer */
495 ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
496 ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
498 temp = db->nextOut + db->fragSize;
499 if (temp >= db->fragTotalSize) {
500 ASSERT(temp == db->fragTotalSize);
504 outl(db->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
505 if (s->dacChannels == 1) {
506 outl(db->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
508 outl(db->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
513 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
514 outTicket = *(u16*)(db->lbuf+db->nextOut);
515 if (db->count > db->fragSize) {
516 ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp));
520 spin_unlock_irqrestore(&s->lock, flags);
523 static inline void stop_adc(struct vrc5477_ac97_state *s)
525 struct dmabuf* db = &s->dma_adc;
529 spin_lock_irqsave(&s->lock, flags);
532 spin_unlock_irqrestore(&s->lock, flags);
536 /* deactivate the dma */
537 outl(0, s->io + VRC5477_ADC1_CTRL);
538 outl(0, s->io + VRC5477_ADC2_CTRL);
540 /* disable adc slots in aclink */
541 temp = inl(s->io + VRC5477_CTRL);
542 temp &= ~ (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
543 outl (temp, s->io + VRC5477_CTRL);
545 /* disable interrupts */
546 temp = inl(s->io + VRC5477_INT_MASK);
547 temp &= ~ (VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END);
548 outl (temp, s->io + VRC5477_INT_MASK);
550 /* clear pending ones */
551 outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
552 s->io + VRC5477_INT_CLR);
556 spin_unlock_irqrestore(&s->lock, flags);
559 static void start_adc(struct vrc5477_ac97_state *s)
561 struct dmabuf* db = &s->dma_adc;
566 spin_lock_irqsave(&s->lock, flags);
569 spin_unlock_irqrestore(&s->lock, flags);
573 /* we should at least have some free space in the buffer */
574 ASSERT(db->count < db->fragTotalSize - db->fragSize * 2);
576 /* clear pending ones */
577 outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
578 s->io + VRC5477_INT_CLR);
580 /* enable interrupts */
581 temp = inl(s->io + VRC5477_INT_MASK);
582 temp |= VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
583 outl(temp, s->io + VRC5477_INT_MASK);
585 /* setup dma base addr */
586 outl(db->lbufDma + db->nextIn, s->io + VRC5477_ADC1_BADDR);
587 outl(db->rbufDma + db->nextIn, s->io + VRC5477_ADC2_BADDR);
589 /* setup dma length */
590 dmaLength = db->fragSize >> 4;
591 outl(dmaLength, s->io + VRC5477_ADC1L);
592 outl(dmaLength, s->io + VRC5477_ADC2L);
595 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC1_CTRL);
596 outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC2_CTRL);
598 /* enable adc slots */
599 temp = inl(s->io + VRC5477_CTRL);
600 temp |= (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
601 outl (temp, s->io + VRC5477_CTRL);
603 /* it is time to setup next dma transfer */
604 temp = db->nextIn + db->fragSize;
605 if (temp >= db->fragTotalSize) {
606 ASSERT(temp == db->fragTotalSize);
609 outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
610 outl(db->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
614 spin_unlock_irqrestore(&s->lock, flags);
617 /* --------------------------------------------------------------------- */
619 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
620 #define DMABUF_MINORDER 1
622 static inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
627 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
628 db->lbuf, db->lbufDma);
629 pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
630 db->rbuf, db->rbufDma);
631 db->lbuf = db->rbuf = NULL;
633 db->nextIn = db->nextOut = 0;
637 static int prog_dmabuf(struct vrc5477_ac97_state *s,
648 for (order = DMABUF_DEFAULTORDER;
649 order >= DMABUF_MINORDER;
651 db->lbuf = pci_alloc_consistent(s->dev,
654 db->rbuf = pci_alloc_consistent(s->dev,
657 if (db->lbuf && db->rbuf) break;
660 pci_free_consistent(s->dev,
671 db->bufOrder = order;
675 db->nextIn = db->nextOut = 0;
677 bufsize = PAGE_SIZE << db->bufOrder;
678 db->fragShift = ld2(rate * 2 / 100);
679 if (db->fragShift < 4) db->fragShift = 4;
681 db->numFrag = bufsize >> db->fragShift;
682 while (db->numFrag < 4 && db->fragShift > 4) {
684 db->numFrag = bufsize >> db->fragShift;
686 db->fragSize = 1 << db->fragShift;
687 db->fragTotalSize = db->numFrag << db->fragShift;
688 memset(db->lbuf, 0, db->fragTotalSize);
689 memset(db->rbuf, 0, db->fragTotalSize);
696 static inline int prog_dmabuf_adc(struct vrc5477_ac97_state *s)
699 return prog_dmabuf(s, &s->dma_adc, s->adcRate);
702 static inline int prog_dmabuf_dac(struct vrc5477_ac97_state *s)
705 return prog_dmabuf(s, &s->dma_dac, s->dacRate);
709 /* --------------------------------------------------------------------- */
710 /* hold spinlock for the following! */
712 static inline void vrc5477_ac97_adc_interrupt(struct vrc5477_ac97_state *s)
714 struct dmabuf* adc = &s->dma_adc;
717 /* we need two frags avaiable because one is already being used
718 * and the other will be used when next interrupt happens.
720 if (adc->count >= adc->fragTotalSize - adc->fragSize) {
723 printk(KERN_INFO PFX "adc overrun\n");
727 /* set the base addr for next DMA transfer */
728 temp = adc->nextIn + 2*adc->fragSize;
729 if (temp >= adc->fragTotalSize) {
730 ASSERT( (temp == adc->fragTotalSize) ||
731 (temp == adc->fragTotalSize + adc->fragSize) );
732 temp -= adc->fragTotalSize;
734 outl(adc->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
735 outl(adc->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
738 adc->nextIn += adc->fragSize;
739 if (adc->nextIn >= adc->fragTotalSize) {
740 ASSERT(adc->nextIn == adc->fragTotalSize);
745 adc->count += adc->fragSize;
747 /* wake up anybody listening */
748 if (waitqueue_active(&adc->wait)) {
749 wake_up_interruptible(&adc->wait);
753 static inline void vrc5477_ac97_dac_interrupt(struct vrc5477_ac97_state *s)
755 struct dmabuf* dac = &s->dma_dac;
758 /* next DMA transfer should already started */
759 // ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
760 // ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
762 /* let us set for next next DMA transfer */
763 temp = dac->nextOut + dac->fragSize*2;
764 if (temp >= dac->fragTotalSize) {
765 ASSERT( (temp == dac->fragTotalSize) ||
766 (temp == dac->fragTotalSize + dac->fragSize) );
767 temp -= dac->fragTotalSize;
769 outl(dac->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
770 if (s->dacChannels == 1) {
771 outl(dac->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
773 outl(dac->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
776 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
777 if (*(u16*)(dac->lbuf + dac->nextOut) != outTicket) {
778 printk("assert fail: - %d vs %d\n",
779 *(u16*)(dac->lbuf + dac->nextOut),
785 /* adjust nextOut pointer */
786 dac->nextOut += dac->fragSize;
787 if (dac->nextOut >= dac->fragTotalSize) {
788 ASSERT(dac->nextOut == dac->fragTotalSize);
793 dac->count -= dac->fragSize;
794 if (dac->count <=0 ) {
795 /* buffer under run */
797 dac->nextIn = dac->nextOut;
801 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
804 ASSERT(*(u16*)(dac->lbuf + dac->nextOut) == outTicket);
808 /* we cannot have both under run and someone is waiting on us */
809 ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) );
811 /* wake up anybody listening */
812 if (waitqueue_active(&dac->wait))
813 wake_up_interruptible(&dac->wait);
816 static void vrc5477_ac97_interrupt(int irq, void *dev_id, struct pt_regs *regs)
818 struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)dev_id;
820 u32 adcInterrupts, dacInterrupts;
824 /* get irqStatus and clear the detected ones */
825 irqStatus = inl(s->io + VRC5477_INT_STATUS);
826 outl(irqStatus, s->io + VRC5477_INT_CLR);
828 /* let us see what we get */
829 dacInterrupts = VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
830 adcInterrupts = VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
831 if (irqStatus & dacInterrupts) {
832 /* we should get both interrupts, but just in case ... */
833 if (irqStatus & VRC5477_INT_MASK_DAC1END) {
834 vrc5477_ac97_dac_interrupt(s);
836 if ( (irqStatus & dacInterrupts) != dacInterrupts ) {
837 printk(KERN_WARNING "vrc5477_ac97 : dac interrupts not in sync!!!\n");
841 } else if (irqStatus & adcInterrupts) {
842 /* we should get both interrupts, but just in case ... */
843 if(irqStatus & VRC5477_INT_MASK_ADC1END) {
844 vrc5477_ac97_adc_interrupt(s);
846 if ( (irqStatus & adcInterrupts) != adcInterrupts ) {
847 printk(KERN_WARNING "vrc5477_ac97 : adc interrupts not in sync!!!\n");
853 spin_unlock(&s->lock);
856 /* --------------------------------------------------------------------- */
858 static int vrc5477_ac97_open_mixdev(struct inode *inode, struct file *file)
860 int minor = MINOR(inode->i_rdev);
861 struct list_head *list;
862 struct vrc5477_ac97_state *s;
864 for (list = devs.next; ; list = list->next) {
867 s = list_entry(list, struct vrc5477_ac97_state, devs);
868 if (s->codec.dev_mixer == minor)
871 file->private_data = s;
875 static int vrc5477_ac97_release_mixdev(struct inode *inode, struct file *file)
881 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
884 return codec->mixer_ioctl(codec, cmd, arg);
887 static int vrc5477_ac97_ioctl_mixdev(struct inode *inode, struct file *file,
888 unsigned int cmd, unsigned long arg)
890 struct vrc5477_ac97_state *s =
891 (struct vrc5477_ac97_state *)file->private_data;
892 struct ac97_codec *codec = &s->codec;
894 return mixdev_ioctl(codec, cmd, arg);
897 static /*const*/ struct file_operations vrc5477_ac97_mixer_fops = {
900 ioctl: vrc5477_ac97_ioctl_mixdev,
901 open: vrc5477_ac97_open_mixdev,
902 release: vrc5477_ac97_release_mixdev,
905 /* --------------------------------------------------------------------- */
907 static int drain_dac(struct vrc5477_ac97_state *s, int nonblock)
912 if (!s->dma_dac.ready)
916 spin_lock_irqsave(&s->lock, flags);
917 count = s->dma_dac.count;
918 spin_unlock_irqrestore(&s->lock, flags);
921 if (signal_pending(current))
925 tmo = 1000 * count / s->dacRate / 2;
926 vrc5477_ac97_delay(tmo);
928 if (signal_pending(current))
933 /* --------------------------------------------------------------------- */
936 copy_two_channel_adc_to_user(struct vrc5477_ac97_state *s,
940 struct dmabuf *db = &s->dma_adc;
941 int bufStart = db->nextOut;
942 for (; copyCount > 0; ) {
944 int count = copyCount;
945 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
946 for (i=0; i< count/2; i++) {
947 s->workBuf[i].lchannel =
948 *(u16*)(db->lbuf + bufStart + i*2);
949 s->workBuf[i].rchannel =
950 *(u16*)(db->rbuf + bufStart + i*2);
952 if (copy_to_user(buffer, s->workBuf, count*2)) {
958 ASSERT(bufStart <= db->fragTotalSize);
964 /* return the total bytes that is copied */
966 copy_adc_to_user(struct vrc5477_ac97_state *s,
971 struct dmabuf *db = &s->dma_adc;
974 int totalCopyCount = 0;
975 int totalCopyFragCount = 0;
978 /* adjust count to signel channel byte count */
979 count >>= s->adcChannels - 1;
981 /* we may have to "copy" twice as ring buffer wraps around */
982 for (; (avail > 0) && (count > 0); ) {
983 /* determine max possible copy count for single channel */
985 if (copyCount > avail) {
988 if (copyCount + db->nextOut > db->fragTotalSize) {
989 copyCount = db->fragTotalSize - db->nextOut;
990 ASSERT((copyCount % db->fragSize) == 0);
993 copyFragCount = (copyCount-1) >> db->fragShift;
994 copyFragCount = (copyFragCount+1) << db->fragShift;
995 ASSERT(copyFragCount >= copyCount);
997 /* we copy differently based on adc channels */
998 if (s->adcChannels == 1) {
999 if (copy_to_user(buffer,
1000 db->lbuf + db->nextOut,
1004 /* *sigh* we have to mix two streams into one */
1005 if (copy_two_channel_adc_to_user(s, buffer, copyCount))
1010 totalCopyCount += copyCount;
1011 avail -= copyFragCount;
1012 totalCopyFragCount += copyFragCount;
1014 buffer += copyCount << (s->adcChannels-1);
1016 db->nextOut += copyFragCount;
1017 if (db->nextOut >= db->fragTotalSize) {
1018 ASSERT(db->nextOut == db->fragTotalSize);
1022 ASSERT((copyFragCount % db->fragSize) == 0);
1023 ASSERT( (count == 0) || (copyCount == copyFragCount));
1026 spin_lock_irqsave(&s->lock, flags);
1027 db->count -= totalCopyFragCount;
1028 spin_unlock_irqrestore(&s->lock, flags);
1030 return totalCopyCount << (s->adcChannels-1);
1034 vrc5477_ac97_read(struct file *file,
1039 struct vrc5477_ac97_state *s =
1040 (struct vrc5477_ac97_state *)file->private_data;
1041 struct dmabuf *db = &s->dma_adc;
1043 unsigned long flags;
1047 if (ppos != &file->f_pos)
1049 if (!access_ok(VERIFY_WRITE, buffer, count))
1055 // wait for samples in capture buffer
1057 spin_lock_irqsave(&s->lock, flags);
1061 spin_unlock_irqrestore(&s->lock, flags);
1063 if (file->f_flags & O_NONBLOCK) {
1068 interruptible_sleep_on(&db->wait);
1069 if (signal_pending(current)) {
1075 } while (avail <= 0);
1077 ASSERT( (avail % db->fragSize) == 0);
1078 copyCount = copy_adc_to_user(s, buffer, count, avail);
1079 if (copyCount <=0 ) {
1080 if (!ret) ret = -EFAULT;
1085 buffer += copyCount;
1087 } // while (count > 0)
1093 copy_two_channel_dac_from_user(struct vrc5477_ac97_state *s,
1097 struct dmabuf *db = &s->dma_dac;
1098 int bufStart = db->nextIn;
1102 for (; copyCount > 0; ) {
1104 int count = copyCount;
1105 if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
1106 if (copy_from_user(s->workBuf, buffer, count*2)) {
1109 for (i=0; i< count/2; i++) {
1110 *(u16*)(db->lbuf + bufStart + i*2) =
1111 s->workBuf[i].lchannel;
1112 *(u16*)(db->rbuf + bufStart + i*2) =
1113 s->workBuf[i].rchannel;
1118 ASSERT(bufStart <= db->fragTotalSize);
1125 /* return the total bytes that is copied */
1127 copy_dac_from_user(struct vrc5477_ac97_state *s,
1132 struct dmabuf *db = &s->dma_dac;
1134 int copyFragCount=0;
1135 int totalCopyCount = 0;
1136 int totalCopyFragCount = 0;
1137 unsigned long flags;
1138 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1142 /* adjust count to signel channel byte count */
1143 count >>= s->dacChannels - 1;
1145 /* we may have to "copy" twice as ring buffer wraps around */
1146 for (; (avail > 0) && (count > 0); ) {
1147 /* determine max possible copy count for single channel */
1149 if (copyCount > avail) {
1152 if (copyCount + db->nextIn > db->fragTotalSize) {
1153 copyCount = db->fragTotalSize - db->nextIn;
1154 ASSERT(copyCount > 0);
1157 copyFragCount = copyCount;
1158 ASSERT(copyFragCount >= copyCount);
1160 /* we copy differently based on the number channels */
1161 if (s->dacChannels == 1) {
1162 if (copy_from_user(db->lbuf + db->nextIn,
1166 /* fill gaps with 0 */
1167 memset(db->lbuf + db->nextIn + copyCount,
1169 copyFragCount - copyCount);
1171 /* we have demux the stream into two separate ones */
1172 if (copy_two_channel_dac_from_user(s, buffer, copyCount))
1174 /* fill gaps with 0 */
1175 memset(db->lbuf + db->nextIn + copyCount,
1177 copyFragCount - copyCount);
1178 memset(db->rbuf + db->nextIn + copyCount,
1180 copyFragCount - copyCount);
1183 #if defined(VRC5477_AC97_VERBOSE_DEBUG)
1184 for (i=0; i< copyFragCount; i+= db->fragSize) {
1185 *(u16*)(db->lbuf + db->nextIn + i) = inTicket ++;
1190 totalCopyCount =+ copyCount;
1191 avail -= copyFragCount;
1192 totalCopyFragCount += copyFragCount;
1194 buffer += copyCount << (s->dacChannels - 1);
1196 db->nextIn += copyFragCount;
1197 if (db->nextIn >= db->fragTotalSize) {
1198 ASSERT(db->nextIn == db->fragTotalSize);
1202 ASSERT( (count == 0) || (copyCount == copyFragCount));
1205 spin_lock_irqsave(&s->lock, flags);
1206 db->count += totalCopyFragCount;
1211 /* nextIn should not be equal to nextOut unless we are full */
1212 ASSERT( ( (db->count == db->fragTotalSize) &&
1213 (db->nextIn == db->nextOut) ) ||
1214 ( (db->count < db->fragTotalSize) &&
1215 (db->nextIn != db->nextOut) ) );
1217 spin_unlock_irqrestore(&s->lock, flags);
1219 return totalCopyCount << (s->dacChannels-1);
1223 static ssize_t vrc5477_ac97_write(struct file *file, const char *buffer,
1224 size_t count, loff_t *ppos)
1226 struct vrc5477_ac97_state *s =
1227 (struct vrc5477_ac97_state *)file->private_data;
1228 struct dmabuf *db = &s->dma_dac;
1230 unsigned long flags;
1231 int copyCount, avail;
1233 if (ppos != &file->f_pos)
1235 if (!access_ok(VERIFY_READ, buffer, count))
1240 // wait for space in playback buffer
1242 spin_lock_irqsave(&s->lock, flags);
1243 avail = db->fragTotalSize - db->count;
1244 spin_unlock_irqrestore(&s->lock, flags);
1246 if (file->f_flags & O_NONBLOCK) {
1251 interruptible_sleep_on(&db->wait);
1252 if (signal_pending(current)) {
1258 } while (avail <= 0);
1260 copyCount = copy_dac_from_user(s, buffer, count, avail);
1261 if (copyCount < 0) {
1262 if (!ret) ret = -EFAULT;
1267 buffer += copyCount;
1269 } // while (count > 0)
1274 /* No kernel lock - we have our own spinlock */
1275 static unsigned int vrc5477_ac97_poll(struct file *file,
1276 struct poll_table_struct *wait)
1278 struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1279 unsigned long flags;
1280 unsigned int mask = 0;
1282 if (file->f_mode & FMODE_WRITE)
1283 poll_wait(file, &s->dma_dac.wait, wait);
1284 if (file->f_mode & FMODE_READ)
1285 poll_wait(file, &s->dma_adc.wait, wait);
1286 spin_lock_irqsave(&s->lock, flags);
1287 if (file->f_mode & FMODE_READ) {
1288 if (s->dma_adc.count >= (signed)s->dma_adc.fragSize)
1289 mask |= POLLIN | POLLRDNORM;
1291 if (file->f_mode & FMODE_WRITE) {
1292 if ((signed)s->dma_dac.fragTotalSize >=
1293 s->dma_dac.count + (signed)s->dma_dac.fragSize)
1294 mask |= POLLOUT | POLLWRNORM;
1296 spin_unlock_irqrestore(&s->lock, flags);
1300 #ifdef VRC5477_AC97_DEBUG
1301 static struct ioctl_str_t {
1305 {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1306 {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1307 {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1308 {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1309 {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1310 {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1311 {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1312 {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1313 {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1314 {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1315 {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1316 {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1317 {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1318 {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1319 {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1320 {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1321 {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1322 {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1323 {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1324 {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1325 {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1326 {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1327 {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1328 {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1329 {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1330 {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1331 {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1332 {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1333 {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1334 {OSS_GETVERSION, "OSS_GETVERSION"},
1335 {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1336 {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1337 {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1338 {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1342 static int vrc5477_ac97_ioctl(struct inode *inode, struct file *file,
1343 unsigned int cmd, unsigned long arg)
1345 struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
1346 unsigned long flags;
1347 audio_buf_info abinfo;
1351 #ifdef VRC5477_AC97_DEBUG
1352 for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) {
1353 if (ioctl_str[count].cmd == cmd)
1356 if (count < sizeof(ioctl_str)/sizeof(ioctl_str[0]))
1357 printk(KERN_INFO PFX "ioctl %s\n", ioctl_str[count].str);
1359 printk(KERN_INFO PFX "ioctl unknown, 0x%x\n", cmd);
1363 case OSS_GETVERSION:
1364 return put_user(SOUND_VERSION, (int *)arg);
1366 case SNDCTL_DSP_SYNC:
1367 if (file->f_mode & FMODE_WRITE)
1368 return drain_dac(s, file->f_flags & O_NONBLOCK);
1371 case SNDCTL_DSP_SETDUPLEX:
1374 case SNDCTL_DSP_GETCAPS:
1375 return put_user(DSP_CAP_DUPLEX, (int *)arg);
1377 case SNDCTL_DSP_RESET:
1378 if (file->f_mode & FMODE_WRITE) {
1381 s->dma_dac.count = 0;
1382 s->dma_dac.nextIn = s->dma_dac.nextOut = 0;
1384 if (file->f_mode & FMODE_READ) {
1387 s->dma_adc.count = 0;
1388 s->dma_adc.nextIn = s->dma_adc.nextOut = 0;
1392 case SNDCTL_DSP_SPEED:
1393 if (get_user(val, (int *)arg))
1396 if (file->f_mode & FMODE_READ) {
1398 set_adc_rate(s, val);
1399 if ((ret = prog_dmabuf_adc(s)))
1402 if (file->f_mode & FMODE_WRITE) {
1404 set_dac_rate(s, val);
1405 if ((ret = prog_dmabuf_dac(s)))
1409 return put_user((file->f_mode & FMODE_READ) ?
1410 s->adcRate : s->dacRate, (int *)arg);
1412 case SNDCTL_DSP_STEREO:
1413 if (get_user(val, (int *)arg))
1415 if (file->f_mode & FMODE_READ) {
1421 if ((ret = prog_dmabuf_adc(s)))
1424 if (file->f_mode & FMODE_WRITE) {
1430 if ((ret = prog_dmabuf_dac(s)))
1435 case SNDCTL_DSP_CHANNELS:
1436 if (get_user(val, (int *)arg))
1439 if ( (val != 1) && (val != 2)) val = 2;
1441 if (file->f_mode & FMODE_READ) {
1443 s->dacChannels = val;
1444 if ((ret = prog_dmabuf_adc(s)))
1447 if (file->f_mode & FMODE_WRITE) {
1449 s->dacChannels = val;
1450 if ((ret = prog_dmabuf_dac(s)))
1454 return put_user(val, (int *)arg);
1456 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1457 return put_user(AFMT_S16_LE, (int *)arg);
1459 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1460 if (get_user(val, (int *)arg))
1462 if (val != AFMT_QUERY) {
1463 if (val != AFMT_S16_LE) return -EINVAL;
1464 if (file->f_mode & FMODE_READ) {
1466 if ((ret = prog_dmabuf_adc(s)))
1469 if (file->f_mode & FMODE_WRITE) {
1471 if ((ret = prog_dmabuf_dac(s)))
1477 return put_user(val, (int *)arg);
1479 case SNDCTL_DSP_POST:
1482 case SNDCTL_DSP_GETTRIGGER:
1483 case SNDCTL_DSP_SETTRIGGER:
1487 case SNDCTL_DSP_GETOSPACE:
1488 if (!(file->f_mode & FMODE_WRITE))
1490 abinfo.fragsize = s->dma_dac.fragSize << (s->dacChannels-1);
1491 spin_lock_irqsave(&s->lock, flags);
1492 count = s->dma_dac.count;
1493 spin_unlock_irqrestore(&s->lock, flags);
1494 abinfo.bytes = (s->dma_dac.fragTotalSize - count) <<
1496 abinfo.fragstotal = s->dma_dac.numFrag;
1497 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragShift >>
1499 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1501 case SNDCTL_DSP_GETISPACE:
1502 if (!(file->f_mode & FMODE_READ))
1504 abinfo.fragsize = s->dma_adc.fragSize << (s->adcChannels-1);
1505 spin_lock_irqsave(&s->lock, flags);
1506 count = s->dma_adc.count;
1507 spin_unlock_irqrestore(&s->lock, flags);
1510 abinfo.bytes = count << (s->adcChannels-1);
1511 abinfo.fragstotal = s->dma_adc.numFrag;
1512 abinfo.fragments = (abinfo.bytes >> s->dma_adc.fragShift) >>
1514 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1516 case SNDCTL_DSP_NONBLOCK:
1517 file->f_flags |= O_NONBLOCK;
1520 case SNDCTL_DSP_GETODELAY:
1521 if (!(file->f_mode & FMODE_WRITE))
1523 spin_lock_irqsave(&s->lock, flags);
1524 count = s->dma_dac.count;
1525 spin_unlock_irqrestore(&s->lock, flags);
1526 return put_user(count, (int *)arg);
1528 case SNDCTL_DSP_GETIPTR:
1529 case SNDCTL_DSP_GETOPTR:
1530 /* we cannot get DMA ptr */
1533 case SNDCTL_DSP_GETBLKSIZE:
1534 if (file->f_mode & FMODE_WRITE)
1535 return put_user(s->dma_dac.fragSize << (s->dacChannels-1), (int *)arg);
1537 return put_user(s->dma_adc.fragSize << (s->adcChannels-1), (int *)arg);
1539 case SNDCTL_DSP_SETFRAGMENT:
1540 /* we ignore fragment size request */
1543 case SNDCTL_DSP_SUBDIVIDE:
1544 /* what is this for? [jsun] */
1547 case SOUND_PCM_READ_RATE:
1548 return put_user((file->f_mode & FMODE_READ) ?
1549 s->adcRate : s->dacRate, (int *)arg);
1551 case SOUND_PCM_READ_CHANNELS:
1552 if (file->f_mode & FMODE_READ)
1553 return put_user(s->adcChannels, (int *)arg);
1555 return put_user(s->dacChannels ? 2 : 1, (int *)arg);
1557 case SOUND_PCM_READ_BITS:
1558 return put_user(16, (int *)arg);
1560 case SOUND_PCM_WRITE_FILTER:
1561 case SNDCTL_DSP_SETSYNCRO:
1562 case SOUND_PCM_READ_FILTER:
1566 return mixdev_ioctl(&s->codec, cmd, arg);
1570 static int vrc5477_ac97_open(struct inode *inode, struct file *file)
1572 int minor = MINOR(inode->i_rdev);
1573 DECLARE_WAITQUEUE(wait, current);
1574 unsigned long flags;
1575 struct list_head *list;
1576 struct vrc5477_ac97_state *s;
1579 for (list = devs.next; ; list = list->next) {
1582 s = list_entry(list, struct vrc5477_ac97_state, devs);
1583 if (!((s->dev_audio ^ minor) & ~0xf))
1586 file->private_data = s;
1588 /* wait for device to become free */
1590 while (s->open_mode & file->f_mode) {
1592 if (file->f_flags & O_NONBLOCK) {
1596 add_wait_queue(&s->open_wait, &wait);
1597 __set_current_state(TASK_INTERRUPTIBLE);
1600 remove_wait_queue(&s->open_wait, &wait);
1601 set_current_state(TASK_RUNNING);
1602 if (signal_pending(current))
1603 return -ERESTARTSYS;
1607 spin_lock_irqsave(&s->lock, flags);
1609 if (file->f_mode & FMODE_READ) {
1610 /* set default settings */
1611 set_adc_rate(s, 48000);
1614 ret = prog_dmabuf_adc(s);
1615 if (ret) goto bailout;
1617 if (file->f_mode & FMODE_WRITE) {
1618 /* set default settings */
1619 set_dac_rate(s, 48000);
1622 ret = prog_dmabuf_dac(s);
1623 if (ret) goto bailout;
1626 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1629 spin_unlock_irqrestore(&s->lock, flags);
1635 static int vrc5477_ac97_release(struct inode *inode, struct file *file)
1637 struct vrc5477_ac97_state *s =
1638 (struct vrc5477_ac97_state *)file->private_data;
1641 if (file->f_mode & FMODE_WRITE)
1642 drain_dac(s, file->f_flags & O_NONBLOCK);
1644 if (file->f_mode & FMODE_WRITE) {
1646 dealloc_dmabuf(s, &s->dma_dac);
1648 if (file->f_mode & FMODE_READ) {
1650 dealloc_dmabuf(s, &s->dma_adc);
1652 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1654 wake_up(&s->open_wait);
1659 static /*const*/ struct file_operations vrc5477_ac97_audio_fops = {
1662 read: vrc5477_ac97_read,
1663 write: vrc5477_ac97_write,
1664 poll: vrc5477_ac97_poll,
1665 ioctl: vrc5477_ac97_ioctl,
1666 // mmap: vrc5477_ac97_mmap,
1667 open: vrc5477_ac97_open,
1668 release: vrc5477_ac97_release,
1672 /* --------------------------------------------------------------------- */
1675 /* --------------------------------------------------------------------- */
1678 * for debugging purposes, we'll create a proc device that dumps the
1682 #ifdef VRC5477_AC97_DEBUG
1685 const char *regname;
1687 } vrc5477_ac97_regs[] = {
1688 {"VRC5477_INT_STATUS", VRC5477_INT_STATUS},
1689 {"VRC5477_CODEC_WR", VRC5477_CODEC_WR},
1690 {"VRC5477_CODEC_RD", VRC5477_CODEC_RD},
1691 {"VRC5477_CTRL", VRC5477_CTRL},
1692 {"VRC5477_ACLINK_CTRL", VRC5477_ACLINK_CTRL},
1693 {"VRC5477_INT_MASK", VRC5477_INT_MASK},
1694 {"VRC5477_DAC1_CTRL", VRC5477_DAC1_CTRL},
1695 {"VRC5477_DAC1L", VRC5477_DAC1L},
1696 {"VRC5477_DAC1_BADDR", VRC5477_DAC1_BADDR},
1697 {"VRC5477_DAC2_CTRL", VRC5477_DAC2_CTRL},
1698 {"VRC5477_DAC2L", VRC5477_DAC2L},
1699 {"VRC5477_DAC2_BADDR", VRC5477_DAC2_BADDR},
1700 {"VRC5477_DAC3_CTRL", VRC5477_DAC3_CTRL},
1701 {"VRC5477_DAC3L", VRC5477_DAC3L},
1702 {"VRC5477_DAC3_BADDR", VRC5477_DAC3_BADDR},
1703 {"VRC5477_ADC1_CTRL", VRC5477_ADC1_CTRL},
1704 {"VRC5477_ADC1L", VRC5477_ADC1L},
1705 {"VRC5477_ADC1_BADDR", VRC5477_ADC1_BADDR},
1706 {"VRC5477_ADC2_CTRL", VRC5477_ADC2_CTRL},
1707 {"VRC5477_ADC2L", VRC5477_ADC2L},
1708 {"VRC5477_ADC2_BADDR", VRC5477_ADC2_BADDR},
1709 {"VRC5477_ADC3_CTRL", VRC5477_ADC3_CTRL},
1710 {"VRC5477_ADC3L", VRC5477_ADC3L},
1711 {"VRC5477_ADC3_BADDR", VRC5477_ADC3_BADDR},
1715 static int proc_vrc5477_ac97_dump (char *buf, char **start, off_t fpos,
1716 int length, int *eof, void *data)
1718 struct vrc5477_ac97_state *s;
1721 if (list_empty(&devs))
1723 s = list_entry(devs.next, struct vrc5477_ac97_state, devs);
1725 /* print out header */
1726 len += sprintf(buf + len, "\n\t\tVrc5477 Audio Debug\n\n");
1728 // print out digital controller state
1729 len += sprintf (buf + len, "NEC Vrc5477 Audio Controller registers\n");
1730 len += sprintf (buf + len, "---------------------------------\n");
1731 for (cnt=0; vrc5477_ac97_regs[cnt].regname != NULL; cnt++) {
1732 len+= sprintf (buf + len, "%-20s = %08x\n",
1733 vrc5477_ac97_regs[cnt].regname,
1734 inl(s->io + vrc5477_ac97_regs[cnt].regaddr));
1737 /* print out driver state */
1738 len += sprintf (buf + len, "NEC Vrc5477 Audio driver states\n");
1739 len += sprintf (buf + len, "---------------------------------\n");
1740 len += sprintf (buf + len, "dacChannels = %d\n", s->dacChannels);
1741 len += sprintf (buf + len, "adcChannels = %d\n", s->adcChannels);
1742 len += sprintf (buf + len, "dacRate = %d\n", s->dacRate);
1743 len += sprintf (buf + len, "adcRate = %d\n", s->adcRate);
1745 len += sprintf (buf + len, "dma_dac is %s ready\n",
1746 s->dma_dac.ready? "" : "not");
1747 if (s->dma_dac.ready) {
1748 len += sprintf (buf + len, "dma_dac is %s stopped.\n",
1749 s->dma_dac.stopped? "" : "not");
1750 len += sprintf (buf + len, "dma_dac.fragSize = %x\n",
1751 s->dma_dac.fragSize);
1752 len += sprintf (buf + len, "dma_dac.fragShift = %x\n",
1753 s->dma_dac.fragShift);
1754 len += sprintf (buf + len, "dma_dac.numFrag = %x\n",
1755 s->dma_dac.numFrag);
1756 len += sprintf (buf + len, "dma_dac.fragTotalSize = %x\n",
1757 s->dma_dac.fragTotalSize);
1758 len += sprintf (buf + len, "dma_dac.nextIn = %x\n",
1760 len += sprintf (buf + len, "dma_dac.nextOut = %x\n",
1761 s->dma_dac.nextOut);
1762 len += sprintf (buf + len, "dma_dac.count = %x\n",
1766 len += sprintf (buf + len, "dma_adc is %s ready\n",
1767 s->dma_adc.ready? "" : "not");
1768 if (s->dma_adc.ready) {
1769 len += sprintf (buf + len, "dma_adc is %s stopped.\n",
1770 s->dma_adc.stopped? "" : "not");
1771 len += sprintf (buf + len, "dma_adc.fragSize = %x\n",
1772 s->dma_adc.fragSize);
1773 len += sprintf (buf + len, "dma_adc.fragShift = %x\n",
1774 s->dma_adc.fragShift);
1775 len += sprintf (buf + len, "dma_adc.numFrag = %x\n",
1776 s->dma_adc.numFrag);
1777 len += sprintf (buf + len, "dma_adc.fragTotalSize = %x\n",
1778 s->dma_adc.fragTotalSize);
1779 len += sprintf (buf + len, "dma_adc.nextIn = %x\n",
1781 len += sprintf (buf + len, "dma_adc.nextOut = %x\n",
1782 s->dma_adc.nextOut);
1783 len += sprintf (buf + len, "dma_adc.count = %x\n",
1787 /* print out CODEC state */
1788 len += sprintf (buf + len, "\nAC97 CODEC registers\n");
1789 len += sprintf (buf + len, "----------------------\n");
1790 for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
1791 len+= sprintf (buf + len, "reg %02x = %04x\n",
1792 cnt, rdcodec(&s->codec, cnt));
1799 *start = buf + fpos;
1800 if ((len -= fpos) > length)
1806 #endif /* VRC5477_AC97_DEBUG */
1808 /* --------------------------------------------------------------------- */
1810 /* maximum number of devices; only used for command line params */
1813 static unsigned int devindex = 0;
1815 MODULE_AUTHOR("Monta Vista Software, jsun@mvista.com or jsun@junsun.net");
1816 MODULE_DESCRIPTION("NEC Vrc5477 audio (AC97) Driver");
1817 MODULE_LICENSE("GPL");
1819 static int __devinit vrc5477_ac97_probe(struct pci_dev *pcidev,
1820 const struct pci_device_id *pciid)
1822 struct vrc5477_ac97_state *s;
1823 #ifdef VRC5477_AC97_DEBUG
1827 if (pcidev->irq == 0)
1830 if (!(s = kmalloc(sizeof(struct vrc5477_ac97_state), GFP_KERNEL))) {
1831 printk(KERN_ERR PFX "alloc of device struct failed\n");
1834 memset(s, 0, sizeof(struct vrc5477_ac97_state));
1836 init_waitqueue_head(&s->dma_adc.wait);
1837 init_waitqueue_head(&s->dma_dac.wait);
1838 init_waitqueue_head(&s->open_wait);
1839 init_MUTEX(&s->open_sem);
1840 spin_lock_init(&s->lock);
1843 s->io = pci_resource_start(pcidev, 0);
1844 s->irq = pcidev->irq;
1846 s->codec.private_data = s;
1848 s->codec.codec_read = rdcodec;
1849 s->codec.codec_write = wrcodec;
1850 s->codec.codec_wait = waitcodec;
1852 /* setting some other default values such as
1853 * adcChannels, adcRate is done in open() so that
1854 * no persistent state across file opens.
1857 /* test if get response from ac97, if not return */
1858 if (ac97_codec_not_present(&(s->codec))) {
1859 printk(KERN_ERR PFX "no ac97 codec\n");
1864 if (!request_region(s->io, pci_resource_len(pcidev,0),
1865 VRC5477_AC97_MODULE_NAME)) {
1866 printk(KERN_ERR PFX "io ports %#lx->%#lx in use\n",
1867 s->io, s->io + pci_resource_len(pcidev,0)-1);
1870 if (request_irq(s->irq, vrc5477_ac97_interrupt, SA_INTERRUPT,
1871 VRC5477_AC97_MODULE_NAME, s)) {
1872 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
1876 printk(KERN_INFO PFX "IO at %#lx, IRQ %d\n", s->io, s->irq);
1878 /* register devices */
1879 if ((s->dev_audio = register_sound_dsp(&vrc5477_ac97_audio_fops, -1)) < 0)
1881 if ((s->codec.dev_mixer =
1882 register_sound_mixer(&vrc5477_ac97_mixer_fops, -1)) < 0)
1885 #ifdef VRC5477_AC97_DEBUG
1886 /* intialize the debug proc device */
1887 s->ps = create_proc_read_entry(VRC5477_AC97_MODULE_NAME, 0, NULL,
1888 proc_vrc5477_ac97_dump, NULL);
1889 #endif /* VRC5477_AC97_DEBUG */
1891 /* enable pci io and bus mastering */
1892 if (pci_enable_device(pcidev))
1894 pci_set_master(pcidev);
1896 /* cold reset the AC97 */
1897 outl(VRC5477_ACLINK_CTRL_RST_ON | VRC5477_ACLINK_CTRL_RST_TIME,
1898 s->io + VRC5477_ACLINK_CTRL);
1899 while (inl(s->io + VRC5477_ACLINK_CTRL) & VRC5477_ACLINK_CTRL_RST_ON);
1902 if (!ac97_probe_codec(&s->codec))
1905 #ifdef VRC5477_AC97_DEBUG
1906 sprintf(proc_str, "driver/%s/%d/ac97",
1907 VRC5477_AC97_MODULE_NAME, s->codec.id);
1908 s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
1909 ac97_read_proc, &s->codec);
1910 /* TODO : why this proc file does not show up? */
1913 /* Try to enable variable rate audio mode. */
1914 wrcodec(&s->codec, AC97_EXTENDED_STATUS,
1915 rdcodec(&s->codec, AC97_EXTENDED_STATUS) | AC97_EXTSTAT_VRA);
1916 /* Did we enable it? */
1917 if(rdcodec(&s->codec, AC97_EXTENDED_STATUS) & AC97_EXTSTAT_VRA)
1918 s->extended_status |= AC97_EXTSTAT_VRA;
1921 printk(KERN_INFO PFX "VRA mode not enabled; rate fixed at %d.",
1925 /* let us get the default volumne louder */
1926 wrcodec(&s->codec, 0x2, 0x1010); /* master volume, middle */
1927 wrcodec(&s->codec, 0xc, 0x10); /* phone volume, middle */
1928 // wrcodec(&s->codec, 0xe, 0x10); /* misc volume, middle */
1929 wrcodec(&s->codec, 0x10, 0x8000); /* line-in 2 line-out disable */
1930 wrcodec(&s->codec, 0x18, 0x0707); /* PCM out (line out) middle */
1933 /* by default we select line in the input */
1934 wrcodec(&s->codec, 0x1a, 0x0404);
1935 wrcodec(&s->codec, 0x1c, 0x0f0f);
1936 wrcodec(&s->codec, 0x1e, 0x07);
1938 /* enable the master interrupt but disable all others */
1939 outl(VRC5477_INT_MASK_NMASK, s->io + VRC5477_INT_MASK);
1941 /* store it in the driver field */
1942 pci_set_drvdata(pcidev, s);
1943 pcidev->dma_mask = 0xffffffff;
1944 /* put it into driver list */
1945 list_add_tail(&s->devs, &devs);
1946 /* increment devindex */
1947 if (devindex < NR_DEVICE-1)
1952 unregister_sound_mixer(s->codec.dev_mixer);
1954 unregister_sound_dsp(s->dev_audio);
1956 printk(KERN_ERR PFX "cannot register misc device\n");
1957 free_irq(s->irq, s);
1959 release_region(s->io, pci_resource_len(pcidev,0));
1965 static void __devinit vrc5477_ac97_remove(struct pci_dev *dev)
1967 struct vrc5477_ac97_state *s = pci_get_drvdata(dev);
1973 #ifdef VRC5477_AC97_DEBUG
1975 remove_proc_entry(VRC5477_AC97_MODULE_NAME, NULL);
1976 #endif /* VRC5477_AC97_DEBUG */
1979 free_irq(s->irq, s);
1980 release_region(s->io, pci_resource_len(dev,0));
1981 unregister_sound_dsp(s->dev_audio);
1982 unregister_sound_mixer(s->codec.dev_mixer);
1984 pci_set_drvdata(dev, NULL);
1988 static struct pci_device_id id_table[] __devinitdata = {
1989 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC5477_AC97,
1990 PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
1994 MODULE_DEVICE_TABLE(pci, id_table);
1996 static struct pci_driver vrc5477_ac97_driver = {
1997 name: VRC5477_AC97_MODULE_NAME,
1999 probe: vrc5477_ac97_probe,
2000 remove: vrc5477_ac97_remove
2003 static int __init init_vrc5477_ac97(void)
2005 if (!pci_present()) /* No PCI bus in this machine! */
2007 printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n");
2008 return pci_module_init(&vrc5477_ac97_driver);
2011 static void __exit cleanup_vrc5477_ac97(void)
2013 printk(KERN_INFO PFX "unloading\n");
2014 pci_unregister_driver(&vrc5477_ac97_driver);
2017 module_init(init_vrc5477_ac97);
2018 module_exit(cleanup_vrc5477_ac97);