2 * Copyright (c) 2000-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/smp_lock.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/reboot.h>
34 #include <linux/bitops.h> /* for generic_ffs */
36 #ifdef CONFIG_USB_DEBUG
42 #include <linux/usb.h>
44 #include <linux/version.h>
47 #include <asm/byteorder.h>
50 #include <asm/system.h>
51 #include <asm/unaligned.h>
54 /*-------------------------------------------------------------------------*/
57 * EHCI hc_driver implementation ... experimental, incomplete.
58 * Based on the final 1.0 register interface specification.
60 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
61 * First was PCMCIA, like ISA; then CardBus, which is PCI.
62 * Next comes "CardBay", using USB 2.0 signals.
64 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
65 * Special thanks to Intel and VIA for providing host controllers to
66 * test this driver on, and Cypress (including In-System Design) for
67 * providing early devices for those host controllers to talk to!
71 * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
72 * <sojkam@centrum.cz>, updates by DB).
74 * 2002-11-29 Correct handling for hw async_next register.
75 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
76 * only scheduling is different, no arbitrary limitations.
77 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
78 * clean up HC run state handshaking.
79 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
80 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
81 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
82 * 2002-05-07 Some error path cleanups to report better errors; wmb();
83 * use non-CVS version id; better iso bandwidth claim.
84 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
85 * errors in submit path. Bugfixes to interrupt scheduling/processing.
86 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
87 * more checking to generic hcd framework (db). Make it work with
88 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
89 * 2002-01-14 Minor cleanup; version synch.
90 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
91 * 2002-01-04 Control/Bulk queuing behaves.
93 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
94 * 2001-June Works with usb-storage and NEC EHCI on 2.4
97 #define DRIVER_VERSION "2003-Dec-29/2.4"
98 #define DRIVER_AUTHOR "David Brownell"
99 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
101 static const char hcd_name [] = "ehci_hcd";
104 #undef EHCI_VERBOSE_DEBUG
105 #undef EHCI_URB_TRACE
107 // #define have_split_iso
113 #define INTR_AUTOMAGIC /* urb lifecycle mode, gone in 2.5 */
115 /* magic numbers that can affect system performance */
116 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
117 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
118 #define EHCI_TUNE_RL_TT 0
119 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
120 #define EHCI_TUNE_MULT_TT 1
121 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
123 #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
124 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
125 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
126 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
128 /* Initial IRQ latency: lower than default */
129 static int log2_irq_thresh = 0; // 0 to 6
130 MODULE_PARM (log2_irq_thresh, "i");
131 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
133 #define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT)
135 /*-------------------------------------------------------------------------*/
138 #include "ehci-dbg.c"
140 /*-------------------------------------------------------------------------*/
143 * handshake - spin reading hc until handshake completes or fails
144 * @ptr: address of hc register to be read
145 * @mask: bits to look at in result of read
146 * @done: value of those bits when handshake succeeds
147 * @usec: timeout in microseconds
149 * Returns negative errno, or zero on success
151 * Success happens when the "mask" bits have the specified value (hardware
152 * handshake done). There are two failure modes: "usec" have passed (major
153 * hardware flakeout), or the register reads as all-ones (hardware removed).
155 * That last failure should_only happen in cases like physical cardbus eject
156 * before driver shutdown. But it also seems to be caused by bugs in cardbus
157 * bridge shutdown: shutting down the bridge before the devices using it.
159 static int handshake (u32 *ptr, u32 mask, u32 done, int usec)
164 result = readl (ptr);
165 if (result == ~(u32)0) /* card removed */
177 * hc states include: unknown, halted, ready, running
178 * transitional states are messy just now
179 * trying to avoid "running" unless urbs are active
180 * a "ready" hc can be finishing prefetched work
183 /* force HC to halt state from unknown (EHCI spec section 2.3) */
184 static int ehci_halt (struct ehci_hcd *ehci)
186 u32 temp = readl (&ehci->regs->status);
188 if ((temp & STS_HALT) != 0)
191 temp = readl (&ehci->regs->command);
193 writel (temp, &ehci->regs->command);
194 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
197 /* reset a non-running (STS_HALT == 1) controller */
198 static int ehci_reset (struct ehci_hcd *ehci)
200 u32 command = readl (&ehci->regs->command);
202 command |= CMD_RESET;
203 dbg_cmd (ehci, "reset", command);
204 writel (command, &ehci->regs->command);
205 ehci->hcd.state = USB_STATE_HALT;
206 return handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
209 /* idle the controller (from running) */
210 static void ehci_ready (struct ehci_hcd *ehci)
215 if (!HCD_IS_RUNNING (ehci->hcd.state))
219 /* wait for any schedule enables/disables to take effect */
221 if (ehci->async->qh_next.qh)
223 if (ehci->next_uframe != -1)
225 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
226 temp, 16 * 125) != 0) {
227 ehci->hcd.state = USB_STATE_HALT;
231 /* then disable anything that's still active */
232 temp = readl (&ehci->regs->command);
233 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
234 writel (temp, &ehci->regs->command);
236 /* hardware can take 16 microframes to turn off ... */
237 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
239 ehci->hcd.state = USB_STATE_HALT;
242 ehci->hcd.state = USB_STATE_READY;
245 /*-------------------------------------------------------------------------*/
247 #include "ehci-hub.c"
248 #include "ehci-mem.c"
250 #include "ehci-sched.c"
252 /*-------------------------------------------------------------------------*/
254 static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
256 static void ehci_watchdog (unsigned long param)
258 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
261 spin_lock_irqsave (&ehci->lock, flags);
263 /* lost IAA irqs wedge things badly; seen with a vt8235 */
265 u32 status = readl (&ehci->regs->status);
267 if (status & STS_IAA) {
268 ehci_vdbg (ehci, "lost IAA\n");
269 COUNT (ehci->stats.lost_iaa);
270 writel (STS_IAA, &ehci->regs->status);
271 ehci->reclaim_ready = 1;
275 /* stop async processing after it's idled a bit */
276 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
277 start_unlink_async (ehci, ehci->async);
279 /* ehci could run by timer, without IRQs ... */
280 ehci_work (ehci, NULL);
282 spin_unlock_irqrestore (&ehci->lock, flags);
285 /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
286 * off the controller (maybe it can boot from highspeed USB disks).
288 static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
290 if (cap & (1 << 16)) {
293 /* request handoff to OS */
295 pci_write_config_dword (ehci->hcd.pdev, where, cap);
297 /* and wait a while for it to happen */
301 pci_read_config_dword (ehci->hcd.pdev, where, &cap);
302 } while ((cap & (1 << 16)) && msec);
303 if (cap & (1 << 16)) {
304 ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n",
306 pci_write_config_dword (ehci->hcd.pdev, where, 0);
309 ehci_dbg (ehci, "BIOS handoff succeeded\n");
315 ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
317 struct ehci_hcd *ehci;
319 ehci = container_of (self, struct ehci_hcd, reboot_notifier);
321 /* make BIOS/etc use companion controller during reboot */
322 writel (0, &ehci->regs->configured_flag);
327 /* called by khubd or root hub init threads */
329 static int ehci_start (struct usb_hcd *hcd)
331 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
333 struct usb_device *udev;
339 spin_lock_init (&ehci->lock);
341 ehci->caps = (struct ehci_caps *) hcd->regs;
342 ehci->regs = (struct ehci_regs *) (hcd->regs +
343 HC_LENGTH (readl (&ehci->caps->hc_capbase)));
344 dbg_hcs_params (ehci, "ehci_start");
345 dbg_hcc_params (ehci, "ehci_start");
347 hcc_params = readl (&ehci->caps->hcc_params);
349 /* EHCI 0.96 and later may have "extended capabilities" */
350 temp = HCC_EXT_CAPS (hcc_params);
354 pci_read_config_dword (ehci->hcd.pdev, temp, &cap);
355 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
356 switch (cap & 0xff) {
357 case 1: /* BIOS/SMM/... handoff */
358 if (bios_handoff (ehci, temp, cap) != 0)
361 case 0: /* illegal reserved capability */
362 ehci_warn (ehci, "illegal capability!\n");
365 default: /* unknown */
368 temp = (cap >> 8) & 0xff;
371 /* cache this readonly data; minimize PCI reads */
372 ehci->hcs_params = readl (&ehci->caps->hcs_params);
374 /* force HC to halt state */
375 if ((retval = ehci_halt (ehci)) != 0)
379 * hw default: 1K periodic list heads, one per frame.
380 * periodic_size can shrink by USBCMD update if hcc_params allows.
382 ehci->periodic_size = DEFAULT_I_TDPS;
383 if ((retval = ehci_mem_init (ehci, SLAB_KERNEL)) < 0)
386 /* controllers may cache some of the periodic schedule ... */
387 if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
389 else // N microframes cached
390 ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params);
393 ehci->next_uframe = -1;
395 /* controller state: unknown --> reset */
397 /* EHCI spec section 4.1 */
398 if ((retval = ehci_reset (ehci)) != 0) {
399 ehci_mem_cleanup (ehci);
402 writel (INTR_MASK, &ehci->regs->intr_enable);
403 writel (ehci->periodic_dma, &ehci->regs->frame_list);
406 * dedicate a qh for the async ring head, since we couldn't unlink
407 * a 'real' qh without stopping the async schedule [4.8]. use it
408 * as the 'reclamation list head' too.
409 * its dummy is used in hw_alt_next of many tds, to prevent the qh
410 * from automatically advancing to the next td after short reads.
412 ehci->async->qh_next.qh = 0;
413 ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma);
414 ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD);
415 ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT);
416 ehci->async->hw_qtd_next = EHCI_LIST_END;
417 ehci->async->qh_state = QH_STATE_LINKED;
418 ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
419 writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
422 * hcc_params controls whether ehci->regs->segment must (!!!)
423 * be used; it constrains QH/ITD/SITD and QTD locations.
424 * pci_pool consistent memory always uses segment zero.
425 * streaming mappings for I/O buffers, like pci_map_single(),
426 * can return segments above 4GB, if the device allows.
428 * NOTE: the dma mask is visible through dma_supported(), so
429 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
430 * Scsi_Host.highmem_io, and so forth. It's readonly to all
431 * host side drivers though.
433 if (HCC_64BIT_ADDR (hcc_params)) {
434 writel (0, &ehci->regs->segment);
435 if (!pci_set_dma_mask (ehci->hcd.pdev, 0xffffffffffffffffULL))
436 ehci_info (ehci, "enabled 64bit PCI DMA\n");
439 /* help hc dma work well with cachelines */
440 //pci_set_mwi (ehci->hcd.pdev); //+Wilson03172004,marked due to this pci host
441 //does not support MWI
443 /* clear interrupt enables, set irq latency */
444 temp = readl (&ehci->regs->command) & 0x0fff;
445 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
447 temp |= 1 << (16 + log2_irq_thresh);
448 // if hc can park (ehci >= 0.96), default is 3 packets per async QH
449 if (HCC_PGM_FRAMELISTLEN (hcc_params)) {
450 /* periodic schedule size can be smaller than default */
452 temp |= (EHCI_TUNE_FLS << 2);
453 switch (EHCI_TUNE_FLS) {
454 case 0: ehci->periodic_size = 1024; break;
455 case 1: ehci->periodic_size = 512; break;
456 case 2: ehci->periodic_size = 256; break;
460 temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE),
461 // Philips, Intel, and maybe others need CMD_RUN before the
462 // root hub will detect new devices (why?); NEC doesn't
464 writel (temp, &ehci->regs->command);
465 dbg_cmd (ehci, "init", temp);
467 /* set async sleep time = 10 us ... ? */
469 init_timer (&ehci->watchdog);
470 ehci->watchdog.function = ehci_watchdog;
471 ehci->watchdog.data = (unsigned long) ehci;
473 /* wire up the root hub */
474 bus = hcd_to_bus (hcd);
475 bus->root_hub = udev = usb_alloc_dev (NULL, bus);
478 ehci_mem_cleanup (ehci);
483 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
484 * are explicitly handed to companion controller(s), so no TT is
485 * involved with the root hub.
487 ehci->reboot_notifier.notifier_call = ehci_reboot;
488 register_reboot_notifier (&ehci->reboot_notifier);
490 ehci->hcd.state = USB_STATE_READY;
491 writel (FLAG_CF, &ehci->regs->configured_flag);
492 readl (&ehci->regs->command); /* unblock posted write */
494 /* PCI Serial Bus Release Number is at 0x60 offset */
495 pci_read_config_byte (hcd->pdev, 0x60, &tempbyte);
496 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
498 "USB %x.%x enabled, EHCI %x.%02x, driver %s\n",
499 ((tempbyte & 0xf0)>>4), (tempbyte & 0x0f),
500 temp >> 8, temp & 0xff, DRIVER_VERSION);
503 * From here on, khubd concurrently accesses the root
504 * hub; drivers will be talking to enumerated devices.
506 * Before this point the HC was idle/ready. After, khubd
507 * and device drivers may start it running.
510 udev->speed = USB_SPEED_HIGH;
511 if (hcd_register_root (hcd) != 0) {
512 if (hcd->state == USB_STATE_RUNNING)
521 create_debug_files (ehci);
526 /* always called by thread; normally rmmod */
528 static void ehci_stop (struct usb_hcd *hcd)
530 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
532 ehci_dbg (ehci, "stop\n");
534 /* no more interrupts ... */
535 if (hcd->state == USB_STATE_RUNNING)
537 if (in_interrupt ()) { /* must not happen!! */
538 ehci_err (ehci, "stopped in_interrupt!\n");
541 del_timer_sync (&ehci->watchdog);
544 /* let companion controllers work when we aren't */
545 writel (0, &ehci->regs->configured_flag);
546 unregister_reboot_notifier (&ehci->reboot_notifier);
548 remove_debug_files (ehci);
550 /* root hub is shut down separately (first, when possible) */
551 spin_lock_irq (&ehci->lock);
553 ehci_work (ehci, NULL);
554 spin_unlock_irq (&ehci->lock);
555 ehci_mem_cleanup (ehci);
558 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
559 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
560 ehci->stats.lost_iaa);
561 ehci_dbg (ehci, "complete %ld unlink %ld\n",
562 ehci->stats.complete, ehci->stats.unlink);
565 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
568 static int ehci_get_frame (struct usb_hcd *hcd)
570 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
571 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
574 /*-------------------------------------------------------------------------*/
578 /* suspend/resume, section 4.3 */
580 static int ehci_suspend (struct usb_hcd *hcd, u32 state)
582 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
586 ehci_dbg (ehci, "suspend to %d\n", state);
588 ports = HCS_N_PORTS (ehci->hcs_params);
590 // FIXME: This assumes what's probably a D3 level suspend...
592 // FIXME: usb wakeup events on this bus should resume the machine.
593 // pci config register PORTWAKECAP controls which ports can do it;
594 // bios may have initted the register...
596 /* suspend each port, then stop the hc */
597 for (i = 0; i < ports; i++) {
598 int temp = readl (&ehci->regs->port_status [i]);
600 if ((temp & PORT_PE) == 0
601 || (temp & PORT_OWNER) != 0)
603 ehci_dbg (ehci, "suspend port %d", i);
604 temp |= PORT_SUSPEND;
605 writel (temp, &ehci->regs->port_status [i]);
608 if (hcd->state == USB_STATE_RUNNING)
610 writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command);
612 // save pci FLADJ value
614 /* who tells PCI to reduce power consumption? */
619 static int ehci_resume (struct usb_hcd *hcd)
621 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
625 ehci_dbg (ehci, "resume\n");
627 ports = HCS_N_PORTS (ehci->hcs_params);
629 // FIXME: if controller didn't retain state,
630 // return and let generic code clean it up
631 // test configured_flag ?
633 /* resume HC and each port */
634 // restore pci FLADJ value
635 // khubd and drivers will set HC running, if needed;
636 hcd->state = USB_STATE_READY;
637 // FIXME Philips/Intel/... etc don't really have a "READY"
638 // state ... turn on CMD_RUN too
639 for (i = 0; i < ports; i++) {
640 int temp = readl (&ehci->regs->port_status [i]);
642 if ((temp & PORT_PE) == 0
643 || (temp & PORT_SUSPEND) != 0)
645 ehci_dbg (ehci, "resume port %d", i);
647 writel (temp, &ehci->regs->port_status [i]);
648 readl (&ehci->regs->command); /* unblock posted writes */
651 temp &= ~PORT_RESUME;
652 writel (temp, &ehci->regs->port_status [i]);
654 readl (&ehci->regs->command); /* unblock posted writes */
660 /*-------------------------------------------------------------------------*/
663 * ehci_work is called from some interrupts, timers, and so on.
664 * it calls driver completion functions, after dropping ehci->lock.
666 static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
668 timer_action_done (ehci, TIMER_IO_WATCHDOG);
669 if (ehci->reclaim_ready)
670 end_unlink_async (ehci, regs);
671 scan_async (ehci, regs);
672 if (ehci->next_uframe != -1)
673 scan_periodic (ehci, regs);
675 /* the IO watchdog guards against hardware or driver bugs that
676 * misplace IRQs, and should let us run completely without IRQs.
678 if ((ehci->async->qh_next.ptr != 0) || (ehci->periodic_sched != 0))
679 timer_action (ehci, TIMER_IO_WATCHDOG);
682 /*-------------------------------------------------------------------------*/
684 static void ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
686 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
690 spin_lock (&ehci->lock);
692 status = readl (&ehci->regs->status);
694 /* e.g. cardbus physical eject */
695 if (status == ~(u32) 0) {
696 ehci_dbg (ehci, "device removed\n");
701 if (!status) /* irq sharing? */
704 /* clear (just) interrupts */
705 writel (status, &ehci->regs->status);
706 readl (&ehci->regs->command); /* unblock posted write */
709 #ifdef EHCI_VERBOSE_DEBUG
710 /* unrequested/ignored: Port Change Detect, Frame List Rollover */
711 dbg_status (ehci, "irq", status);
714 /* INT, ERR, and IAA interrupt rates can be throttled */
716 /* normal [4.15.1.2] or error [4.15.1.1] completion */
717 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
718 if (likely ((status & STS_ERR) == 0))
719 COUNT (ehci->stats.normal);
721 COUNT (ehci->stats.error);
725 /* complete the unlinking of some qh [4.15.2.3] */
726 if (status & STS_IAA) {
727 COUNT (ehci->stats.reclaim);
728 ehci->reclaim_ready = 1;
732 /* PCI errors [4.15.2.4] */
733 if (unlikely ((status & STS_FATAL) != 0)) {
734 ehci_err (ehci, "fatal error\n");
737 /* generic layer kills/unlinks all urbs, then
738 * uses ehci_stop to clean up the rest
744 ehci_work (ehci, regs);
746 spin_unlock (&ehci->lock);
749 /*-------------------------------------------------------------------------*/
752 * non-error returns are a promise to giveback() the urb later
753 * we drop ownership so next owner (or urb unlink) can get it
755 * urb + dev is in hcd_dev.urb_list
756 * we're queueing TDs onto software and hardware lists
758 * hcd-specific init for hcpriv hasn't been done yet
760 * NOTE: control, bulk, and interrupt share the same code to append TDs
761 * to a (possibly active) QH, and the same QH scanning code.
763 static int ehci_urb_enqueue (
768 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
769 struct list_head qtd_list;
771 urb->transfer_flags &= ~EHCI_STATE_UNLINK;
772 INIT_LIST_HEAD (&qtd_list);
774 switch (usb_pipetype (urb->pipe)) {
775 // case PIPE_CONTROL:
778 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
780 return submit_async (ehci, urb, &qtd_list, mem_flags);
783 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
785 return intr_submit (ehci, urb, &qtd_list, mem_flags);
787 case PIPE_ISOCHRONOUS:
788 if (urb->dev->speed == USB_SPEED_HIGH)
789 return itd_submit (ehci, urb, mem_flags);
790 #ifdef have_split_iso
792 return sitd_submit (ehci, urb, mem_flags);
794 dbg ("no split iso support yet");
796 #endif /* have_split_iso */
800 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
802 /* if we need to use IAA and it's busy, defer */
803 if (qh->qh_state == QH_STATE_LINKED
805 && HCD_IS_RUNNING (ehci->hcd.state)) {
806 struct ehci_qh *last;
808 for (last = ehci->reclaim;
810 last = last->reclaim)
812 qh->qh_state = QH_STATE_UNLINK_WAIT;
815 /* bypass IAA if the hc can't care */
816 } else if (!HCD_IS_RUNNING (ehci->hcd.state) && ehci->reclaim)
817 end_unlink_async (ehci, NULL);
819 /* something else might have unlinked the qh by now */
820 if (qh->qh_state == QH_STATE_LINKED)
821 start_unlink_async (ehci, qh);
824 /* remove from hardware lists
825 * completions normally happen asynchronously
828 static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
830 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
834 spin_lock_irqsave (&ehci->lock, flags);
835 switch (usb_pipetype (urb->pipe)) {
836 // case PIPE_CONTROL:
839 qh = (struct ehci_qh *) urb->hcpriv;
842 unlink_async (ehci, qh);
846 qh = (struct ehci_qh *) urb->hcpriv;
849 if (qh->qh_state == QH_STATE_LINKED) {
850 /* messy, can spin or block a microframe ... */
851 intr_deschedule (ehci, qh, 1);
852 /* qh_state == IDLE */
854 qh_completions (ehci, qh, NULL);
856 /* reschedule QH iff another request is queued */
857 if (!list_empty (&qh->qtd_list)
858 && HCD_IS_RUNNING (ehci->hcd.state)) {
861 status = qh_schedule (ehci, qh);
862 spin_unlock_irqrestore (&ehci->lock, flags);
865 // shouldn't happen often, but ...
866 // FIXME kill those tds' urbs
867 err ("can't reschedule qh %p, err %d",
874 case PIPE_ISOCHRONOUS:
877 // wait till next completion, do it then.
878 // completion irqs can wait up to 1024 msec,
879 urb->transfer_flags |= EHCI_STATE_UNLINK;
882 spin_unlock_irqrestore (&ehci->lock, flags);
886 /*-------------------------------------------------------------------------*/
888 // bulk qh holds the data toggle
890 static void ehci_free_config (struct usb_hcd *hcd, struct usb_device *udev)
892 struct hcd_dev *dev = (struct hcd_dev *)udev->hcpriv;
893 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
897 /* ASSERT: no requests/urbs are still linked (so no TDs) */
898 /* ASSERT: nobody can be submitting urbs for this any more */
900 ehci_dbg (ehci, "free_config %s devnum %d\n",
901 udev->devpath, udev->devnum);
903 spin_lock_irqsave (&ehci->lock, flags);
904 for (i = 0; i < 32; i++) {
909 /* dev->ep is a QH unless info1.maxpacket of zero
910 * marks an iso stream head.
911 * FIXME do something smarter here with ISO
913 qh = (struct ehci_qh *) dev->ep [i];
914 if (qh->hw_info1 == 0) {
915 ehci_err (ehci, "no iso cleanup!!\n");
920 /* detect/report non-recoverable errors */
922 why = "disconnect() didn't";
923 else if ((qh->hw_info2 & cpu_to_le32 (0xffff)) != 0
924 && qh->qh_state != QH_STATE_IDLE)
925 why = "(active periodic)";
929 err ("dev %s-%s ep %d-%s error: %s",
930 hcd_to_bus (hcd)->bus_name,
932 i & 0xf, (i & 0x10) ? "IN" : "OUT",
938 if (qh->qh_state == QH_STATE_IDLE)
940 ehci_dbg (ehci, "free_config, async ep 0x%02x qh %p",
943 /* scan_async() empties the ring as it does its work,
944 * using IAA, but doesn't (yet?) turn it off. if it
945 * doesn't empty this qh, likely it's the last entry.
947 while (qh->qh_state == QH_STATE_LINKED
949 && HCD_IS_RUNNING (ehci->hcd.state)
951 spin_unlock_irqrestore (&ehci->lock, flags);
952 /* wait_ms() won't spin, we're a thread;
953 * and we know IRQ/timer/... can progress
956 spin_lock_irqsave (&ehci->lock, flags);
958 if (qh->qh_state == QH_STATE_LINKED)
959 start_unlink_async (ehci, qh);
960 while (qh->qh_state != QH_STATE_IDLE
961 && ehci->hcd.state != USB_STATE_HALT) {
962 spin_unlock_irqrestore (&ehci->lock, flags);
964 spin_lock_irqsave (&ehci->lock, flags);
971 spin_unlock_irqrestore (&ehci->lock, flags);
974 /*-------------------------------------------------------------------------*/
976 static const struct hc_driver ehci_driver = {
977 .description = hcd_name,
980 * generic hardware linkage
983 .flags = HCD_MEMORY | HCD_USB2,
986 * basic lifecycle operations
990 .suspend = ehci_suspend,
991 .resume = ehci_resume,
996 * memory lifecycle (except per-request)
998 .hcd_alloc = ehci_hcd_alloc,
999 .hcd_free = ehci_hcd_free,
1002 * managing i/o requests and associated device resources
1004 .urb_enqueue = ehci_urb_enqueue,
1005 .urb_dequeue = ehci_urb_dequeue,
1006 .free_config = ehci_free_config,
1009 * scheduling support
1011 .get_frame_number = ehci_get_frame,
1016 .hub_status_data = ehci_hub_status_data,
1017 .hub_control = ehci_hub_control,
1020 /*-------------------------------------------------------------------------*/
1022 /* EHCI spec says PCI is required. */
1024 /* PCI driver selection metadata; PCI hotplugging uses this */
1025 static const struct pci_device_id __devinitdata pci_ids [] = { {
1027 /* handle any USB 2.0 EHCI controller */
1029 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0x20),
1031 .driver_data = (unsigned long) &ehci_driver,
1033 /* no matter who makes it */
1034 .vendor = PCI_ANY_ID,
1035 .device = PCI_ANY_ID,
1036 .subvendor = PCI_ANY_ID,
1037 .subdevice = PCI_ANY_ID,
1039 }, { /* end: all zeroes */ }
1041 MODULE_DEVICE_TABLE (pci, pci_ids);
1043 /* pci driver glue; this is a "new style" PCI driver module */
1044 static struct pci_driver ehci_pci_driver = {
1045 .name = (char *) hcd_name,
1046 .id_table = pci_ids,
1048 .probe = usb_hcd_pci_probe,
1049 .remove = usb_hcd_pci_remove,
1052 .suspend = usb_hcd_pci_suspend,
1053 .resume = usb_hcd_pci_resume,
1057 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1059 MODULE_DESCRIPTION (DRIVER_INFO);
1060 MODULE_AUTHOR (DRIVER_AUTHOR);
1061 MODULE_LICENSE ("GPL");
1063 static int __init init (void)
1065 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1067 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
1068 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
1070 return pci_module_init (&ehci_pci_driver);
1074 static void __exit cleanup (void)
1076 pci_unregister_driver (&ehci_pci_driver);
1078 module_exit (cleanup);