drivers/video/matrox/matroxfb_g450.c

   1 /*
   2  *
   3  * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200, G400 and G450.
   4  *
   5  * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
   6  *
   7  * Portions Copyright (c) 2001 Matrox Graphics Inc.
   8  *
   9  * Version: 1.64 2002/06/02
  10  *
  11  * See matroxfb_base.c for contributors.
  12  *
  13  */
  14
  15 #include "matroxfb_base.h"
  16 #include "matroxfb_misc.h"
  17 #include "matroxfb_DAC1064.h"
  18 #include "g450_pll.h"
  19 #include <linux/matroxfb.h>
  20 #include <asm/uaccess.h>
  21 #include <asm/div64.h>
  22
  23 /* Definition of the various controls */
  24 struct mctl {
  25         struct matroxfb_queryctrl desc;
  26         size_t control;
  27 };
  28
  29 #define BLMIN   0xF3
  30 #define WLMAX   0x3FF
  31
  32 static const struct mctl g450_controls[] =
  33 {       { { MATROXFB_CID_BRIGHTNESS,
  34           "brightness",
  35           0, WLMAX-BLMIN, 1, 370-BLMIN,
  36           MATROXFB_CTRL_TYPE_INTEGER, 0, 0,
  37           "picture"
  38         }, offsetof(struct matrox_fb_info, altout.tvo_params.brightness) },
  39         { { MATROXFB_CID_CONTRAST,
  40           "contrast",
  41           0, 1023, 1, 127,
  42           MATROXFB_CTRL_TYPE_INTEGER, 0, 0,
  43           "picture"
  44         }, offsetof(struct matrox_fb_info, altout.tvo_params.contrast) },
  45         { { MATROXFB_CID_SATURATION,
  46           "saturation",
  47           0, 255, 1, 165,
  48           MATROXFB_CTRL_TYPE_INTEGER, 0, 0,
  49           "picture"
  50         }, offsetof(struct matrox_fb_info, altout.tvo_params.saturation) },
  51         { { MATROXFB_CID_HUE,
  52           "hue",
  53           0, 255, 1, 0,
  54           MATROXFB_CTRL_TYPE_INTEGER, 0, 0,
  55           "picture"
  56         }, offsetof(struct matrox_fb_info, altout.tvo_params.hue) },
  57         { { MATROXFB_CID_TESTOUT,
  58           "test output",
  59           0, 1, 1, 0,
  60           MATROXFB_CTRL_TYPE_BOOLEAN, 0, 0,
  61           "picture"
  62         }, offsetof(struct matrox_fb_info, altout.tvo_params.testout) },
  63 };
  64
  65 #define G450CTRLS (sizeof(g450_controls)/sizeof(g450_controls[0]))
  66
  67 /* Return: positive number: id found
  68            -EINVAL:         id not found, return failure
  69            -ENOENT:         id not found, create fake disabled control */
  70 static int get_ctrl_id(__u32 v4l2_id) {
  71         int i;
  72
  73         for (i = 0; i < G450CTRLS; i++) {
  74                 if (v4l2_id < g450_controls[i].desc.id) {
  75                         if (g450_controls[i].desc.id == 0x08000000) {
  76                                 return -EINVAL;
  77                         }
  78                         return -ENOENT;
  79                 }
  80                 if (v4l2_id == g450_controls[i].desc.id) {
  81                         return i;
  82                 }
  83         }
  84         return -EINVAL;
  85 }
  86
  87 static inline int* get_ctrl_ptr(WPMINFO unsigned int idx) {
  88         return (int*)((char*)MINFO + g450_controls[idx].control);
  89 }
  90
  91 static void tvo_fill_defaults(WPMINFO2) {
  92         unsigned int i;
  93
  94         for (i = 0; i < G450CTRLS; i++) {
  95                 *get_ctrl_ptr(PMINFO i) = g450_controls[i].desc.default_value;
  96         }
  97 }
  98
  99 static int cve2_get_reg(WPMINFO int reg) {
 100         unsigned long flags;
 101         int val;
 102
 103         matroxfb_DAC_lock_irqsave(flags);
 104         matroxfb_DAC_out(PMINFO 0x87, reg);
 105         val = matroxfb_DAC_in(PMINFO 0x88);
 106         matroxfb_DAC_unlock_irqrestore(flags);
 107         return val;
 108 }
 109
 110 static void cve2_set_reg(WPMINFO int reg, int val) {
 111         unsigned long flags;
 112
 113         matroxfb_DAC_lock_irqsave(flags);
 114         matroxfb_DAC_out(PMINFO 0x87, reg);
 115         matroxfb_DAC_out(PMINFO 0x88, val);
 116         matroxfb_DAC_unlock_irqrestore(flags);
 117 }
 118
 119 static void cve2_set_reg10(WPMINFO int reg, int val) {
 120         unsigned long flags;
 121
 122         matroxfb_DAC_lock_irqsave(flags);
 123         matroxfb_DAC_out(PMINFO 0x87, reg);
 124         matroxfb_DAC_out(PMINFO 0x88, val >> 2);
 125         matroxfb_DAC_out(PMINFO 0x87, reg + 1);
 126         matroxfb_DAC_out(PMINFO 0x88, val & 3);
 127         matroxfb_DAC_unlock_irqrestore(flags);
 128 }
 129
 130 static void g450_compute_bwlevel(CPMINFO int *bl, int *wl) {
 131         const int b = ACCESS_FBINFO(altout.tvo_params.brightness) + BLMIN;
 132         const int c = ACCESS_FBINFO(altout.tvo_params.contrast);
 133
 134         *bl = max(b - c, BLMIN);
 135         *wl = min(b + c, WLMAX);
 136 }
 137
 138 static int g450_query_ctrl(void* md, struct matroxfb_queryctrl *p) {
 139         int i;
 140
 141         i = get_ctrl_id(p->id);
 142         if (i >= 0) {
 143                 *p = g450_controls[i].desc;
 144                 return 0;
 145         }
 146         if (i == -ENOENT) {
 147                 static const struct matroxfb_queryctrl disctrl =
 148                         { 0, "", 0, 0, 0, 0, 0, 1, 1, "Disabled" };
 149
 150                 i = p->id;
 151                 *p = disctrl;
 152                 p->id = i;
 153                 sprintf(p->name, "Ctrl #%08X", i);
 154                 return 0;
 155         }
 156         return -EINVAL;
 157 }
 158
 159 static int g450_set_ctrl(void* md, struct matroxfb_control *p) {
 160         int i;
 161         MINFO_FROM(md);
 162
 163         i = get_ctrl_id(p->id);
 164         if (i < 0) return -EINVAL;
 165
 166         /*
 167          * Check if changed.
 168          */
 169         if (p->value == *get_ctrl_ptr(PMINFO i)) return 0;
 170
 171         /*
 172          * Check limits.
 173          */
 174         if (p->value > g450_controls[i].desc.maximum) return -EINVAL;
 175         if (p->value < g450_controls[i].desc.minimum) return -EINVAL;
 176
 177         /*
 178          * Store new value.
 179          */
 180         *get_ctrl_ptr(PMINFO i) = p->value;
 181
 182         switch (p->id) {
 183                 case MATROXFB_CID_BRIGHTNESS:
 184                 case MATROXFB_CID_CONTRAST:
 185                         {
 186                                 int blacklevel, whitelevel;
 187                                 g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel);
 188                                 cve2_set_reg10(PMINFO 0x0e, blacklevel);
 189                                 cve2_set_reg10(PMINFO 0x1e, whitelevel);
 190                         }
 191                         break;
 192                 case MATROXFB_CID_SATURATION:
 193                         cve2_set_reg(PMINFO 0x20, p->value);
 194                         cve2_set_reg(PMINFO 0x22, p->value);
 195                         break;
 196                 case MATROXFB_CID_HUE:
 197                         cve2_set_reg(PMINFO 0x25, p->value);
 198                         break;
 199                 case MATROXFB_CID_TESTOUT:
 200                         {
 201                                 unsigned char val = cve2_get_reg (PMINFO 0x05);
 202                                 if (p->value) val |=  0x02;
 203                                 else          val &= ~0x02;
 204                                 cve2_set_reg(PMINFO 0x05, val);
 205                         }
 206                         break;
 207         }
 208
 209
 210         return 0;
 211 }
 212
 213 static int g450_get_ctrl(void* md, struct matroxfb_control *p) {
 214         int i;
 215         MINFO_FROM(md);
 216
 217         i = get_ctrl_id(p->id);
 218         if (i < 0) return -EINVAL;
 219         p->value = *get_ctrl_ptr(PMINFO i);
 220         return 0;
 221 }
 222
 223 struct output_desc {
 224         unsigned int    h_vis;
 225         unsigned int    h_f_porch;
 226         unsigned int    h_sync;
 227         unsigned int    h_b_porch;
 228         unsigned long long int  chromasc;
 229         unsigned int    burst;
 230         unsigned int    v_total;
 231 };
 232
 233 static void computeRegs(WPMINFO struct mavenregs* r, struct my_timming* mt, const struct output_desc* outd) {
 234         u_int32_t chromasc;
 235         u_int32_t hlen;
 236         u_int32_t hsl;
 237         u_int32_t hbp;
 238         u_int32_t hfp;
 239         u_int32_t hvis;
 240         unsigned int pixclock;
 241         unsigned long long piic;
 242         int mnp;
 243         int over;
 244
 245         r->regs[0x80] = 0x03;   /* | 0x40 for SCART */
 246
 247         hvis = ((mt->HDisplay << 1) + 3) & ~3;
 248
 249         if (hvis >= 2048) {
 250                 hvis = 2044;
 251         }
 252
 253         piic = 1000000000ULL * hvis;
 254         do_div(piic, outd->h_vis);
 255
 256         dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic);
 257
 258         mnp = matroxfb_g450_setclk(PMINFO piic, M_VIDEO_PLL);
 259
 260         mt->mnp = mnp;
 261         mt->pixclock = g450_mnp2f(PMINFO mnp);
 262
 263         dprintk(KERN_DEBUG "MNP=%08X\n", mnp);
 264
 265         pixclock = 1000000000U / mt->pixclock;
 266
 267         dprintk(KERN_DEBUG "Got %u ps pixclock\n", pixclock);
 268
 269         piic = outd->chromasc;
 270         do_div(piic, mt->pixclock);
 271         chromasc = piic;
 272
 273         dprintk(KERN_DEBUG "Chroma is %08X\n", chromasc);
 274
 275         r->regs[0] = piic >> 24;
 276         r->regs[1] = piic >> 16;
 277         r->regs[2] = piic >>  8;
 278         r->regs[3] = piic >>  0;
 279         hbp = (((outd->h_b_porch + pixclock) / pixclock)) & ~1;
 280         hfp = (((outd->h_f_porch + pixclock) / pixclock)) & ~1;
 281         hsl = (((outd->h_sync + pixclock) / pixclock)) & ~1;
 282         hlen = hvis + hfp + hsl + hbp;
 283         over = hlen & 0x0F;
 284
 285         dprintk(KERN_DEBUG "WL: vis=%u, hf=%u, hs=%u, hb=%u, total=%u\n", hvis, hfp, hsl, hbp, hlen);
 286
 287         if (over) {
 288                 hfp -= over;
 289                 hlen -= over;
 290                 if (over <= 2) {
 291                 } else if (over < 10) {
 292                         hfp += 4;
 293                         hlen += 4;
 294                 } else {
 295                         hfp += 16;
 296                         hlen += 16;
 297                 }
 298         }
 299
 300         /* maybe cve2 has requirement 800 < hlen < 1184 */
 301         r->regs[0x08] = hsl;
 302         r->regs[0x09] = (outd->burst + pixclock - 1) / pixclock;        /* burst length */
 303         r->regs[0x0A] = hbp;
 304         r->regs[0x2C] = hfp;
 305         r->regs[0x31] = hvis / 8;
 306         r->regs[0x32] = hvis & 7;
 307
 308         dprintk(KERN_DEBUG "PG: vis=%04X, hf=%02X, hs=%02X, hb=%02X, total=%04X\n", hvis, hfp, hsl, hbp, hlen);
 309
 310         r->regs[0x84] = 1;      /* x sync point */
 311         r->regs[0x85] = 0;
 312         hvis = hvis >> 1;
 313         hlen = hlen >> 1;
 314
 315         dprintk(KERN_DEBUG "hlen=%u hvis=%u\n", hlen, hvis);
 316
 317         mt->interlaced = 1;
 318
 319         mt->HDisplay = hvis & ~7;
 320         mt->HSyncStart = mt->HDisplay + 8;
 321         mt->HSyncEnd = (hlen & ~7) - 8;
 322         mt->HTotal = hlen;
 323
 324         {
 325                 int upper;
 326                 unsigned int vtotal;
 327                 unsigned int vsyncend;
 328                 unsigned int vdisplay;
 329
 330                 vtotal = mt->VTotal;
 331                 vsyncend = mt->VSyncEnd;
 332                 vdisplay = mt->VDisplay;
 333                 if (vtotal < outd->v_total) {
 334                         unsigned int yovr = outd->v_total - vtotal;
 335
 336                         vsyncend += yovr >> 1;
 337                 } else if (vtotal > outd->v_total) {
 338                         vdisplay = outd->v_total - 4;
 339                         vsyncend = outd->v_total;
 340                 }
 341                 upper = (outd->v_total - vsyncend) >> 1;        /* in field lines */
 342                 r->regs[0x17] = outd->v_total / 4;
 343                 r->regs[0x18] = outd->v_total & 3;
 344                 r->regs[0x33] = upper - 1;      /* upper blanking */
 345                 r->regs[0x82] = upper;          /* y sync point */
 346                 r->regs[0x83] = upper >> 8;
 347
 348                 mt->VDisplay = vdisplay;
 349                 mt->VSyncStart = outd->v_total - 2;
 350                 mt->VSyncEnd = outd->v_total;
 351                 mt->VTotal = outd->v_total;
 352         }
 353 }
 354
 355 static void cve2_init_TVdata(int norm, struct mavenregs* data, const struct output_desc** outd) {
 356         static const struct output_desc paloutd = {
 357                 .h_vis     = 52148148,  // ps
 358                 .h_f_porch =  1407407,  // ps
 359                 .h_sync    =  4666667,  // ps
 360                 .h_b_porch =  5777778,  // ps
 361                 .chromasc  = 19042247534182ULL, // 4433618.750 Hz
 362                 .burst     =  2518518,  // ps
 363                 .v_total   =      625,
 364         };
 365         static const struct output_desc ntscoutd = {
 366                 .h_vis     = 52888889,  // ps
 367                 .h_f_porch =  1333333,  // ps
 368                 .h_sync    =  4666667,  // ps
 369                 .h_b_porch =  4666667,  // ps
 370                 .chromasc  = 15374030659475ULL, // 3579545.454 Hz
 371                 .burst     =  2418418,  // ps
 372                 .v_total   =      525,  // lines
 373         };
 374
 375         static const struct mavenregs palregs = { {
 376                 0x2A, 0x09, 0x8A, 0xCB, /* 00: chroma subcarrier */
 377                 0x00,
 378                 0x00,   /* test */
 379                 0xF9,   /* modified by code (F9 written...) */
 380                 0x00,   /* ? not written */
 381                 0x7E,   /* 08 */
 382                 0x44,   /* 09 */
 383                 0x9C,   /* 0A */
 384                 0x2E,   /* 0B */
 385                 0x21,   /* 0C */
 386                 0x00,   /* ? not written */
 387 //              0x3F, 0x03, /* 0E-0F */
 388                 0x3C, 0x03,
 389                 0x3C, 0x03, /* 10-11 */
 390                 0x1A,   /* 12 */
 391                 0x2A,   /* 13 */
 392                 0x1C, 0x3D, 0x14, /* 14-16 */
 393                 0x9C, 0x01, /* 17-18 */
 394                 0x00,   /* 19 */
 395                 0xFE,   /* 1A */
 396                 0x7E,   /* 1B */
 397                 0x60,   /* 1C */
 398                 0x05,   /* 1D */
 399 //              0x89, 0x03, /* 1E-1F */
 400                 0xAD, 0x03,
 401 //              0x72,   /* 20 */
 402                 0xA5,
 403                 0x07,   /* 21 */
 404 //              0x72,   /* 22 */
 405                 0xA5,
 406                 0x00,   /* 23 */
 407                 0x00,   /* 24 */
 408                 0x00,   /* 25 */
 409                 0x08,   /* 26 */
 410                 0x04,   /* 27 */
 411                 0x00,   /* 28 */
 412                 0x1A,   /* 29 */
 413                 0x55, 0x01, /* 2A-2B */
 414                 0x26,   /* 2C */
 415                 0x07, 0x7E, /* 2D-2E */
 416                 0x02, 0x54, /* 2F-30 */
 417                 0xB0, 0x00, /* 31-32 */
 418                 0x14,   /* 33 */
 419                 0x49,   /* 34 */
 420                 0x00,   /* 35 written multiple times */
 421                 0x00,   /* 36 not written */
 422                 0xA3,   /* 37 */
 423                 0xC8,   /* 38 */
 424                 0x22,   /* 39 */
 425                 0x02,   /* 3A */
 426                 0x22,   /* 3B */
 427                 0x3F, 0x03, /* 3C-3D */
 428                 0x00,   /* 3E written multiple times */
 429                 0x00,   /* 3F not written */
 430         } };
 431         static struct mavenregs ntscregs = { {
 432                 0x21, 0xF0, 0x7C, 0x1F, /* 00: chroma subcarrier */
 433                 0x00,
 434                 0x00,   /* test */
 435                 0xF9,   /* modified by code (F9 written...) */
 436                 0x00,   /* ? not written */
 437                 0x7E,   /* 08 */
 438                 0x43,   /* 09 */
 439                 0x7E,   /* 0A */
 440                 0x3D,   /* 0B */
 441                 0x00,   /* 0C */
 442                 0x00,   /* ? not written */
 443                 0x41, 0x00, /* 0E-0F */
 444                 0x3C, 0x00, /* 10-11 */
 445                 0x17,   /* 12 */
 446                 0x21,   /* 13 */
 447                 0x1B, 0x1B, 0x24, /* 14-16 */
 448                 0x83, 0x01, /* 17-18 */
 449                 0x00,   /* 19 */
 450                 0x0F,   /* 1A */
 451                 0x0F,   /* 1B */
 452                 0x60,   /* 1C */
 453                 0x05,   /* 1D */
 454                 //0x89, 0x02, /* 1E-1F */
 455                 0xC0, 0x02, /* 1E-1F */
 456                 //0x5F, /* 20 */
 457                 0x9C,   /* 20 */
 458                 0x04,   /* 21 */
 459                 //0x5F, /* 22 */
 460                 0x9C,   /* 22 */
 461                 0x01,   /* 23 */
 462                 0x02,   /* 24 */
 463                 0x00,   /* 25 */
 464                 0x0A,   /* 26 */
 465                 0x05,   /* 27 */
 466                 0x00,   /* 28 */
 467                 0x10,   /* 29 */
 468                 0xFF, 0x03, /* 2A-2B */
 469                 0x24,   /* 2C */
 470                 0x0F, 0x78, /* 2D-2E */
 471                 0x00, 0x00, /* 2F-30 */
 472                 0xB2, 0x04, /* 31-32 */
 473                 0x14,   /* 33 */
 474                 0x02,   /* 34 */
 475                 0x00,   /* 35 written multiple times */
 476                 0x00,   /* 36 not written */
 477                 0xA3,   /* 37 */
 478                 0xC8,   /* 38 */
 479                 0x15,   /* 39 */
 480                 0x05,   /* 3A */
 481                 0x3B,   /* 3B */
 482                 0x3C, 0x00, /* 3C-3D */
 483                 0x00,   /* 3E written multiple times */
 484                 0x00,   /* never written */
 485         } };
 486
 487         if (norm == MATROXFB_OUTPUT_MODE_PAL) {
 488                 *data = palregs;
 489                 *outd = &paloutd;
 490         } else {
 491                 *data = ntscregs;
 492                 *outd = &ntscoutd;
 493         }
 494         return;
 495 }
 496
 497 #define LR(x) cve2_set_reg(PMINFO (x), m->regs[(x)])
 498 static void cve2_init_TV(WPMINFO const struct mavenregs* m) {
 499         int i;
 500
 501         LR(0x80);
 502         LR(0x82); LR(0x83);
 503         LR(0x84); LR(0x85);
 504
 505         cve2_set_reg(PMINFO 0x3E, 0x01);
 506
 507         for (i = 0; i < 0x3E; i++) {
 508                 LR(i);
 509         }
 510         cve2_set_reg(PMINFO 0x3E, 0x00);
 511 }
 512
 513 static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
 514         MINFO_FROM(md);
 515
 516         dprintk(KERN_DEBUG "Computing, mode=%u\n", ACCESS_FBINFO(outputs[1]).mode);
 517
 518         if (mt->crtc == MATROXFB_SRC_CRTC2 &&
 519             ACCESS_FBINFO(outputs[1]).mode != MATROXFB_OUTPUT_MODE_MONITOR) {
 520                 const struct output_desc* outd;
 521
 522                 cve2_init_TVdata(ACCESS_FBINFO(outputs[1]).mode, &ACCESS_FBINFO(hw).maven, &outd);
 523                 {
 524                         int blacklevel, whitelevel;
 525                         g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel);
 526                         ACCESS_FBINFO(hw).maven.regs[0x0E] = blacklevel >> 2;
 527                         ACCESS_FBINFO(hw).maven.regs[0x0F] = blacklevel & 3;
 528                         ACCESS_FBINFO(hw).maven.regs[0x1E] = whitelevel >> 2;
 529                         ACCESS_FBINFO(hw).maven.regs[0x1F] = whitelevel & 3;
 530
 531                         ACCESS_FBINFO(hw).maven.regs[0x20] =
 532                         ACCESS_FBINFO(hw).maven.regs[0x22] = ACCESS_FBINFO(altout.tvo_params.saturation);
 533
 534                         ACCESS_FBINFO(hw).maven.regs[0x25] = ACCESS_FBINFO(altout.tvo_params.hue);
 535
 536                         if (ACCESS_FBINFO(altout.tvo_params.testout)) {
 537                                 ACCESS_FBINFO(hw).maven.regs[0x05] |= 0x02;
 538                         }
 539                 }
 540                 computeRegs(PMINFO &ACCESS_FBINFO(hw).maven, mt, outd);
 541         } else if (mt->mnp < 0) {
 542                 /* We must program clocks before CRTC2, otherwise interlaced mode
 543                    startup may fail */
 544                 mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
 545                 mt->pixclock = g450_mnp2f(PMINFO mt->mnp);
 546         }
 547         dprintk(KERN_DEBUG "Pixclock = %u\n", mt->pixclock);
 548         return 0;
 549 }
 550
 551 static int matroxfb_g450_program(void* md) {
 552         MINFO_FROM(md);
 553
 554         if (ACCESS_FBINFO(outputs[1]).mode != MATROXFB_OUTPUT_MODE_MONITOR) {
 555                 cve2_init_TV(PMINFO &ACCESS_FBINFO(hw).maven);
 556         }
 557         return 0;
 558 }
 559
 560 static int matroxfb_g450_verify_mode(void* md, u_int32_t arg) {
 561         MINFO_FROM(md);
 562
 563         switch (arg) {
 564                 case MATROXFB_OUTPUT_MODE_PAL:
 565                 case MATROXFB_OUTPUT_MODE_NTSC:
 566                 case MATROXFB_OUTPUT_MODE_MONITOR:
 567                         return 0;
 568         }
 569         return -EINVAL;
 570 }
 571
 572 static int g450_dvi_compute(void* md, struct my_timming* mt) {
 573         MINFO_FROM(md);
 574
 575         if (mt->mnp < 0) {
 576                 mt->mnp = matroxfb_g450_setclk(PMINFO mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL);
 577                 mt->pixclock = g450_mnp2f(PMINFO mt->mnp);
 578         }
 579         return 0;
 580 }
 581
 582 static struct matrox_altout matroxfb_g450_altout = {
 583         .owner   = THIS_MODULE,
 584         .name    = "Secondary output",
 585         .compute = matroxfb_g450_compute,
 586         .program = matroxfb_g450_program,
 587         .verifymode = matroxfb_g450_verify_mode,
 588         .getqueryctrl = g450_query_ctrl,
 589         .getctrl = g450_get_ctrl,
 590         .setctrl = g450_set_ctrl,
 591 };
 592
 593 static struct matrox_altout matroxfb_g450_dvi = {
 594         .owner   = THIS_MODULE,
 595         .name    = "DVI output",
 596         .compute = g450_dvi_compute,
 597 };
 598
 599 void matroxfb_g450_connect(WPMINFO2) {
 600         if (ACCESS_FBINFO(devflags.g450dac)) {
 601                 down_write(&ACCESS_FBINFO(altout.lock));
 602                 tvo_fill_defaults(PMINFO2);
 603                 ACCESS_FBINFO(outputs[1]).src = MATROXFB_SRC_CRTC1;
 604                 ACCESS_FBINFO(outputs[1]).data = MINFO;
 605                 ACCESS_FBINFO(outputs[1]).output = &matroxfb_g450_altout;
 606                 ACCESS_FBINFO(outputs[1]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
 607                 ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_CRTC1;
 608                 ACCESS_FBINFO(outputs[2]).data = MINFO;
 609                 ACCESS_FBINFO(outputs[2]).output = &matroxfb_g450_dvi;
 610                 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
 611                 up_write(&ACCESS_FBINFO(altout.lock));
 612         }
 613 }
 614
 615 void matroxfb_g450_shutdown(WPMINFO2) {
 616         if (ACCESS_FBINFO(devflags.g450dac)) {
 617                 down_write(&ACCESS_FBINFO(altout.lock));
 618                 ACCESS_FBINFO(outputs[1]).src = MATROXFB_SRC_NONE;
 619                 ACCESS_FBINFO(outputs[1]).output = NULL;
 620                 ACCESS_FBINFO(outputs[1]).data = NULL;
 621                 ACCESS_FBINFO(outputs[1]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
 622                 ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_NONE;
 623                 ACCESS_FBINFO(outputs[2]).output = NULL;
 624                 ACCESS_FBINFO(outputs[2]).data = NULL;
 625                 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
 626                 up_write(&ACCESS_FBINFO(altout.lock));
 627         }
 628 }
 629
 630 EXPORT_SYMBOL(matroxfb_g450_connect);
 631 EXPORT_SYMBOL(matroxfb_g450_shutdown);
 632
 633 MODULE_AUTHOR("(c) 2000-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
 634 MODULE_DESCRIPTION("Matrox G450/G550 output driver");
 635 MODULE_LICENSE("GPL");