2 * linux/drivers/video/sa1100fb.c
4 * Copyright (C) 1999 Eric A. Thomas
5 * Based on acornfb.c Copyright (C) Russell King.
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
11 * StrongARM 1100 LCD Controller Frame Buffer Driver
13 * Please direct your questions and comments on this driver to the following
16 * linux-arm-kernel@lists.arm.linux.org.uk
18 * Clean patches should be sent to the ARM Linux Patch System. Please see the
19 * following web page for more information:
21 * http://www.arm.linux.org.uk/developer/patches/info.shtml
26 * - With the Neponset plugged into an Assabet, LCD powerdown
27 * doesn't work (LCD stays powered up). Therefore we shouldn't
29 * - We don't limit the CPU clock rate nor the mode selection
30 * according to the available SDRAM bandwidth.
33 * - Linear grayscale palettes and the kernel.
34 * Such code does not belong in the kernel. The kernel frame buffer
35 * drivers do not expect a linear colourmap, but a colourmap based on
36 * the VT100 standard mapping.
38 * If your _userspace_ requires a linear colourmap, then the setup of
39 * such a colourmap belongs _in userspace_, not in the kernel. Code
40 * to set the colourmap correctly from user space has been sent to
41 * David Neuer. It's around 8 lines of C code, plus another 4 to
42 * detect if we are using grayscale.
46 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
47 * resolutions are working, but only the 8bpp mode is supported.
48 * Changes need to be made to the palette encode and decode routines
49 * to support 4 and 16 bpp modes.
50 * Driver is not designed to be a module. The FrameBuffer is statically
51 * allocated since dynamic allocation of a 300k buffer cannot be
55 * - FrameBuffer memory is now allocated at run-time when the
56 * driver is initialized.
58 * 2000/04/10: Nicolas Pitre <nico@cam.org>
59 * - Big cleanup for dynamic selection of machine type at run time.
61 * 2000/07/19: Jamey Hicks <jamey@crl.dec.com>
62 * - Support for Bitsy aka Compaq iPAQ H3600 added.
64 * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com>
65 * Jeff Sutherland <jsutherland@accelent.com>
66 * - Resolved an issue caused by a change made to the Assabet's PLD
67 * earlier this year which broke the framebuffer driver for newer
68 * Phase 4 Assabets. Some other parameters were changed to optimize
69 * for the Sharp display.
71 * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp>
72 * - XP860 support added
74 * 2000/08/19: Mark Huang <mhuang@livetoy.com>
75 * - Allows standard options to be passed on the kernel command line
76 * for most common passive displays.
79 * - s/save_flags_cli/local_irq_save/
80 * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller
82 * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl>
83 * - Updated LART stuff. Fixed some minor bugs.
85 * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw>
86 * - Pangolin support added
88 * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de>
89 * - Huw Webpanel support added
91 * 2000/11/23: Eric Peng <ericpeng@coventive.com>
94 * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com>
95 * Cliff Brake <cbrake@accelent.com>
98 * 2001/05/26: <rmk@arm.linux.org.uk>
99 * - Fix 16bpp so that (a) we use the right colours rather than some
100 * totally random colour depending on what was in page 0, and (b)
101 * we don't de-reference a NULL pointer.
102 * - remove duplicated implementation of consistent_alloc()
103 * - convert dma address types to dma_addr_t
104 * - remove unused 'montype' stuff
105 * - remove redundant zero inits of init_var after the initial
107 * - remove allow_modeset (acornfb idea does not belong here)
109 * 2001/05/28: <rmk@arm.linux.org.uk>
110 * - massive cleanup - move machine dependent data into structures
111 * - I've left various #warnings in - if you see one, and know
112 * the hardware concerned, please get in contact with me.
114 * 2001/05/31: <rmk@arm.linux.org.uk>
115 * - Fix LCCR1 HSW value, fix all machine type specifications to
116 * keep values in line. (Please check your machine type specs)
118 * 2001/06/10: <rmk@arm.linux.org.uk>
119 * - Fiddle with the LCD controller from task context only; mainly
120 * so that we can run with interrupts on, and sleep.
121 * - Convert #warnings into #errors. No pain, no gain. ;)
123 * 2001/06/14: <rmk@arm.linux.org.uk>
124 * - Make the palette BPS value for 12bpp come out correctly.
125 * - Take notice of "greyscale" on any colour depth.
126 * - Make truecolor visuals use the RGB channel encoding information.
128 * 2001/07/02: <rmk@arm.linux.org.uk>
129 * - Fix colourmap problems.
131 * 2001/07/13: <abraham@2d3d.co.za>
132 * - Added support for the ICP LCD-Kit01 on LART. This LCD is
133 * manufactured by Prime View, model no V16C6448AB
135 * 2001/07/23: <rmk@arm.linux.org.uk>
136 * - Hand merge version from handhelds.org CVS tree. See patch
137 * notes for 595/1 for more information.
138 * - Drop 12bpp (it's 16bpp with different colour register mappings).
139 * - This hardware can not do direct colour. Therefore we don't
142 * 2001/07/27: <rmk@arm.linux.org.uk>
143 * - Halve YRES on dual scan LCDs.
145 * 2001/08/22: <rmk@arm.linux.org.uk>
146 * - Add b/w iPAQ pixclock value.
148 * 2001/10/12: <rmk@arm.linux.org.uk>
149 * - Add patch 681/1 and clean up stork definitions.
152 #include <linux/config.h>
153 #include <linux/module.h>
154 #include <linux/kernel.h>
155 #include <linux/sched.h>
156 #include <linux/errno.h>
157 #include <linux/string.h>
158 #include <linux/interrupt.h>
159 #include <linux/slab.h>
160 #include <linux/fb.h>
161 #include <linux/delay.h>
162 #include <linux/pm.h>
163 #include <linux/init.h>
164 #include <linux/cpufreq.h>
166 #include <asm/hardware.h>
169 #include <asm/mach-types.h>
170 #include <asm/uaccess.h>
171 #include <asm/arch/assabet.h>
173 #include <video/fbcon.h>
174 #include <video/fbcon-mfb.h>
175 #include <video/fbcon-cfb4.h>
176 #include <video/fbcon-cfb8.h>
177 #include <video/fbcon-cfb16.h>
180 * enable this if your panel appears to have broken
189 * Complain if VAR is out of range.
193 #undef ASSABET_PAL_VIDEO
195 #include "sa1100fb.h"
197 void (*sa1100fb_blank_helper)(int blank);
198 EXPORT_SYMBOL(sa1100fb_blank_helper);
203 sa1100fb_check_shadow(struct sa1100fb_lcd_reg *new_regs,
204 struct fb_var_screeninfo *var, u_int pcd)
206 struct sa1100fb_lcd_reg shadow;
210 * These machines are good machines!
212 if (machine_is_assabet() || machine_is_h3600())
216 * The following ones are bad, bad, bad.
217 * Please make yours good!
219 if (machine_is_pangolin()) {
220 DPRINTK("Configuring Pangolin LCD\n");
222 LCCR0_LEN + LCCR0_Color + LCCR0_LDM +
223 LCCR0_BAM + LCCR0_ERM + LCCR0_Act +
224 LCCR0_LtlEnd + LCCR0_DMADel(0);
226 LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(64) +
227 LCCR1_BegLnDel(160) + LCCR1_EndLnDel(24);
229 LCCR2_DisHght(var->yres) + LCCR2_VrtSnchWdth(7) +
230 LCCR2_BegFrmDel(7) + LCCR2_EndFrmDel(1);
232 LCCR3_PixClkDiv(pcd) + LCCR3_HorSnchH +
233 LCCR3_VrtSnchH + LCCR3_PixFlEdg + LCCR3_OutEnH;
235 DPRINTK("pcd = %x, PixCldDiv(pcd)=%x\n",
236 pcd, LCCR3_PixClkDiv(pcd));
238 if (machine_is_freebird()) {
239 DPRINTK("Configuring Freebird LCD\n");
241 shadow.lccr0 = 0x00000038;
242 shadow.lccr1 = 0x010108e0;
243 shadow.lccr2 = 0x0000053f;
244 shadow.lccr3 = 0x00000c20;
247 LCCR0_LEN + LCCR0_Color + LCCR0_Sngl +
248 LCCR0_LDM + LCCR0_BAM + LCCR0_ERM + LCCR0_Pas +
249 LCCR0_LtlEnd + LCCR0_DMADel(0);
252 LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(5) +
253 LCCR1_BegLnDel(61) + LCCR1_EndLnDel(9);
256 LCCR2_DisHght(var->yres) + LCCR2_VrtSnchWdth(1) +
257 LCCR2_BegFrmDel(3) + LCCR2_EndFrmDel(0);
260 LCCR3_OutEnH + LCCR3_PixFlEdg + LCCR3_VrtSnchH +
261 LCCR3_HorSnchH + LCCR3_ACBsCntOff +
262 LCCR3_ACBsDiv(2) + LCCR3_PixClkDiv(pcd);
265 if (machine_is_brutus()) {
266 DPRINTK("Configuring Brutus LCD\n");
268 LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Pas +
269 LCCR0_LtlEnd + LCCR0_LDM + LCCR0_BAM + LCCR0_ERM +
272 LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(3) +
273 LCCR1_BegLnDel(41) + LCCR1_EndLnDel(101);
275 LCCR2_DisHght(var->yres) + LCCR2_VrtSnchWdth(1) +
276 LCCR2_BegFrmDel(0) + LCCR2_EndFrmDel(0);
278 LCCR3_OutEnH + LCCR3_PixRsEdg + LCCR3_VrtSnchH +
279 LCCR3_HorSnchH + LCCR3_ACBsCntOff +
280 LCCR3_ACBsDiv(2) + LCCR3_PixClkDiv(44);
282 if (machine_is_huw_webpanel()) {
283 DPRINTK("Configuring HuW LCD\n");
284 shadow.lccr0 = LCCR0_LEN + LCCR0_Dual + LCCR0_LDM;
285 shadow.lccr1 = LCCR1_DisWdth(var->xres) +
286 LCCR1_HorSnchWdth(3) +
287 LCCR1_BegLnDel(41) + LCCR1_EndLnDel(101);
288 shadow.lccr2 = 239 + LCCR2_VrtSnchWdth(1);
289 shadow.lccr3 = 8 + LCCR3_OutEnH +
290 LCCR3_PixRsEdg + LCCR3_VrtSnchH +
291 LCCR3_HorSnchH + LCCR3_ACBsCntOff + LCCR3_ACBsDiv(2);
293 if (machine_is_lart()) {
294 DPRINTK("Configuring LART LCD\n");
295 #if defined LART_GREY_LCD
297 LCCR0_LEN + LCCR0_Mono + LCCR0_Sngl + LCCR0_Pas +
298 LCCR0_LtlEnd + LCCR0_LDM + LCCR0_BAM + LCCR0_ERM +
301 LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(1) +
302 LCCR1_BegLnDel(4) + LCCR1_EndLnDel(2);
304 LCCR2_DisHght(var->yres) + LCCR2_VrtSnchWdth(1) +
305 LCCR2_BegFrmDel(0) + LCCR2_EndFrmDel(0);
307 LCCR3_PixClkDiv(34) + LCCR3_ACBsDiv(512) +
308 LCCR3_ACBsCntOff + LCCR3_HorSnchH + LCCR3_VrtSnchH;
310 #if defined LART_COLOR_LCD
312 LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Act +
313 LCCR0_LtlEnd + LCCR0_LDM + LCCR0_BAM + LCCR0_ERM +
316 LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(2) +
317 LCCR1_BegLnDel(69) + LCCR1_EndLnDel(8);
319 LCCR2_DisHght(var->yres) + LCCR2_VrtSnchWdth(3) +
320 LCCR2_BegFrmDel(14) + LCCR2_EndFrmDel(4);
322 LCCR3_PixClkDiv(34) + LCCR3_ACBsDiv(512) +
323 LCCR3_ACBsCntOff + LCCR3_HorSnchL + LCCR3_VrtSnchL +
326 #if defined LART_VIDEO_OUT
328 LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Act +
329 LCCR0_LtlEnd + LCCR0_LDM + LCCR0_BAM + LCCR0_ERM +
332 LCCR1_DisWdth(640) + LCCR1_HorSnchWdth(95) +
333 LCCR1_BegLnDel(40) + LCCR1_EndLnDel(24);
335 LCCR2_DisHght(480) + LCCR2_VrtSnchWdth(2) +
336 LCCR2_BegFrmDel(32) + LCCR2_EndFrmDel(11);
338 LCCR3_PixClkDiv(8) + LCCR3_ACBsDiv(512) +
339 LCCR3_ACBsCntOff + LCCR3_HorSnchH + LCCR3_VrtSnchH +
340 LCCR3_PixFlEdg + LCCR3_OutEnL;
343 if (machine_is_graphicsclient()) {
344 DPRINTK("Configuring GraphicsClient LCD\n");
346 LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Act;
348 LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(9) +
349 LCCR1_EndLnDel(54) + LCCR1_BegLnDel(54);
351 LCCR2_DisHght(var->yres) + LCCR2_VrtSnchWdth(9) +
352 LCCR2_EndFrmDel(32) + LCCR2_BegFrmDel(24);
354 LCCR3_PixClkDiv(10) + LCCR3_ACBsDiv(2) +
355 LCCR3_ACBsCntOff + LCCR3_HorSnchL + LCCR3_VrtSnchL;
357 if (machine_is_omnimeter()) {
358 DPRINTK("Configuring OMNI LCD\n");
359 shadow.lccr0 = LCCR0_LEN | LCCR0_CMS | LCCR0_DPD;
361 LCCR1_BegLnDel(10) + LCCR1_EndLnDel(10) +
362 LCCR1_HorSnchWdth(1) + LCCR1_DisWdth(var->xres);
363 shadow.lccr2 = LCCR2_DisHght(var->yres);
365 LCCR3_ACBsDiv(0xFF) + LCCR3_PixClkDiv(44);
366 //jca (GetPCD(25) << LCD3_V_PCD);
368 if (machine_is_xp860()) {
369 DPRINTK("Configuring XP860 LCD\n");
371 LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Act +
372 LCCR0_LtlEnd + LCCR0_LDM + LCCR0_ERM + LCCR0_DMADel(0);
374 LCCR1_DisWdth(var->xres) +
375 LCCR1_HorSnchWdth(var->hsync_len) +
376 LCCR1_BegLnDel(var->left_margin) +
377 LCCR1_EndLnDel(var->right_margin);
379 LCCR2_DisHght(var->yres) +
380 LCCR2_VrtSnchWdth(var->vsync_len) +
381 LCCR2_BegFrmDel(var->upper_margin) +
382 LCCR2_EndFrmDel(var->lower_margin);
384 LCCR3_PixClkDiv(6) + LCCR3_HorSnchL + LCCR3_VrtSnchL;
388 * Ok, since we're calculating these values, we want to know
389 * if the calculation is correct. If you see any of these
390 * messages _PLEASE_ report the incident to me for diagnosis,
391 * including details about what was happening when the
392 * messages appeared. --rmk, 30 March 2001
394 if (shadow.lccr0 != new_regs->lccr0) {
395 printk(KERN_ERR "LCCR1 mismatch: 0x%08x != 0x%08x\n",
396 shadow.lccr1, new_regs->lccr1);
399 if (shadow.lccr1 != new_regs->lccr1) {
400 printk(KERN_ERR "LCCR1 mismatch: 0x%08x != 0x%08x\n",
401 shadow.lccr1, new_regs->lccr1);
404 if (shadow.lccr2 != new_regs->lccr2) {
405 printk(KERN_ERR "LCCR2 mismatch: 0x%08x != 0x%08x\n",
406 shadow.lccr2, new_regs->lccr2);
409 if (shadow.lccr3 != new_regs->lccr3) {
410 printk(KERN_ERR "LCCR3 mismatch: 0x%08x != 0x%08x\n",
411 shadow.lccr3, new_regs->lccr3);
415 printk(KERN_ERR "var: xres=%d hslen=%d lm=%d rm=%d\n",
416 var->xres, var->hsync_len,
417 var->left_margin, var->right_margin);
418 printk(KERN_ERR "var: yres=%d vslen=%d um=%d bm=%d\n",
419 var->yres, var->vsync_len,
420 var->upper_margin, var->lower_margin);
422 printk(KERN_ERR "Please report this to Russell King "
423 "<rmk@arm.linux.org.uk>\n");
426 DPRINTK("olccr0 = 0x%08x\n", shadow.lccr0);
427 DPRINTK("olccr1 = 0x%08x\n", shadow.lccr1);
428 DPRINTK("olccr2 = 0x%08x\n", shadow.lccr2);
429 DPRINTK("olccr3 = 0x%08x\n", shadow.lccr3);
432 #define sa1100fb_check_shadow(regs,var,pcd)
438 * IMHO this looks wrong. In 8BPP, length should be 8.
440 static struct sa1100fb_rgb rgb_8 = {
441 red: { offset: 0, length: 4, },
442 green: { offset: 0, length: 4, },
443 blue: { offset: 0, length: 4, },
444 transp: { offset: 0, length: 0, },
447 static struct sa1100fb_rgb def_rgb_16 = {
448 red: { offset: 11, length: 5, },
449 green: { offset: 5, length: 6, },
450 blue: { offset: 0, length: 5, },
451 transp: { offset: 0, length: 0, },
454 #ifdef CONFIG_SA1100_ASSABET
455 #ifndef ASSABET_PAL_VIDEO
457 * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
458 * takes an RGB666 signal, but we provide it with an RGB565 signal
459 * instead (def_rgb_16).
461 static struct sa1100fb_mach_info lq039q2ds54_info __initdata = {
462 pixclock: 171521, bpp: 16,
463 xres: 320, yres: 240,
465 hsync_len: 5, vsync_len: 1,
466 left_margin: 61, upper_margin: 3,
467 right_margin: 9, lower_margin: 0,
469 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
471 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
472 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
475 static struct sa1100fb_mach_info pal_info __initdata = {
476 pixclock: 67797, bpp: 16,
477 xres: 640, yres: 512,
479 hsync_len: 64, vsync_len: 6,
480 left_margin: 125, upper_margin: 70,
481 right_margin: 115, lower_margin: 36,
485 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
486 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
491 #ifdef CONFIG_SA1100_H3600
492 static struct sa1100fb_mach_info h3600_info __initdata = {
493 #ifdef CONFIG_IPAQ_H3100
494 pixclock: 407766, bpp: 4,
495 xres: 320, yres: 240,
497 hsync_len: 26, vsync_len: 41,
498 left_margin: 4, upper_margin: 0,
499 right_margin: 4, lower_margin: 0,
501 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
502 cmap_greyscale: 1, cmap_static: 1,
505 lccr0: LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
506 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
508 pixclock: 174757, bpp: 16,
509 xres: 320, yres: 240,
511 hsync_len: 3, vsync_len: 3,
512 left_margin: 12, upper_margin: 10,
513 right_margin: 17, lower_margin: 1,
517 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
518 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
522 static struct sa1100fb_rgb h3600_rgb_16 = {
523 red: { offset: 12, length: 4, },
524 green: { offset: 7, length: 4, },
525 blue: { offset: 1, length: 4, },
526 transp: { offset: 0, length: 0, },
530 #ifdef CONFIG_SA1100_BRUTUS
531 static struct sa1100fb_mach_info brutus_info __initdata = {
533 xres: 320, yres: 240,
535 hsync_len: 3, vsync_len: 1,
536 left_margin: 41, upper_margin: 0,
537 right_margin: 101, lower_margin: 0,
539 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
541 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Pas,
542 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2) |
547 #ifdef CONFIG_SA1100_CERF
548 static struct sa1100fb_mach_info cerf_info __initdata = {
549 #if defined(CONFIG_CERF_LCD_72_A)
550 pixclock: 171521, bpp: 8,
551 xres: 640, yres: 480,
552 lccr0: LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
553 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2) |
555 #elif defined(CONFIG_CERF_LCD_57_A)
556 pixclock: 171521, bpp: 8,
557 xres: 320, yres: 240,
558 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Pas,
559 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2) |
561 #elif defined(CONFIG_CERF_LCD_38_A)
562 pixclock: 171521, bpp: 8,
563 xres: 240, yres: 320,
564 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Pas,
565 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(56) |
567 #elif defined(CONFIG_CERF_LCD_38_B)
568 pixclock: 171521, bpp: 4,
569 xres: 320, yres: 240,
570 lccr0: LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
571 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(56) |
574 #error "Must have a CerfBoard LCD form factor selected"
577 hsync_len: 5, vsync_len: 1,
578 left_margin: 61, upper_margin: 3,
579 right_margin: 9, lower_margin: 0,
581 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
586 static struct sa1100fb_rgb cerf_rgb_16 = {
587 red: { offset: 8, length: 4, },
588 green: { offset: 4, length: 4, },
589 blue: { offset: 0, length: 4, },
590 transp: { offset: 0, length: 0, },
595 #ifdef CONFIG_SA1100_FREEBIRD
596 #warning Please check this carefully
597 static struct sa1100fb_mach_info freebird_info __initdata = {
598 pixclock: 171521, bpp: 16,
599 xres: 240, yres: 320,
601 hsync_len: 3, vsync_len: 2,
602 left_margin: 2, upper_margin: 0,
603 right_margin: 2, lower_margin: 0,
605 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
607 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Pas,
608 lccr3: LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(2),
611 static struct sa1100fb_rgb freebird_rgb_16 = {
612 red: { offset: 8, length: 4, },
613 green: { offset: 4, length: 4, },
614 blue: { offset: 0, length: 4, },
615 transp: { offset: 12, length: 4, },
619 #ifdef CONFIG_SA1100_GRAPHICSCLIENT
620 static struct sa1100fb_mach_info graphicsclient_info __initdata = {
621 pixclock: 53500, bpp: 8,
622 xres: 640, yres: 480,
624 hsync_len: 9, vsync_len: 9,
625 left_margin: 54, upper_margin: 24,
626 right_margin: 54, lower_margin: 32,
630 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
631 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
635 #ifdef CONFIG_SA1100_HUW_WEBPANEL
636 static struct sa1100fb_mach_info huw_webpanel_info __initdata = {
638 xres: 640, yres: 480,
640 hsync_len: 3, vsync_len: 1,
641 left_margin: 41, upper_margin: 0,
642 right_margin: 101, lower_margin: 0,
644 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
646 lccr0: LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
647 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2) | 8,
650 * FIXME: please get rid of the '| 8' in preference to an
651 * LCCR3_PixClkDiv() version. --rmk
657 static struct sa1100fb_mach_info lart_grey_info __initdata = {
658 pixclock: 150000, bpp: 4,
659 xres: 320, yres: 240,
661 hsync_len: 1, vsync_len: 1,
662 left_margin: 4, upper_margin: 0,
663 right_margin: 2, lower_margin: 0,
666 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
668 lccr0: LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
669 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
672 #ifdef LART_COLOR_LCD
673 static struct sa1100fb_mach_info lart_color_info __initdata = {
674 pixclock: 150000, bpp: 16,
675 xres: 320, yres: 240,
677 hsync_len: 2, vsync_len: 3,
678 left_margin: 69, upper_margin: 14,
679 right_margin: 8, lower_margin: 4,
683 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
684 lccr3: LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
687 #ifdef LART_VIDEO_OUT
688 static struct sa1100fb_mach_info lart_video_info __initdata = {
689 pixclock: 39721, bpp: 16,
690 xres: 640, yres: 480,
692 hsync_len: 95, vsync_len: 2,
693 left_margin: 40, upper_margin: 32,
694 right_margin: 24, lower_margin: 11,
696 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
698 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
699 lccr3: LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
703 #ifdef LART_KIT01_LCD
704 static struct sa1100fb_mach_info lart_kit01_info __initdata =
706 pixclock: 63291, bpp: 16,
707 xres: 640, yres: 480,
709 hsync_len: 64, vsync_len: 3,
710 left_margin: 122, upper_margin: 45,
711 right_margin: 10, lower_margin: 10,
715 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
716 lccr3: LCCR3_OutEnH | LCCR3_PixFlEdg
720 #ifdef CONFIG_SA1100_OMNIMETER
721 static struct sa1100fb_mach_info omnimeter_info __initdata = {
723 xres: 480, yres: 320,
725 hsync_len: 1, vsync_len: 1,
726 left_margin: 10, upper_margin: 0,
727 right_margin: 10, lower_margin: 0,
730 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
732 lccr0: LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_8PixMono,
733 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(255) |
735 #error FIXME: fix pixclock, ACBsDiv
737 * FIXME: I think ACBsDiv is wrong above - should it be 512 (disabled)?
743 #ifdef CONFIG_SA1100_PANGOLIN
744 static struct sa1100fb_mach_info pangolin_info __initdata = {
745 pixclock: 341521, bpp: 16,
746 xres: 800, yres: 600,
748 hsync_len: 64, vsync_len: 7,
749 left_margin: 160, upper_margin: 7,
750 right_margin: 24, lower_margin: 1,
752 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
754 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
755 lccr3: LCCR3_OutEnH | LCCR3_PixFlEdg,
759 #ifdef CONFIG_SA1100_STORK
760 #if STORK_TFT /* ie the NEC TFT */
762 * pixclock is ps per clock. say 72Hz, 800x600 clocks => (1/72)/(800*600)
764 * NB likely to be increased to ease bus timings wrt pcmcia interface
766 static struct sa1100fb_mach_info stork_tft_info __initdata = {
767 pixclock: 28935, bpp: 16,
768 xres: 640, yres: 480,
770 hsync_len: 64, vsync_len: 2,
771 left_margin: 48, upper_margin: 12,
772 right_margin: 48, lower_margin: 31,
776 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
777 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg,
780 static struct sa1100fb_rgb stork_tft_rgb_16 = {
781 red: { offset: 11, length: 5, },
782 green: { offset: 5, length: 6, },
783 blue: { offset: 0, length: 5, },
784 transp: { offset: 0, length: 0, },
787 #else /* Kyocera DSTN */
789 static struct sa1100fb_mach_info stork_dstn_info __initdata = {
790 pixclock: 0, bpp: 16,
791 xres: 640, yres: 480,
793 hsync_len: 2, vsync_len: 2,
794 left_margin: 2, upper_margin: 0,
795 right_margin: 2, lower_margin: 0,
797 sync: FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT ,
799 lccr0: LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
802 0x18 /* ought to be 0x14 but DMA isn't up to that as yet */
805 static struct sa1100fb_rgb stork_dstn_rgb_16 = {
806 red: { offset: 8, length: 4, },
807 green: { offset: 4, length: 4, },
808 blue: { offset: 0, length: 4, },
809 transp: { offset: 0, length: 0, },
814 #ifdef CONFIG_SA1100_XP860
815 static struct sa1100fb_mach_info xp860_info __initdata = {
817 xres: 1024, yres: 768,
819 hsync_len: 3, vsync_len: 3,
820 left_margin: 3, upper_margin: 2,
821 right_margin: 2, lower_margin: 1,
825 lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
826 lccr3: LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_PixClkDiv(6),
832 static struct sa1100fb_mach_info * __init
833 sa1100fb_get_machine_info(struct sa1100fb_info *fbi)
835 struct sa1100fb_mach_info *inf = NULL;
839 * default {11,5}, { 5,6}, { 0,5}, { 0,0}
840 * h3600 {12,4}, { 7,4}, { 1,4}, { 0,0}
841 * freebird { 8,4}, { 4,4}, { 0,4}, {12,4}
843 #ifdef CONFIG_SA1100_ASSABET
844 if (machine_is_assabet()) {
845 #ifndef ASSABET_PAL_VIDEO
846 inf = &lq039q2ds54_info;
852 #ifdef CONFIG_SA1100_H3600
853 if (machine_is_h3600()) {
855 fbi->rgb[RGB_16] = &h3600_rgb_16;
858 #ifdef CONFIG_SA1100_BRUTUS
859 if (machine_is_brutus()) {
863 #ifdef CONFIG_SA1100_CERF
864 if (machine_is_cerf()) {
868 #ifdef CONFIG_SA1100_FREEBIRD
869 if (machine_is_freebird()) {
870 inf = &freebird_info;
871 fbi->rgb[RGB_16] = &freebird_rgb16;
874 #ifdef CONFIG_SA1100_GRAPHICSCLIENT
875 if (machine_is_graphicsclient()) {
876 inf = &graphicsclient_info;
879 #ifdef CONFIG_SA1100_HUW_WEBPANEL
880 if (machine_is_huw_webpanel()) {
881 inf = &huw_webpanel_info;
884 #ifdef CONFIG_SA1100_LART
885 if (machine_is_lart()) {
887 inf = &lart_grey_info;
889 #ifdef LART_COLOR_LCD
890 inf = &lart_color_info;
892 #ifdef LART_VIDEO_OUT
893 inf = &lart_video_info;
895 #ifdef LART_KIT01_LCD
896 inf = &lart_kit01_info;
900 #ifdef CONFIG_SA1100_OMNIMETER
901 if (machine_is_omnimeter()) {
902 inf = &omnimeter_info;
905 #ifdef CONFIG_SA1100_PANGOLIN
906 if (machine_is_pangolin()) {
907 inf = &pangolin_info;
910 #ifdef CONFIG_SA1100_XP860
911 if (machine_is_xp860()) {
915 #ifdef CONFIG_SA1100_STORK
916 if (machine_is_stork()) {
918 inf = &stork_tft_info;
919 fbi->rgb[RGB_16] = &stork_tft_rgb_16;
921 inf = &stork_dstn_info;
922 fbi->rgb[RGB_16] = &stork_dstn_rgb_16;
929 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *);
930 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state);
932 static inline void sa1100fb_schedule_task(struct sa1100fb_info *fbi, u_int state)
936 local_irq_save(flags);
938 * We need to handle two requests being made at the same time.
939 * There are two important cases:
940 * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
941 * We must perform the unblanking, which will do our REENABLE for us.
942 * 2. When we are blanking, but immediately unblank before we have
943 * blanked. We do the "REENABLE" thing here as well, just to be sure.
945 if (fbi->task_state == C_ENABLE && state == C_REENABLE)
947 if (fbi->task_state == C_DISABLE && state == C_ENABLE)
950 if (state != (u_int)-1) {
951 fbi->task_state = state;
952 schedule_task(&fbi->task);
954 local_irq_restore(flags);
958 * Get the VAR structure pointer for the specified console
960 static inline struct fb_var_screeninfo *get_con_var(struct fb_info *info, int con)
962 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
963 return (con == fbi->currcon || con == -1) ? &fbi->fb.var : &fb_display[con].var;
967 * Get the DISPLAY structure pointer for the specified console
969 static inline struct display *get_con_display(struct fb_info *info, int con)
971 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
972 return (con < 0) ? fbi->fb.disp : &fb_display[con];
976 * Get the CMAP pointer for the specified console
978 static inline struct fb_cmap *get_con_cmap(struct fb_info *info, int con)
980 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
981 return (con == fbi->currcon || con == -1) ? &fbi->fb.cmap : &fb_display[con].cmap;
985 chan_to_field(u_int chan, struct fb_bitfield *bf)
988 chan >>= 16 - bf->length;
989 return chan << bf->offset;
993 * Convert bits-per-pixel to a hardware palette PBS value.
996 palette_pbs(struct fb_var_screeninfo *var)
999 switch (var->bits_per_pixel) {
1000 #ifdef FBCON_HAS_CFB4
1001 case 4: ret = 0 << 12; break;
1003 #ifdef FBCON_HAS_CFB8
1004 case 8: ret = 1 << 12; break;
1006 #ifdef FBCON_HAS_CFB16
1007 case 16: ret = 2 << 12; break;
1014 sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
1015 u_int trans, struct fb_info *info)
1017 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
1020 if (regno < fbi->palette_size) {
1021 val = ((red >> 4) & 0xf00);
1022 val |= ((green >> 8) & 0x0f0);
1023 val |= ((blue >> 12) & 0x00f);
1026 val |= palette_pbs(&fbi->fb.var);
1028 fbi->palette_cpu[regno] = val;
1035 sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1036 u_int trans, struct fb_info *info)
1038 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
1039 struct display *disp = get_con_display(info, fbi->currcon);
1044 * If inverse mode was selected, invert all the colours
1045 * rather than the register number. The register number
1046 * is what you poke into the framebuffer to produce the
1047 * colour you requested.
1049 if (disp->inverse) {
1051 green = 0xffff - green;
1052 blue = 0xffff - blue;
1056 * If greyscale is true, then we convert the RGB value
1057 * to greyscale no mater what visual we are using.
1059 if (fbi->fb.var.grayscale)
1060 red = green = blue = (19595 * red + 38470 * green +
1063 switch (fbi->fb.disp->visual) {
1064 case FB_VISUAL_TRUECOLOR:
1066 * 12 or 16-bit True Colour. We encode the RGB value
1067 * according to the RGB bitfield information.
1070 u16 *pal = fbi->fb.pseudo_palette;
1072 val = chan_to_field(red, &fbi->fb.var.red);
1073 val |= chan_to_field(green, &fbi->fb.var.green);
1074 val |= chan_to_field(blue, &fbi->fb.var.blue);
1081 case FB_VISUAL_STATIC_PSEUDOCOLOR:
1082 case FB_VISUAL_PSEUDOCOLOR:
1083 ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info);
1091 * sa1100fb_display_dma_period()
1092 * Calculate the minimum period (in picoseconds) between two DMA
1093 * requests for the LCD controller.
1096 sa1100fb_display_dma_period(struct fb_var_screeninfo *var)
1098 unsigned int mem_bits_per_pixel;
1100 mem_bits_per_pixel = var->bits_per_pixel;
1101 if (mem_bits_per_pixel == 12)
1102 mem_bits_per_pixel = 16;
1105 * Period = pixclock * bits_per_byte * bytes_per_transfer
1106 * / memory_bits_per_pixel;
1108 return var->pixclock * 8 * 16 / mem_bits_per_pixel;
1112 * sa1100fb_decode_var():
1113 * Get the video params out of 'var'. If a value doesn't fit, round it up,
1114 * if it's too big, return -EINVAL.
1116 * Suggestion: Round up in the following order: bits_per_pixel, xres,
1117 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
1118 * bitfields, horizontal timing, vertical timing.
1121 sa1100fb_validate_var(struct fb_var_screeninfo *var,
1122 struct sa1100fb_info *fbi)
1126 if (var->xres < MIN_XRES)
1127 var->xres = MIN_XRES;
1128 if (var->yres < MIN_YRES)
1129 var->yres = MIN_YRES;
1130 if (var->xres > fbi->max_xres)
1131 var->xres = fbi->max_xres;
1132 if (var->yres > fbi->max_yres)
1133 var->yres = fbi->max_yres;
1135 var->xres_virtual < var->xres ? var->xres : var->xres_virtual;
1137 var->yres_virtual < var->yres ? var->yres : var->yres_virtual;
1139 DPRINTK("var->bits_per_pixel=%d\n", var->bits_per_pixel);
1140 switch (var->bits_per_pixel) {
1141 #ifdef FBCON_HAS_CFB4
1142 case 4: ret = 0; break;
1144 #ifdef FBCON_HAS_CFB8
1145 case 8: ret = 0; break;
1147 #ifdef FBCON_HAS_CFB16
1148 case 16: ret = 0; break;
1154 #ifdef CONFIG_CPU_FREQ
1155 printk(KERN_DEBUG "dma period = %d ps, clock = %d kHz\n",
1156 sa1100fb_display_dma_period(var),
1157 cpufreq_get(smp_processor_id()));
1163 static inline void sa1100fb_set_truecolor(u_int is_true_color)
1165 DPRINTK("true_color = %d\n", is_true_color);
1167 if (machine_is_assabet()) {
1169 // phase 4 or newer Assabet's
1171 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
1173 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
1177 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
1179 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
1185 sa1100fb_hw_set_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
1187 u_long palette_mem_size;
1189 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
1191 palette_mem_size = fbi->palette_size * sizeof(u16);
1193 DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
1195 fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
1196 fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
1198 fb_set_cmap(&fbi->fb.cmap, 1, sa1100fb_setcolreg, &fbi->fb);
1200 /* Set board control register to handle new color depth */
1201 sa1100fb_set_truecolor(var->bits_per_pixel >= 16);
1203 #ifdef CONFIG_SA1100_OMNIMETER
1204 #error Do we have to do this here? We already do it at init time.
1205 if (machine_is_omnimeter())
1206 SetLCDContrast(DefaultLCDContrast);
1209 sa1100fb_activate_var(var, fbi);
1211 fbi->palette_cpu[0] = (fbi->palette_cpu[0] &
1212 0xcfff) | palette_pbs(var);
1217 * sa1100fb_set_var():
1218 * Set the user defined part of the display for the specified console
1221 sa1100fb_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
1223 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
1224 struct fb_var_screeninfo *dvar = get_con_var(&fbi->fb, con);
1225 struct display *display = get_con_display(&fbi->fb, con);
1226 int err, chgvar = 0, rgbidx;
1228 DPRINTK("set_var\n");
1231 * Decode var contents into a par structure, adjusting any
1232 * out of range values.
1234 err = sa1100fb_validate_var(var, fbi);
1238 if (var->activate & FB_ACTIVATE_TEST)
1241 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_NOW)
1244 if (dvar->xres != var->xres)
1246 if (dvar->yres != var->yres)
1248 if (dvar->xres_virtual != var->xres_virtual)
1250 if (dvar->yres_virtual != var->yres_virtual)
1252 if (dvar->bits_per_pixel != var->bits_per_pixel)
1257 switch (var->bits_per_pixel) {
1258 #ifdef FBCON_HAS_CFB4
1260 if (fbi->cmap_static)
1261 display->visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
1263 display->visual = FB_VISUAL_PSEUDOCOLOR;
1264 display->line_length = var->xres / 2;
1265 display->dispsw = &fbcon_cfb4;
1269 #ifdef FBCON_HAS_CFB8
1271 if (fbi->cmap_static)
1272 display->visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
1274 display->visual = FB_VISUAL_PSEUDOCOLOR;
1275 display->line_length = var->xres;
1276 display->dispsw = &fbcon_cfb8;
1280 #ifdef FBCON_HAS_CFB16
1282 display->visual = FB_VISUAL_TRUECOLOR;
1283 display->line_length = var->xres * 2;
1284 display->dispsw = &fbcon_cfb16;
1285 display->dispsw_data = fbi->fb.pseudo_palette;
1291 display->dispsw = &fbcon_dummy;
1295 display->screen_base = fbi->screen_cpu;
1296 display->next_line = display->line_length;
1297 display->type = fbi->fb.fix.type;
1298 display->type_aux = fbi->fb.fix.type_aux;
1299 display->ypanstep = fbi->fb.fix.ypanstep;
1300 display->ywrapstep = fbi->fb.fix.ywrapstep;
1301 display->can_soft_blank = 1;
1302 display->inverse = fbi->cmap_inverse;
1305 dvar->activate &= ~FB_ACTIVATE_ALL;
1308 * Copy the RGB parameters for this display
1309 * from the machine specific parameters.
1311 dvar->red = fbi->rgb[rgbidx]->red;
1312 dvar->green = fbi->rgb[rgbidx]->green;
1313 dvar->blue = fbi->rgb[rgbidx]->blue;
1314 dvar->transp = fbi->rgb[rgbidx]->transp;
1316 DPRINTK("RGBT length = %d:%d:%d:%d\n",
1317 dvar->red.length, dvar->green.length, dvar->blue.length,
1318 dvar->transp.length);
1320 DPRINTK("RGBT offset = %d:%d:%d:%d\n",
1321 dvar->red.offset, dvar->green.offset, dvar->blue.offset,
1322 dvar->transp.offset);
1325 * Update the old var. The fbcon drivers still use this.
1326 * Once they are using fbi->fb.var, this can be dropped.
1328 display->var = *dvar;
1331 * If we are setting all the virtual consoles, also set the
1332 * defaults used to create new consoles.
1334 if (var->activate & FB_ACTIVATE_ALL)
1335 fbi->fb.disp->var = *dvar;
1338 * If the console has changed and the console has defined
1339 * a changevar function, call that function.
1341 if (chgvar && info && fbi->fb.changevar)
1342 fbi->fb.changevar(con);
1344 /* If the current console is selected, activate the new var. */
1345 if (con != fbi->currcon)
1348 sa1100fb_hw_set_var(dvar, fbi);
1354 __do_set_cmap(struct fb_cmap *cmap, int kspc, int con,
1355 struct fb_info *info)
1357 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
1358 struct fb_cmap *dcmap = get_con_cmap(info, con);
1364 /* no colormap allocated? (we always have "this" colour map allocated) */
1366 err = fb_alloc_cmap(&fb_display[con].cmap, fbi->palette_size, 0);
1368 if (!err && con == fbi->currcon)
1369 err = fb_set_cmap(cmap, kspc, sa1100fb_setcolreg, info);
1372 fb_copy_cmap(cmap, dcmap, kspc ? 0 : 1);
1378 sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
1379 struct fb_info *info)
1381 struct display *disp = get_con_display(info, con);
1383 if (disp->visual == FB_VISUAL_TRUECOLOR ||
1384 disp->visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
1387 return __do_set_cmap(cmap, kspc, con, info);
1391 sa1100fb_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
1393 struct display *display = get_con_display(info, con);
1397 fix->line_length = display->line_length;
1398 fix->visual = display->visual;
1403 sa1100fb_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
1405 *var = *get_con_var(info, con);
1410 sa1100fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
1412 struct fb_cmap *dcmap = get_con_cmap(info, con);
1413 fb_copy_cmap(dcmap, cmap, kspc ? 0 : 2);
1417 static struct fb_ops sa1100fb_ops = {
1419 fb_get_fix: sa1100fb_get_fix,
1420 fb_get_var: sa1100fb_get_var,
1421 fb_set_var: sa1100fb_set_var,
1422 fb_get_cmap: sa1100fb_get_cmap,
1423 fb_set_cmap: sa1100fb_set_cmap,
1427 * sa1100fb_switch():
1428 * Change to the specified console. Palette and video mode
1429 * are changed to the console's stored parameters.
1431 * Uh oh, this can be called from a tasklet (IRQ)
1433 static int sa1100fb_switch(int con, struct fb_info *info)
1435 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
1436 struct display *disp;
1437 struct fb_cmap *cmap;
1439 DPRINTK("con=%d info->modename=%s\n", con, fbi->fb.modename);
1441 if (con == fbi->currcon)
1444 if (fbi->currcon >= 0) {
1445 disp = fb_display + fbi->currcon;
1448 * Save the old colormap and video mode.
1450 disp->var = fbi->fb.var;
1453 fb_copy_cmap(&fbi->fb.cmap, &disp->cmap, 0);
1457 disp = fb_display + con;
1460 * Make sure that our colourmap contains 256 entries.
1462 fb_alloc_cmap(&fbi->fb.cmap, 256, 0);
1467 cmap = fb_default_cmap(1 << disp->var.bits_per_pixel);
1469 fb_copy_cmap(cmap, &fbi->fb.cmap, 0);
1471 fbi->fb.var = disp->var;
1472 fbi->fb.var.activate = FB_ACTIVATE_NOW;
1474 sa1100fb_set_var(&fbi->fb.var, con, info);
1479 * Formal definition of the VESA spec:
1481 * This refers to the state of the display when it is in full operation
1483 * This defines an optional operating state of minimal power reduction with
1484 * the shortest recovery time
1486 * This refers to a level of power management in which substantial power
1487 * reduction is achieved by the display. The display can have a longer
1488 * recovery time from this state than from the Stand-by state
1490 * This indicates that the display is consuming the lowest level of power
1491 * and is non-operational. Recovery from this state may optionally require
1492 * the user to manually power on the monitor
1494 * Now, the fbdev driver adds an additional state, (blank), where they
1495 * turn off the video (maybe by colormap tricks), but don't mess with the
1496 * video itself: think of it semantically between on and Stand-By.
1498 * So here's what we should do in our fbdev blank routine:
1500 * VESA_NO_BLANKING (mode 0) Video on, front/back light on
1501 * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
1502 * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
1503 * VESA_POWERDOWN (mode 3) Video off, front/back light off
1505 * This will match the matrox implementation.
1509 * Blank the display by setting all palette values to zero. Note, the
1510 * 12 and 16 bpp modes don't really use the palette, so this will not
1511 * blank the display in all modes.
1513 static void sa1100fb_blank(int blank, struct fb_info *info)
1515 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
1518 DPRINTK("sa1100fb_blank: blank=%d info->modename=%s\n", blank,
1522 case VESA_POWERDOWN:
1523 case VESA_VSYNC_SUSPEND:
1524 case VESA_HSYNC_SUSPEND:
1525 if (fbi->fb.disp->visual == FB_VISUAL_PSEUDOCOLOR ||
1526 fbi->fb.disp->visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
1527 for (i = 0; i < fbi->palette_size; i++)
1528 sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
1529 sa1100fb_schedule_task(fbi, C_DISABLE);
1530 if (sa1100fb_blank_helper)
1531 sa1100fb_blank_helper(blank);
1534 case VESA_NO_BLANKING:
1535 if (sa1100fb_blank_helper)
1536 sa1100fb_blank_helper(blank);
1537 if (fbi->fb.disp->visual == FB_VISUAL_PSEUDOCOLOR ||
1538 fbi->fb.disp->visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
1539 fb_set_cmap(&fbi->fb.cmap, 1, sa1100fb_setcolreg, info);
1540 sa1100fb_schedule_task(fbi, C_ENABLE);
1544 static int sa1100fb_updatevar(int con, struct fb_info *info)
1546 DPRINTK("entered\n");
1551 * Calculate the PCD value from the clock rate (in picoseconds).
1552 * We take account of the PPCR clock setting.
1554 static inline int get_pcd(unsigned int pixclock)
1559 pcd = get_cclk_frequency() * pixclock;
1561 pcd += 1; /* make up for integer math truncations */
1564 * People seem to be missing this message. Make it big.
1565 * Make it stand out. Make sure people see it.
1567 printk(KERN_WARNING "******************************************************\n");
1568 printk(KERN_WARNING "** ZERO PIXEL CLOCK DETECTED **\n");
1569 printk(KERN_WARNING "** You are using a zero pixclock. This means that **\n");
1570 printk(KERN_WARNING "** clock scaling will not be able to adjust your **\n");
1571 printk(KERN_WARNING "** your timing parameters appropriately, and the **\n");
1572 printk(KERN_WARNING "** bandwidth calculations will fail to work. This **\n");
1573 printk(KERN_WARNING "** will shortly become an error condition, which **\n");
1574 printk(KERN_WARNING "** will prevent your LCD display working. Please **\n");
1575 printk(KERN_WARNING "** send your patches in as soon as possible to shut **\n");
1576 printk(KERN_WARNING "** this message up. **\n");
1577 printk(KERN_WARNING "******************************************************\n");
1584 * sa1100fb_activate_var():
1585 * Configures LCD Controller based on entries in var parameter. Settings are
1586 * only written to the controller if changes were made.
1588 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
1590 struct sa1100fb_lcd_reg new_regs;
1591 u_int half_screen_size, yres, pcd = get_pcd(var->pixclock);
1594 DPRINTK("Configuring SA1100 LCD\n");
1596 DPRINTK("var: xres=%d hslen=%d lm=%d rm=%d\n",
1597 var->xres, var->hsync_len,
1598 var->left_margin, var->right_margin);
1599 DPRINTK("var: yres=%d vslen=%d um=%d bm=%d\n",
1600 var->yres, var->vsync_len,
1601 var->upper_margin, var->lower_margin);
1604 if (var->xres < 16 || var->xres > 1024)
1605 printk(KERN_ERR "%s: invalid xres %d\n",
1606 fbi->fb.fix.id, var->xres);
1607 if (var->hsync_len < 1 || var->hsync_len > 64)
1608 printk(KERN_ERR "%s: invalid hsync_len %d\n",
1609 fbi->fb.fix.id, var->hsync_len);
1610 if (var->left_margin < 1 || var->left_margin > 255)
1611 printk(KERN_ERR "%s: invalid left_margin %d\n",
1612 fbi->fb.fix.id, var->left_margin);
1613 if (var->right_margin < 1 || var->right_margin > 255)
1614 printk(KERN_ERR "%s: invalid right_margin %d\n",
1615 fbi->fb.fix.id, var->right_margin);
1616 if (var->yres < 1 || var->yres > 1024)
1617 printk(KERN_ERR "%s: invalid yres %d\n",
1618 fbi->fb.fix.id, var->yres);
1619 if (var->vsync_len < 1 || var->vsync_len > 64)
1620 printk(KERN_ERR "%s: invalid vsync_len %d\n",
1621 fbi->fb.fix.id, var->vsync_len);
1622 if (var->upper_margin < 0 || var->upper_margin > 255)
1623 printk(KERN_ERR "%s: invalid upper_margin %d\n",
1624 fbi->fb.fix.id, var->upper_margin);
1625 if (var->lower_margin < 0 || var->lower_margin > 255)
1626 printk(KERN_ERR "%s: invalid lower_margin %d\n",
1627 fbi->fb.fix.id, var->lower_margin);
1630 new_regs.lccr0 = fbi->lccr0 |
1631 LCCR0_LEN | LCCR0_LDM | LCCR0_BAM |
1632 LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0);
1635 LCCR1_DisWdth(var->xres) +
1636 LCCR1_HorSnchWdth(var->hsync_len) +
1637 LCCR1_BegLnDel(var->left_margin) +
1638 LCCR1_EndLnDel(var->right_margin);
1641 * If we have a dual scan LCD, then we need to halve
1642 * the YRES parameter.
1645 if (fbi->lccr0 & LCCR0_Dual)
1649 LCCR2_DisHght(yres) +
1650 LCCR2_VrtSnchWdth(var->vsync_len) +
1651 LCCR2_BegFrmDel(var->upper_margin) +
1652 LCCR2_EndFrmDel(var->lower_margin);
1654 new_regs.lccr3 = fbi->lccr3 |
1655 (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
1656 (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL) |
1660 new_regs.lccr3 |= LCCR3_PixClkDiv(pcd);
1662 sa1100fb_check_shadow(&new_regs, var, pcd);
1664 DPRINTK("nlccr0 = 0x%08x\n", new_regs.lccr0);
1665 DPRINTK("nlccr1 = 0x%08x\n", new_regs.lccr1);
1666 DPRINTK("nlccr2 = 0x%08x\n", new_regs.lccr2);
1667 DPRINTK("nlccr3 = 0x%08x\n", new_regs.lccr3);
1669 half_screen_size = var->bits_per_pixel;
1670 half_screen_size = half_screen_size * var->xres * var->yres / 16;
1672 /* Update shadow copy atomically */
1673 local_irq_save(flags);
1674 fbi->dbar1 = fbi->palette_dma;
1675 fbi->dbar2 = fbi->screen_dma + half_screen_size;
1677 fbi->reg_lccr0 = new_regs.lccr0;
1678 fbi->reg_lccr1 = new_regs.lccr1;
1679 fbi->reg_lccr2 = new_regs.lccr2;
1680 fbi->reg_lccr3 = new_regs.lccr3;
1681 local_irq_restore(flags);
1684 * Only update the registers if the controller is enabled
1685 * and something has changed.
1687 if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) ||
1688 (LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) ||
1689 (DBAR1 != fbi->dbar1) || (DBAR2 != fbi->dbar2))
1690 sa1100fb_schedule_task(fbi, C_REENABLE);
1696 * NOTE! The following functions are purely helpers for set_ctrlr_state.
1697 * Do not call them directly; set_ctrlr_state does the correct serialisation
1698 * to ensure that things happen in the right way 100% of time time.
1703 * FIXME: move LCD power stuff into sa1100fb_power_up_lcd()
1704 * Also, I'm expecting that the backlight stuff should
1705 * be handled differently.
1707 static void sa1100fb_backlight_on(struct sa1100fb_info *fbi)
1709 DPRINTK("backlight on\n");
1711 #ifdef CONFIG_SA1100_FREEBIRD
1713 if (machine_is_freebird()) {
1714 BCR_set(BCR_FREEBIRD_LCD_PWR | BCR_FREEBIRD_LCD_DISP);
1717 #ifdef CONFIG_SA1100_FREEBIRD
1718 if (machine_is_freebird()) {
1719 /* Turn on backlight ,Chester */
1720 BCR_set(BCR_FREEBIRD_LCD_BACKLIGHT);
1723 #ifdef CONFIG_SA1100_HUW_WEBPANEL
1725 if (machine_is_huw_webpanel()) {
1726 BCR_set(BCR_CCFL_POW + BCR_PWM_BACKLIGHT);
1727 set_current_state(TASK_UNINTERRUPTIBLE);
1728 schedule_task(200 * HZ / 1000);
1729 BCR_set(BCR_TFT_ENA);
1732 #ifdef CONFIG_SA1100_OMNIMETER
1733 if (machine_is_omnimeter())
1739 * FIXME: move LCD power stuf into sa1100fb_power_down_lcd()
1740 * Also, I'm expecting that the backlight stuff should
1741 * be handled differently.
1743 static void sa1100fb_backlight_off(struct sa1100fb_info *fbi)
1745 DPRINTK("backlight off\n");
1747 #ifdef CONFIG_SA1100_FREEBIRD
1749 if (machine_is_freebird()) {
1750 BCR_clear(BCR_FREEBIRD_LCD_PWR | BCR_FREEBIRD_LCD_DISP
1751 /*| BCR_FREEBIRD_LCD_BACKLIGHT */ );
1754 #ifdef CONFIG_SA1100_OMNIMETER
1755 if (machine_is_omnimeter())
1760 static void sa1100fb_power_up_lcd(struct sa1100fb_info *fbi)
1762 DPRINTK("LCD power on\n");
1764 #ifndef ASSABET_PAL_VIDEO
1765 if (machine_is_assabet())
1766 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
1768 #ifdef CONFIG_SA1100_HUW_WEBPANEL
1769 if (machine_is_huw_webpanel())
1770 BCR_clear(BCR_TFT_NPWR);
1772 #ifdef CONFIG_SA1100_OMNIMETER
1773 if (machine_is_omnimeter())
1776 #ifdef CONFIG_SA1100_H3600
1777 if (machine_is_h3600()) {
1778 set_h3600_egpio(EGPIO_H3600_LCD_ON |
1779 EGPIO_H3600_LCD_PCI |
1780 EGPIO_H3600_LCD_5V_ON |
1781 EGPIO_H3600_LVDD_ON);
1784 #ifdef CONFIG_SA1100_STORK
1785 if (machine_is_stork()) {
1786 storkSetLCDCPLD(0, 1);
1787 storkSetLatchA(STORK_LCD_BACKLIGHT_INVERTER_ON);
1792 static void sa1100fb_power_down_lcd(struct sa1100fb_info *fbi)
1794 DPRINTK("LCD power off\n");
1796 #ifndef ASSABET_PAL_VIDEO
1797 if (machine_is_assabet())
1798 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
1800 #ifdef CONFIG_SA1100_HUW_WEBPANEL
1801 // dont forget to set the control lines to zero (?)
1802 if (machine_is_huw_webpanel())
1803 BCR_set(BCR_TFT_NPWR);
1805 #ifdef CONFIG_SA1100_H3600
1806 if (machine_is_h3600()) {
1807 clr_h3600_egpio(EGPIO_H3600_LCD_ON |
1808 EGPIO_H3600_LCD_PCI |
1809 EGPIO_H3600_LCD_5V_ON |
1810 EGPIO_H3600_LVDD_ON);
1813 #ifdef CONFIG_SA1100_STORK
1814 if (machine_is_stork()) {
1815 storkSetLCDCPLD(0, 0);
1816 storkClearLatchA(STORK_LCD_BACKLIGHT_INVERTER_ON);
1821 static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi)
1826 * Enable GPIO<9:2> for LCD use if:
1827 * 1. Active display, or
1828 * 2. Color Dual Passive display
1830 * see table 11.8 on page 11-27 in the SA1100 manual
1833 * SA1110 spec update nr. 25 says we can and should
1834 * clear LDD15 to 12 for 4 or 8bpp modes with active
1837 if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color &&
1838 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) {
1839 mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
1841 if (fbi->fb.var.bits_per_pixel > 8 ||
1842 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual)
1843 mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12;
1847 #ifdef CONFIG_SA1100_FREEBIRD
1848 #error Please contact <rmk@arm.linux.org.uk> about this
1849 if (machine_is_freebird()) {
1850 /* Color single passive */
1851 mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
1852 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
1855 if (machine_is_cerf()) {
1856 /* GPIO15 is used as a bypass for 3.8" displays */
1857 mask |= GPIO_GPIO15;
1858 #ifdef CONFIG_SA1100_CERF
1859 #warning Read Me Now!
1861 #if 0 /* if this causes you problems, mail <rmk@arm.linux.org.uk> please. */
1863 * This was enabled for the 72_A version only, which is a _color_
1864 * _dual_ LCD. Now look at the generic test above, and calculate
1865 * the mask value for a colour dual display...
1867 * I therefore conclude that the code below is redundant, and will
1868 * be killed at the start of November 2001.
1870 /* FIXME: why is this? The Cerf's display doesn't seem
1871 * to be dual scan or active. I just leave it here,
1872 * but in my opinion this is definitively wrong.
1873 * -- Erik <J.A.K.Mouw@its.tudelft.nl>
1876 /* REPLY: Umm.. Well to be honest, the 5.7" LCD which
1877 * this was used for does not use these pins, but
1878 * apparently all hell breaks loose if they are not
1879 * set on the Cerf, so we decided to leave them in ;)
1880 * -- Daniel Chemko <dchemko@intrinsyc.com>
1882 /* color {dual/single} passive */
1883 mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
1884 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
1894 static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
1896 DPRINTK("Enabling LCD controller\n");
1899 * Make sure the mode bits are present in the first palette entry
1901 fbi->palette_cpu[0] &= 0xcfff;
1902 fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
1904 /* Sequence from 11.7.10 */
1905 LCCR3 = fbi->reg_lccr3;
1906 LCCR2 = fbi->reg_lccr2;
1907 LCCR1 = fbi->reg_lccr1;
1908 LCCR0 = fbi->reg_lccr0 & ~LCCR0_LEN;
1913 #ifdef CONFIG_SA1100_GRAPHICSCLIENT
1914 #error Where is GPIO24 set as an output? Can we fit this in somewhere else?
1915 if (machine_is_graphicsclient()) {
1916 // From ADS doc again...same as disable
1917 set_current_state(TASK_UNINTERRUPTIBLE);
1918 schedule_timeout(20 * HZ / 1000);
1919 GPSR |= GPIO_GPIO24;
1923 DPRINTK("DBAR1 = %p\n", DBAR1);
1924 DPRINTK("DBAR2 = %p\n", DBAR2);
1925 DPRINTK("LCCR0 = 0x%08x\n", LCCR0);
1926 DPRINTK("LCCR1 = 0x%08x\n", LCCR1);
1927 DPRINTK("LCCR2 = 0x%08x\n", LCCR2);
1928 DPRINTK("LCCR3 = 0x%08x\n", LCCR3);
1931 static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
1933 DECLARE_WAITQUEUE(wait, current);
1935 DPRINTK("Disabling LCD controller\n");
1937 #ifdef CONFIG_SA1100_GRAPHICSCLIENT
1938 #error Where is GPIO24 set as an output? Can we fit this in somewhere else?
1939 if (machine_is_graphicsclient()) {
1941 * From ADS internal document:
1942 * GPIO24 should be LOW at least 10msec prior to disabling
1943 * the LCD interface.
1945 * We'll wait 20msec.
1947 GPCR |= GPIO_GPIO24;
1948 set_current_state(TASK_UNINTERRUPTIBLE);
1949 schedule_timeout(20 * HZ / 1000);
1952 #ifdef CONFIG_SA1100_HUW_WEBPANEL
1953 #error Move me into sa1100fb_power_up_lcd and/or sa1100fb_backlight_on
1954 if (machine_is_huw_webpanel()) {
1955 // dont forget to set the control lines to zero (?)
1956 DPRINTK("ShutDown HuW LCD controller\n");
1957 BCR_clear(BCR_TFT_ENA + BCR_CCFL_POW + BCR_PWM_BACKLIGHT);
1961 add_wait_queue(&fbi->ctrlr_wait, &wait);
1962 set_current_state(TASK_UNINTERRUPTIBLE);
1964 LCSR = 0xffffffff; /* Clear LCD Status Register */
1965 LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
1966 enable_irq(IRQ_LCD); /* Enable LCD IRQ */
1967 LCCR0 &= ~LCCR0_LEN; /* Disable LCD Controller */
1969 schedule_timeout(20 * HZ / 1000);
1970 current->state = TASK_RUNNING;
1971 remove_wait_queue(&fbi->ctrlr_wait, &wait);
1975 * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts.
1977 static void sa1100fb_handle_irq(int irq, void *dev_id, struct pt_regs *regs)
1979 struct sa1100fb_info *fbi = dev_id;
1980 unsigned int lcsr = LCSR;
1982 if (lcsr & LCSR_LDD) {
1984 wake_up(&fbi->ctrlr_wait);
1991 * This function must be called from task context only, since it will
1992 * sleep when disabling the LCD controller, or if we get two contending
1993 * processes trying to alter state.
1995 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state)
1999 down(&fbi->ctrlr_sem);
2001 old_state = fbi->state;
2004 case C_DISABLE_CLKCHANGE:
2006 * Disable controller for clock change. If the
2007 * controller is already disabled, then do nothing.
2009 if (old_state != C_DISABLE) {
2011 sa1100fb_disable_controller(fbi);
2017 * Disable controller
2019 if (old_state != C_DISABLE) {
2022 sa1100fb_backlight_off(fbi);
2023 if (old_state != C_DISABLE_CLKCHANGE)
2024 sa1100fb_disable_controller(fbi);
2025 sa1100fb_power_down_lcd(fbi);
2029 case C_ENABLE_CLKCHANGE:
2031 * Enable the controller after clock change. Only
2032 * do this if we were disabled for the clock change.
2034 if (old_state == C_DISABLE_CLKCHANGE) {
2035 fbi->state = C_ENABLE;
2036 sa1100fb_enable_controller(fbi);
2042 * Re-enable the controller only if it was already
2043 * enabled. This is so we reprogram the control
2046 if (old_state == C_ENABLE) {
2047 sa1100fb_disable_controller(fbi);
2048 sa1100fb_setup_gpio(fbi);
2049 sa1100fb_enable_controller(fbi);
2055 * Power up the LCD screen, enable controller, and
2056 * turn on the backlight.
2058 if (old_state != C_ENABLE) {
2059 fbi->state = C_ENABLE;
2060 sa1100fb_setup_gpio(fbi);
2061 sa1100fb_power_up_lcd(fbi);
2062 sa1100fb_enable_controller(fbi);
2063 sa1100fb_backlight_on(fbi);
2067 up(&fbi->ctrlr_sem);
2071 * Our LCD controller task (which is called when we blank or unblank)
2074 static void sa1100fb_task(void *dummy)
2076 struct sa1100fb_info *fbi = dummy;
2077 u_int state = xchg(&fbi->task_state, -1);
2079 set_ctrlr_state(fbi, state);
2082 #ifdef CONFIG_CPU_FREQ
2084 * Calculate the minimum DMA period over all displays that we own.
2085 * This, together with the SDRAM bandwidth defines the slowest CPU
2086 * frequency that can be selected.
2088 static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi)
2090 unsigned int min_period = (unsigned int)-1;
2093 for (i = 0; i < MAX_NR_CONSOLES; i++) {
2094 unsigned int period;
2097 * Do we own this display?
2099 if (fb_display[i].fb_info != &fbi->fb)
2103 * Ok, calculate its DMA period
2105 period = sa1100fb_display_dma_period(get_con_var(&fbi->fb, i));
2106 if (period < min_period)
2107 min_period = period;
2114 * CPU clock speed change handler. We need to adjust the LCD timing
2115 * parameters when the CPU clock is adjusted by the power management
2119 sa1100fb_clkchg_notifier(struct notifier_block *nb, unsigned long val,
2122 struct sa1100fb_info *fbi = TO_INF(nb, clockchg);
2123 struct cpufreq_minmax *mm = data;
2127 case CPUFREQ_MINMAX:
2128 printk(KERN_DEBUG "min dma period: %d ps, old clock %d kHz, "
2129 "new clock %d kHz\n", sa1100fb_min_dma_period(fbi),
2130 mm->cur_freq, mm->new_freq);
2131 /* todo: fill in min/max values */
2134 case CPUFREQ_PRECHANGE:
2135 set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
2138 case CPUFREQ_POSTCHANGE:
2139 pcd = get_pcd(fbi->fb.var.pixclock);
2140 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
2141 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
2150 * Power management hook. Note that we won't be called from IRQ context,
2151 * unlike the blank functions above, so we may sleep.
2154 sa1100fb_pm_callback(struct pm_dev *pm_dev, pm_request_t req, void *data)
2156 struct sa1100fb_info *fbi = pm_dev->data;
2158 DPRINTK("pm_callback: %d\n", req);
2160 if (req == PM_SUSPEND || req == PM_RESUME) {
2161 int state = (int)data;
2165 set_ctrlr_state(fbi, C_ENABLE);
2167 /* Enter D1-D3. Disable the LCD controller. */
2168 set_ctrlr_state(fbi, C_DISABLE);
2177 * sa1100fb_map_video_memory():
2178 * Allocates the DRAM memory for the frame buffer. This buffer is
2179 * remapped into a non-cached, non-buffered, memory region to
2180 * allow palette and pixel writes to occur without flushing the
2181 * cache. Once this area is remapped, all virtual memory
2182 * access to the video memory should occur at the new region.
2184 static int __init sa1100fb_map_video_memory(struct sa1100fb_info *fbi)
2187 * We reserve one page for the palette, plus the size
2188 * of the framebuffer.
2190 fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
2191 fbi->map_cpu = consistent_alloc(GFP_KERNEL, fbi->map_size,
2195 fbi->screen_cpu = fbi->map_cpu + PAGE_SIZE;
2196 fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
2197 fbi->fb.fix.smem_start = fbi->screen_dma;
2200 return fbi->map_cpu ? 0 : -ENOMEM;
2203 /* Fake monspecs to fill in fbinfo structure */
2204 static struct fb_monspecs monspecs __initdata = {
2205 30000, 70000, 50, 65, 0 /* Generic */
2209 static struct sa1100fb_info * __init sa1100fb_init_fbinfo(void)
2211 struct sa1100fb_mach_info *inf;
2212 struct sa1100fb_info *fbi;
2214 fbi = kmalloc(sizeof(struct sa1100fb_info) + sizeof(struct display) +
2215 sizeof(u16) * 16, GFP_KERNEL);
2219 memset(fbi, 0, sizeof(struct sa1100fb_info) + sizeof(struct display));
2223 strcpy(fbi->fb.fix.id, SA1100_NAME);
2225 fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
2226 fbi->fb.fix.type_aux = 0;
2227 fbi->fb.fix.xpanstep = 0;
2228 fbi->fb.fix.ypanstep = 0;
2229 fbi->fb.fix.ywrapstep = 0;
2230 fbi->fb.fix.accel = FB_ACCEL_NONE;
2232 fbi->fb.var.nonstd = 0;
2233 fbi->fb.var.activate = FB_ACTIVATE_NOW;
2234 fbi->fb.var.height = -1;
2235 fbi->fb.var.width = -1;
2236 fbi->fb.var.accel_flags = 0;
2237 fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;
2239 strcpy(fbi->fb.modename, SA1100_NAME);
2240 strcpy(fbi->fb.fontname, "Acorn8x8");
2242 fbi->fb.fbops = &sa1100fb_ops;
2243 fbi->fb.changevar = NULL;
2244 fbi->fb.switch_con = sa1100fb_switch;
2245 fbi->fb.updatevar = sa1100fb_updatevar;
2246 fbi->fb.blank = sa1100fb_blank;
2247 fbi->fb.flags = FBINFO_FLAG_DEFAULT;
2249 fbi->fb.monspecs = monspecs;
2250 fbi->fb.disp = (struct display *)(fbi + 1);
2251 fbi->fb.pseudo_palette = (void *)(fbi->fb.disp + 1);
2253 fbi->rgb[RGB_8] = &rgb_8;
2254 fbi->rgb[RGB_16] = &def_rgb_16;
2256 inf = sa1100fb_get_machine_info(fbi);
2258 fbi->max_xres = inf->xres;
2259 fbi->fb.var.xres = inf->xres;
2260 fbi->fb.var.xres_virtual = inf->xres;
2261 fbi->max_yres = inf->yres;
2262 fbi->fb.var.yres = inf->yres;
2263 fbi->fb.var.yres_virtual = inf->yres;
2264 fbi->max_bpp = inf->bpp;
2265 fbi->fb.var.bits_per_pixel = inf->bpp;
2266 fbi->fb.var.pixclock = inf->pixclock;
2267 fbi->fb.var.hsync_len = inf->hsync_len;
2268 fbi->fb.var.left_margin = inf->left_margin;
2269 fbi->fb.var.right_margin = inf->right_margin;
2270 fbi->fb.var.vsync_len = inf->vsync_len;
2271 fbi->fb.var.upper_margin = inf->upper_margin;
2272 fbi->fb.var.lower_margin = inf->lower_margin;
2273 fbi->fb.var.sync = inf->sync;
2274 fbi->fb.var.grayscale = inf->cmap_greyscale;
2275 fbi->cmap_inverse = inf->cmap_inverse;
2276 fbi->cmap_static = inf->cmap_static;
2277 fbi->lccr0 = inf->lccr0;
2278 fbi->lccr3 = inf->lccr3;
2279 fbi->state = C_DISABLE;
2280 fbi->task_state = (u_char)-1;
2281 fbi->fb.fix.smem_len = fbi->max_xres * fbi->max_yres *
2284 init_waitqueue_head(&fbi->ctrlr_wait);
2285 INIT_TQUEUE(&fbi->task, sa1100fb_task, fbi);
2286 init_MUTEX(&fbi->ctrlr_sem);
2291 int __init sa1100fb_init(void)
2293 struct sa1100fb_info *fbi;
2296 fbi = sa1100fb_init_fbinfo();
2301 /* Initialize video memory */
2302 ret = sa1100fb_map_video_memory(fbi);
2306 ret = request_irq(IRQ_LCD, sa1100fb_handle_irq, SA_INTERRUPT,
2307 fbi->fb.fix.id, fbi);
2309 printk(KERN_ERR "sa1100fb: request_irq failed: %d\n", ret);
2313 #ifdef ASSABET_PAL_VIDEO
2314 if (machine_is_assabet())
2315 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
2318 #ifdef CONFIG_SA1100_FREEBIRD
2319 #error Please move this into sa1100fb_power_up_lcd
2320 if (machine_is_freebird()) {
2321 BCR_set(BCR_FREEBIRD_LCD_DISP);
2323 BCR_set(BCR_FREEBIRD_LCD_PWR);
2328 sa1100fb_set_var(&fbi->fb.var, -1, &fbi->fb);
2330 ret = register_framebuffer(&fbi->fb);
2336 * Note that the console registers this as well, but we want to
2337 * power down the display prior to sleeping.
2339 fbi->pm = pm_register(PM_SYS_DEV, PM_SYS_VGA, sa1100fb_pm_callback);
2341 fbi->pm->data = fbi;
2343 #ifdef CONFIG_CPU_FREQ
2344 fbi->clockchg.notifier_call = sa1100fb_clkchg_notifier;
2345 cpufreq_register_notifier(&fbi->clockchg);
2349 * Ok, now enable the LCD controller
2351 set_ctrlr_state(fbi, C_ENABLE);
2353 /* This driver cannot be unloaded at the moment */
2364 int __init sa1100fb_setup(char *options)
2369 if (!options || !*options)
2372 while ((this_opt = strsep(&options, ",")) != NULL) {
2374 if (!strncmp(this_opt, "bpp:", 4))
2375 current_par.max_bpp =
2376 simple_strtoul(this_opt + 4, NULL, 0);
2378 if (!strncmp(this_opt, "lccr0:", 6))
2380 simple_strtoul(this_opt + 6, NULL, 0);
2381 if (!strncmp(this_opt, "lccr1:", 6)) {
2383 simple_strtoul(this_opt + 6, NULL, 0);
2384 current_par.max_xres =
2385 (lcd_shadow.lccr1 & 0x3ff) + 16;
2387 if (!strncmp(this_opt, "lccr2:", 6)) {
2389 simple_strtoul(this_opt + 6, NULL, 0);
2390 current_par.max_yres =
2392 lccr0 & LCCR0_SDS) ? ((lcd_shadow.
2395 2 : ((lcd_shadow.lccr2 & 0x3ff) + 1);
2397 if (!strncmp(this_opt, "lccr3:", 6))
2399 simple_strtoul(this_opt + 6, NULL, 0);
2405 MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver");
2406 MODULE_LICENSE("GPL");