3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
7 * Copyright (C) 2001-2002 Silicon Graphics, Inc. All rights reserved.
11 #ifndef _ASM_IA64_SN_SN_PIO_WRITE_SYNC_H
12 #define _ASM_IA64_SN_SN_PIO_WRITE_SYNC_H
14 #include <linux/config.h>
15 #ifdef CONFIG_IA64_SGI_SN2
16 #include <asm/sn/sn_cpuid.h>
17 #include <asm/sn/sn2/addrs.h>
18 #include <asm/sn/sn2/shub_mmr.h>
19 #include <asm/sn/sn2/shub_mmr_t.h>
22 * This macro flushes all outstanding PIOs performed by this cpu to the
23 * intended destination SHUB. This in essence ensures that all PIO's
24 * issues by this cpu has landed at it's destination.
26 * This macro expects the caller:
27 * 1. The thread is locked.
28 * 2. All prior PIO operations has been fenced with __ia64_mf_a().
30 * The expectation is that get_slice() will return either 0 or 2.
31 * When we have multi-core cpu's, the expectation is get_slice() will
32 * return either 0,1 or 2,3.
35 #define SN_PIO_WRITE_SYNC \
37 volatile unsigned long sn_pio_writes_done; \
39 sn_pio_writes_done = (volatile unsigned long) (SH_PIO_WRITE_STATUS_0_WRITES_OK_MASK & HUB_L( (unsigned long *)GLOBAL_MMR_ADDR(get_nasid(), (get_slice() < 2) ? SH_PIO_WRITE_STATUS_0 : SH_PIO_WRITE_STATUS_1 ))); \
40 } while (!sn_pio_writes_done); \
46 * For all ARCHITECTURE type, this is a NOOP.
49 #define SN_PIO_WRITE_SYNC
53 #endif /* _ASM_IA64_SN_SN_PIO_WRITE_SYNC_H */