2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1999 by Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 #include <linux/config.h>
13 * This assumes you have a 1.8432 MHz clock for your UART.
15 * It'd be nice if someone built a serial card with a 24.576 MHz
16 * clock, since the 16550A is capable of handling a top speed of 1.5
17 * megabits/second; but this requires the faster clock.
19 #define BASE_BAUD ( 1843200 / 16 )
21 #ifndef CONFIG_OLIVETTI_M700
22 /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
23 exactly which ones ... XXX */
24 #define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
26 /* but the M700 isn't such a strange beast */
27 #define JAZZ_BASE_BAUD BASE_BAUD
30 /* Standard COM flags (except for COM4, because of the 8514 problem) */
31 #ifdef CONFIG_SERIAL_DETECT_IRQ
32 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
33 #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
35 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
36 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
39 #ifdef CONFIG_SERIAL_MANY_PORTS
40 #define FOURPORT_FLAGS ASYNC_FOURPORT
41 #define ACCENT_FLAGS 0
44 #define RS_TABLE_SIZE 64
50 * The following define the access methods for the HUB6 card. All
51 * access is through two ports for all 24 possible chips. The card is
52 * selected through the high 2 bits, the port on that card with the
53 * "middle" 3 bits, and the register on that port with the bottom
56 * While the access port and interrupt is configurable, the default
57 * port locations are 0x302 for the port control register, and 0x303
58 * for the data read/write register. Normally, the interrupt is at irq3
59 * but can be anything from 3 to 7 inclusive. Note that using 3 will
60 * require disabling com2.
63 #define C_P(card,port) (((card)<<6|(port)<<3) + 1)
65 #ifdef CONFIG_MIPS_JAZZ
66 #define _JAZZ_SERIAL_INIT(int, base) \
67 { baud_base: JAZZ_BASE_BAUD, irq: int, flags: STD_COM_FLAGS, \
68 iomem_base: (u8 *) base, iomem_reg_shift: 0, \
69 io_type: SERIAL_IO_MEM }
70 #define JAZZ_SERIAL_PORT_DEFNS \
71 _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
72 _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
74 #define JAZZ_SERIAL_PORT_DEFNS
77 #ifdef CONFIG_MIPS_ATLAS
78 #include <asm/mips-boards/atlas.h>
79 #include <asm/mips-boards/atlasint.h>
80 #define ATLAS_SERIAL_PORT_DEFNS \
81 /* UART CLK PORT IRQ FLAGS */ \
82 { 0, ATLAS_BASE_BAUD, ATLAS_UART_REGS_BASE, ATLASINT_UART, STD_COM_FLAGS }, /* ttyS0 */
84 #define ATLAS_SERIAL_PORT_DEFNS
87 #ifdef CONFIG_MIPS_SEAD
88 #include <asm/mips-boards/sead.h>
89 #include <asm/mips-boards/seadint.h>
90 #define SEAD_SERIAL_PORT_DEFNS \
91 /* UART CLK PORT IRQ FLAGS */ \
92 { 0, SEAD_BASE_BAUD, SEAD_UART0_REGS_BASE, SEADINT_UART0, STD_COM_FLAGS }, /* ttyS0 */
94 #define SEAD_SERIAL_PORT_DEFNS
97 #ifdef CONFIG_MIPS_COBALT
98 #include <asm/cobalt/cobalt.h>
99 #define COBALT_BASE_BAUD (18432000 / 16)
100 #define COBALT_SERIAL_PORT_DEFNS \
101 /* UART CLK PORT IRQ FLAGS */ \
102 { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS }, /* ttyS0 */
104 #define COBALT_SERIAL_PORT_DEFNS
108 * Both Galileo boards have the same UART mappings.
110 #if defined (CONFIG_MIPS_EV96100) || defined (CONFIG_MIPS_EV64120)
111 #include <asm/galileo-boards/ev96100.h>
112 #include <asm/galileo-boards/ev96100int.h>
113 #define EV96100_SERIAL_PORT_DEFNS \
114 { baud_base: EV96100_BASE_BAUD, irq: EV96100INT_UART_0, \
115 flags: STD_COM_FLAGS, \
116 iomem_base: EV96100_UART0_REGS_BASE, iomem_reg_shift: 2, \
117 io_type: SERIAL_IO_MEM }, \
118 { baud_base: EV96100_BASE_BAUD, irq: EV96100INT_UART_0, \
119 flags: STD_COM_FLAGS, \
120 iomem_base: EV96100_UART1_REGS_BASE, iomem_reg_shift: 2, \
121 io_type: SERIAL_IO_MEM },
123 #define EV96100_SERIAL_PORT_DEFNS
126 #ifdef CONFIG_MIPS_ITE8172
127 #include <asm/it8172/it8172.h>
128 #include <asm/it8172/it8172_int.h>
129 #include <asm/it8712.h>
130 #define ITE_SERIAL_PORT_DEFNS \
131 { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_UART_BASE), \
132 irq: IT8172_UART_IRQ, flags: STD_COM_FLAGS, type: 0x3 }, \
133 { baud_base: (24000000/(16*13)), port: (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
134 irq: IT8172_SERIRQ_4, flags: STD_COM_FLAGS, type: 0x3 }, \
135 /* Smart Card Reader 0 */ \
136 { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
137 irq: IT8172_SCR0_IRQ, flags: STD_COM_FLAGS, type: 0x3 }, \
138 /* Smart Card Reader 1 */ \
139 { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
140 irq: IT8172_SCR1_IRQ, flags: STD_COM_FLAGS, type: 0x3 },
142 #define ITE_SERIAL_PORT_DEFNS
145 #ifdef CONFIG_MIPS_IVR
146 #include <asm/it8172/it8172.h>
147 #include <asm/it8172/it8172_int.h>
148 #define IVR_SERIAL_PORT_DEFNS \
149 { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_UART_BASE), \
150 irq: IT8172_UART_IRQ, flags: STD_COM_FLAGS, type: 0x3 }, \
151 /* Smart Card Reader 1 */ \
152 { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
153 irq: IT8172_SCR1_IRQ, flags: STD_COM_FLAGS, type: 0x3 },
155 #define IVR_SERIAL_PORT_DEFNS
158 #ifdef CONFIG_AU1000_UART
159 #include <asm/au1000.h>
160 #define AU1000_SERIAL_PORT_DEFNS \
161 { baud_base: 0, port: UART0_ADDR, irq: AU1000_UART0_INT, \
162 flags: STD_COM_FLAGS, type: 1 }, \
163 { baud_base: 0, port: UART1_ADDR, irq: AU1000_UART1_INT, \
164 flags: STD_COM_FLAGS, type: 1 }, \
165 { baud_base: 0, port: UART2_ADDR, irq: AU1000_UART2_INT, \
166 flags: STD_COM_FLAGS, type: 1 }, \
167 { baud_base: 0, port: UART3_ADDR, irq: AU1000_UART3_INT, \
168 flags: STD_COM_FLAGS, type: 1 },
170 #define AU1000_SERIAL_PORT_DEFNS
173 #ifdef CONFIG_TOSHIBA_JMR3927
174 #include <asm/jmr3927/jmr3927.h>
175 #define TXX927_SERIAL_PORT_DEFNS \
176 { baud_base: JMR3927_BASE_BAUD, port: UART0_ADDR, irq: UART0_INT, \
177 flags: UART0_FLAGS, type: 1 }, \
178 { baud_base: JMR3927_BASE_BAUD, port: UART1_ADDR, irq: UART1_INT, \
179 flags: UART1_FLAGS, type: 1 },
181 #define TXX927_SERIAL_PORT_DEFNS
184 #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
185 #define STD_SERIAL_PORT_DEFNS \
186 /* UART CLK PORT IRQ FLAGS */ \
187 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
188 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
189 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
190 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
192 #ifdef CONFIG_SERIAL_MANY_PORTS
193 #define EXTRA_SERIAL_PORT_DEFNS \
194 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
195 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
196 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
197 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
198 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
199 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
200 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
201 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
202 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
203 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
204 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
205 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
206 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
207 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
208 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
209 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
210 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
211 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
212 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
213 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
214 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
215 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
216 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
217 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
218 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
219 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
220 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
221 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
222 #else /* CONFIG_SERIAL_MANY_PORTS */
223 #define EXTRA_SERIAL_PORT_DEFNS
224 #endif /* CONFIG_SERIAL_MANY_PORTS */
226 #else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
227 #define STD_SERIAL_PORT_DEFNS
228 #define EXTRA_SERIAL_PORT_DEFNS
229 #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
231 /* You can have up to four HUB6's in the system, but I've only
232 * included two cards here for a total of twelve ports.
234 #if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
235 #define HUB6_SERIAL_PORT_DFNS \
236 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
237 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
238 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
239 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
240 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
241 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
242 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
243 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
244 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
245 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
246 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
247 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
249 #define HUB6_SERIAL_PORT_DFNS
253 #define MCA_SERIAL_PORT_DFNS \
254 { 0, BASE_BAUD, 0x3220, 3, STD_COM_FLAGS }, \
255 { 0, BASE_BAUD, 0x3228, 3, STD_COM_FLAGS }, \
256 { 0, BASE_BAUD, 0x4220, 3, STD_COM_FLAGS }, \
257 { 0, BASE_BAUD, 0x4228, 3, STD_COM_FLAGS }, \
258 { 0, BASE_BAUD, 0x5220, 3, STD_COM_FLAGS }, \
259 { 0, BASE_BAUD, 0x5228, 3, STD_COM_FLAGS },
261 #define MCA_SERIAL_PORT_DFNS
264 #ifdef CONFIG_MOMENCO_OCELOT
265 /* Ordinary NS16552 duart with a 20MHz crystal. */
266 #define OCELOT_BASE_BAUD ( 20000000 / 16 )
268 #define OCELOT_SERIAL1_IRQ 4
269 #define OCELOT_SERIAL1_BASE 0xe0001020
271 #define _OCELOT_SERIAL_INIT(int, base) \
272 { baud_base: OCELOT_BASE_BAUD, irq: int, flags: STD_COM_FLAGS, \
273 iomem_base: (u8 *) base, iomem_reg_shift: 2, \
274 io_type: SERIAL_IO_MEM }
275 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
276 _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
278 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
281 #ifdef CONFIG_MOMENCO_OCELOT_G
282 /* Ordinary NS16552 duart with a 20MHz crystal. */
283 #define OCELOT_G_BASE_BAUD ( 20000000 / 16 )
285 #define OCELOT_G_SERIAL1_IRQ 4
287 #define OCELOT_G_SERIAL1_BASE 0xe0001020
289 #define OCELOT_G_SERIAL1_BASE 0xfd000020
292 #define _OCELOT_G_SERIAL_INIT(int, base) \
293 { baud_base: OCELOT_G_BASE_BAUD, irq: int, flags: STD_COM_FLAGS,\
294 iomem_base: (u8 *) base, iomem_reg_shift: 2, \
295 io_type: SERIAL_IO_MEM }
296 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
297 _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE)
299 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS
302 #ifdef CONFIG_DDB5477
303 #include <asm/ddb5xxx/ddb5477.h>
304 #define DDB5477_SERIAL_PORT_DEFNS \
305 { baud_base: BASE_BAUD, irq: VRC5477_IRQ_UART0, flags: STD_COM_FLAGS, \
306 iomem_base: (u8*)0xbfa04200, iomem_reg_shift: 3, \
307 io_type: SERIAL_IO_MEM},\
308 { baud_base: BASE_BAUD, irq: VRC5477_IRQ_UART1, flags: STD_COM_FLAGS, \
309 iomem_base: (u8*)0xbfa04240, iomem_reg_shift: 3, \
310 io_type: SERIAL_IO_MEM},
312 #define DDB5477_SERIAL_PORT_DEFNS
315 #define SERIAL_PORT_DFNS \
316 IVR_SERIAL_PORT_DEFNS \
317 ITE_SERIAL_PORT_DEFNS \
318 ATLAS_SERIAL_PORT_DEFNS \
319 SEAD_SERIAL_PORT_DEFNS \
320 COBALT_SERIAL_PORT_DEFNS \
321 EV96100_SERIAL_PORT_DEFNS \
322 JAZZ_SERIAL_PORT_DEFNS \
323 STD_SERIAL_PORT_DEFNS \
324 EXTRA_SERIAL_PORT_DEFNS \
325 HUB6_SERIAL_PORT_DFNS \
326 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
327 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
328 AU1000_SERIAL_PORT_DEFNS \
329 TXX927_SERIAL_PORT_DEFNS \
330 DDB5477_SERIAL_PORT_DEFNS