2 * Copyright (C) 2000, 2001 Broadcom Corporation
3 * Copyright (C) 2002 Ralf Baechle
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 #ifndef __ASM_SIBYTE_64BIT_H
21 #define __ASM_SIBYTE_64BIT_H
23 #include <linux/config.h>
24 #include <linux/types.h>
28 #include <asm/system.h>
31 * This is annoying...we can't actually write the 64-bit IO register properly
32 * without having access to 64-bit registers... which doesn't work by default
33 * in o32 format...grrr...
35 static inline void out64(u64 val, unsigned long addr)
40 low = val & 0xffffffff;
42 __save_and_cli(flags);
43 __asm__ __volatile__ (
48 " dsll32 $2, %1, 0 \n"
49 " dsll32 $1, %0, 0 \n"
50 " dsrl32 $2, $2, 0 \n"
54 ::"r" (high), "r" (low), "r" (addr)
56 __restore_flags(flags);
59 static inline u64 in64(unsigned long addr)
63 __save_and_cli(flags);
64 __asm__ __volatile__ (
73 :"=r" (high), "=r" (low): "r" (addr));
74 __restore_flags(flags);
75 return (((u64)high) << 32) | low;
78 #endif /* CONFIG_MIPS32 */
83 * These are provided so as to be able to use common
84 * driver code for the 32-bit and 64-bit trees
86 extern inline void out64(u64 val, unsigned long addr)
88 *(volatile unsigned long *)addr = val;
91 extern inline u64 in64(unsigned long addr)
93 return *(volatile unsigned long *)addr;
96 #endif /* CONFIG_MIPS64 */
99 * Avoid interrupt mucking, just adjust the address for 4-byte access.
100 * Assume the addresses are 8-byte aligned.
104 #define __CSR_32_ADJUST 4
106 #define __CSR_32_ADJUST 0
109 #define csr_out32(v,a) (*(u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
110 #define csr_in32(a) (*(u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
112 #endif /* __ASM_SIBYTE_64BIT_H */