2 * BK Id: SCCS/s.8xx_immap.h 1.8 12/06/01 10:36:15 trini
6 * MPC8xx Internal Memory Map
7 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
9 * The I/O on the MPC860 is comprised of blocks of special registers
10 * and the dual port ram for the Communication Processor Module.
11 * Within this space are functional units such as the SIU, memory
12 * controller, system timers, and other control functions. It is
13 * a combination that I found difficult to separate into logical
14 * functional files.....but anyone else is welcome to try. -- Dan
20 /* System configuration registers.
22 typedef struct sys_conf {
38 /* PCMCIA configuration registers.
40 typedef struct pcmcia_conf {
68 /* Memory controller registers.
70 typedef struct mem_ctlr {
99 /* System Integration Timers.
101 typedef struct sys_int_timers {
118 #define TBSCR_TBIRQ_MASK ((ushort)0xff00)
119 #define TBSCR_REFA ((ushort)0x0080)
120 #define TBSCR_REFB ((ushort)0x0040)
121 #define TBSCR_REFAE ((ushort)0x0008)
122 #define TBSCR_REFBE ((ushort)0x0004)
123 #define TBSCR_TBF ((ushort)0x0002)
124 #define TBSCR_TBE ((ushort)0x0001)
126 #define RTCSC_RTCIRQ_MASK ((ushort)0xff00)
127 #define RTCSC_SEC ((ushort)0x0080)
128 #define RTCSC_ALR ((ushort)0x0040)
129 #define RTCSC_38K ((ushort)0x0010)
130 #define RTCSC_SIE ((ushort)0x0008)
131 #define RTCSC_ALE ((ushort)0x0004)
132 #define RTCSC_RTF ((ushort)0x0002)
133 #define RTCSC_RTE ((ushort)0x0001)
135 #define PISCR_PIRQ_MASK ((ushort)0xff00)
136 #define PISCR_PS ((ushort)0x0080)
137 #define PISCR_PIE ((ushort)0x0004)
138 #define PISCR_PTF ((ushort)0x0002)
139 #define PISCR_PTE ((ushort)0x0001)
143 typedef struct clk_and_reset {
147 char res[0x74]; /* Reserved area */
150 /* System Integration Timers keys.
152 typedef struct sitk {
168 /* Clocks and reset keys.
170 typedef struct cark {
177 /* The key to unlock registers maintained by keep-alive power.
179 #define KAPWR_KEY ((unsigned int)0x55ccaa33)
181 /* LCD interface. MPC821 and MPC823 Only.
184 ushort lcd_lcolr[16];
213 /* DMA control/status registers.
215 typedef struct sdma_csr {
232 /* Communication Processor Module Interrupt Controller.
234 typedef struct cpm_ic {
243 /* Input/Output Port control/status registers.
245 typedef struct io_port {
264 /* Communication Processor Module Timers
266 typedef struct cpm_timers {
292 /* Finally, the Communication Processor stuff.....
294 typedef struct scc { /* Serial communication channels */
309 typedef struct smc { /* Serial management channels */
319 /* MPC860T Fast Ethernet Controller. It isn't part of the CPM, but
320 * it fits within the address space.
323 uint fec_addr_low; /* LS 32 bits of station address */
324 ushort fec_addr_high; /* MS 16 bits of address */
326 uint fec_hash_table_high;
327 uint fec_hash_table_low;
328 uint fec_r_des_start;
329 uint fec_x_des_start;
330 uint fec_r_buff_size;
336 uint fec_r_des_active;
337 uint fec_x_des_active;
356 /* We need this as the fec and fb cmap use the same address space */
359 u_char fl_un_cmap[0x200];
362 typedef struct comm_proc {
363 /* General control and status registers.
379 /* Baud rate generators.
386 /* Serial Communication Channels.
390 /* Serial Management Channels.
394 /* Serial Peripheral Interface.
405 /* Parallel Interface Port.
418 /* Serial Interface and Time Slot Assignment.
429 u_char cp_siram[0x200];
431 /* The fast ethernet controller is not really part of the CPM,
432 * but it resides in the address space.
434 * The colormap for the LCD controller is also located here
437 #define cp_fec fl_un.fl_un_fec
438 #define lcd_cmap fl_un.fl_un_cmap
441 /* Dual Ported RAM follows.
442 * There are many different formats for this memory area
443 * depending upon the devices used and options chosen.
445 u_char cp_dpmem[0x1000]; /* BD / Data / ucode */
447 u_char cp_dparam[0x400]; /* Parameter RAM */
450 /* Internal memory map.
452 typedef struct immap {
453 sysconf8xx_t im_siu_conf; /* SIU Configuration */
454 pcmconf8xx_t im_pcmcia; /* PCMCIA Configuration */
455 memctl8xx_t im_memctl; /* Memory Controller */
456 sit8xx_t im_sit; /* System integration timers */
457 car8xx_t im_clkrst; /* Clocks and reset */
458 sitk8xx_t im_sitk; /* Sys int timer keys */
459 cark8xx_t im_clkrstk; /* Clocks and reset keys */
460 lcd8xx_t im_lcd; /* LCD (821 and 823 only) */
461 i2c8xx_t im_i2c; /* I2C control/status */
462 sdma8xx_t im_sdma; /* SDMA control/status */
463 cpic8xx_t im_cpic; /* CPM Interrupt Controller */
464 iop8xx_t im_ioport; /* IO Port control/status */
465 cpmtimer8xx_t im_cpmtimer; /* CPM timers */
466 cpm8xx_t im_cpm; /* Communication processor */
469 #endif /* __IMMAP_8XX__ */
470 #endif /* __KERNEL__ */