include/asm-ppc/harrier.h

   1 /*
   2  * arch/ppc/kernel/harrier.h
   3  *
   4  * Definitions for Motorola MCG Harrier North Bridge & Memory controller
   5  *
   6  * Author: Dale Farnsworth
   7  *         dale.farnsworth@mvista.com
   8  *
   9  * Copyright 2001 MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #ifndef __ASMPPC_HARRIER_H
  18 #define __ASMPPC_HARRIER_H
  19
  20 #include <asm/pci-bridge.h>
  21
  22 #define HARRIER_VEND_DEV_ID                     0x480b1057
  23
  24 /*
  25  * Define outbound register offsets.
  26  */
  27 #define HARRIER_OTAD0_OFF                       0x220
  28 #define HARRIER_OTOF0_OFF                       0x224
  29 #define HARRIER_OTAD1_OFF                       0x228
  30 #define HARRIER_OTOF1_OFF                       0x22c
  31 #define HARRIER_OTAD2_OFF                       0x230
  32 #define HARRIER_OTOF2_OFF                       0x234
  33 #define HARRIER_OTAD3_OFF                       0x238
  34 #define HARRIER_OTOF3_OFF                       0x23c
  35
  36 /*
  37  * Define inbound register offsets.
  38  */
  39 #define HARRIER_ITSZ0_OFF                       0x348
  40 #define HARRIER_ITSZ1_OFF                       0x350
  41 #define HARRIER_ITSZ2_OFF                       0x358
  42 #define HARRIER_ITSZ3_OFF                       0x360
  43
  44 /*
  45  * Define the Memory Controller register offsets.
  46  */
  47 #define HARRIER_SDBA_OFF                        0x110
  48 #define HARRIER_SDBB_OFF                        0x114
  49 #define HARRIER_SDBC_OFF                        0x118
  50 #define HARRIER_SDBD_OFF                        0x11c
  51 #define HARRIER_SDBE_OFF                        0x120
  52 #define HARRIER_SDBF_OFF                        0x124
  53 #define HARRIER_SDBG_OFF                        0x128
  54 #define HARRIER_SDBH_OFF                        0x12c
  55
  56 #define HARRIER_SDB_ENABLE                      0x00000100
  57 #define HARRIER_SDB_SIZE_MASK                   0xf
  58 #define HARRIER_SDB_SIZE_SHIFT                  16
  59 #define HARRIER_SDB_BASE_MASK                   0xff
  60 #define HARRIER_SDB_BASE_SHIFT                  24
  61
  62 #define HARRIER_SERIAL_0_OFF                    0xc0
  63
  64 #define HARRIER_REVI_OFF                        0x05
  65 #define HARRIER_UCTL_OFF                        0xd0
  66 #define HARRIER_XTAL64_MASK                     0x02
  67
  68 #define HARRIER_MISC_CSR_OFF                    0x1c
  69 #define HARRIER_RSTOUT_MASK                     0x01
  70
  71 #define HARRIER_MBAR_OFF                        0xe0
  72 #define HARRIER_MPIC_CSR_OFF                    0xe4
  73 #define HARRIER_MPIC_OPI_ENABLE                 0x40
  74 #define HARRIER_MPIC_IFEVP_OFF                  0x10200
  75 #define HARRIER_MPIC_IFEDE_OFF                  0x10210
  76 #define HARRIER_FEEN_OFF                        0x40
  77 #define HARRIER_FEST_OFF                        0x44
  78 #define HARRIER_FEMA_OFF                        0x48
  79
  80 #define HARRIER_FE_DMA                          0x80
  81 #define HARRIER_FE_MIDB                         0x40
  82 #define HARRIER_FE_MIM0                         0x20
  83 #define HARRIER_FE_MIM1                         0x10
  84 #define HARRIER_FE_MIP                          0x08
  85 #define HARRIER_FE_UA0                          0x04
  86 #define HARRIER_FE_UA1                          0x02
  87 #define HARRIER_FE_ABT                          0x01
  88
  89
  90 int harrier_init(struct pci_controller *hose,
  91                  uint ppc_reg_base,
  92                  ulong processor_pci_mem_start,
  93                  ulong processor_pci_mem_end,
  94                  ulong processor_pci_io_start,
  95                  ulong processor_pci_io_end,
  96                  ulong processor_mpic_base);
  97
  98 unsigned long harrier_get_mem_size(uint smc_base);
  99
 100 int harrier_mpic_init(unsigned int pci_mem_offset);
 101
 102 #endif /* __ASMPPC_HARRIER_H */