6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
13 #define IOBASE_BRIDGE_NUMBER 0
14 #define IOBASE_MEMORY 1
16 #define IOBASE_ISA_IO 3
17 #define IOBASE_ISA_MEM 4
19 /* Can be used to override the logic in pci_scan_bus for skipping
20 * already-configured bus numbers - to be used for buggy BIOSes
21 * or architectures with incomplete PCI setup by the loader.
23 extern int pcibios_assign_all_busses(void);
25 #define PCIBIOS_MIN_IO 0x1000
26 #define PCIBIOS_MIN_MEM 0x10000000
28 static inline void pcibios_set_master(struct pci_dev *dev)
30 /* No special bus mastering setup handling */
33 static inline void pcibios_penalize_isa_irq(int irq)
35 /* We don't do dynamic PCI IRQ allocation */
38 #include <linux/types.h>
39 #include <linux/slab.h>
40 #include <linux/string.h>
41 #include <asm/scatterlist.h>
46 #define REG_SAVE_SIZE 64
47 /************************************************************************
48 * Structure to hold the data for PCI Register Save/Restore functions. *
49 ************************************************************************/
50 struct pci_config_reg_save_area {
51 struct pci_dev* PciDev; /* Pointer to device(Sanity Check) */
52 int Flags; /* Control & Info Flags */
53 int RCode; /* Return Code on Save/Restore */
54 int Register; /* Pointer to current register. */
55 u8 Regs[REG_SAVE_SIZE]; /* Save Area */
57 /************************************************************************
58 * Functions to support device reset *
59 ************************************************************************/
60 extern int pci_reset_device(struct pci_dev*, int, int);
61 extern int pci_save_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
62 extern int pci_restore_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
63 extern char* pci_card_location(struct pci_dev*);
65 extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
66 dma_addr_t *dma_handle);
67 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
68 void *vaddr, dma_addr_t dma_handle);
70 extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
71 size_t size, int direction);
72 extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
73 size_t size, int direction);
74 extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
75 int nents, int direction);
76 extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
77 int nents, int direction);
79 extern void pSeries_pcibios_init_early(void);
81 static inline void pci_dma_sync_single(struct pci_dev *hwdev,
82 dma_addr_t dma_handle,
83 size_t size, int direction)
85 if (direction == PCI_DMA_NONE)
90 static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
91 struct scatterlist *sg,
92 int nelems, int direction)
94 if (direction == PCI_DMA_NONE)
99 /* Return whether the given PCI device DMA address mask can
100 * be supported properly. For example, if your device can
101 * only drive the low 24-bits during PCI bus mastering, then
102 * you would pass 0x00ffffff as the mask to this function.
104 static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
109 /* Return the index of the PCI controller for device PDEV. */
110 extern int pci_controller_num(struct pci_dev *pdev);
112 struct vm_area_struct;
113 /* Map a range of PCI memory or I/O space for a device into user space */
114 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
115 enum pci_mmap_state mmap_state, int write_combine);
117 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
118 #define HAVE_PCI_MMAP 1
120 #define sg_dma_address(sg) ((sg)->dma_address)
121 #define sg_dma_len(sg) ((sg)->dma_length)
123 #define pci_map_page(dev, page, off, size, dir) \
124 pci_map_single(dev, (page_address(page) + (off)), size, dir)
125 #define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir)
127 /* pci_unmap_{single,page} is not a nop, thus... */
128 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
129 dma_addr_t ADDR_NAME;
130 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
132 #define pci_unmap_addr(PTR, ADDR_NAME) \
134 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
135 (((PTR)->ADDR_NAME) = (VAL))
136 #define pci_unmap_len(PTR, LEN_NAME) \
138 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
139 (((PTR)->LEN_NAME) = (VAL))
141 #define pci_dac_dma_supported(pci_dev, mask) (0)
143 /* The PCI address space does equal the physical memory
144 * address space. The networking and block device layers use
145 * this boolean for bounce buffer decisions.
147 #define PCI_DMA_BUS_IS_PHYS (0)
149 #endif /* __KERNEL__ */
151 #endif /* __PPC64_PCI_H */