6 /* Can be used to override the logic in pci_scan_bus for skipping
7 * already-configured bus numbers - to be used for buggy BIOSes
8 * or architectures with incomplete PCI setup by the loader.
10 #define pcibios_assign_all_busses() 0
12 #define PCIBIOS_MIN_IO 0UL
13 #define PCIBIOS_MIN_MEM 0UL
15 #define PCI_IRQ_NONE 0xffffffff
17 extern inline void pcibios_set_master(struct pci_dev *dev)
19 /* No special bus mastering setup handling */
22 extern inline void pcibios_penalize_isa_irq(int irq)
24 /* We don't do dynamic PCI IRQ allocation */
27 /* Dynamic DMA mapping stuff.
30 /* The PCI address space does not equal the physical memory
31 * address space. The networking and block device layers use
32 * this boolean for bounce buffer decisions.
34 #define PCI_DMA_BUS_IS_PHYS (0)
36 #include <asm/scatterlist.h>
40 /* Allocate and map kernel buffer using consistent mode DMA for a device.
41 * hwdev should be valid struct pci_dev pointer for PCI devices.
43 extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
45 /* Free and unmap a consistent DMA buffer.
46 * cpu_addr is what was returned from pci_alloc_consistent,
47 * size must be the same as what as passed into pci_alloc_consistent,
48 * and likewise dma_addr must be the same as what *dma_addrp was set to.
50 * References to the memory and mappings assosciated with cpu_addr/dma_addr
51 * past this call are illegal.
53 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
55 /* Map a single buffer of the indicated size for DMA in streaming mode.
56 * The 32-bit bus address to use is returned.
58 * Once the device is given the dma address, the device owns this memory
59 * until either pci_unmap_single or pci_dma_sync_single is performed.
61 extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
63 /* Unmap a single streaming mode DMA translation. The dma_addr and size
64 * must match what was provided for in a previous pci_map_single call. All
65 * other usages are undefined.
67 * After this call, reads by the cpu to the buffer are guarenteed to see
68 * whatever the device wrote there.
70 extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
72 /* pci_unmap_{single,page} is not a nop, thus... */
73 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
75 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
77 #define pci_unmap_addr(PTR, ADDR_NAME) \
79 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
80 (((PTR)->ADDR_NAME) = (VAL))
81 #define pci_unmap_len(PTR, LEN_NAME) \
83 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
84 (((PTR)->LEN_NAME) = (VAL))
86 /* Map a set of buffers described by scatterlist in streaming
87 * mode for DMA. This is the scather-gather version of the
88 * above pci_map_single interface. Here the scatter gather list
89 * elements are each tagged with the appropriate dma address
90 * and length. They are obtained via sg_dma_{address,length}(SG).
92 * NOTE: An implementation may be able to use a smaller number of
93 * DMA address/length pairs than there are SG table elements.
94 * (for example via virtual mapping capabilities)
95 * The routine returns the number of addr/length pairs actually
96 * used, at most nents.
98 * Device ownership issues as mentioned above for pci_map_single are
101 extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
103 /* Unmap a set of streaming mode DMA translations.
104 * Again, cpu read rules concerning calls here are the same as for
105 * pci_unmap_single() above.
107 extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction);
109 /* Make physical memory consistent for a single
110 * streaming mode DMA translation after a transfer.
112 * If you perform a pci_map_single() but wish to interrogate the
113 * buffer using the cpu, yet do not wish to teardown the PCI dma
114 * mapping, you must call this function before doing so. At the
115 * next point you give the PCI dma address back to the card, the
116 * device again owns the buffer.
118 extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
120 /* Make physical memory consistent for a set of streaming
121 * mode DMA translations after a transfer.
123 * The same as pci_dma_sync_single but for a scatter-gather list,
124 * same rules and usage.
126 extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
128 /* Return whether the given PCI device DMA address mask can
129 * be supported properly. For example, if your device can
130 * only drive the low 24-bits during PCI bus mastering, then
131 * you would pass 0x00ffffff as the mask to this function.
133 extern inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
138 #define pci_dac_dma_supported(dev, mask) (0)
140 /* Return the index of the PCI controller for device PDEV. */
141 #define pci_controller_num(PDEV) (0)
143 #endif /* __KERNEL__ */
145 #endif /* __SPARC_PCI_H */