2 * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 /*-----------------------------------------------------------------------
28 * User configurable settings:
30 * CONFIG_IPADDR_LS - the IP address of the LinkStation
31 * CONFIG_SERVERIP_LS - the address of the server for NFS/TFTP/DHCP/BOOTP
33 * CONFIG_NCIP_LS - the adress of the computer running net console
34 * if not configured, it will be set to
38 #define CONFIG_IPADDR_LS 192.168.11.150
39 #define CONFIG_SERVERIP_LS 192.168.11.149
41 #if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS)
42 #error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined
45 #if !defined(CONFIG_NCIP_LS)
46 #define CONFIG_NCIP_LS CONFIG_SERVERIP_LS
49 /*----------------------------------------------------------------------
50 * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING
51 *---------------------------------------------------------------------*/
53 #define CONFIG_MPC8245 1
54 #define CONFIG_LINKSTATION 1
56 /*---------------------------------------
59 * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN)
60 * LinkStation old model (CONFIG_LAN) - totally untested
61 * LinkStation HGLAN / KuroBox HG (CONFIG_HGLAN)
63 * Models not supported yet
64 * TeraStatin (CONFIG_HTGL)
67 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
68 #define CONFIG_IDENT_STRING " LinkStation / KuroBox"
69 #elif defined(CONFIG_HGLAN)
70 #define CONFIG_IDENT_STRING " LinkStation HG / KuroBox HG"
71 #elif defined(CONFIG_HTGL)
72 #define CONFIG_IDENT_STRING " TeraStation"
74 #error No LinkStation model defined
77 #define CONFIG_BOOTDELAY 10
78 #define CONFIG_ZERO_BOOTDELAY_CHECK
79 #undef CONFIG_BOOT_RETRY_TIME
81 #define CONFIG_AUTOBOOT_KEYED
82 #define CONFIG_AUTOBOOT_PROMPT "Boot in %02d seconds ('s' to stop)..."
83 #define CONFIG_AUTOBOOT_STOP_STR "s"
85 #define CONFIG_COMMANDS (CFG_CMD_BDI | \
102 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
104 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
105 #include <cmd_confdefs.h>
108 * Miscellaneous configurable options
110 #define CFG_LONGHELP /* undef to save memory */
111 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
112 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
114 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
115 #define CFG_MAXARGS 16 /* Max number of command args */
116 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
117 #define CFG_LOAD_ADDR 0x00800000 /* Default load address: 8 MB */
119 //#define CONFIG_BOOTCOMMAND "run nfsboot"
120 #define CONFIG_BOOTCOMMAND "run bootcmd1"
121 #define CONFIG_BOOTARGS "root=/dev/hda1"
122 #define CONFIG_NFSBOOTCOMMAND "bootp;run nfsargs;bootm"
124 #define CFG_CONSOLE_IS_IN_ENV
126 #define XMK_STR(x) #x
127 #define MK_STR(x) XMK_STR(x)
129 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
130 #define UBFILE "share/u-boot/u-boot-hd.flash.bin"
131 #elif defined(CONFIG_HGLAN)
132 #define UBFILE "share/u-boot/u-boot-hg.flash.bin"
133 #elif defined(CONFIG_HTGL)
134 #define UBFILE "share/u-boot/u-boot-ht.flash.bin"
136 #error No LinkStation model defined
139 #define CONFIG_EXTRA_ENV_SETTINGS \
144 "ipaddr="MK_STR(CONFIG_IPADDR_LS)"\0" \
145 "netmask=255.255.255.0\0" \
146 "serverip="MK_STR(CONFIG_SERVERIP_LS)"\0" \
147 "ncip="MK_STR(CONFIG_NCIP_LS)"\0" \
149 "nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0" \
150 "ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0" \
153 "hdfile=boot/vmlinux.UBoot\0" \
154 "hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile}\0" \
155 "boothd=setenv bootargs root=/dev/hda1;bootm ${ldaddr}\0" \
156 "hdboot=run hdload boothd\0" \
157 "flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0" \
158 "emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0" \
159 "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
160 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
162 "bootcmd1=run hdboot;run flboot\0" \
163 "bootcmd2=run flboot\0" \
164 "bootcmd3=run emboot\0" \
165 "writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \
166 "writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \
168 "ubfile="UBFILE"\0" \
169 "ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \
170 "ubsaddr=fff00000\0" \
171 "ubeaddr=fff2ffff\0" \
172 "ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \
173 "upgrade=run ubload ubflash\0"
175 /*-----------------------------------------------------------------------
179 #undef CONFIG_PCI_PNP
180 #define CONFIG_PCI_SCAN_SHOW
182 #ifndef CONFIG_PCI_PNP
183 /* Keep the following defines in sync with the BAT mappings */
185 #define PCI_ETH_IOADDR 0xbfff00
186 #define PCI_ETH_MEMADDR 0xbffffc00
187 #define PCI_IDE_IOADDR 0xbffed0
188 #define PCI_IDE_MEMADDR 0xbffffb00
189 #define PCI_USB0_IOADDR 0
190 #define PCI_USB0_MEMADDR 0xbfffe000
191 #define PCI_USB1_IOADDR 0
192 #define PCI_USB1_MEMADDR 0xbfffd000
193 #define PCI_USB2_IOADDR 0
194 #define PCI_USB2_MEMADDR 0xbfffcf00
198 /*-----------------------------------------------------------------------
201 #define CONFIG_NET_MULTI
203 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
205 #define CONFIG_TULIP_USE_IO
206 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
207 #define CONFIG_RTL8169
210 #define CONFIG_NET_RETRY_COUNT 5
212 #define CONFIG_NETCONSOLE
214 /*-----------------------------------------------------------------------
215 * Start addresses for the final memory configuration
216 * (Set up by the startup code)
217 * Please note that CFG_SDRAM_BASE _must_ start at 0
219 #define CFG_SDRAM_BASE 0x00000000
221 #define CFG_FLASH_BASE 0xFFC00000
222 #define CFG_MONITOR_BASE TEXT_BASE
224 #define CFG_RESET_ADDRESS 0xFFF00100
225 #define CFG_EUMB_ADDR 0x80000000
226 #define CFG_PCI_MEM_ADDR 0xB0000000
227 #define CFG_MISC_REGION_ADDR 0xFE000000
229 #define CFG_MONITOR_LEN 0x00040000 /* 256 kB */
230 #define CFG_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */
232 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
233 #define CFG_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */
235 /* Maximum amount of RAM */
236 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
237 #define CFG_MAX_RAM_SIZE 0x04000000 /* 64MB of SDRAM */
238 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
239 #define CFG_MAX_RAM_SIZE 0x08000000 /* 128MB of SDRAM */
241 #error Unknown LinkStation type
244 /*-----------------------------------------------------------------------
245 * Change TEXT_BASE in bord/linkstation/config.mk to get a RAM build
247 * RAM based builds are for testing purposes. A Linux module, uloader.o,
248 * exists to load U-Boot and pass control to it
250 * Always do "make clean" after changing the build type
252 #if CFG_MONITOR_BASE < CFG_FLASH_BASE
256 /*-----------------------------------------------------------------------
257 * Definitions for initial stack pointer and data area
259 #if 1 /* RAM is available when the first C function is called */
260 #define CFG_INIT_RAM_ADDR (CFG_SDRAM_BASE + CFG_MAX_RAM_SIZE - 0x1000)
262 #define CFG_INIT_RAM_ADDR 0x40000000
264 #define CFG_INIT_RAM_END 0x1000
265 #define CFG_GBL_DATA_SIZE 128
266 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
268 /*----------------------------------------------------------------------
269 * Serial configuration
271 #define CONFIG_CONS_INDEX 1
272 #define CONFIG_BAUDRATE 57600
273 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
276 #define CFG_NS16550_SERIAL
278 #define CFG_NS16550_REG_SIZE 1
280 #define CFG_NS16550_CLK get_bus_freq(0)
282 #define CFG_NS16550_COM1 (CFG_EUMB_ADDR + 0x4600) /* Console port */
283 #define CFG_NS16550_COM2 (CFG_EUMB_ADDR + 0x4500) /* AVR port */
286 * Low Level Configuration Settings
287 * (address mappings, register initial values, etc.)
288 * You should know what you are doing if you make changes here.
289 * For the detail description refer to the MPC8245 user's manual.
291 * Unless indicated otherwise, the values are
292 * taken from the orignal Linkstation boot code
294 * Most of the low level configuration setttings are normally used
295 * in cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
296 * Low level initialisation is done in board/linkstation/early_init.S
297 * The values below are included for reference purpose only
300 /* FIXME: 32.768 MHz is the crystal frequency but */
301 /* the real frequency is lower by about 0.75% */
302 #define CONFIG_SYS_CLK_FREQ 32768000
305 /* Bit-field values for MCCR1. */
307 #define CFG_ROMFAL 11
309 #define CFG_BANK0_ROW 2 /* Only bank 0 used: 13 x n x 4 */
310 #define CFG_BANK1_ROW 0
311 #define CFG_BANK2_ROW 0
312 #define CFG_BANK3_ROW 0
313 #define CFG_BANK4_ROW 0
314 #define CFG_BANK5_ROW 0
315 #define CFG_BANK6_ROW 0
316 #define CFG_BANK7_ROW 0
318 /* Bit-field values for MCCR2. */
320 #define CFG_REFINT 1400
322 /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */
323 #define CFG_BSTOPRE 121
325 /* Bit-field values for MCCR3. */
328 /* Bit-field values for MCCR4. */
329 #define CFG_PRETOACT 2
330 #define CFG_ACTTOPRE 5 /* Original value was 2 */
332 #define CFG_SDMODE_CAS_LAT 2 /* For 100MHz bus. Use 3 for 133MHz */
333 #define CFG_REGISTERD_TYPE_BUFFER 1
334 #define CFG_EXTROM 1 /* Original setting but there is no EXTROM */
335 #define CFG_REGDIMM 0
336 #define CFG_DBUS_SIZE2 1
337 #define CFG_SDMODE_WRAP 0
339 #define CFG_PGMAX 0x32 /* All boards use this setting. Original 0x92 */
340 #define CFG_SDRAM_DSCD 0x30
342 /* Memory bank settings.
343 * Only bits 20-29 are actually used from these vales to set the
344 * start/end addresses. The upper two bits will always be 0, and the lower
345 * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
346 * address. Refer to the MPC8240 book.
349 #define CFG_BANK0_START 0x00000000
350 #define CFG_BANK0_END (CFG_MAX_RAM_SIZE - 1)
351 #define CFG_BANK0_ENABLE 1
352 #define CFG_BANK1_START 0x3ff00000
353 #define CFG_BANK1_END 0x3fffffff
354 #define CFG_BANK1_ENABLE 0
355 #define CFG_BANK2_START 0x3ff00000
356 #define CFG_BANK2_END 0x3fffffff
357 #define CFG_BANK2_ENABLE 0
358 #define CFG_BANK3_START 0x3ff00000
359 #define CFG_BANK3_END 0x3fffffff
360 #define CFG_BANK3_ENABLE 0
361 #define CFG_BANK4_START 0x3ff00000
362 #define CFG_BANK4_END 0x3fffffff
363 #define CFG_BANK4_ENABLE 0
364 #define CFG_BANK5_START 0x3ff00000
365 #define CFG_BANK5_END 0x3fffffff
366 #define CFG_BANK5_ENABLE 0
367 #define CFG_BANK6_START 0x3ff00000
368 #define CFG_BANK6_END 0x3fffffff
369 #define CFG_BANK6_ENABLE 0
370 #define CFG_BANK7_START 0x3ff00000
371 #define CFG_BANK7_END 0x3fffffff
372 #define CFG_BANK7_ENABLE 0
374 #define CFG_ODCR 0x95 /* 0x15 or 0x95 ? */
376 /*----------------------------------------------------------------------
377 * Initial BAT mappings
381 * 1) GUARDED and WRITETHROUGH not allowed in IBATS
382 * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT
386 #define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
387 #define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP)
389 #define CFG_DBAT0L CFG_IBAT0L
390 #define CFG_DBAT0U CFG_IBAT0U
392 /* EUMB: 1MB of address space */
393 #define CFG_IBAT1L (CFG_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
394 #define CFG_IBAT1U (CFG_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP)
396 #define CFG_DBAT1L (CFG_IBAT1L | BATL_GUARDEDSTORAGE)
397 #define CFG_DBAT1U CFG_IBAT1U
399 /* PCI Mem: 256MB of address space */
400 #define CFG_IBAT2L (CFG_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
401 #define CFG_IBAT2U (CFG_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP)
403 #define CFG_DBAT2L (CFG_IBAT2L | BATL_GUARDEDSTORAGE)
404 #define CFG_DBAT2U CFG_IBAT2U
406 /* PCI and local ROM/Flash: last 32MB of address space */
407 #define CFG_IBAT3L (CFG_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
408 #define CFG_IBAT3U (CFG_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP)
410 #define CFG_DBAT3L (CFG_IBAT3L | BATL_GUARDEDSTORAGE)
411 #define CFG_DBAT3U CFG_IBAT3U
414 * For booting Linux, the board info and command line data
415 * have to be in the first 8 MB of memory, since this is
416 * the maximum mapped by the Linux kernel during initialization.
418 * FIXME: This doesn't appear to be true for the newer kernels
419 * which map more that 8 MB
421 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
423 /*-----------------------------------------------------------------------
426 #undef CFG_FLASH_PROTECTION
427 #define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
428 #define CFG_MAX_FLASH_SECT 72 /* Max number of sectors per flash */
430 #define CFG_FLASH_ERASE_TOUT 12000
431 #define CFG_FLASH_WRITE_TOUT 1000
434 #define CFG_ENV_IS_IN_FLASH
436 * The original LinkStation flash organisation uses
437 * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader
438 * We use the last sector of this area to store the environment
439 * which leaves max. 384 kB for the U-Boot itself
441 #define CFG_ENV_ADDR 0xFFF60000
442 #define CFG_ENV_SIZE 0x00010000
443 #define CFG_ENV_SECT_SIZE 0x00010000
445 /*-----------------------------------------------------------------------
446 * Cache Configuration
448 #define CFG_CACHELINE_SIZE 32
449 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
450 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
453 /*-----------------------------------------------------------------------
454 * IDE/ATA definitions
456 #undef CONFIG_IDE_LED /* No IDE LED */
457 #define CONFIG_IDE_RESET /* no reset for ide supported */
458 #define CONFIG_IDE_PREINIT /* check for units */
459 #define CONFIG_LBA48 /* 48 bit LBA supported */
461 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN)
462 #define CFG_IDE_MAXBUS 1 /* Scan only 1 IDE bus */
463 #define CFG_IDE_MAXDEVICE 1 /* Only 1 drive per IDE bus */
464 #elif defined(CONFIG_HGTL)
465 #define CFG_IDE_MAXBUS 2 /* Max. 2 IDE busses */
466 #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
468 #error Config IDE: Unknown LinkStation type
471 #define CFG_ATA_BASE_ADDR 0
473 #define CFG_ATA_DATA_OFFSET 0 /* Offset for data I/O */
474 #define CFG_ATA_REG_OFFSET 0 /* Offset for normal registers */
475 #define CFG_ATA_ALT_OFFSET 0 /* Offset for alternate registers */
477 /*-----------------------------------------------------------------------
478 * Partitions and file system
480 #define CONFIG_DOS_PARTITION
482 /*-----------------------------------------------------------------------
483 * Internal Definitions
487 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
488 #define BOOTFLAG_WARM 0x02 /* Software reboot */
490 #endif /* __CONFIG_H */