2 * Private header file for the (dumb) serial driver
4 * Copyright (C) 1997 by Theodore Ts'o.
6 * Redistribution of this file is permitted under the terms of the GNU
10 #ifndef _LINUX_SERIALP_H
11 #define _LINUX_SERIALP_H
14 * This is our internal structure for each serial port's state.
16 * Many fields are paralleled by the structure used by the serial_struct
19 * For definitions of the flags field, see tty.h
22 #include <linux/config.h>
23 #include <linux/termios.h>
24 #include <linux/tqueue.h>
25 #include <linux/circ_buf.h>
26 #include <linux/wait.h>
27 #if (LINUX_VERSION_CODE < 0x020300)
28 /* Unfortunate, but Linux 2.2 needs async_icount defined here and
29 * it got moved in 2.3 */
30 #include <linux/serial.h>
42 int revision; /* Chip revision (950) */
48 unsigned short close_delay;
49 unsigned short closing_wait; /* time to wait before closing */
50 struct async_icount icount;
51 struct termios normal_termios;
52 struct termios callout_termios;
54 struct async_struct *info;
64 struct serial_state *state;
65 struct tty_struct *tty;
67 int ignore_status_mask;
70 int x_char; /* xon/xoff character */
72 unsigned short closing_wait;
73 unsigned short closing_wait2;
74 int IER; /* Interrupt Enable Register */
75 int MCR; /* Modem control register */
76 int LCR; /* Line control register */
77 int ACR; /* 16950 Additional Control Reg. */
79 unsigned long last_active;
81 int blocked_open; /* # of blocked opens */
82 long session; /* Session of opening process */
83 long pgrp; /* pgrp of opening process */
89 struct tq_struct tqueue;
90 #ifdef DECLARE_WAITQUEUE
91 wait_queue_head_t open_wait;
92 wait_queue_head_t close_wait;
93 wait_queue_head_t delta_msr_wait;
95 struct wait_queue *open_wait;
96 struct wait_queue *close_wait;
97 struct wait_queue *delta_msr_wait;
99 struct async_struct *next_port; /* For the linked list */
100 struct async_struct *prev_port;
103 #define CONFIGURED_SERIAL_PORT(info) ((info)->port || ((info)->iomem_base))
105 #define SERIAL_MAGIC 0x5301
106 #define SSTATE_MAGIC 0x5302
109 * Events are used to schedule things to happen at timer-interrupt
110 * time, instead of at rs interrupt time.
112 #define RS_EVENT_WRITE_WAKEUP 0
115 * Multiport serial configuration structure --- internal structure
117 struct rs_multiport_struct {
119 unsigned char mask1, match1;
121 unsigned char mask2, match2;
123 unsigned char mask3, match3;
125 unsigned char mask4, match4;
129 #if defined(__alpha__) && !defined(CONFIG_PCI)
131 * Digital did something really horribly wrong with the OUT1 and OUT2
132 * lines on at least some ALPHA's. The failure mode is that if either
133 * is cleared, the machine locks up with endless interrupts.
135 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
137 #define ALPHA_KLUDGE_MCR 0
141 * Structures and definitions for PCI support
150 int (*init_fn)(struct pci_dev *dev, struct pci_board *board,
152 int first_uart_offset;
155 struct pci_board_inst {
156 struct pci_board board;
160 extern int pci_siig10x_fn(struct pci_dev *dev, struct pci_board *board, int enable);
161 extern int pci_siig20x_fn(struct pci_dev *dev, struct pci_board *board, int enable);
164 #define PCI_ANY_ID (~0)
167 #define SPCI_FL_BASE_MASK 0x0007
168 #define SPCI_FL_BASE0 0x0000
169 #define SPCI_FL_BASE1 0x0001
170 #define SPCI_FL_BASE2 0x0002
171 #define SPCI_FL_BASE3 0x0003
172 #define SPCI_FL_BASE4 0x0004
173 #define SPCI_FL_GET_BASE(x) (x & SPCI_FL_BASE_MASK)
175 #define SPCI_FL_IRQ_MASK (0x0007 << 4)
176 #define SPCI_FL_IRQBASE0 (0x0000 << 4)
177 #define SPCI_FL_IRQBASE1 (0x0001 << 4)
178 #define SPCI_FL_IRQBASE2 (0x0002 << 4)
179 #define SPCI_FL_IRQBASE3 (0x0003 << 4)
180 #define SPCI_FL_IRQBASE4 (0x0004 << 4)
181 #define SPCI_FL_GET_IRQBASE(x) ((x & SPCI_FL_IRQ_MASK) >> 4)
183 /* Use successive BARs (PCI base address registers),
184 else use offset into some specified BAR */
185 #define SPCI_FL_BASE_TABLE 0x0100
187 /* Use successive entries in the irq resource table */
188 #define SPCI_FL_IRQ_TABLE 0x0200
190 /* Use the irq resource table instead of dev->irq */
191 #define SPCI_FL_IRQRESOURCE 0x0400
193 /* Use the Base address register size to cap number of ports */
194 #define SPCI_FL_REGION_SZ_CAP 0x0800
196 /* Do not use irq sharing for this device */
197 #define SPCI_FL_NO_SHIRQ 0x1000
199 /* This is a PNP device */
200 #define SPCI_FL_ISPNP 0x2000
202 #define SPCI_FL_PNPDEFAULT (SPCI_FL_IRQRESOURCE|SPCI_FL_ISPNP)
204 #endif /* _LINUX_SERIAL_H */