2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Module name: iSeries_setup.c
8 * Architecture- / platform-specific boot-time initialization code for
9 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
10 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/bootmem.h>
26 #include <linux/initrd.h>
27 #include <linux/seq_file.h>
28 #include <linux/kdev_t.h>
29 #include <linux/major.h>
30 #include <linux/root_dev.h>
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
41 #include "iSeries_setup.h"
44 #include <asm/sections.h>
45 #include <asm/iSeries/LparData.h>
46 #include <asm/iSeries/HvCallHpt.h>
47 #include <asm/iSeries/HvLpConfig.h>
48 #include <asm/iSeries/HvCallEvent.h>
49 #include <asm/iSeries/HvCallSm.h>
50 #include <asm/iSeries/HvCallXm.h>
51 #include <asm/iSeries/ItLpQueue.h>
52 #include <asm/iSeries/IoHriMainStore.h>
53 #include <asm/iSeries/iSeries_proc.h>
54 #include <asm/iSeries/mf.h>
56 /* Function Prototypes */
57 extern void abort(void);
58 extern void ppcdbg_initialize(void);
59 extern void iSeries_pcibios_init(void);
60 extern void tce_init_iSeries(void);
62 static void build_iSeries_Memory_Map(void);
63 static void setup_iSeries_cache_sizes(void);
64 static void iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr);
65 extern void build_valid_hpte(unsigned long vsid, unsigned long ea, unsigned long pa,
66 pte_t *ptep, unsigned hpteflags, unsigned bolted);
67 static void iSeries_setup_dprofile(void);
68 extern void iSeries_setup_arch(void);
69 extern void iSeries_pci_final_fixup(void);
71 /* Global Variables */
72 static unsigned long procFreqHz;
73 static unsigned long procFreqMhz;
74 static unsigned long procFreqMhzHundreths;
76 static unsigned long tbFreqHz;
77 static unsigned long tbFreqMhz;
78 static unsigned long tbFreqMhzHundreths;
80 unsigned long dprof_shift;
81 unsigned long dprof_len;
82 unsigned int *dprof_buffer;
84 int piranha_simulator;
90 extern int rd_size; /* Defined in drivers/block/rd.c */
91 extern unsigned long klimit;
92 extern unsigned long embedded_sysmap_start;
93 extern unsigned long embedded_sysmap_end;
95 extern unsigned long iSeries_recal_tb;
96 extern unsigned long iSeries_recal_titan;
98 static int mf_initialized;
101 unsigned long absStart;
102 unsigned long absEnd;
103 unsigned long logicalStart;
104 unsigned long logicalEnd;
108 * Process the main store vpd to determine where the holes in memory are
109 * and return the number of physical blocks and fill in the array of
112 unsigned long iSeries_process_Condor_mainstore_vpd(struct MemoryBlock *mb_array,
113 unsigned long max_entries)
115 unsigned long holeFirstChunk, holeSizeChunks;
116 unsigned long numMemoryBlocks = 1;
117 struct IoHriMainStoreSegment4 *msVpd =
118 (struct IoHriMainStoreSegment4 *)xMsVpd;
119 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
120 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
121 unsigned long holeSize = holeEnd - holeStart;
123 printk("Mainstore_VPD: Condor\n");
125 * Determine if absolute memory has any
126 * holes so that we can interpret the
127 * access map we get back from the hypervisor
130 mb_array[0].logicalStart = 0;
131 mb_array[0].logicalEnd = 0x100000000;
132 mb_array[0].absStart = 0;
133 mb_array[0].absEnd = 0x100000000;
137 holeStart = holeStart & 0x000fffffffffffff;
138 holeStart = addr_to_chunk(holeStart);
139 holeFirstChunk = holeStart;
140 holeSize = addr_to_chunk(holeSize);
141 holeSizeChunks = holeSize;
142 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
143 holeFirstChunk, holeSizeChunks );
144 mb_array[0].logicalEnd = holeFirstChunk;
145 mb_array[0].absEnd = holeFirstChunk;
146 mb_array[1].logicalStart = holeFirstChunk;
147 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
148 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
149 mb_array[1].absEnd = 0x100000000;
151 return numMemoryBlocks;
154 #define MaxSegmentAreas 32
155 #define MaxSegmentAdrRangeBlocks 128
156 #define MaxAreaRangeBlocks 4
158 unsigned long iSeries_process_Regatta_mainstore_vpd(
159 struct MemoryBlock *mb_array, unsigned long max_entries)
161 struct IoHriMainStoreSegment5 *msVpdP =
162 (struct IoHriMainStoreSegment5 *)xMsVpd;
163 unsigned long numSegmentBlocks = 0;
164 u32 existsBits = msVpdP->msAreaExists;
165 unsigned long area_num;
167 printk("Mainstore_VPD: Regatta\n");
169 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
170 unsigned long numAreaBlocks;
171 struct IoHriMainStoreArea4 *currentArea;
173 if (existsBits & 0x80000000) {
174 unsigned long block_num;
176 currentArea = &msVpdP->msAreaArray[area_num];
177 numAreaBlocks = currentArea->numAdrRangeBlocks;
178 printk("ms_vpd: processing area %2ld blocks=%ld",
179 area_num, numAreaBlocks);
180 for (block_num = 0; block_num < numAreaBlocks;
182 /* Process an address range block */
183 struct MemoryBlock tempBlock;
187 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
189 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
190 tempBlock.logicalStart = 0;
191 tempBlock.logicalEnd = 0;
192 printk("\n block %ld absStart=%016lx absEnd=%016lx",
193 block_num, tempBlock.absStart,
196 for (i = 0; i < numSegmentBlocks; ++i) {
197 if (mb_array[i].absStart ==
201 if (i == numSegmentBlocks) {
202 if (numSegmentBlocks == max_entries)
203 panic("iSeries_process_mainstore_vpd: too many memory blocks");
204 mb_array[numSegmentBlocks] = tempBlock;
207 printk(" (duplicate)");
213 /* Now sort the blocks found into ascending sequence */
214 if (numSegmentBlocks > 1) {
217 for (m = 0; m < numSegmentBlocks - 1; ++m) {
218 for (n = numSegmentBlocks - 1; m < n; --n) {
219 if (mb_array[n].absStart <
220 mb_array[n-1].absStart) {
221 struct MemoryBlock tempBlock;
223 tempBlock = mb_array[n];
224 mb_array[n] = mb_array[n-1];
225 mb_array[n-1] = tempBlock;
231 * Assign "logical" addresses to each block. These
232 * addresses correspond to the hypervisor "bitmap" space.
233 * Convert all addresses into units of 256K chunks.
236 unsigned long i, nextBitmapAddress;
238 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
239 nextBitmapAddress = 0;
240 for (i = 0; i < numSegmentBlocks; ++i) {
241 unsigned long length = mb_array[i].absEnd -
242 mb_array[i].absStart;
244 mb_array[i].logicalStart = nextBitmapAddress;
245 mb_array[i].logicalEnd = nextBitmapAddress + length;
246 nextBitmapAddress += length;
247 printk(" Bitmap range: %016lx - %016lx\n"
248 " Absolute range: %016lx - %016lx\n",
249 mb_array[i].logicalStart,
250 mb_array[i].logicalEnd,
251 mb_array[i].absStart, mb_array[i].absEnd);
252 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
254 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
256 mb_array[i].logicalStart =
257 addr_to_chunk(mb_array[i].logicalStart);
258 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
262 return numSegmentBlocks;
265 unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
266 unsigned long max_entries)
269 unsigned long mem_blocks = 0;
271 if (cur_cpu_spec->cpu_features & CPU_FTR_SLB)
272 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
275 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
278 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
279 for (i = 0; i < mem_blocks; ++i) {
280 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
281 " abs chunks %016lx - %016lx\n",
282 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
283 mb_array[i].absStart, mb_array[i].absEnd);
288 void __init iSeries_init_early(void)
292 #if defined(CONFIG_BLK_DEV_INITRD)
294 * If the init RAM disk has been configured and there is
295 * a non-zero starting address for it, set it up
297 if (naca->xRamDisk) {
298 initrd_start = (unsigned long)__va(naca->xRamDisk);
299 initrd_end = initrd_start + naca->xRamDiskSize * PAGE_SIZE;
300 initrd_below_start_ok = 1; // ramdisk in kernel space
301 ROOT_DEV = Root_RAM0;
302 if (((rd_size * 1024) / PAGE_SIZE) < naca->xRamDiskSize)
303 rd_size = (naca->xRamDiskSize * PAGE_SIZE) / 1024;
305 #endif /* CONFIG_BLK_DEV_INITRD */
307 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
310 iSeries_recal_tb = get_tb();
311 iSeries_recal_titan = HvCallXm_loadTod();
313 ppc_md.setup_arch = iSeries_setup_arch;
314 ppc_md.get_cpuinfo = iSeries_get_cpuinfo;
315 ppc_md.init_IRQ = iSeries_init_IRQ;
316 ppc_md.get_irq = iSeries_get_irq;
319 ppc_md.pcibios_fixup = iSeries_pci_final_fixup;
321 ppc_md.restart = iSeries_restart;
322 ppc_md.power_off = iSeries_power_off;
323 ppc_md.halt = iSeries_halt;
325 ppc_md.get_boot_time = iSeries_get_boot_time;
326 ppc_md.set_rtc_time = iSeries_set_rtc_time;
327 ppc_md.get_rtc_time = iSeries_get_rtc_time;
328 ppc_md.calibrate_decr = iSeries_calibrate_decr;
329 ppc_md.progress = iSeries_progress;
335 * Initialize the table which translate Linux physical addresses to
336 * AS/400 absolute addresses
338 build_iSeries_Memory_Map();
339 setup_iSeries_cache_sizes();
340 /* Initialize machine-dependency vectors */
344 if (itLpNaca.xPirEnvironMode == 0)
345 piranha_simulator = 1;
348 void __init iSeries_init(unsigned long r3, unsigned long r4, unsigned long r5,
349 unsigned long r6, unsigned long r7)
353 /* Associate Lp Event Queue 0 with processor 0 */
354 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
356 /* copy the command line parameter from the primary VSP */
357 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
358 HvLpDma_Direction_RemoteToLocal);
363 if (!*p || *p == '\n')
369 if (strstr(cmd_line, "dprofile=")) {
370 for (q = cmd_line; (p = strstr(q, "dprofile=")) != 0; ) {
371 unsigned long size, new_klimit;
374 if ((p > cmd_line) && (p[-1] != ' '))
376 dprof_shift = simple_strtoul(q, &q, 0);
377 dprof_len = (unsigned long)_etext -
378 (unsigned long)_stext;
379 dprof_len >>= dprof_shift;
380 size = ((dprof_len * sizeof(unsigned int)) +
381 (PAGE_SIZE-1)) & PAGE_MASK;
382 dprof_buffer = (unsigned int *)((klimit +
383 (PAGE_SIZE-1)) & PAGE_MASK);
384 new_klimit = ((unsigned long)dprof_buffer) + size;
385 lmb_reserve(__pa(klimit), (new_klimit-klimit));
387 memset(dprof_buffer, 0, size);
391 iSeries_setup_dprofile();
399 * The iSeries may have very large memories ( > 128 GB ) and a partition
400 * may get memory in "chunks" that may be anywhere in the 2**52 real
401 * address space. The chunks are 256K in size. To map this to the
402 * memory model Linux expects, the AS/400 specific code builds a
403 * translation table to translate what Linux thinks are "physical"
404 * addresses to the actual real addresses. This allows us to make
405 * it appear to Linux that we have contiguous memory starting at
406 * physical address zero while in fact this could be far from the truth.
407 * To avoid confusion, I'll let the words physical and/or real address
408 * apply to the Linux addresses while I'll use "absolute address" to
409 * refer to the actual hardware real address.
411 * build_iSeries_Memory_Map gets information from the Hypervisor and
412 * looks at the Main Store VPD to determine the absolute addresses
413 * of the memory that has been assigned to our partition and builds
414 * a table used to translate Linux's physical addresses to these
415 * absolute addresses. Absolute addresses are needed when
416 * communicating with the hypervisor (e.g. to build HPT entries)
419 static void __init build_iSeries_Memory_Map(void)
421 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
423 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
425 u32 totalChunks,moreChunks;
426 u32 currChunk, thisChunk, absChunk;
430 struct MemoryBlock mb[32];
431 unsigned long numMemoryBlocks, curBlock;
433 /* Chunk size on iSeries is 256K bytes */
434 totalChunks = (u32)HvLpConfig_getMsChunks();
435 klimit = msChunks_alloc(klimit, totalChunks, 1UL << 18);
438 * Get absolute address of our load area
439 * and map it to physical address 0
440 * This guarantees that the loadarea ends up at physical 0
441 * otherwise, it might not be returned by PLIC as the first
445 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
446 loadAreaSize = itLpNaca.xLoadAreaChunks;
449 * Only add the pages already mapped here.
450 * Otherwise we might add the hpt pages
451 * The rest of the pages of the load area
452 * aren't in the HPT yet and can still
453 * be assigned an arbitrary physical address
455 if ((loadAreaSize * 64) > HvPagesToMap)
456 loadAreaSize = HvPagesToMap / 64;
458 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
461 * TODO Do we need to do something if the HPT is in the 64MB load area?
462 * This would be required if the itLpNaca.xLoadAreaChunks includes
466 printk("Mapping load area - physical addr = 0000000000000000\n"
467 " absolute addr = %016lx\n",
468 chunk_to_addr(loadAreaFirstChunk));
469 printk("Load area size %dK\n", loadAreaSize * 256);
471 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
472 msChunks.abs[nextPhysChunk] =
473 loadAreaFirstChunk + nextPhysChunk;
476 * Get absolute address of our HPT and remember it so
477 * we won't map it to any physical address
479 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
480 hptSizePages = (u32)HvCallHpt_getHptPages();
481 hptSizeChunks = hptSizePages >> (msChunks.chunk_shift - PAGE_SHIFT);
482 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
484 printk("HPT absolute addr = %016lx, size = %dK\n",
485 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
487 /* Fill in the htab_data structure */
488 /* Fill in size of hashed page table */
489 num_ptegs = hptSizePages *
490 (PAGE_SIZE / (sizeof(HPTE) * HPTES_PER_GROUP));
491 htab_data.htab_num_ptegs = num_ptegs;
492 htab_data.htab_hash_mask = num_ptegs - 1;
495 * The actual hashed page table is in the hypervisor,
496 * we have no direct access
498 htab_data.htab = NULL;
501 * Determine if absolute memory has any
502 * holes so that we can interpret the
503 * access map we get back from the hypervisor
506 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
509 * Process the main store access map from the hypervisor
510 * to build up our physical -> absolute translation table
515 moreChunks = totalChunks;
518 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
520 thisChunk = currChunk;
522 chunkBit = map >> 63;
526 while (thisChunk >= mb[curBlock].logicalEnd) {
528 if (curBlock >= numMemoryBlocks)
529 panic("out of memory blocks");
531 if (thisChunk < mb[curBlock].logicalStart)
532 panic("memory block error");
534 absChunk = mb[curBlock].absStart +
535 (thisChunk - mb[curBlock].logicalStart);
536 if (((absChunk < hptFirstChunk) ||
537 (absChunk > hptLastChunk)) &&
538 ((absChunk < loadAreaFirstChunk) ||
539 (absChunk > loadAreaLastChunk))) {
540 msChunks.abs[nextPhysChunk] = absChunk;
551 * main store size (in chunks) is
552 * totalChunks - hptSizeChunks
553 * which should be equal to
556 systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
558 /* Bolt kernel mappings for all of memory */
559 iSeries_bolt_kernel(0, systemcfg->physicalMemorySize);
562 lmb_add(0, systemcfg->physicalMemorySize);
563 lmb_analyze(); /* ?? */
564 lmb_reserve(0, __pa(klimit));
568 * Set up the variables that describe the cache line sizes
571 static void __init setup_iSeries_cache_sizes(void)
574 unsigned int procIx = get_paca()->lppaca.xDynHvPhysicalProcIndex;
576 systemcfg->iCacheL1Size =
577 xIoHriProcessorVpd[procIx].xInstCacheSize * 1024;
578 systemcfg->iCacheL1LineSize =
579 xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
580 systemcfg->dCacheL1Size =
581 xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024;
582 systemcfg->dCacheL1LineSize =
583 xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
584 naca->iCacheL1LinesPerPage = PAGE_SIZE / systemcfg->iCacheL1LineSize;
585 naca->dCacheL1LinesPerPage = PAGE_SIZE / systemcfg->dCacheL1LineSize;
587 i = systemcfg->iCacheL1LineSize;
589 while ((i = (i / 2)))
591 naca->iCacheL1LogLineSize = n;
593 i = systemcfg->dCacheL1LineSize;
595 while ((i = (i / 2)))
597 naca->dCacheL1LogLineSize = n;
599 printk("D-cache line size = %d\n",
600 (unsigned int)systemcfg->dCacheL1LineSize);
601 printk("I-cache line size = %d\n",
602 (unsigned int)systemcfg->iCacheL1LineSize);
606 * Create a pte. Used during initialization only.
608 static void iSeries_make_pte(unsigned long va, unsigned long pa,
611 HPTE local_hpte, rhpte;
612 unsigned long hash, vpn;
615 vpn = va >> PAGE_SHIFT;
616 hash = hpt_hash(vpn, 0);
618 local_hpte.dw1.dword1 = pa | mode;
619 local_hpte.dw0.dword0 = 0;
620 local_hpte.dw0.dw0.avpn = va >> 23;
621 local_hpte.dw0.dw0.bolted = 1; /* bolted */
622 local_hpte.dw0.dw0.v = 1;
624 slot = HvCallHpt_findValid(&rhpte, vpn);
626 /* Must find space in primary group */
627 panic("hash_page: hpte already exists\n");
629 HvCallHpt_addValidate(slot, 0, (HPTE *)&local_hpte );
633 * Bolt the kernel addr space into the HPT
635 static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr)
638 unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
641 for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) {
642 unsigned long ea = (unsigned long)__va(pa);
643 unsigned long vsid = get_kernel_vsid(ea);
644 unsigned long va = (vsid << 28) | (pa & 0xfffffff);
645 unsigned long vpn = va >> PAGE_SHIFT;
646 unsigned long slot = HvCallHpt_findValid(&hpte, vpn);
648 if (hpte.dw0.dw0.v) {
649 /* HPTE exists, so just bolt it */
650 HvCallHpt_setSwBits(slot, 0x10, 0);
651 /* And make sure the pp bits are correct */
652 HvCallHpt_setPp(slot, PP_RWXX);
654 /* No HPTE exists, so create a new bolted one */
655 iSeries_make_pte(va, phys_to_abs(pa), mode_rw);
659 extern unsigned long ppc_proc_freq;
660 extern unsigned long ppc_tb_freq;
665 void __init iSeries_setup_arch(void)
668 unsigned procIx = get_paca()->lppaca.xDynHvPhysicalProcIndex;
670 /* Add an eye catcher and the systemcfg layout version number */
671 strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
672 systemcfg->version.major = SYSTEMCFG_MAJOR;
673 systemcfg->version.minor = SYSTEMCFG_MINOR;
675 /* Setup the Lp Event Queue */
677 /* Allocate a page for the Event Stack
678 * The hypervisor wants the absolute real address, so
679 * we subtract out the KERNELBASE and add in the
680 * absolute real address of the kernel load area
682 eventStack = alloc_bootmem_pages(LpEventStackSize);
683 memset(eventStack, 0, LpEventStackSize);
685 /* Invoke the hypervisor to initialize the event stack */
686 HvCallEvent_setLpEventStack(0, eventStack, LpEventStackSize);
688 /* Initialize fields in our Lp Event Queue */
689 xItLpQueue.xSlicEventStackPtr = (char *)eventStack;
690 xItLpQueue.xSlicCurEventPtr = (char *)eventStack;
691 xItLpQueue.xSlicLastValidEventPtr = (char *)eventStack +
692 (LpEventStackSize - LpEventMaxSize);
693 xItLpQueue.xIndex = 0;
695 /* Compute processor frequency */
696 procFreqHz = ((1UL << 34) * 1000000) /
697 xIoHriProcessorVpd[procIx].xProcFreq;
698 procFreqMhz = procFreqHz / 1000000;
699 procFreqMhzHundreths = (procFreqHz / 10000) - (procFreqMhz * 100);
700 ppc_proc_freq = procFreqHz;
702 /* Compute time base frequency */
703 tbFreqHz = ((1UL << 32) * 1000000) /
704 xIoHriProcessorVpd[procIx].xTimeBaseFreq;
705 tbFreqMhz = tbFreqHz / 1000000;
706 tbFreqMhzHundreths = (tbFreqHz / 10000) - (tbFreqMhz * 100);
707 ppc_tb_freq = tbFreqHz;
709 printk("Max logical processors = %d\n",
710 itVpdAreas.xSlicMaxLogicalProcs);
711 printk("Max physical processors = %d\n",
712 itVpdAreas.xSlicMaxPhysicalProcs);
713 printk("Processor frequency = %lu.%02lu\n", procFreqMhz,
714 procFreqMhzHundreths);
715 printk("Time base frequency = %lu.%02lu\n", tbFreqMhz,
717 systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
718 printk("Processor version = %x\n", systemcfg->processor);
721 void iSeries_get_cpuinfo(struct seq_file *m)
723 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
730 int iSeries_get_irq(struct pt_regs *regs)
732 /* -2 means ignore this interrupt */
739 void iSeries_restart(char *cmd)
747 void iSeries_power_off(void)
755 void iSeries_halt(void)
761 unsigned long jdh_time = 0;
763 extern void setup_default_decr(void);
766 * void __init iSeries_calibrate_decr()
769 * This routine retrieves the internal processor frequency from the VPD,
770 * and sets up the kernel timer decrementer based on that value.
773 void __init iSeries_calibrate_decr(void)
775 unsigned long cyclesPerUsec;
776 struct div_result divres;
778 /* Compute decrementer (and TB) frequency in cycles/sec */
779 cyclesPerUsec = ppc_tb_freq / 1000000;
782 * Set the amount to refresh the decrementer by. This
783 * is the number of decrementer ticks it takes for
786 tb_ticks_per_jiffy = ppc_tb_freq / HZ;
789 /* TEST CODE FOR ADJTIME */
790 tb_ticks_per_jiffy += tb_ticks_per_jiffy / 5000;
791 /* END OF TEST CODE */
795 * tb_ticks_per_sec = freq; would give better accuracy
796 * but tb_ticks_per_sec = tb_ticks_per_jiffy*HZ; assures
797 * that jiffies (and xtime) will match the time returned
798 * by do_gettimeofday.
800 tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
801 tb_ticks_per_usec = cyclesPerUsec;
802 tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
803 div128_by_32(1024 * 1024, 0, tb_ticks_per_sec, &divres);
804 tb_to_xs = divres.result_low;
805 setup_default_decr();
808 void __init iSeries_progress(char * st, unsigned short code)
810 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
811 if (!piranha_simulator && mf_initialized) {
813 mf_displayProgress(code);
819 void iSeries_fixup_klimit(void)
822 * Change klimit to take into account any ram disk
823 * that may be included
826 klimit = KERNELBASE + (u64)naca->xRamDisk +
827 (naca->xRamDiskSize * PAGE_SIZE);
830 * No ram disk was included - check and see if there
831 * was an embedded system map. Change klimit to take
832 * into account any embedded system map
834 if (embedded_sysmap_end)
835 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
840 static void iSeries_setup_dprofile(void)
845 for (i = 0; i < NR_CPUS; ++i) {
846 paca[i].prof_shift = dprof_shift;
847 paca[i].prof_len = dprof_len - 1;
848 paca[i].prof_buffer = dprof_buffer;
849 paca[i].prof_stext = (unsigned *)_stext;
851 paca[i].prof_enabled = 1;
856 int __init iSeries_src_init(void)
858 /* clear the progress line */
859 ppc_md.progress(" ", 0xffff);
863 late_initcall(iSeries_src_init);