5 Right now just handle "write" to the serial port at any speed
6 and printf to the console when '\n' is written.
8 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
10 This file is part of simavr.
12 simavr is free software: you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation, either version 3 of the License, or
15 (at your option) any later version.
17 simavr is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with simavr. If not, see <http://www.gnu.org/licenses/>.
29 DEFINE_FIFO(uint8_t, uart_fifo, 128);
31 static avr_cycle_count_t avr_uart_txc_raise(struct avr_t * avr, avr_cycle_count_t when, void * param)
33 avr_uart_t * p = (avr_uart_t *)param;
34 if (avr_regbit_get(avr, p->txen)) {
35 // if the interrupts are not used, still raised the UDRE and TXC flaga
36 avr_raise_interrupt(avr, &p->udrc);
37 avr_raise_interrupt(avr, &p->txc);
42 static avr_cycle_count_t avr_uart_rxc_raise(struct avr_t * avr, avr_cycle_count_t when, void * param)
44 avr_uart_t * p = (avr_uart_t *)param;
45 if (avr_regbit_get(avr, p->rxen))
46 avr_raise_interrupt(avr, &p->rxc);
50 static uint8_t avr_uart_read(struct avr_t * avr, avr_io_addr_t addr, void * param)
52 avr_uart_t * p = (avr_uart_t *)param;
54 if (!avr_regbit_get(avr, p->rxen)) {
56 // made to trigger potential watchpoints
57 avr_core_watch_read(avr, addr);
60 uint8_t v = uart_fifo_read(&p->input);
63 // made to trigger potential watchpoints
64 v = avr_core_watch_read(avr, addr);
66 if (!uart_fifo_isempty(&p->input))
67 avr_cycle_timer_register_usec(avr, 100, avr_uart_rxc_raise, p); // should be uart speed dependent
72 static void avr_uart_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
74 avr_uart_t * p = (avr_uart_t *)param;
76 if (addr == p->r_udr) {
77 avr_core_watch_write(avr, addr, v);
79 avr_regbit_clear(avr, p->udrc.raised);
80 avr_cycle_timer_register_usec(avr, 100, avr_uart_txc_raise, p); // should be uart speed dependent
84 buf[l++] = v < ' ' ? '.' : v;
86 if (v == '\n' || l == 127) {
88 printf("\e[32m%s\e[0m\n", buf);
90 // printf("UDR%c(%02x) = %02x\n", p->name, addr, v);
91 // tell other modules we are "outputing" a byte
92 if (avr_regbit_get(avr, p->txen))
93 avr_raise_irq(p->io.irq + UART_IRQ_OUTPUT, v);
95 // get the bits before the write
96 uint8_t udre = avr_regbit_get(avr, p->udrc.raised);
97 uint8_t txc = avr_regbit_get(avr, p->txc.raised);
99 avr_core_watch_write(avr, addr, v);
101 // if writing one to a one, clear bit
102 if (udre && avr_regbit_get(avr, p->udrc.raised))
103 avr_regbit_clear(avr, p->udrc.raised);
104 if (txc && avr_regbit_get(avr, p->txc.raised))
105 avr_regbit_clear(avr, p->txc.raised);
109 static void avr_uart_irq_input(struct avr_irq_t * irq, uint32_t value, void * param)
111 avr_uart_t * p = (avr_uart_t *)param;
112 avr_t * avr = p->io.avr;
114 // check to see fi receiver is enabled
115 if (!avr_regbit_get(avr, p->rxen))
118 if (uart_fifo_isempty(&p->input))
119 avr_cycle_timer_register_usec(avr, 100, avr_uart_rxc_raise, p); // should be uart speed dependent
120 uart_fifo_write(&p->input, value); // add to fifo
124 void avr_uart_reset(struct avr_io_t *io)
126 avr_uart_t * p = (avr_uart_t *)io;
127 avr_t * avr = p->io.avr;
128 avr_regbit_set(avr, p->udrc.raised);
129 avr_irq_register_notify(p->io.irq + UART_IRQ_INPUT, avr_uart_irq_input, p);
130 avr_cycle_timer_cancel(avr, avr_uart_rxc_raise, p);
131 avr_cycle_timer_cancel(avr, avr_uart_txc_raise, p);
132 uart_fifo_reset(&p->input);
134 // DEBUG allow printf without fidding with enabling the uart
135 avr_regbit_set(avr, p->txen);
139 static avr_io_t _io = {
141 .reset = avr_uart_reset,
144 void avr_uart_init(avr_t * avr, avr_uart_t * p)
147 avr_register_io(avr, &p->io);
149 // printf("%s UART%c UDR=%02x\n", __FUNCTION__, p->name, p->r_udr);
151 // allocate this module's IRQ
152 p->io.irq_count = UART_IRQ_COUNT;
153 p->io.irq = avr_alloc_irq(0, p->io.irq_count);
154 p->io.irq_ioctl_get = AVR_IOCTL_UART_GETIRQ(p->name);
156 avr_register_io_write(avr, p->r_udr, avr_uart_write, p);
157 avr_register_io_read(avr, p->r_udr, avr_uart_read, p);
159 avr_register_io_write(avr, p->r_ucsra, avr_uart_write, p);