git.rot13.org Git - librfid/blob - src/rfid_asic_rc632.c

   1 /* Generic Philips CL RC632 Routines
   2  *
   3  * (C) 2005-2008 Harald Welte <laforge@gnumonks.org>
   4  *
   5  */
   6
   7 /*
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License version 2
  10  *  as published by the Free Software Foundation
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <unistd.h>
  23 #include <stdlib.h>
  24 #include <string.h>
  25 #include <errno.h>
  26 #include <limits.h>
  27 #include <sys/types.h>
  28
  29 #include <librfid/rfid.h>
  30 #include <librfid/rfid_asic.h>
  31 #include <librfid/rfid_asic_rc632.h>
  32 #include <librfid/rfid_reader_cm5121.h>
  33 #include <librfid/rfid_layer2_iso14443a.h>
  34 #include <librfid/rfid_layer2_iso15693.h>
  35 #include <librfid/rfid_protocol_mifare_classic.h>
  36
  37 #include "rfid_iso14443_common.h"
  38 #include "rc632.h"
  39
  40 #ifdef  __MINGW32__
  41 #include "usleep.h"
  42 #endif/*__MINGW32__*/
  43
  44 #define RC632_TMO_AUTH1 140
  45
  46 #define TIMER_RELAX_FACTOR      10
  47
  48 #define ENTER()         DEBUGP("entering\n")
  49 const struct rfid_asic rc632;
  50
  51 struct register_file {
  52         u_int8_t reg;
  53         u_int8_t val;
  54 };
  55
  56 /* Register and FIFO Access functions */
  57 static int
  58 rc632_reg_write(struct rfid_asic_handle *handle,
  59                 u_int8_t reg,
  60                 u_int8_t val)
  61 {
  62         return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
  63 }
  64
  65 static int
  66 rc632_reg_read(struct rfid_asic_handle *handle,
  67                u_int8_t reg,
  68                u_int8_t *val)
  69 {
  70         return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
  71 }
  72
  73 static int
  74 rc632_fifo_write(struct rfid_asic_handle *handle,
  75                  u_int8_t len,
  76                  const u_int8_t *buf,
  77                  u_int8_t flags)
  78 {
  79         return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
  80                                                            len, buf, flags);
  81 }
  82
  83 static int
  84 rc632_fifo_read(struct rfid_asic_handle *handle,
  85                 u_int8_t len,
  86                 u_int8_t *buf)
  87 {
  88         return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
  89 }
  90
  91
  92 static int
  93 rc632_set_bits(struct rfid_asic_handle *handle,
  94                 u_int8_t reg,
  95                 u_int8_t val)
  96 {
  97         int ret;
  98         u_int8_t tmp;
  99
 100         ret = rc632_reg_read(handle, reg, &tmp);
 101         if (ret < 0)
 102                 return -1;
 103
 104         /* if bits are already set, no need to set them again */
 105         if ((tmp & val) == val)
 106                 return 0;
 107
 108         return rc632_reg_write(handle, reg, (tmp|val)&0xff);
 109 }
 110 static int
 111 rc632_set_bit_mask(struct rfid_asic_handle *handle,
 112                    u_int8_t reg, u_int8_t mask, u_int8_t val)
 113 {
 114         int ret;
 115         u_int8_t tmp;
 116
 117         ret = rc632_reg_read(handle, reg, &tmp);
 118         if (ret < 0)
 119                 return ret;
 120
 121         /* if bits are already like we want them, abort */
 122         if ((tmp & mask) == val)
 123                 return 0;
 124
 125         return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
 126 }
 127
 128 static int
 129 rc632_clear_bits(struct rfid_asic_handle *handle,
 130                  u_int8_t reg,
 131                  u_int8_t val)
 132 {
 133         int ret;
 134         u_int8_t tmp;
 135
 136         ret = rc632_reg_read(handle, reg, &tmp);
 137         if (ret < 0) {
 138                 DEBUGP("error during reg_read(%p, %d):%d\n",
 139                         handle, reg, ret);
 140                 return -1;
 141         }
 142         /* if bits are already cleared, no need to clear them again */
 143         if ((tmp & val) == 0)
 144                 return 0;
 145
 146         return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
 147 }
 148
 149 static int
 150 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
 151 {
 152         return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
 153 }
 154
 155 static int
 156 rc632_rf_power(struct rfid_asic_handle *handle, int on)
 157 {
 158         ENTER();
 159         if (on)
 160                 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
 161                                       RC632_TXCTRL_TX1_RF_EN|
 162                                       RC632_TXCTRL_TX2_RF_EN);
 163         else
 164                 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
 165                                         RC632_TXCTRL_TX1_RF_EN|
 166                                         RC632_TXCTRL_TX2_RF_EN);
 167 }
 168
 169 static int
 170 rc632_power(struct rfid_asic_handle *handle, int on)
 171 {
 172         ENTER();
 173         if (on)
 174                 return rc632_clear_bits(handle, RC632_REG_CONTROL,
 175                                         RC632_CONTROL_POWERDOWN);
 176         else
 177                 return rc632_set_bits(handle, RC632_REG_CONTROL,
 178                                       RC632_CONTROL_POWERDOWN);
 179 }
 180
 181 static int
 182 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
 183                      int len)
 184 {
 185         int i, ret;
 186
 187         for (i = 0; i < len; i++) {
 188                 ret = rc632_reg_write(h, f[i].reg, f[i].val);
 189                 if (ret < 0)
 190                         return ret;
 191         }
 192
 193         return 0;
 194 }
 195
 196 /* calculate best 8bit prescaler and divisor for given usec timeout */
 197 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
 198                           u_int8_t *divisor)
 199 {
 200         u_int8_t best_prescaler, best_divisor, i;
 201         int64_t smallest_diff;
 202
 203         smallest_diff = LLONG_MAX;
 204         best_prescaler = 0;
 205
 206         for (i = 0; i < 21; i++) {
 207                 u_int64_t clk, tmp_div, res;
 208                 int64_t diff;
 209                 clk = 13560000 / (1 << i);
 210                 tmp_div = (clk * timeout) / 1000000;
 211                 tmp_div++;
 212
 213                 if ((tmp_div > 0xff) || (tmp_div > clk))
 214                         continue;
 215
 216                 res = 1000000 / (clk / tmp_div);
 217                 diff = res - timeout;
 218
 219                 if (diff < 0)
 220                         continue;
 221
 222                 if (diff < smallest_diff) {
 223                         best_prescaler = i;
 224                         best_divisor = tmp_div;
 225                         smallest_diff = diff;
 226                 }
 227         }
 228
 229         *prescaler = best_prescaler;
 230         *divisor = best_divisor;
 231
 232         DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
 233                 timeout, best_prescaler, best_divisor);
 234
 235         return 0;
 236 }
 237
 238 static int
 239 rc632_timer_set(struct rfid_asic_handle *handle,
 240                 u_int64_t timeout)
 241 {
 242         int ret;
 243         u_int8_t prescaler, divisor, irq;
 244
 245         timeout *= TIMER_RELAX_FACTOR;
 246
 247         ret = best_prescaler(timeout, &prescaler, &divisor);
 248
 249         ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
 250                               prescaler & 0x1f);
 251         if (ret < 0)
 252                 return ret;
 253
 254         ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
 255                               RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
 256
 257         /* clear timer irq bit */
 258         ret = rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 259
 260         /* enable timer IRQ */
 261         ret |= rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET | RC632_IRQ_TIMER);
 262
 263         ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
 264
 265         return ret;
 266 }
 267
 268 /* Wait until RC632 is idle or TIMER IRQ has happened */
 269 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
 270 {
 271         int ret;
 272         u_int8_t stat, irq, cmd;
 273
 274         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_EN, &irq);
 275         if (ret < 0)
 276                 return ret;
 277         DEBUGP_INTERRUPT_FLAG("irq_en",irq);
 278
 279         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET
 280                                 | RC632_IRQ_TIMER
 281                                 | RC632_IRQ_IDLE
 282                                 | RC632_IRQ_RX );
 283         if (ret < 0)
 284                 return ret;
 285
 286         while (1) {
 287                 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
 288                 DEBUGP_STATUS_FLAG(stat);
 289                 if (stat & RC632_STAT_ERR) {
 290                         u_int8_t err;
 291                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
 292                         DEBUGP_ERROR_FLAG(err);
 293                         if (err & (RC632_ERR_FLAG_COL_ERR |
 294                                    RC632_ERR_FLAG_PARITY_ERR |
 295                                    RC632_ERR_FLAG_FRAMING_ERR |
 296                                 /* FIXME: why get we CRC errors in CL2 anticol at iso14443a operation with mifare UL? */
 297                                 /*   RC632_ERR_FLAG_CRC_ERR | */
 298                                    0))
 299                                 return -EIO;
 300                 }
 301                 if (stat & RC632_STAT_IRQ) {
 302                         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
 303                         if (ret < 0)
 304                                 return ret;
 305                         DEBUGP_INTERRUPT_FLAG("irq_rq",irq);
 306
 307                         if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
 308                                 DEBUGP("timer expired before RX!!\n");
 309                                 rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 310                                 return -ETIMEDOUT;
 311                         }
 312                 }
 313
 314                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 315                 if (ret < 0)
 316                         return ret;
 317
 318                 if (cmd == 0) {
 319                         rc632_clear_irqs(handle, RC632_IRQ_RX);
 320                         return 0;
 321                 }
 322
 323                 /* poll every millisecond */
 324                 usleep(1000);
 325         }
 326 }
 327
 328 /* Stupid RC632 implementations don't evaluate interrupts but poll the
 329  * command register for "status idle" */
 330 static int
 331 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
 332 {
 333         u_int8_t cmd = 0xff;
 334         int ret, cycles = 0;
 335 #define USLEEP_PER_CYCLE        128
 336
 337         timeout *= TIMER_RELAX_FACTOR;
 338
 339         while (cmd != 0) {
 340                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 341                 if (ret < 0)
 342                         return ret;
 343
 344                 {
 345                         u_int8_t foo;
 346                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
 347                         DEBUGP_STATUS_FLAG(foo);
 348                         /* check if Error has occured (ERR flag set) */
 349                         if (foo & RC632_STAT_ERR) {
 350                                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
 351                                 DEBUGP_ERROR_FLAG(foo);
 352                         }
 353                         /* check if IRQ has occurred (IRQ flag set)*/
 354                         if (foo & RC632_STAT_IRQ) {
 355                                 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
 356                                 DEBUGP_INTERRUPT_FLAG("irq_rq",foo);
 357                                 /* clear all interrupts */
 358                                 rc632_clear_irqs(handle, 0xff);
 359                         }
 360                 }
 361                 if (cmd == 0) {
 362                         /* FIXME: read second time ?? */
 363                         DEBUGP("cmd == 0 (IDLE)\n");
 364                         return 0;
 365                 }
 366
 367                 /* Abort after some timeout */
 368                 if (cycles > timeout/USLEEP_PER_CYCLE) {
 369                         DEBUGP("timeout...\n");
 370                         return -ETIMEDOUT;
 371                 }
 372
 373                 cycles++;
 374                 usleep(USLEEP_PER_CYCLE);
 375         }
 376
 377         return 0;
 378 }
 379
 380 static int
 381 rc632_transmit(struct rfid_asic_handle *handle,
 382                 const u_int8_t *buf,
 383                 u_int8_t len,
 384                 u_int64_t timeout)
 385 {
 386         int ret, cur_len;
 387         const u_int8_t *cur_buf = buf;
 388
 389         DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
 390
 391         if (len > 64)
 392                 cur_len = 64;
 393         else
 394                 cur_len = len;
 395
 396         do {
 397                 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
 398                 if (ret < 0)
 399                         return ret;
 400
 401                 if (cur_buf == buf)  {
 402                         /* only start transmit first time */
 403                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 404                                               RC632_CMD_TRANSMIT);
 405                         if (ret < 0)
 406                                 return ret;
 407                 }
 408
 409                 cur_buf += cur_len;
 410                 if (cur_buf < buf + len) {
 411                         cur_len = buf - cur_buf;
 412                         if (cur_len > 64)
 413                                 cur_len = 64;
 414                 } else
 415                         cur_len = 0;
 416
 417         } while (cur_len);
 418
 419         return rc632_wait_idle(handle, timeout);
 420 }
 421
 422 static int
 423 tcl_toggle_pcb(struct rfid_asic_handle *handle)
 424 {
 425         /* FIXME: toggle something between 0x0a and 0x0b */
 426         return 0;
 427 }
 428
 429 static int
 430 rc632_transceive(struct rfid_asic_handle *handle,
 431                  const u_int8_t *tx_buf,
 432                  u_int8_t tx_len,
 433                  u_int8_t *rx_buf,
 434                  u_int8_t *rx_len,
 435                  u_int64_t timer,
 436                  unsigned int toggle)
 437 {
 438         int ret, cur_tx_len, i;
 439         u_int8_t rx_avail;
 440         const u_int8_t *cur_tx_buf = tx_buf;
 441
 442         DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
 443
 444         if (tx_len > 64)
 445                 cur_tx_len = 64;
 446         else
 447                 cur_tx_len = tx_len;
 448
 449
 450         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
 451         /* clear all interrupts */
 452         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 453         ret = rc632_reg_write(handle, RC632_REG_ERROR_FLAG, 0xff);
 454
 455         { u_int8_t tmp;
 456         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 457         DEBUGP_STATUS_FLAG(tmp);
 458         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 459         DEBUGP_STATUS_FLAG(tmp);
 460         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 461         DEBUGP_STATUS_FLAG(tmp);
 462         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 463         DEBUGP_ERROR_FLAG(tmp);
 464         }
 465
 466         ret = rc632_timer_set(handle, timer);
 467         if (ret < 0)
 468                 return ret;
 469
 470         do {
 471                 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
 472                 if (ret < 0)
 473                         return ret;
 474
 475                 if (cur_tx_buf == tx_buf) {
 476                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 477                                               RC632_CMD_TRANSCEIVE);
 478                         if (ret < 0)
 479                                 return ret;
 480                 }
 481
 482                 cur_tx_buf += cur_tx_len;
 483                 if (cur_tx_buf < tx_buf + tx_len) {
 484                         u_int8_t fifo_fill;
 485                         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
 486                                              &fifo_fill);
 487                         if (ret < 0)
 488                                 return ret;
 489
 490                         cur_tx_len = 64 - fifo_fill;
 491                 } else
 492                         cur_tx_len = 0;
 493
 494         } while (cur_tx_len);
 495
 496         if (toggle == 1)
 497                 tcl_toggle_pcb(handle);
 498
 499         ret = rc632_wait_idle_timer(handle);
 500         //ret = rc632_wait_idle(handle, timer);
 501
 502         DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
 503         if (ret < 0)
 504                 return ret;
 505
 506         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 507         if (ret < 0)
 508                 return ret;
 509
 510         if (rx_avail > *rx_len)
 511                 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 512         else if (*rx_len > rx_avail)
 513                 *rx_len = rx_avail;
 514
 515         DEBUGP("rx_len == %d\n",*rx_len);
 516
 517         if (rx_avail == 0) {
 518                 u_int8_t tmp;
 519
 520                 for (i = 0; i < 1; i++){
 521                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 522                         DEBUGP_STATUS_FLAG(tmp);
 523                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 524                         DEBUGP_ERROR_FLAG(tmp);
 525                 }
 526                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 527
 528                 //return 0;
 529                 return -1;
 530         }
 531
 532         return rc632_fifo_read(handle, *rx_len, rx_buf);
 533         /* FIXME: discard addidional bytes in FIFO */
 534 }
 535
 536
 537 static int
 538 rc632_receive(struct rfid_asic_handle *handle,
 539                  u_int8_t *rx_buf,
 540                  u_int8_t *rx_len,
 541                  u_int64_t timer)
 542 {
 543         int ret, cur_tx_len, i;
 544         u_int8_t rx_avail;
 545
 546         DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
 547         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
 548         /* clear all interrupts */
 549         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 550
 551         ret = rc632_timer_set(handle, timer);
 552         if (ret < 0)
 553                 return ret;
 554
 555         ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
 556         if (ret < 0)
 557                 return ret;
 558
 559         /* the timer cannot start in hardware based on the command we just
 560          * sent. this means that our timing will always be quite a bit more lax,
 561          * i.e. we'll always wait for a bit longer than the specs ask us to. */
 562         ret = rc632_set_bits(handle, RC632_REG_CONTROL,
 563                              RC632_CONTROL_TIMER_START);
 564         if (ret < 0)
 565                 return ret;
 566
 567         //ret = rc632_wait_idle(handle, timer);
 568         ret = rc632_wait_idle_timer(handle);
 569         if (ret < 0)
 570                 return ret;
 571
 572         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 573         if (ret < 0)
 574                 return ret;
 575
 576         if (rx_avail > *rx_len) {
 577                 //DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 578         } else if (*rx_len > rx_avail)
 579                 *rx_len = rx_avail;
 580
 581         if (rx_avail == 0) {
 582                 u_int8_t tmp;
 583
 584                 DEBUGP("rx_len == 0\n");
 585
 586                 for (i = 0; i < 1; i++) {
 587                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 588                         DEBUGP_STATUS_FLAG(tmp);
 589                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 590                         DEBUGP_ERROR_FLAG(tmp);
 591                 }
 592
 593                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 594                 return -1;
 595         }
 596
 597         return rc632_fifo_read(handle, *rx_len, rx_buf);
 598         /* FIXME: discard additional bytes in FIFO */
 599 }
 600
 601 #define MAX_WRITE_LEN   16      /* see Sec. 18.6.1.2 of RC632 Spec Rev. 3.2. */
 602
 603 static int
 604 rc632_write_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 605                    u_int8_t *data, u_int8_t len)
 606 {
 607         u_int8_t sndbuf[MAX_WRITE_LEN + 2];
 608         u_int8_t reg;
 609         int ret;
 610
 611         if (len > MAX_WRITE_LEN)
 612                 return -EINVAL;
 613         if (addr < 0x10)
 614                 return -EPERM;
 615         if (addr > 0x1ff)
 616                 return -EINVAL;
 617
 618         sndbuf[0] = addr & 0x00ff;      /* LSB */
 619         sndbuf[1] = addr >> 8;          /* MSB */
 620         memcpy(&sndbuf[2], data, len);
 621
 622         ret = rc632_fifo_write(handle, len + 2, sndbuf, 0x03);
 623         if (ret < 0)
 624                 return ret;
 625
 626         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_WRITE_E2);
 627         if (ret < 0)
 628                 return ret;
 629
 630         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 631         if (ret < 0)
 632                 return ret;
 633
 634         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 635                 return -EPERM;
 636
 637         while (1) {
 638                 u_int8_t reg;
 639                 ret = rc632_reg_read(handle, RC632_REG_SECONDARY_STATUS, &reg);
 640                 if (ret < 0)
 641                         return ret;
 642
 643                 if (reg & RC632_SEC_ST_E2_READY) {
 644                         /* the E2Write command must be terminated, See sec. 18.6.1.3 */
 645                         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
 646                         break;
 647                 }
 648         }
 649
 650         return ret;
 651 }
 652
 653 static int
 654 rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 655                   u_int8_t *buf, u_int8_t len)
 656 {
 657         u_int8_t sndbuf[3];
 658         u_int8_t reg;
 659         int ret;
 660
 661         sndbuf[0] = addr & 0xff;
 662         sndbuf[1] = addr >> 8;
 663         sndbuf[2] = len;
 664
 665         ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
 666         if (ret < 0)
 667                 return ret;
 668
 669         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
 670         if (ret < 0)
 671                 return ret;
 672
 673         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 674         if (ret < 0)
 675                 return ret;
 676
 677         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 678                 return -EPERM;
 679
 680         usleep(20000);
 681
 682         return rc632_fifo_read(handle, len, buf);
 683 }
 684
 685 static int
 686 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
 687 {
 688         u_int8_t sndbuf[2] = { 0x01, 0x02 };
 689         u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
 690         int ret;
 691
 692         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
 693         if (ret < 0)
 694                 return ret;
 695
 696         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
 697         if (ret < 0)
 698                 return ret;
 699
 700         ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
 701         if (ret < 0)
 702                 return ret;
 703
 704         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
 705         if (ret < 0)
 706                 return ret;
 707
 708         usleep(10000);  /* FIXME: no checking for cmd completion? *
 709
 710         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
 711         if (ret < 0)
 712                 return ret;
 713
 714         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
 715         if (ret < 0)
 716                 return ret;
 717
 718         /* FIXME: what to do with crc result? */
 719         return ret;
 720 }
 721
 722
 723 int
 724 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
 725 {
 726         int ret = 0;
 727         u_int8_t i;
 728
 729         for (i = 0; i <= 0x3f; i++)
 730                 ret |= rc632_reg_read(handle, i, &buf[i]);
 731
 732         return ret;
 733 }
 734
 735 /* generic FIFO access functions (if no more efficient ones provided by
 736  * transport driver) */
 737
 738 static int
 739 generic_fifo_write()
 740 {
 741         /* FIXME: implementation (not needed for CM 5121) */
 742         return -1;
 743 }
 744
 745 static int
 746 generic_fifo_read()
 747 {
 748         /* FIXME: implementation (not neded for CM 5121) */
 749         return -1;
 750 }
 751
 752 static int
 753 rc632_init(struct rfid_asic_handle *ah)
 754 {
 755         int ret;
 756
 757         /* switch off rf (make sure PICCs are reset at init time) */
 758         ret = rc632_power(ah, 0);
 759         if (ret < 0)
 760                 return ret;
 761
 762         usleep(10000);
 763
 764         /* switch on rf */
 765         ret = rc632_power(ah, 1);
 766         if (ret < 0)
 767                 return ret;
 768
 769         /* disable register paging */
 770         ret = rc632_reg_write(ah, 0x00, 0x00);
 771         if (ret < 0)
 772                 return ret;
 773
 774         /* set some sane default values */
 775         ret = rc632_reg_write(ah, 0x11, 0x5b);
 776         if (ret < 0)
 777                 return ret;
 778
 779         /* switch off rf */
 780         ret = rc632_rf_power(ah, 0);
 781         if (ret < 0)
 782                 return ret;
 783
 784         usleep(100000);
 785
 786         /* switch on rf */
 787         ret = rc632_rf_power(ah, 1);
 788         if (ret < 0)
 789                 return ret;
 790
 791         return 0;
 792 }
 793
 794 static int
 795 rc632_fini(struct rfid_asic_handle *ah)
 796 {
 797         int ret;
 798
 799         /* switch off rf */
 800         ret = rc632_rf_power(ah, 0);
 801         if (ret < 0)
 802                 return ret;
 803
 804         ret = rc632_power(ah, 0);
 805         if (ret < 0)
 806                 return ret;
 807
 808         return 0;
 809 }
 810
 811 struct rfid_asic_handle *
 812 rc632_open(struct rfid_asic_transport_handle *th)
 813 {
 814         struct rfid_asic_handle *h;
 815
 816         h = malloc_asic_handle(sizeof(*h));
 817         if (!h)
 818                 return NULL;
 819         memset(h, 0, sizeof(*h));
 820
 821         h->asic = (void*)&rc632;
 822         h->rath = th;
 823         h->fc = h->asic->fc;
 824         /* FIXME: this is only cm5121 specific, since the latency
 825          * down to the RC632 FIFO is too long to refill during TX/RX */
 826         h->mtu = h->mru = 64;
 827
 828         if (rc632_init(h) < 0) {
 829                 free_asic_handle(h);
 830                 return NULL;
 831         }
 832
 833         return h;
 834 }
 835
 836 void
 837 rc632_close(struct rfid_asic_handle *h)
 838 {
 839         rc632_fini(h);
 840         free_asic_handle(h);
 841 }
 842
 843 /*
 844  * ISO14443A
 845  */
 846
 847 /* Register file for ISO14443A standard */
 848 static struct register_file iso14443a_script[] = {
 849         {
 850                 .reg    = RC632_REG_TX_CONTROL,
 851                 .val    = RC632_TXCTRL_MOD_SRC_INT |
 852                           RC632_TXCTRL_TX2_INV |
 853                           RC632_TXCTRL_FORCE_100_ASK |
 854                           RC632_TXCTRL_TX2_RF_EN |
 855                           RC632_TXCTRL_TX1_RF_EN,
 856         }, {
 857                 .reg    = RC632_REG_CW_CONDUCTANCE,
 858                 .val    = CM5121_CW_CONDUCTANCE,
 859         }, {
 860                 .reg    = RC632_REG_MOD_CONDUCTANCE,
 861                 .val    = CM5121_MOD_CONDUCTANCE,
 862         }, {
 863                 .reg    = RC632_REG_CODER_CONTROL,
 864                 .val    = (RC632_CDRCTRL_TXCD_14443A |
 865                            RC632_CDRCTRL_RATE_106K),
 866         }, {
 867                 .reg    = RC632_REG_MOD_WIDTH,
 868                 .val    = 0x13,
 869         }, {
 870                 .reg    = RC632_REG_MOD_WIDTH_SOF,
 871                 .val    = 0x3f,
 872         }, {
 873                 .reg    = RC632_REG_TYPE_B_FRAMING,
 874                 .val    = 0x00,
 875         }, {
 876                 .reg    = RC632_REG_RX_CONTROL1,
 877                 .val    = (RC632_RXCTRL1_GAIN_35DB |
 878                            RC632_RXCTRL1_ISO14443 |
 879                            RC632_RXCTRL1_SUBCP_8),
 880         }, {
 881                 .reg    = RC632_REG_DECODER_CONTROL,
 882                 .val    = (RC632_DECCTRL_MANCHESTER |
 883                            RC632_DECCTRL_RXFR_14443A),
 884         }, {
 885                 .reg    = RC632_REG_BIT_PHASE,
 886                 .val    = CM5121_14443A_BITPHASE,
 887         }, {
 888                 .reg    = RC632_REG_RX_THRESHOLD,
 889                 .val    = CM5121_14443A_THRESHOLD,
 890         }, {
 891                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
 892                 .val    = 0x00,
 893         }, {
 894                 .reg    = RC632_REG_RX_CONTROL2,
 895                 .val    = (RC632_RXCTRL2_DECSRC_INT |
 896                            RC632_RXCTRL2_CLK_Q),
 897         }, {
 898                 .reg    = RC632_REG_RX_WAIT,
 899                 //.val  = 0x03, /* default value */
 900                 .val    = 0x06, /* omnikey */
 901         }, {
 902                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
 903                 .val    = (RC632_CR_PARITY_ENABLE |
 904                            RC632_CR_PARITY_ODD),
 905         }, {
 906                 .reg    = RC632_REG_CRC_PRESET_LSB,
 907                 .val    = 0x63,
 908         }, {
 909                 .reg    = RC632_REG_CRC_PRESET_MSB,
 910                 .val    = 0x63,
 911         },
 912 };
 913
 914 static int
 915 rc632_iso14443a_init(struct rfid_asic_handle *handle)
 916 {
 917         int ret;
 918
 919         /* flush fifo (our way) */
 920         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
 921                               RC632_CONTROL_FIFO_FLUSH);
 922
 923         ret = rc632_execute_script(handle, iso14443a_script,
 924                                    ARRAY_SIZE(iso14443a_script));
 925         if (ret < 0)
 926                 return ret;
 927
 928         return 0;
 929 }
 930
 931 static int
 932 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
 933 {
 934
 935 #if 0
 936         ret = rc632_rf_power(handle, 0);
 937         if (ret < 0)
 938                 return ret;
 939 #endif
 940
 941
 942         return 0;
 943 }
 944
 945
 946 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
 947 static int
 948 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
 949                                 u_int8_t cmd,
 950                                 struct iso14443a_atqa *atqa)
 951 {
 952         int ret;
 953         u_int8_t tx_buf[1];
 954         u_int8_t rx_len = 2;
 955         u_int8_t error_flag;
 956
 957         memset(atqa, 0, sizeof(*atqa));
 958
 959         tx_buf[0] = cmd;
 960
 961         /* transfer only 7 bits of last byte in frame */
 962         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
 963         if (ret < 0)
 964                 return ret;
 965
 966         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 967                                 RC632_CONTROL_CRYPTO1_ON);
 968         if (ret < 0)
 969                 return ret;
 970
 971 #if 0
 972         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 973                                 (RC632_CR_PARITY_ENABLE |
 974                                  RC632_CR_PARITY_ODD));
 975 #else
 976         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 977                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 978
 979 #endif
 980         if (ret < 0)
 981                 return ret;
 982
 983         ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
 984                                 (u_int8_t *)atqa, &rx_len,
 985                                 ISO14443A_FDT_ANTICOL_LAST1, 0);
 986         if (ret < 0) {
 987                 DEBUGP("error during rc632_transceive()\n");
 988                 return ret;
 989         }
 990
 991         /* switch back to normal 8bit last byte */
 992         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
 993         if (ret < 0)
 994                 return ret;
 995
 996         /* determine whether there was a collission */
 997         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
 998         if (ret < 0)
 999                 return ret;
1000
1001         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1002                 u_int8_t boc;
1003                 /* retrieve bit of collission */
1004                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1005                 if (ret < 0)
1006                         return ret;
1007                 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
1008                 /* FIXME: how to signal this up the stack */
1009         }
1010
1011         if (rx_len != 2) {
1012                 DEBUGP("rx_len(%d) != 2\n", rx_len);
1013                 return -1;
1014         }
1015
1016         return 0;
1017 }
1018
1019 /* transceive regular frame */
1020 static int
1021 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
1022                            unsigned int frametype,
1023                            const u_int8_t *tx_buf, unsigned int tx_len,
1024                            u_int8_t *rx_buf, unsigned int *rx_len,
1025                            u_int64_t timeout, unsigned int flags)
1026 {
1027         int ret;
1028         u_int8_t rxl;
1029         u_int8_t channel_red;
1030
1031         if (*rx_len > 0xff)
1032                 rxl = 0xff;
1033         else
1034                 rxl = *rx_len;
1035
1036         memset(rx_buf, 0, *rx_len);
1037
1038         switch (frametype) {
1039         case RFID_14443A_FRAME_REGULAR:
1040         case RFID_MIFARE_FRAME:
1041                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1042                                 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1043                 break;
1044         case RFID_14443B_FRAME_REGULAR:
1045                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1046                                 |RC632_CR_CRC3309;
1047                 break;
1048 #if 0
1049         case RFID_MIFARE_FRAME:
1050                 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1051                 break;
1052 #endif
1053         case RFID_15693_FRAME:
1054                 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
1055                                 | RC632_CR_TX_CRC_ENABLE;
1056                 break;
1057         case RFID_15693_FRAME_ICODE1:
1058                 /* FIXME: implement */
1059         default:
1060                 return -EINVAL;
1061                 break;
1062         }
1063         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1064                               channel_red);
1065         if (ret < 0)
1066                 return ret;
1067         DEBUGP("tx_len=%u\n",tx_len);
1068         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
1069         *rx_len = rxl;
1070         if (ret < 0)
1071                 return ret;
1072
1073
1074         return 0;
1075 }
1076
1077 /* transceive anti collission bitframe */
1078 static int
1079 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1080                                 struct iso14443a_anticol_cmd *acf,
1081                                 unsigned int *bit_of_col)
1082 {
1083         int ret;
1084         u_int8_t rx_buf[64];
1085         u_int8_t rx_len = sizeof(rx_buf);
1086         u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1087         u_int8_t boc;
1088         u_int8_t error_flag;
1089         *bit_of_col = ISO14443A_BITOFCOL_NONE;
1090         memset(rx_buf, 0, sizeof(rx_buf));
1091
1092         /* disable mifare cryto */
1093         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1094                                 RC632_CONTROL_CRYPTO1_ON);
1095         if (ret < 0)
1096                 return ret;
1097
1098         /* disable CRC summing */
1099 #if 0
1100         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1101                                 (RC632_CR_PARITY_ENABLE |
1102                                  RC632_CR_PARITY_ODD));
1103 #else
1104         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1105                                 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1106 #endif
1107         if (ret < 0)
1108                 return ret;
1109
1110         tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1111         tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1112         if (tx_last_bits) {
1113                 tx_bytes_total = tx_bytes+1;
1114                 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1115         }
1116         else
1117                 tx_bytes_total = tx_bytes;
1118
1119         /* set RxAlign and TxLastBits*/
1120         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1121                                 (rx_align << 4) | (tx_last_bits));
1122         if (ret < 0)
1123                 return ret;
1124
1125         ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1126                                 rx_buf, &rx_len, 0x32, 0);
1127         if (ret < 0)
1128                 return ret;
1129
1130         /* bitwise-OR the two halves of the split byte */
1131         acf->uid_bits[tx_bytes-2] = (
1132                   (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1133                 | rx_buf[0]);
1134
1135         /* copy the rest */
1136         if (rx_len)
1137                 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1138
1139         /* determine whether there was a collission */
1140         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1141         if (ret < 0)
1142                 return ret;
1143
1144         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1145                 /* retrieve bit of collission */
1146                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1147                 if (ret < 0)
1148                         return ret;
1149
1150                 /* bit of collission relative to start of part 1 of
1151                  * anticollision frame (!) */
1152                 *bit_of_col = 2*8 + boc;
1153         }
1154
1155         return 0;
1156 }
1157
1158 enum rc632_rate {
1159         RC632_RATE_106  = 0x00,
1160         RC632_RATE_212  = 0x01,
1161         RC632_RATE_424  = 0x02,
1162         RC632_RATE_848  = 0x03,
1163 };
1164
1165 struct rx_config {
1166         u_int8_t        subc_pulses;
1167         u_int8_t        rx_coding;
1168         u_int8_t        rx_threshold;
1169         u_int8_t        bpsk_dem_ctrl;
1170 };
1171
1172 struct tx_config {
1173         u_int8_t        rate;
1174         u_int8_t        mod_width;
1175 };
1176
1177 static struct rx_config rx_configs[] = {
1178         {
1179                 .subc_pulses    = RC632_RXCTRL1_SUBCP_8,
1180                 .rx_coding      = RC632_DECCTRL_MANCHESTER,
1181                 .rx_threshold   = 0x88,
1182                 .bpsk_dem_ctrl  = 0x00,
1183         },
1184         {
1185                 .subc_pulses    = RC632_RXCTRL1_SUBCP_4,
1186                 .rx_coding      = RC632_DECCTRL_BPSK,
1187                 .rx_threshold   = 0x50,
1188                 .bpsk_dem_ctrl  = 0x0c,
1189         },
1190         {
1191                 .subc_pulses    = RC632_RXCTRL1_SUBCP_2,
1192                 .rx_coding      = RC632_DECCTRL_BPSK,
1193                 .rx_threshold   = 0x50,
1194                 .bpsk_dem_ctrl  = 0x0c,
1195         },
1196         {
1197                 .subc_pulses    = RC632_RXCTRL1_SUBCP_1,
1198                 .rx_coding      = RC632_DECCTRL_BPSK,
1199                 .rx_threshold   = 0x50,
1200                 .bpsk_dem_ctrl  = 0x0c,
1201         },
1202 };
1203
1204 static struct tx_config tx_configs[] = {
1205         {
1206                 .rate           = RC632_CDRCTRL_RATE_106K,
1207                 .mod_width      = 0x13,
1208         },
1209         {
1210                 .rate           = RC632_CDRCTRL_RATE_212K,
1211                 .mod_width      = 0x07,
1212         },
1213         {
1214                 .rate           = RC632_CDRCTRL_RATE_424K,
1215                 .mod_width      = 0x03,
1216         },
1217         {
1218                 .rate           = RC632_CDRCTRL_RATE_848K,
1219                 .mod_width      = 0x01,
1220         },
1221 };
1222
1223 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1224                                      unsigned int tx, unsigned int rate)
1225 {
1226         int rc;
1227         u_int8_t reg;
1228
1229
1230         if (!tx) {
1231                 /* Rx */
1232                 if (rate > ARRAY_SIZE(rx_configs))
1233                         return -EINVAL;
1234
1235                 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1236                                         RC632_RXCTRL1_SUBCP_MASK,
1237                                         rx_configs[rate].subc_pulses);
1238                 if (rc < 0)
1239                         return rc;
1240
1241                 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1242                                         RC632_DECCTRL_BPSK,
1243                                         rx_configs[rate].rx_coding);
1244                 if (rc < 0)
1245                         return rc;
1246
1247                 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1248                                         rx_configs[rate].rx_threshold);
1249                 if (rc < 0)
1250                         return rc;
1251
1252                 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1253                         rc = rc632_reg_write(handle,
1254                                              RC632_REG_BPSK_DEM_CONTROL,
1255                                              rx_configs[rate].bpsk_dem_ctrl);
1256                         if (rc < 0)
1257                                 return rc;
1258                 }
1259         } else {
1260                 /* Tx */
1261                 if (rate > ARRAY_SIZE(tx_configs))
1262                         return -EINVAL;
1263
1264                 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1265                                         RC632_CDRCTRL_RATE_MASK,
1266                                         tx_configs[rate].rate);
1267                 if (rc < 0)
1268                         return rc;
1269
1270                 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1271                                      tx_configs[rate].mod_width);
1272                 if (rc < 0)
1273                         return rc;
1274         }
1275
1276         return 0;
1277 }
1278
1279 #if 0
1280 static struct register_file iso14443b_script[] = {
1281         {
1282                 .reg    = RC632_REG_TX_CONTROL,
1283                 .val    = (RC632_TXCTRL_TX1_RF_EN |
1284                            RC632_TXCTRL_TX2_RF_EN |
1285                            RC632_TXCTRL_TX2_INV |
1286                            RC632_TXCTRL_MOD_SRC_INT),
1287         }, {
1288                 .reg    = RC632_REG_CW_CONDUCTANCE,
1289                 .val    = 0x3f,
1290         }, {
1291                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1292                 .val    = 0x04,
1293         }, {
1294                 .reg    = RC632_REG_CODER_CONTROL,
1295                 .val    = (RC632_CDRCTRL_TXCD_NRZ |
1296                            RC632_CDRCTRL_RATE_14443B),
1297         }, {
1298                 .reg    = RC632_REG_MOD_WIDTH,
1299                 .val    = 0x13,
1300         }, {
1301                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1302                 .val    = 0x3f,
1303         }, {
1304                 .reg    = RC632_REG_TYPE_B_FRAMING,
1305                 .val    = (RC632_TBFRAMING_SOF_11L_3H |
1306                            (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1307                            RC632_TBFRAMING_EOF_11);
1308         }, {
1309                 .reg    = RC632_REG_RX_CONTROL1,
1310                 .val    = (RC632_RXCTRL1_GAIN_35DB |
1311                            RC632_RXCTRL1_ISO14443,
1312                            RC632_RXCTRL1_SUBCP_8),
1313         }, {
1314                 .reg    = RC632_REG_DECODER_CONTROL,
1315                 .val    = (RC632_DECCTRL_BPSK |
1316                            RC632_DECCTRL_RXFR_14443B),
1317         }, {
1318                 .reg    = RC632_REG_BIT_PHASE,
1319                 .val    = CM5121_14443B_BITPHASE,
1320         }, {
1321                 .reg    = RC632_REG_RX_THRESHOLD,
1322                 .val    = CM5121_14443B_THRESHOLD,
1323         }, {
1324                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1325                 .val    = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1326                            (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1327                            RC632_BPSKD_FILTER_AMP_DETECT |
1328                            RC632_BPSKD_NO_RX_EOF |
1329                            RC632_BPSKD_NO_RX_EGT),
1330         }, {
1331                 .reg    = RC632_REG_RX_CONTROL2,
1332                 .val    = (RC632_RXCTRL2_AUTO_PD |
1333                            RC632_RXCTRL2_DECSRC_INT),
1334         }, {
1335                 .reg    = RC632_REG_RX_WAIT,
1336                 .val    = 0x03,
1337         }, {
1338                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1339                 .val    = (RC632_CR_TX_CRC_ENABLE |
1340                            RC632_CR_RX_CRC_ENABLE |
1341                            RC632_CR_CRC3309),
1342         }, {
1343                 .reg    = RC632_REG_CRC_PRESET_LSB,
1344                 .val    = 0xff,
1345         }, {
1346                 .reg    = RC632_REG_CRC_PRESET_MSB,
1347                 .val    = 0xff,
1348         },
1349 };
1350 #endif
1351
1352 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1353 {
1354         int ret;
1355         ENTER();
1356         /* FIXME: some FIFO work */
1357
1358         /* flush fifo (our way) */
1359         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1360                               RC632_CONTROL_FIFO_FLUSH);
1361         if (ret < 0)
1362                 return ret;
1363
1364         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1365                         (RC632_TXCTRL_TX1_RF_EN |
1366                          RC632_TXCTRL_TX2_RF_EN |
1367                          RC632_TXCTRL_TX2_INV |
1368                          RC632_TXCTRL_MOD_SRC_INT));
1369         if (ret < 0)
1370                 return ret;
1371
1372         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1373         if (ret < 0)
1374                 return ret;
1375
1376         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1377         if (ret < 0)
1378                 return ret;
1379
1380         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1381                               (RC632_CDRCTRL_TXCD_NRZ |
1382                                RC632_CDRCTRL_RATE_14443B));
1383         if (ret < 0)
1384                 return ret;
1385
1386         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1387         if (ret < 0)
1388                 return ret;
1389
1390         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1391         if (ret < 0)
1392                 return ret;
1393
1394         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1395                               (RC632_TBFRAMING_SOF_11L_3H |
1396                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1397                                RC632_TBFRAMING_EOF_11));
1398         if (ret < 0)
1399                 return ret;
1400
1401         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1402                               (RC632_RXCTRL1_GAIN_35DB |
1403                                RC632_RXCTRL1_ISO14443 |
1404                                RC632_RXCTRL1_SUBCP_8));
1405         if (ret < 0)
1406                 return ret;
1407
1408         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1409                               (RC632_DECCTRL_BPSK |
1410                                RC632_DECCTRL_RXFR_14443B));
1411         if (ret < 0)
1412                 return ret;
1413
1414         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1415                                 CM5121_14443B_BITPHASE);
1416         if (ret < 0)
1417                 return ret;
1418
1419         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1420                                 CM5121_14443B_THRESHOLD);
1421         if (ret < 0)
1422                 return ret;
1423
1424         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1425                               ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1426                                (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1427                                RC632_BPSKD_FILTER_AMP_DETECT |
1428                                RC632_BPSKD_NO_RX_EOF |
1429                                RC632_BPSKD_NO_RX_EGT));
1430         if (ret < 0)
1431                 return ret;
1432
1433         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1434                               (RC632_RXCTRL2_AUTO_PD |
1435                                RC632_RXCTRL2_DECSRC_INT));
1436         if (ret < 0)
1437                 return ret;
1438
1439         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1440         if (ret < 0)
1441                 return ret;
1442
1443         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1444                               (RC632_CR_TX_CRC_ENABLE |
1445                                RC632_CR_RX_CRC_ENABLE |
1446                                RC632_CR_CRC3309));
1447         if (ret < 0)
1448                 return ret;
1449
1450         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1451         if (ret < 0)
1452                 return ret;
1453
1454         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1455         if (ret < 0)
1456                 return ret;
1457
1458         return 0;
1459 }
1460
1461
1462
1463 /*
1464  * ISO15693
1465  */
1466
1467 /* Register file for ISO15693 standard */
1468 static struct register_file iso15693_fast_script[] = {
1469         {
1470                 .reg    = RC632_REG_TX_CONTROL,
1471                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1472                           RC632_TXCTRL_TX2_INV |
1473                           RC632_TXCTRL_TX2_RF_EN |
1474                           RC632_TXCTRL_TX1_RF_EN,
1475         }, {
1476                 .reg    = RC632_REG_CW_CONDUCTANCE,
1477                 .val    = 0x3f,
1478         }, {
1479                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1480                 /* FIXME: nxp default for icode1/15693: 0x05 */
1481                 //.val  = 0x02,
1482                 .val    = 0x21, /* omnikey */
1483         }, {
1484                 .reg    = RC632_REG_CODER_CONTROL,
1485                 .val    = RC632_CDRCTRL_TXCD_15693_FAST |
1486                           RC632_CDRCTRL_RATE_15693,
1487         }, {
1488                 .reg    = RC632_REG_MOD_WIDTH,
1489                 .val    = 0x3f,
1490         }, {
1491                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1492                 .val    = 0x3f,
1493         }, {
1494                 .reg    = RC632_REG_TYPE_B_FRAMING,
1495                 .val    = 0x00,
1496         }, {
1497                 .reg    = RC632_REG_RX_CONTROL1,
1498                 .val    = RC632_RXCTRL1_ISO15693 |
1499                           RC632_RXCTRL1_SUBCP_16 |
1500                           RC632_RXCTRL1_GAIN_35DB,
1501         }, {
1502                 /* FIXME: this should always be the case */
1503                 .reg    = RC632_REG_RX_CONTROL2,
1504                 .val    = RC632_RXCTRL2_DECSRC_INT,
1505         }, {
1506                 .reg    = RC632_REG_DECODER_CONTROL,
1507                 .val    = RC632_DECCTRL_MANCHESTER |
1508                           RC632_DECCTRL_RX_INVERT |
1509                           RC632_DECCTRL_ZEROAFTERCOL |
1510                           RC632_DECCTRL_RXFR_15693,
1511         }, {
1512                 .reg    = RC632_REG_BIT_PHASE,
1513                 /* FIXME: nxp default for icode1/15693: 0x54 */
1514                 //.val  = 0x52,
1515                 .val    = 0xd0, /* omnikey */
1516         }, {
1517                 .reg    = RC632_REG_RX_THRESHOLD,
1518                 /* FIXME: nxp default for icode1/15693: 0x68 */
1519                 //.val  = 0x66,
1520                 .val    = 0xed,
1521         }, {
1522                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1523                 .val    = 0x00,
1524         }, {
1525                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1526                 .val    = RC632_CR_RX_CRC_ENABLE |
1527                           RC632_CR_TX_CRC_ENABLE |
1528                           RC632_CR_CRC3309,
1529         }, {
1530                 .reg    = RC632_REG_CRC_PRESET_LSB,
1531                 .val    = 0xff,
1532         }, {
1533                 .reg    = RC632_REG_CRC_PRESET_MSB,
1534                 .val    = 0xff,
1535         },
1536 };
1537
1538 /* Register file for I*Code standard */
1539 static struct register_file icode1_std_script[] = {
1540         {
1541                 .reg    = RC632_REG_TX_CONTROL,
1542                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1543                           RC632_TXCTRL_TX2_INV |
1544                           RC632_TXCTRL_TX2_RF_EN |
1545                           RC632_TXCTRL_TX1_RF_EN,
1546         }, {
1547                 .reg    = RC632_REG_CW_CONDUCTANCE,
1548                 .val    = 0x3f,
1549         }, {
1550                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1551                 /* FIXME: nxp default for icode1/15693: 0x05 */
1552                 .val    = 0x02,
1553         }, {
1554                 .reg    = RC632_REG_CODER_CONTROL,
1555                 .val    = RC632_CDRCTRL_TXCD_ICODE_STD |
1556                           RC632_CDRCTRL_RATE_15693,
1557         }, {
1558                 .reg    = RC632_REG_MOD_WIDTH,
1559                 .val    = 0x3f,
1560         }, {
1561                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1562                 .val    = 0x3f,
1563         }, {
1564                 .reg    = RC632_REG_TYPE_B_FRAMING,
1565                 .val    = 0x00,
1566         }, {
1567                 .reg    = RC632_REG_RX_CONTROL1,
1568                 .val    = RC632_RXCTRL1_ISO15693 |
1569                           RC632_RXCTRL1_SUBCP_16 |
1570                           RC632_RXCTRL1_GAIN_35DB,
1571         }, {
1572                 /* FIXME: this should always be the case */
1573                 .reg    = RC632_REG_RX_CONTROL2,
1574                 .val    = RC632_RXCTRL2_DECSRC_INT,
1575         }, {
1576                 .reg    = RC632_REG_DECODER_CONTROL,
1577                 .val    = RC632_DECCTRL_MANCHESTER |
1578                           RC632_DECCTRL_RXFR_ICODE,
1579         }, {
1580                 .reg    = RC632_REG_BIT_PHASE,
1581                 /* FIXME: nxp default for icode1/15693: 0x54 */
1582                 .val    = 0x52,
1583         }, {
1584                 .reg    = RC632_REG_RX_THRESHOLD,
1585                 /* FIXME: nxp default for icode1/15693: 0x68 */
1586                 .val    = 0x66,
1587         }, {
1588                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1589                 .val    = 0x00,
1590         }, {
1591                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1592                 /* 16bit CRC, no parity, not CRC3309 */
1593                 .val    = RC632_CR_RX_CRC_ENABLE |
1594                           RC632_CR_TX_CRC_ENABLE,
1595         }, {
1596                 .reg    = RC632_REG_CRC_PRESET_LSB,
1597                 .val    = 0xfe,
1598         }, {
1599                 .reg    = RC632_REG_CRC_PRESET_MSB,
1600                 .val    = 0xff,
1601         /* }, {
1602                 .reg    = RC632_REG_INTERRUPT_EN,
1603                 .val    = RC632_INT_IDLE |
1604                           RC632_INT_TIMER |
1605                           RC632_INT_RX |
1606                           RC632_INT_TX, */
1607         }
1608 };
1609
1610 /* incremental changes on top of icode1_std_script */
1611 static struct register_file icode1_fast_patch[] = {
1612         {
1613                 .reg    = RC632_REG_CODER_CONTROL,
1614                 .val    = RC632_CDRCTRL_TXCD_ICODE_FAST |
1615                           RC632_CDRCTRL_RATE_ICODE_FAST,
1616         }, {
1617                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1618                 .val    = 0x73, /* 18.88uS */
1619         },
1620 };
1621
1622
1623 static int
1624 rc632_iso15693_init(struct rfid_asic_handle *h)
1625 {
1626         int ret;
1627
1628         /* flush fifo (our way) */
1629         ret = rc632_reg_write(h, RC632_REG_CONTROL,
1630                               RC632_CONTROL_FIFO_FLUSH);
1631         if (ret < 0)
1632                 return ret;
1633
1634         ret = rc632_execute_script(h, iso15693_fast_script,
1635                                    ARRAY_SIZE(iso15693_fast_script));
1636         if (ret < 0)
1637                 return ret;
1638
1639         return 0;
1640 }
1641
1642 static int
1643 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1644 {
1645         int ret;
1646
1647         ret = rc632_execute_script(h, icode1_std_script,
1648                                    ARRAY_SIZE(icode1_std_script));
1649         if (ret < 0)
1650                 return ret;
1651
1652         /* FIXME: how to configure fast/slow properly? */
1653 #if 0
1654         if (fast) {
1655                 ret = rc632_execute_script(h, icode1_fast_patch,
1656                                            ARRAY_SIZE(icode1_fast_patch));
1657                 if (ret < 0)
1658                         return ret;
1659         }
1660 #endif
1661
1662         return 0;
1663 }
1664
1665 static int
1666 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1667 {
1668         int ret;
1669
1670         /* ICL */
1671
1672         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1673                                                 (RC632_TXCTRL_MOD_SRC_INT |
1674                                                  RC632_TXCTRL_TX2_INV |
1675                                                  RC632_TXCTRL_TX2_RF_EN |
1676                                                  RC632_TXCTRL_TX1_RF_EN));
1677         if (ret < 0)
1678                 return ret;
1679
1680         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1681         if (ret < 0)
1682                 return ret;
1683
1684         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1685         if (ret < 0)
1686                 return ret;
1687
1688         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1689                                                 (RC632_CDRCTRL_RATE_15693 |
1690                                                  RC632_CDRCTRL_TXCD_ICODE_STD |
1691                                                  0x03)); /* FIXME */
1692         if (ret < 0)
1693                 return ret;
1694
1695         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1696         if (ret < 0)
1697                 return ret;
1698
1699         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1700         if (ret < 0)
1701                 return ret;
1702         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1703                                                 (RC632_RXCTRL1_SUBCP_16|
1704                                                  RC632_RXCTRL1_ISO15693|
1705                                                  RC632_RXCTRL1_GAIN_35DB));
1706         if (ret < 0)
1707                 return ret;
1708         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1709                                                 (RC632_DECCTRL_RX_INVERT|
1710                                                  RC632_DECCTRL_RXFR_15693));
1711         if (ret < 0)
1712                 return ret;
1713
1714         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1715         if (ret < 0)
1716                 return ret;
1717
1718         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1719         if (ret < 0)
1720                 return ret;
1721
1722         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1723         if (ret < 0)
1724                 return ret;
1725
1726         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1727                                                 RC632_RXCTRL2_DECSRC_INT);
1728         if (ret < 0)
1729                 return ret;
1730
1731         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1732         if (ret < 0)
1733                 return ret;
1734
1735         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1736         if (ret < 0)
1737                 return ret;
1738
1739         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1740         if (ret < 0)
1741                 return ret;
1742
1743         return 0;
1744 }
1745
1746 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1747 {
1748         int i = 0;
1749         while (len > 0) {
1750                 out[i] = in[len];
1751                 len--;
1752                 i++;
1753         }
1754 }
1755
1756 static int
1757 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1758                              const struct iso15693_anticol_cmd *acf,
1759                              unsigned int acf_len,
1760                              struct iso15693_anticol_resp *resp,
1761                              unsigned int *rx_len, unsigned char *bit_of_col)
1762 {
1763         u_int8_t error_flag, boc;
1764         //u_int8_t rx_len;
1765
1766         int ret, tx_len, mask_len_bytes;
1767         unsigned int rate = ISO15693_T_SLOW;
1768
1769         if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1770                 rate = ISO15693_T_FAST;
1771
1772         DEBUGP("acf = %s\n", rfid_hexdump(acf, acf_len));
1773
1774         ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1775                                (u_int8_t *) resp, rx_len,
1776                                iso15693_timing[rate][ISO15693_T1], 0);
1777         if (ret == -ETIMEDOUT)
1778                 return ret;
1779
1780         /* determine whether there was a collission */
1781         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1782         if (ret < 0)
1783                 return ret;
1784         DEBUGP_ERROR_FLAG(error_flag);
1785
1786         //FIXME: check for framing and crc errors...
1787         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1788                 /* retrieve bit of collission */
1789                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1790                 if (ret < 0)
1791                         return ret;
1792                 *bit_of_col = boc;
1793         } else {
1794                 *bit_of_col = 0;
1795         }
1796
1797         return 0;
1798
1799 #if 0
1800         *bit_of_col = 0;
1801
1802         mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1803
1804         if (acf->current_slot == 0) {
1805                 /* first call: transmit Inventory frame */
1806                 DEBUGP("first_frame\n");
1807
1808                 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1809
1810                 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1811                                         (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1812                 acf->current_slot = 1;
1813                 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1814                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1815                         return ret;     */
1816
1817         } else {
1818                 /* second++ call: end timeslot with EOFpulse and read */
1819                 DEBUGP("second++_frame\n");
1820                 if ((acf->current_slot > 16) ||
1821                     ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1822                                         && (acf->current_slot > 1))) {
1823
1824                         memset(uuid, 0, ISO15693_UID_LEN);
1825                         return -1;
1826                 }
1827
1828                 /* reset EOF-pulse-bit to 0 */
1829                 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1830                                        RC632_CDRCTRL_15693_EOF_PULSE);
1831                 usleep(50);
1832                 /* generate EOF pulse */
1833                 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1834                                      RC632_CDRCTRL_15693_EOF_PULSE);
1835                 if (ret < 0)
1836                         return ret;
1837                 // DEBUGP("waiting for EOF pulse\n");
1838                 // ret = rc632_wait_idle(handle, 10); //wait for idle
1839
1840                 rx_len = sizeof(rx_buf);
1841                 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1842                 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1843                 acf->current_slot++;
1844
1845                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1846                         return ret; */
1847         }
1848
1849         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1850         DEBUGP_STATUS_FLAG(tmp);
1851
1852         if (ret == -ETIMEDOUT) {
1853                 /* no VICC answer in this timeslot*/
1854                 memset(uuid, 0, ISO15693_UID_LEN);
1855                 return -ETIMEDOUT;
1856         } else {
1857                 /* determine whether there was a collission */
1858                 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1859                 DEBUGP_ERROR_FLAG(error_flag);
1860                 if (ret < 0)
1861                         return ret;
1862
1863                 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1864                         /* retrieve bit of collission */
1865                         ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1866                         if (ret < 0)
1867                                 return ret;
1868                         *bit_of_col = boc;
1869                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1870                         // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1871                         DEBUGP("Collision in slot %d bit %d\n",
1872                                 acf->current_slot,boc);
1873                         return -ECOLLISION;
1874                 } else {
1875                         /* no collision-> retrieve uuid */
1876                         DEBUGP("no collision in slot %d\n", acf->current_slot);
1877                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1878                         //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1879                 }
1880         }
1881
1882         return 0;
1883 #endif
1884 }
1885
1886 struct mifare_authcmd {
1887         u_int8_t auth_cmd;
1888         u_int8_t block_address;
1889         u_int32_t serno;        /* lsb 1 2 msb */
1890 } __attribute__ ((packed));
1891
1892
1893 #define RFID_MIFARE_KEY_LEN 6
1894 #define RFID_MIFARE_KEY_CODED_LEN 12
1895
1896 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1897 static int
1898 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1899 {
1900         int i;
1901         u_int8_t ln;
1902         u_int8_t hn;
1903
1904         for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1905                 ln = key6[i] & 0x0f;
1906                 hn = key6[i] >> 4;
1907                 key12[i * 2 + 1] = (~ln << 4) | ln;
1908                 key12[i * 2] = (~hn << 4) | hn;
1909         }
1910         return 0;
1911 }
1912
1913 static int
1914 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1915 {
1916         u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1917         u_int8_t reg;
1918         int ret;
1919
1920         ret = rc632_mifare_transform_key(key, coded_key);
1921         if (ret < 0)
1922                 return ret;
1923
1924         /* Terminate probably running command */
1925         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1926         if (ret < 0)
1927                 return ret;
1928
1929         ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1930         if (ret < 0)
1931                 return ret;
1932
1933         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1934         if (ret < 0)
1935                 return ret;
1936
1937         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1938         if (ret < 0)
1939                 return ret;
1940
1941         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1942         ret = rc632_wait_idle_timer(h);
1943         if (ret < 0)
1944                 return ret;
1945
1946         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1947         if (ret < 0)
1948                 return ret;
1949
1950         if (reg & RC632_ERR_FLAG_KEY_ERR)
1951                 return -EINVAL;
1952
1953         return 0;
1954 }
1955
1956 static int
1957 rc632_mifare_set_key_ee(struct rfid_asic_handle *h, unsigned int addr)
1958 {
1959         int ret;
1960         u_int8_t cmd_addr[2];
1961         u_int8_t reg;
1962
1963         if (addr > 0xffff - RFID_MIFARE_KEY_CODED_LEN)
1964                 return -EINVAL;
1965
1966         cmd_addr[0] = addr & 0xff;              /* LSB */
1967         cmd_addr[1] = (addr >> 8) & 0xff;       /* MSB */
1968
1969         /* Terminate probably running command */
1970         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1971         if (ret < 0)
1972                 return ret;
1973
1974         /* Write the key address to the FIFO */
1975         ret = rc632_fifo_write(h, 2, cmd_addr, 0x03);
1976         if (ret < 0)
1977                 return ret;
1978
1979         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY_E2);
1980         if (ret < 0)
1981                 return ret;
1982
1983         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1984         if (ret < 0)
1985                 return ret;
1986
1987         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1988         ret = rc632_wait_idle_timer(h);
1989         if (ret < 0)
1990                 return ret;
1991
1992         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1993         if (ret < 0)
1994                 return ret;
1995
1996         if (reg & RC632_ERR_FLAG_KEY_ERR)
1997                 return -EINVAL;
1998
1999         return 0;
2000 }
2001
2002 static int
2003 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
2004                   u_int8_t block)
2005 {
2006         int ret;
2007         struct mifare_authcmd acmd;
2008         u_int8_t reg;
2009
2010         if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
2011                 DEBUGP("invalid auth command\n");
2012                 return -EINVAL;
2013         }
2014
2015         /* Initialize acmd */
2016         acmd.block_address = block & 0xff;
2017         acmd.auth_cmd = cmd;
2018         //acmd.serno = htonl(serno);
2019         acmd.serno = serno;
2020
2021 #if 1
2022         /* Clear Rx CRC */
2023         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2024                                 RC632_CR_RX_CRC_ENABLE);
2025 #else
2026         /* Clear Rx CRC, Set Tx CRC and Odd Parity */
2027         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
2028                                 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
2029                                 RC632_CR_PARITY_ENABLE);
2030 #endif
2031         if (ret < 0)
2032                 return ret;
2033
2034         /* Send Authent1 Command */
2035         ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
2036         if (ret < 0)
2037                 return ret;
2038
2039         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
2040         if (ret < 0) {
2041                 DEBUGP("error during AUTHENT1");
2042                 return ret;
2043         }
2044
2045         /* Wait until transmitter is idle */
2046         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2047         if (ret < 0)
2048                 return ret;
2049
2050         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2051         ret = rc632_wait_idle_timer(h);
2052         if (ret < 0)
2053                 return ret;
2054
2055         ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, &reg);
2056         if (ret < 0)
2057                 return ret;
2058         if (reg & 0x07) {
2059                 DEBUGP("bitframe?");
2060                 return -EIO;
2061         }
2062
2063         /* Clear Tx CRC */
2064         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2065                                 RC632_CR_TX_CRC_ENABLE);
2066         if (ret < 0)
2067                 return ret;
2068
2069         /* Wait until transmitter is idle */
2070         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2071         if (ret < 0)
2072                 return ret;
2073
2074         /* Send Authent2 Command */
2075         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
2076         if (ret < 0)
2077                 return ret;
2078
2079         /* Wait until transmitter is idle */
2080         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2081         ret = rc632_wait_idle_timer(h);
2082         if (ret < 0)
2083                 return ret;
2084
2085         /* Check whether authentication was successful */
2086         ret = rc632_reg_read(h, RC632_REG_CONTROL, &reg);
2087         if (ret < 0)
2088                 return ret;
2089
2090         if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
2091                 DEBUGP("authentication not successful");
2092                 return -EACCES;
2093         }
2094
2095         return 0;
2096 }
2097
2098 /* transceive regular frame */
2099 static int
2100 rc632_mifare_transceive(struct rfid_asic_handle *handle,
2101                         const u_int8_t *tx_buf, unsigned int tx_len,
2102                         u_int8_t *rx_buf, unsigned int *rx_len,
2103                         u_int64_t timeout, unsigned int flags)
2104 {
2105         int ret;
2106         u_int8_t rxl = *rx_len & 0xff;
2107
2108         DEBUGP("entered\n");
2109         memset(rx_buf, 0, *rx_len);
2110
2111 #if 1
2112         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
2113                                 (RC632_CR_PARITY_ENABLE |
2114                                  RC632_CR_PARITY_ODD |
2115                                  RC632_CR_TX_CRC_ENABLE |
2116                                  RC632_CR_RX_CRC_ENABLE));
2117 #else
2118         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
2119                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
2120 #endif
2121         if (ret < 0)
2122                 return ret;
2123
2124         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
2125         *rx_len = rxl;
2126         if (ret < 0)
2127                 return ret;
2128
2129
2130         return 0;
2131 }
2132
2133
2134 static int
2135 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2136 {
2137         switch (l2) {
2138         case RFID_LAYER2_ISO14443A:
2139                 return rc632_iso14443a_init(h);
2140         case RFID_LAYER2_ISO14443B:
2141                 return rc632_iso14443b_init(h);
2142         case RFID_LAYER2_ISO15693:
2143                 return rc632_iso15693_init(h);
2144         case RFID_LAYER2_ICODE1:
2145                 return rc632_iso15693_icode1_init(h);
2146         default:
2147                 return -EINVAL;
2148         }
2149 }
2150
2151 const struct rfid_asic rc632 = {
2152         .name   = "Philips CL RC632",
2153         .fc     = ISO14443_FREQ_CARRIER,
2154         .priv.rc632 = {
2155                 .fn = {
2156                         .power = &rc632_power,
2157                         .rf_power = &rc632_rf_power,
2158                         .transceive = &rc632_iso14443ab_transceive,
2159                         .init = &rc632_layer2_init,
2160                         .iso14443a = {
2161                                 .transceive_sf = &rc632_iso14443a_transceive_sf,
2162                                 .transceive_acf = &rc632_iso14443a_transceive_acf,
2163                                 .set_speed = &rc632_iso14443a_set_speed,
2164                         },
2165                         .iso15693 = {
2166                                 .transceive_ac = &rc632_iso15693_transceive_ac,
2167                         },
2168                         .mifare_classic = {
2169                                 .setkey = &rc632_mifare_set_key,
2170                                 .setkey_ee = &rc632_mifare_set_key_ee,
2171                                 .auth = &rc632_mifare_auth,
2172                         },
2173                 },
2174         },
2175 };