1 /* Driver for Simcard Controller inside TI Calypso/Iota */
3 /* (C) 2010 by Philipp Fabian Benedikt Maier <philipp-maier@runningserver.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 #ifndef _CALYPSO_SIM_H
24 #define _CALYPSO_SIM_H
26 /* == REGISTERS IN THE IOTA BASEBAND == */
28 /* SimCard Control Register */
29 #define VRPCSIM_SIMLEN (1 << 3) /* Enable level shifter */
30 #define VRPCSIM_SIMRSU (1 << 2) /* voltage regulator output status */
31 #define VRPCSIM_RSIMEN (1 << 1) /* Voltage regulator enable */
32 #define VRPCSIM_SIMSEL 1 /* Select the VRSIM output voltage 1=2.9V, 0=1.8V */
36 /* == REGISTERS IN THE CALYPSO CPU == */
38 /* Reg_sim_cmd register (R/W) - FFFE:0000 */
39 #define REG_SIM_CMD 0xFFFE0000 /* register address */
40 #define REG_SIM_CMD_CMDCARDRST 1 /* SIM card reset sequence */
41 #define REG_SIM_CMD_CMDIFRST (1 << 1) /* SIM interface software reset */
42 #define REG_SIM_CMD_CMDSTOP (1 << 2) /* SIM card stop procedure */
43 #define REG_SIM_CMD_CMDSTART (1 << 3) /* SIM card start procedure */
44 #define REG_SIM_CMD_MODULE_CLK_EN (1 << 4) /* Clock of the module */
46 /* Reg_sim_stat register (R) - FFFE:0002 */
47 #define REG_SIM_STAT 0xFFFE0002 /* register address */
48 #define REG_SIM_STAT_STATNOCARD 1 /* card presence, 0 = no card, 1 = card detected */
49 #define REG_SIM_STAT_STATTXPAR (1 << 1) /* parity check for transmit byte, 0 = parity error, 1 = parity OK */
50 #define REG_SIM_STAT_STATFIFOFULL (1 << 2) /* FIFO content, 1 = FIFO full */
51 #define REG_SIM_STAT_STATFIFOEMPTY (1 << 3) /* FIFO content, 1 = FIFO empty */
53 /* Reg_sim_conf1 register (R/W) - FFFE:0004 */
54 #define REG_SIM_CONF1 0xFFFE0004 /* register address */
55 #define REG_SIM_CONF1_CONFCHKPAR 1 /* enable parity check on reception */
56 #define REG_SIM_CONF1_CONFCODCONV (1 << 1) /* coding convention: (TS character) */
57 #define REG_SIM_CONF1_CONFTXRX (1 << 2) /* SIO line direction */
58 #define REG_SIM_CONF1_CONFSCLKEN (1 << 3) /* SIM clock */
59 #define REG_SIM_CONF1_reserved (1 << 4) /* ETU period */
60 #define REG_SIM_CONF1_CONFSCLKDIV (1 << 5) /* SIM clock frequency */
61 #define REG_SIM_CONF1_CONFSCLKLEV (1 << 6) /* SIM clock idle level */
62 #define REG_SIM_CONF1_CONFETUPERIOD (1 << 7) /* ETU period */
63 #define REG_SIM_CONF1_CONFBYPASS (1 << 8) /* bypass hardware timers and start and stop sequences */
64 #define REG_SIM_CONF1_CONFSVCCLEV (1 << 9) /* logic level on SVCC (used if CONFBYPASS = 1) */
65 #define REG_SIM_CONF1_CONFSRSTLEV (1 << 10) /* logic level on SRST (used if CONFBYPASS = 1) */
66 #define REG_SIM_CONF1_CONFTRIG 11 /* FIFO trigger level */
67 #define REG_SIM_CONF1_CONFTRIG_0 (1 << 11)
68 #define REG_SIM_CONF1_CONFTRIG_1 (1 << 12)
69 #define REG_SIM_CONF1_CONFTRIG_2 (1 << 13)
70 #define REG_SIM_CONF1_CONFTRIG_3 (1 << 14)
71 #define REG_SIM_CONF1_CONFTRIG_MASK 0xF
72 #define REG_SIM_CONF1_CONFSIOLOW (1 << 15) /* SIO - 0 = no effect, 1 = force low */
74 /* Reg_sim_conf2 register (R/W) - FFFE:0006 */
75 #define REG_SIM_CONF2 0xFFFE0006 /* register address */
76 #define REG_SIM_CONF2_CONFTFSIM 0 /* time delay for filtering of SIM_CD */
77 #define REG_SIM_CONF2_CONFTFSIM_0 1 /* time-unit = 1024 * TCK13M (card extraction) */
78 #define REG_SIM_CONF2_CONFTFSIM_1 (1 << 1) /* or */
79 #define REG_SIM_CONF2_CONFTFSIM_2 (1 << 2) /* time-unit = 8192 * TCK13M (card insertion) */
80 #define REG_SIM_CONF2_CONFTFSIM_3 (1 << 3)
81 #define REG_SIM_CONF2_CONFTFSIM_MASK 0xF
82 #define REG_SIM_CONF2_CONFTDSIM 4 /* time delay for contact activation/deactivation */
83 #define REG_SIM_CONF2_CONFTDSIM_0 (1 << 4) /* time unit = 8 * TCKETU */
84 #define REG_SIM_CONF2_CONFTDSIM_1 (1 << 5)
85 #define REG_SIM_CONF2_CONFTDSIM_2 (1 << 6)
86 #define REG_SIM_CONF2_CONFTDSIM_3 (1 << 7)
87 #define REG_SIM_CONF2_CONFTDSIM_MASK 0xF
88 #define REG_SIM_CONF2_CONFWAITI 8 /* CONFWAITI overflow wait time between two received */
89 #define REG_SIM_CONF2_CONFWAITI_0 (1 << 8) /* character time unit = 960 *D * TCKETU */
90 #define REG_SIM_CONF2_CONFWAITI_1 (1 << 9) /* with D parameter = 1 or 8 (TA1 character) */
91 #define REG_SIM_CONF2_CONFWAITI_2 (1 << 10)
92 #define REG_SIM_CONF2_CONFWAITI_3 (1 << 11)
93 #define REG_SIM_CONF2_CONFWAITI_4 (1 << 12)
94 #define REG_SIM_CONF2_CONFWAITI_5 (1 << 13)
95 #define REG_SIM_CONF2_CONFWAITI_6 (1 << 14)
96 #define REG_SIM_CONF2_CONFWAITI_7 (1 << 15)
97 #define REG_SIM_CONF2_CONFWAITI_MASK 0xFF
99 /* Reg_sim_it register (R) - FFFE:0008 */
100 #define REG_SIM_IT 0xFFFE0008 /* register address */
101 #define REG_SIM_IT_SIM_NATR 1 /* 0 = on read access to REG_SIM_IT, 1 = no answer to reset */
102 #define REG_SIM_IT_SIM_WT (1 << 1) /* 0 = on read access to REG_SIM_IT, 1 = character underflow */
103 #define REG_SIM_IT_SIM_OV (1 << 2) /* 0 = on read access to REG_SIM_IT, 1 = receive overflow */
104 #define REG_SIM_IT_SIM_TX (1 << 3) /* 0 = on write access to REG_SIM_DTX or */
105 /* on switching from transmit to receive, mode (CONFTXRX bit) */
106 /* 1 = waiting for character to transmit */
107 #define REG_SIM_IT_SIM_RX (1 << 4) /* 0 = on read access to REG_SIM_DRX */
108 /* 1 = waiting characters to be read */
110 /* Reg_sim_drx register (R) - FFFE:000A */
111 #define REG_SIM_DRX 0xFFFE000A /* register address */
112 #define REG_SIM_DRX_SIM_DRX 0 /* next data byte in FIFO available for reading */
113 #define REG_SIM_DRX_SIM_DRX_0 1
114 #define REG_SIM_DRX_SIM_DRX_1 (1 << 1)
115 #define REG_SIM_DRX_SIM_DRX_2 (1 << 2)
116 #define REG_SIM_DRX_SIM_DRX_3 (1 << 3)
117 #define REG_SIM_DRX_SIM_DRX_4 (1 << 4)
118 #define REG_SIM_DRX_SIM_DRX_5 (1 << 5)
119 #define REG_SIM_DRX_SIM_DRX_6 (1 << 6)
120 #define REG_SIM_DRX_SIM_DRX_7 (1 << 7)
121 #define REG_SIM_DRX_SIM_DRX_MASK 0xFF
122 #define REG_SIM_DRX_STATRXPAR (1 << 8) /* parity-check for received byte */
124 /* Reg_sim_dtx register (R/W) - FFFE:000C */
125 #define REG_SIM_DTX 0xFFFE000C /* register address */
126 #define REG_SIM_DTX_SIM_DTX_0 /* next data byte to be transmitted */
127 #define REG_SIM_DTX_SIM_DTX_1
128 #define REG_SIM_DTX_SIM_DTX_2
129 #define REG_SIM_DTX_SIM_DTX_3
130 #define REG_SIM_DTX_SIM_DTX_4
131 #define REG_SIM_DTX_SIM_DTX_5
132 #define REG_SIM_DTX_SIM_DTX_6
133 #define REG_SIM_DTX_SIM_DTX_7
135 /* Reg_sim_maskit register (R/W) - FFFE:000E */
136 #define REG_SIM_MASKIT 0xFFFE000E /* register address */
137 #define REG_SIM_MASKIT_MASK_SIM_NATR 1 /* No-answer-to-reset interrupt */
138 #define REG_SIM_MASKIT_MASK_SIM_WT (1 << 1) /* Character wait-time overflow interrupt */
139 #define REG_SIM_MASKIT_MASK_SIM_OV (1 << 2) /* Receive overflow interrupt */
140 #define REG_SIM_MASKIT_MASK_SIM_TX (1 << 3) /* Waiting character to transmit interrupt */
141 #define REG_SIM_MASKIT_MASK_SIM_RX (1 << 4) /* Waiting characters to be read interrupt */
142 #define REG_SIM_MASKIT_MASK_SIM_CD (1 << 5) /* SIM card insertion/extraction interrupt */
144 /* Reg_sim_it_cd register (R) - FFFE:0010 */
145 #define REG_SIM_IT_CD 0xFFFE0010 /* register address */
146 #define REG_SIM_IT_CD_IT_CD 1 /* 0 = on read access to REG_SIM_IT_CD, */
147 /* 1 = SIM card insertion/extraction */
150 #define SIM_DEBUG_OUTPUTDELAY 200 /* Output delay to minimize stress with some uart bugs */
151 #define SIM_DEBUG 0 /* 0=Debug messages are off / 1=Debug messages are on */
152 #define SIM_OPERATION_DELAY 100 /* Time between operations like reset, vcc apply ect... */
155 void calypso_sim_regdump(void); /* Display Register dump */
157 int calypso_sim_powerup(uint8_t *atr); /* Apply power to the simcard (see note 1) */
158 int calypso_sim_reset(uint8_t *atr); /* reset the simcard (see note 1) */
161 void calypso_sim_powerdown(void); /* Powerdown simcard */
163 /* APDU transmission modes */
164 #define SIM_APDU_PUT 0 /* Transmit a data body to the card */
165 #define SIM_APDU_GET 1 /* Fetch data from the card eg. GET RESOPNSE */
167 /* Transceive T0 Apdu to sim acording to GSM 11.11 Page 34 */
168 int calypso_sim_transceive(uint8_t cla, /* Class (in GSM context mostly 0xA0 */
169 uint8_t ins, /* Instruction */
170 uint8_t p1, /* First parameter */
171 uint8_t p2, /* Second parameter */
172 uint8_t p3le, /* Length of the data that should be transceived */
173 uint8_t *data, /* Data payload */
174 uint8_t *status, /* Status word (2 byte array, see note 1) */
175 uint8_t mode); /* Mode of operation: 1=GET, 0=PUT */
177 /* Note 1: You can use a null-pointer (0) if you are not interested in
180 /* Transmission of raw data */
181 int calypso_sim_receive(uint8_t *data, uint8_t len); /* Receive raw data through the sim interface */
182 int calypso_sim_transmit(uint8_t *data, int length); /* Transmit raw data through the sim interface */
184 void calypso_sim_init(void (cb)(void)); /* Initialize simcard interface */
188 1.) After powering down the simcard communication stops working
191 #endif /* _CALYPSO_SIM_H */