4 /* Assert or de-assert TPU reset */
5 void tpu_reset(int active);
6 /* Enable or Disable a new scenario loaded into the TPU */
7 void tpu_enable(int active);
8 /* Enable or Disable the clock of teh TPU Module */
9 void tpu_clk_enable(int active);
10 /* Enable Frame Interrupt generation on next frame. DSP will reset it */
11 void tpu_dsp_frameirq_enable(void);
12 /* Is a Frame interrupt still pending for the DSP ? */
13 int tpu_dsp_fameirq_pending(void);
14 /* Rewind the TPU, i.e. restart enqueueing instructions at the base addr */
15 void tpu_rewind(void);
16 /* Enqueue a raw TPU instruction */
17 void tpu_enqueue(uint16_t instr);
18 /* Initialize TPU and TPU driver */
20 /* (Busy)Wait until TPU is idle */
21 void tpu_wait_idle(void);
22 /* Enable FRAME interrupt generation */
23 void tpu_frame_irq_en(int mcu, int dsp);
24 /* Force the generation of a DSP interrupt */
25 void tpu_force_dsp_frame_irq(void);
27 /* Get the current TPU SYNCHRO register */
28 uint16_t tpu_get_synchro(void);
29 /* Get the current TPU OFFSET register */
30 uint16_t tpu_get_offset(void);
33 TPU_INSTR_AT = (1 << 13),
34 TPU_INSTR_OFFSET = (2 << 13),
35 TPU_INSTR_SYNCHRO = (3 << 13), /* Loading delta synchro value in TPU synchro register */
36 TPU_INSTR_WAIT = (5 << 13), /* Wait a certain period (in GSM qbits) */
37 TPU_INSTR_SLEEP = (0 << 13), /* Stop the sequencer by disabling TPU ENABLE bit in ctrl reg */
39 TPU_INSTR_MOVE = (4 << 13),
42 /* Addresses internal to the TPU, only accessible via MOVE */
44 TPUI_TSP_CTRL1 = 0x00,
45 TPUI_TSP_CTRL2 = 0x01,
50 TPUI_TSP_ACT_L = 0x06,
51 TPUI_TSP_ACT_U = 0x07,
55 TPUI_DSP_INT_PG = 0x10,
56 TPUI_GAUGING_EN = 0x11,
59 enum tpui_ctrl2_bits {
60 TPUI_CTRL2_RD = (1 << 0),
61 TPUI_CTRL2_WR = (1 << 1),
64 static inline uint16_t tpu_mod5000(int16_t time)
73 /* Enqueue a SLEEP operation (stop sequencer by disabling TPU ENABLE bit) */
74 static inline void tpu_enq_sleep(void)
76 tpu_enqueue(TPU_INSTR_SLEEP);
79 /* Enqueue a MOVE operation */
80 static inline void tpu_enq_move(uint8_t addr, uint8_t data)
82 tpu_enqueue(TPU_INSTR_MOVE | (data << 5) | (addr & 0x1f));
85 /* Enqueue an AT operation */
86 static inline void tpu_enq_at(int16_t time)
88 tpu_enqueue(TPU_INSTR_AT | tpu_mod5000(time));
91 /* Enqueue a SYNC operation */
92 static inline void tpu_enq_sync(int16_t time)
94 tpu_enqueue(TPU_INSTR_SYNCHRO | time);
97 /* Enqueue a WAIT operation */
98 static inline void tpu_enq_wait(int16_t time)
100 tpu_enqueue(TPU_INSTR_WAIT | time);
103 /* Enqueue an OFFSET operation */
104 static inline void tpu_enq_offset(int16_t time)
106 tpu_enqueue(TPU_INSTR_OFFSET | time);
109 static inline void tpu_enq_dsp_irq(void)
111 tpu_enq_move(TPUI_DSP_INT_PG, 0x0001);
114 /* add two numbers, modulo 5000, and ensure the result is positive */
115 uint16_t add_mod5000(uint16_t a, uint16_t b);
117 #endif /* _CALYPSO_TPU_H */