1 /* Synchronous part of GSM Layer 1 */
3 /* (C) 2010 by Harald Welte <laforge@gnumonks.org>
4 * (C) 2010 by Dieter Spaar <spaar@mirider.augusta.de>
5 * (C) 2010 by Holger Hans Peter Freyther <zecke@selfish.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
33 #include <byteorder.h>
34 #include <asm/system.h>
36 #include <osmocore/gsm_utils.h>
37 #include <osmocore/msgb.h>
38 #include <calypso/dsp_api.h>
39 #include <calypso/irq.h>
40 #include <calypso/tpu.h>
41 #include <calypso/tsp.h>
42 #include <calypso/dsp.h>
43 #include <calypso/timer.h>
44 #include <comm/sercomm.h>
46 #include <abb/twl3025.h>
48 //#define DEBUG_EVERY_TDMA
50 #include <layer1/sync.h>
51 #include <layer1/afc.h>
52 #include <layer1/agc.h>
53 #include <layer1/apc.h>
54 #include <layer1/tdma_sched.h>
55 #include <layer1/mframe_sched.h>
56 #include <layer1/sched_gsmtime.h>
57 #include <layer1/tpu_window.h>
58 #include <layer1/l23_api.h>
60 #include <l1ctl_proto.h>
64 void l1s_time_inc(struct gsm_time *time, uint32_t delta_fn)
66 ADD_MODULO(time->fn, delta_fn, GSM_MAX_FN);
69 ADD_MODULO(time->t2, 1, 26);
70 ADD_MODULO(time->t3, 1, 51);
72 /* if the new frame number is a multiple of 51 */
74 ADD_MODULO(time->tc, 1, 8);
76 /* if new FN is multiple of 51 and 26 */
78 ADD_MODULO(time->t1, 1, 2048);
81 gsm_fn2gsmtime(time, time->fn);
84 void l1s_time_dump(const struct gsm_time *time)
86 printf("fn=%lu(%u/%2u/%2u)", time->fn, time->t1, time->t2, time->t3);
89 /* clip a signed 16bit value at a certain limit */
90 int16_t clip_int16(int16_t angle, int16_t clip_at)
94 else if (angle < -clip_at)
100 int16_t l1s_snr_int(uint16_t snr)
105 uint16_t l1s_snr_fract(uint16_t snr)
107 uint32_t fract = snr & 0x3ff;
108 fract = fract * 1000 / (2 << 10);
110 return fract & 0xffff;
113 #define AFC_MAX_ANGLE 328 /* 0.01 radian in fx1.15 */
115 /* synchronize the L1S to a new timebase (typically a new cell */
116 void synchronize_tdma(struct l1_cell_info *cinfo)
119 uint32_t tpu_shift = cinfo->time_alignment;
121 /* NB detection only works if the TOA of the SB
122 * is within 0...8. We have to add 75 to get an SB TOA of 4. */
125 tpu_shift = (l1s.tpu_offset + tpu_shift) % QBITS_PER_TDMA;
127 fn_offset = cinfo->fn_offset - 1;
129 /* if we're already very close to the end of the TPU frame, the
130 * next interrupt will basically occur now and we need to
132 if (tpu_shift < SWITCH_TIME)
135 #if 0 /* probably wrong as we already added "offset" and "shift" above */
136 /* increment the TPU quarter-bit offset */
137 l1s.tpu_offset = (l1s.tpu_offset + tpu_shift) % TPU_RANGE;
139 l1s.tpu_offset = tpu_shift;
142 puts("Synchronize_TDMA\n");
143 /* request the TPU to adjust the SYNCHRO and OFFSET registers */
144 tpu_enq_at(SWITCH_TIME);
145 tpu_enq_sync(l1s.tpu_offset);
147 /* FIXME: properly end the TPU window at the emd of l1_sync() */
151 /* Change the current time to reflect the new value */
152 l1s_time_inc(&l1s.current_time, fn_offset);
153 l1s.next_time = l1s.current_time;
154 l1s_time_inc(&l1s.next_time, 1);
156 /* The serving cell now no longer has a frame or bit offset */
157 cinfo->fn_offset = 0;
158 cinfo->time_alignment = 0;
161 void l1s_reset_hw(void)
165 dsp_api.r_page_used = 0;
166 dsp_api.db_w = (T_DB_MCU_TO_DSP *) BASE_API_W_PAGE_0;
167 dsp_api.db_r = (T_DB_DSP_TO_MCU *) BASE_API_R_PAGE_0;
168 dsp_api.ndb->d_dsp_page = 0;
170 /* we have to really reset the TPU, otherwise FB detection
171 * somtimes returns wrong TOA values. */
175 tpu_enq_wait(5); /* really needed ? */
176 tpu_enq_sync(l1s.tpu_offset);
180 /* Lost TDMA interrupt detection. This works by starting a hardware timer
181 * that is clocked by the same master clock source (VCTCXO). We expect
182 * 1875 timer ticks in the duration of a TDMA frame (5000 qbits / 1250 bits) */
184 /* Timer for detecting lost IRQ */
185 #define TIMER_TICKS_PER_TDMA 1875
186 #define TIMER_TICK_JITTER 1
188 static int last_timestamp;
190 static inline void check_lost_frame(void)
192 int diff, timestamp = hwtimer_read(1);
194 if (last_timestamp < timestamp)
195 last_timestamp += (4*TIMER_TICKS_PER_TDMA);
197 diff = last_timestamp - timestamp;
199 /* allow for a bit of jitter */
200 if (diff < TIMER_TICKS_PER_TDMA - TIMER_TICK_JITTER ||
201 diff > TIMER_TICKS_PER_TDMA + TIMER_TICK_JITTER)
202 printf("LOST %d!\n", diff);
204 last_timestamp = timestamp;
207 /* schedule a completion */
208 void l1s_compl_sched(enum l1_compl c)
212 local_firq_save(flags);
213 l1s.scheduled_compl |= (1 << c);
214 local_irq_restore(flags);
217 /* main routine for synchronous part of layer 1, called by frame interrupt
218 * generated by TPU once every TDMA frame */
219 static void l1_sync(void)
221 uint16_t sched_flags;
228 l1s.current_time = l1s.next_time;
229 l1s_time_inc(&l1s.next_time, 1);
230 //l1s_time_dump(&l1s.current_time); putchar(' ');
233 dsp_api.r_page_used = 0;
235 /* Update pointers */
236 if (dsp_api.w_page == 0)
237 dsp_api.db_w = (T_DB_MCU_TO_DSP *) BASE_API_W_PAGE_0;
239 dsp_api.db_w = (T_DB_MCU_TO_DSP *) BASE_API_W_PAGE_1;
241 if (dsp_api.r_page == 0)
242 dsp_api.db_r = (T_DB_DSP_TO_MCU *) BASE_API_R_PAGE_0;
244 dsp_api.db_r = (T_DB_DSP_TO_MCU *) BASE_API_R_PAGE_1;
246 /* Reset MCU->DSP page */
247 dsp_api_memset((uint16_t *) dsp_api.db_w, sizeof(*dsp_api.db_w));
252 if (dsp_api.ndb->d_error_status) {
253 printf("DSP Error Status: %u\n", dsp_api.ndb->d_error_status);
254 dsp_api.ndb->d_error_status = 0;
257 /* execute the sched_items that have been scheduled for this
258 * TDMA frame (including setup/cleanup steps) */
259 sched_flags = tdma_sched_flag_scan();
261 if (sched_flags & TDMA_IFLG_TPU)
264 tdma_sched_execute();
266 if (dsp_api.r_page_used) {
267 /* clear and switch the read page */
268 dsp_api_memset((uint16_t *) dsp_api.db_r,
269 sizeof(*dsp_api.db_r));
271 /* TSM30 does it (really needed ?):
272 * Set crc result as "SB not found". */
273 dsp_api.db_r->a_sch[0] = (1<<B_SCH_CRC); /* B_SCH_CRC =1, BLUD =0 */
278 if (sched_flags & TDMA_IFLG_DSP)
281 if (sched_flags & TDMA_IFLG_TPU)
284 /* schedule new / upcoming TDMA items */
286 /* schedule new / upcoming one-shot events */
287 sched_gsmtime_execute(l1s.current_time.fn);
289 tdma_sched_advance();
292 /* ABORT command ********************************************************/
294 static int l1s_abort_cmd(__unused uint8_t p1, __unused uint8_t p2,
295 __unused uint16_t p3)
299 /* similar to l1s_reset_hw() without touching the TPU */
303 dsp_api.r_page_used = 0;
304 dsp_api.db_w = (T_DB_MCU_TO_DSP *) BASE_API_W_PAGE_0;
305 dsp_api.db_r = (T_DB_DSP_TO_MCU *) BASE_API_R_PAGE_0;
307 /* Reset task commands. */
308 dsp_api.db_w->d_task_d = NO_DSP_TASK; /* Init. RX task to NO TASK */
309 dsp_api.db_w->d_task_u = NO_DSP_TASK; /* Init. TX task to NO TASK */
310 dsp_api.db_w->d_task_ra = NO_DSP_TASK; /* Init. RA task to NO TASK */
311 dsp_api.db_w->d_task_md = NO_DSP_TASK; /* Init. MONITORING task to NO TASK */
312 dsp_api.ndb->d_dsp_page = 0;
314 /* Set "b_abort" to TRUE, dsp will reset current and pending tasks */
315 dsp_api.db_w->d_ctrl_system |= (1 << B_TASK_ABORT);
319 void l1s_dsp_abort(void)
321 /* abort right now */
322 tdma_schedule(0, &l1s_abort_cmd, 0, 0, 0, 10);
325 void l1s_tx_apc_helper(uint16_t arfcn)
331 /* Get DAC setting */
332 band = gsm_arfcn2band(arfcn);
333 auxapc = apc_tx_pwrlvl2auxapc(band, l1s.tx_power);
335 /* Load the ApcOffset into the DSP */
337 dsp_api.ndb->d_apcoff = ABB_VAL(APCOFF, (1 << 6) | MY_OFFSET) | 1; /* 2x slope for the GTA-02 ramp */
339 /* Load the TX Power into the DSP */
341 If the power is too low (below 0 dBm) the ramp is not OK,
342 especially for GSM-1800. However an MS does not send below
345 dsp_api.db_w->d_power_ctl = ABB_VAL(AUXAPC, auxapc);
347 /* Update the ramp according to the PCL */
348 for (i = 0; i < 16; i++)
349 dsp_api.ndb->a_ramp[i] = ABB_VAL(APCRAM, twl3025_default_ramp[i]);
351 /* The Ramp Table is sent to ABB only once after RF init routine called */
352 dsp_api.db_w->d_ctrl_abb |= (1 << B_RAMP) | (1 << B_BULRAMPDEL);
355 /* Interrupt handler */
356 static void frame_irq(__unused enum irq_nr nr)
361 /* reset the layer1 as part of synchronizing to a new cell */
366 l1s.tx_power = 7; /* initial power reset */
368 /* reset scheduler and hardware */
369 sched_gsmtime_reset();
375 dsp_load_ciph_param(0, NULL);
382 for (i = 0; i < ARRAY_SIZE(l1s.tx_queue); i++)
383 INIT_LLIST_HEAD(&l1s.tx_queue[i]);
386 sched_gsmtime_init();
388 /* register FRAME interrupt as FIQ so it can interrupt normal IRQs */
389 irq_register_handler(IRQ_TPU_FRAME, &frame_irq);
390 irq_config(IRQ_TPU_FRAME, 1, 1, 0);
391 irq_enable(IRQ_TPU_FRAME);
393 /* configure timer 1 to be auto-reload and have a prescale of 12 (13MHz/12 == qbit clock) */
394 hwtimer_enable(1, 1);
395 hwtimer_load(1, (1875*4)-1);
396 hwtimer_config(1, 0, 1);
397 hwtimer_enable(1, 1);