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(parent: 6dc37c4) | patch
uart, ioports, etc. Many more changes
authorMichel Pollet <buserror@gmail.com>
Tue, 1 Dec 2009 21:47:48 +0000 (21:47 +0000)
committerMichel Pollet <buserror@gmail.com>
Tue, 1 Dec 2009 21:47:48 +0000 (21:47 +0000)
commit0b698ce0c4148375fba91ab0295e5624067f3cac
treebf62c89d9b724891da765f27caca03dbfcb4bc94tree | snapshot
parent6dc37c42aa8c60ee6e41f20718c858e1374dd2c6commit | diff
uart, ioports, etc. Many more changes

+ Reorganized source, split simavr.c
+ IRQ support added to IO modules
+ timer8: fixed a bug related to disabling clock
+ uart:
  - Added support for txen/rxen flags
  - Added a receive fifo, and the rx interupt
  - added a "atmega88_uart_echo" test case
+ simavr: hook rx & tx irqs on first uart, for tests

Signed-off-by: Michel Pollet <buserror@gmail.com>
23 files changed:
.simavr.jcc diff | blob | history
simavr/cores/sim_mega644.c diff | blob | history
simavr/cores/sim_megax8.h diff | blob | history
simavr/sim/avr_eeprom.c diff | blob | history
simavr/sim/avr_ioport.c diff | blob | history
simavr/sim/avr_ioport.h diff | blob | history
simavr/sim/avr_spi.h diff | blob | history
simavr/sim/avr_timer8.c diff | blob | history
simavr/sim/avr_uart.c diff | blob | history
simavr/sim/avr_uart.h diff | blob | history
simavr/sim/fifo_declare.h [new file with mode: 0644] blob
simavr/sim/sim_core.h diff | blob | history
simavr/sim/sim_interrupts.c [new file with mode: 0644] blob
simavr/sim/sim_interrupts.h [new file with mode: 0644] blob
simavr/sim/sim_io.c [new file with mode: 0644] blob
simavr/sim/sim_io.h [new file with mode: 0644] blob
simavr/sim/sim_irq.c [new file with mode: 0644] blob
simavr/sim/sim_irq.h [new file with mode: 0644] blob
simavr/sim/sim_regbit.h [new file with mode: 0644] blob
simavr/sim/simavr.c diff | blob | history
simavr/sim/simavr.h diff | blob | history
tests/atmega48_disabled_timer.c [new file with mode: 0644] blob
tests/atmega88_uart_echo.c [new file with mode: 0644] blob
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