2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates, the maximimum clock rates are defined on
24 page 4 of the spec. They vary, but are roughly 30MHz. Raising
25 this clock rate might allow for clock glitching, but the GoodFET
26 isn't sufficient fast for that. Perhaps a 200MHz ARM or an FPGA in
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 #define CCDELAY(x) delay(x)
42 #define SETMOSI P5OUT|=MOSI
43 #define CLRMOSI P5OUT&=~MOSI
44 #define SETCLK P5OUT|=SCK
45 #define CLRCLK P5OUT&=~SCK
46 #define READMISO (P5IN&MISO?1:0)
48 #define CCWRITE P5DIR|=MOSI
49 #define CCREAD P5DIR&=~MISO
51 //! Set up the pins for CC mode. Does not init debugger.
55 //P5DIR&=~MISO; //MOSI is MISO
58 //! Initialize the debugger
60 //Two positive debug clock pulses while !RST is low.
61 //Take RST low, pulse twice, then high.
79 //! Read and write a CC bit.
80 unsigned char cctrans8(unsigned char byte){
82 //This function came from the SPI Wikipedia article.
85 for (bit = 0; bit < 8; bit++) {
86 /* write MOSI on trailing edge of previous clock */
93 /* half a clock cycle before leading/rising edge */
97 /* half a clock cycle before trailing/falling edge */
100 /* read MISO on trailing edge */
108 //! Send a command from txbytes.
109 void cccmd(unsigned char len){
113 cctrans8(cmddata[i]);
116 //! Fetch a reply, usually 1 byte.
117 void ccread(unsigned char len){
121 cmddata[i]=cctrans8(0);
124 //! Handles a monitor command.
125 void cchandle(unsigned char app,
128 //Always init. Might help with buggy lines.
134 //CC_PEEK and CC_POKE will come later.
136 cmddata[0]=cc_peekirambyte(cmddata[0]);
140 cmddata[0]=cc_pokeirambyte(cmddata[0],cmddata[1]);
143 case READ: //Write a command and return 1-byte reply.
150 case WRITE: //Write a command with no reply.
154 case START://enter debugger
159 case STOP://exit debugger
160 //Take RST low, then high.
177 cc_wr_config(cmddata[0]);
190 //no break, return status
195 case CC_SET_HW_BRKPNT:
196 cc_set_hw_brkpnt(cmddataword[0]);
215 case CC_STEP_REPLACE:
216 txdata(app,NOK,0);//TODO add me
219 cmddataword[0]=cc_get_chip_id();
225 case CC_READ_CODE_MEMORY:
226 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
229 case CC_READ_XDATA_MEMORY:
230 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
233 case CC_WRITE_XDATA_MEMORY:
234 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
238 cc_set_pc(cmddatalong[0]);
241 case CC_WRITE_FLASH_PAGE:
242 cc_write_flash_page(cmddatalong[0]);
245 case CC_WIPEFLASHBUFFER:
246 for(i=0xf000;i<0xf800;i++)
247 cc_pokedatabyte(i,0xFF);
250 case CC_MASS_ERASE_FLASH:
252 case CC_PROGRAM_FLASH:
253 debugstr("This Chipcon command is not yet implemented.");
254 txdata(app,NOK,0);//TODO implement me.
259 //! Set the Chipcon's Program Counter
260 void cc_set_pc(u32 adr){
261 cmddata[0]=0x02; //SetPC
262 cmddata[1]=((adr>>8)&0xff); //HIBYTE
263 cmddata[2]=adr&0xff; //LOBYTE
268 //! Erase all of a Chipcon's memory.
269 void cc_chip_erase(){
270 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
274 //! Write the configuration byte.
275 void cc_wr_config(unsigned char config){
276 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
286 debugstr("Locking chip.");
287 cc_wr_config(1);//Select Info Flash
288 if(!(cc_rd_config()&1))
289 debugstr("Config forgotten!");
293 cc_pokedatabyte(0xf000+i,0);
294 cc_write_flash_page(0);
295 if(cc_peekcodebyte(0))
296 debugstr("Failed to clear info flash byte.");
300 debugstr("Stuck in info flash mode!");
303 //! Read the configuration byte.
304 unsigned char cc_rd_config(){
305 cmddata[0]=CCCMD_RD_CONFIG; //0x24
312 //! Read the status register
313 unsigned char cc_read_status(){
314 cmddata[0]=CCCMD_READ_STATUS; //0x3f
320 //! Read the CHIP ID bytes.
321 unsigned short cc_get_chip_id(){
322 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
327 //Find the flash word size.
332 flash_word_size=0x02;
333 //debugstr("2 bytes/flash word");
336 debugstr("Warning: Guessing flash word size.");
339 //debugstr("4 bytes/flash word");
340 flash_word_size=0x04;
345 return cmddataword[0];
348 //! Populates flash buffer in xdata.
349 void cc_write_flash_buffer(u8 *data, u16 len){
350 cc_write_xdata(0xf000, data, len);
352 //! Populates flash buffer in xdata.
353 void cc_write_xdata(u16 adr, u8 *data, u16 len){
355 for(i=0; i<len; i++){
356 cc_pokedatabyte(adr+i,
362 //32-bit words, 2KB pages
363 //0x20 0x00 for CC2430, CC1110
364 #define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
365 #define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
367 /** Ugh, this varies by chip.
371 //#define FLASHPAGE_SIZE 0x400
372 #define MAXFLASHPAGE_SIZE 0x800
373 #define MINFLASHPAGE_SIZE 0x400
376 //32 bit words on CC2430
377 //16 bit words on CC1110
378 //#define FLASH_WORD_SIZE 0x2
379 u8 flash_word_size = 0; //0x02;
382 /* Flash Write Timing
389 32 | 0x2A (Modula.si)
393 const u8 flash_routine[] = {
397 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
399 //0x75, 0xAB, 0x23, //Set FWT per clock
400 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
402 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
403 // ; Wait for flash erase to complete
404 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
405 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
407 /* End erase page. */
408 // ; Initialize the data pointer
409 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
411 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
412 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
413 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
416 0x7D, 0xde /*FLASH_WORD_SIZE*/, // writeLoop: MOV R5, #imm;
417 0xE0, // writeWordLoop: MOVX A, @DPTR;
419 0xF5, 0xAF, // MOV FWDATA, A;
420 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
421 // ; Wait for completion
422 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
423 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
424 0xDE, 0xF1, // DJNZ R6, writeLoop;
425 0xDF, 0xEF, // DJNZ R7, writeLoop;
426 // ; Done, fake a breakpoint
431 //! Copies flash buffer to flash.
432 void cc_write_flash_page(u32 adr){
433 //Assumes that page has already been written to XDATA 0xF000
434 //debugstr("Flashing 2kb at 0xF000 to given adr.");
436 if(adr&(MINFLASHPAGE_SIZE-1)){
437 debugstr("Flash page address is not on a page boundary. Aborting.");
441 if(flash_word_size==0){
442 debugstr("Flash word size is wrong.");
447 //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
448 cc_write_xdata(0xF000+MAXFLASHPAGE_SIZE,
449 (u8*) flash_routine, sizeof(flash_routine));
450 //Patch routine's third byte with
451 //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
452 cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+2,
453 ((adr>>8)/flash_word_size)&0x7E);
454 //Patch routine to define FLASH_WORD_SIZE
455 if(flash_routine[25]!=0xde)
456 debugstr("Ugly patching code failing in chipcon.c");
457 cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+25,
460 //debugstr("Wrote flash routine.");
463 //MOV MEMCTR, (bank * 16) + 1;
468 debugstr("Loaded bank info.");
470 cc_set_pc(0xf000+MAXFLASHPAGE_SIZE);//execute code fragment
473 debugstr("Executing.");
476 while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
477 P1OUT^=1;//blink LED while flashing
481 debugstr("Done flashing.");
483 P1OUT&=~1;//clear LED
487 unsigned short cc_get_pc(){
488 cmddata[0]=CCCMD_GET_PC; //0x28
493 return cmddataword[0];
496 //! Set a hardware breakpoint.
497 void cc_set_hw_brkpnt(unsigned short adr){
498 debugstr("FIXME: This certainly won't work.");
508 cmddata[0]=CCCMD_HALT; //0x44
515 cmddata[0]=CCCMD_RESUME; //0x4C
522 //! Step an instruction
523 void cc_step_instr(){
524 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
530 //! Debug an instruction.
531 void cc_debug_instr(unsigned char len){
532 //Bottom two bits of command indicate length.
533 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
535 cctrans8(cmd); //Second command code
536 cccmd(len&0x3); //Command itself.
541 //! Debug an instruction, for local use.
542 unsigned char cc_debug(unsigned char len,
546 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
556 return cctrans8(0x00);
559 //! Fetch a byte of code memory.
560 unsigned char cc_peekcodebyte(unsigned long adr){
561 /** See page 9 of SWRA124 */
562 unsigned char bank=adr>>15,
568 //MOV MEMCTR, (bank*16)+1
569 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
571 cc_debug(3, 0x90, hb, lb);
575 cc_debug(2, 0xE4, 0, 0);
577 toret=cc_debug(3, 0x93, 0, 0);
579 //cc_debug(1, 0xA3, 0, 0);
585 //! Set a byte of data memory.
586 unsigned char cc_pokedatabyte(unsigned int adr,
593 cc_debug(3, 0x90, hb, lb);
595 cc_debug(2, 0x74, val, 0);
597 cc_debug(1, 0xF0, 0, 0);
601 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
602 for (n = 0; n < count; n++) {
603 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
604 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
605 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
610 //! Fetch a byte of data memory.
611 unsigned char cc_peekdatabyte(unsigned int adr){
617 cc_debug(3, 0x90, hb, lb);
619 //Must be 2, perhaps for clocking?
620 return cc_debug(3, 0xE0, 0, 0);
624 //! Fetch a byte of IRAM.
625 u8 cc_peekirambyte(u8 adr){
627 cc_debug(2, 0xE4, 0, 0);
629 return cc_debug(3, 0xE5, adr, 0);
632 //! Write a byte of IRAM.
633 u8 cc_pokeirambyte(u8 adr, u8 val){
635 cc_debug(2, 0xE4, 0, 0);
637 return cc_debug(3, 0x75, adr, val);
638 //return cc_debug(3, 0x75, val, adr);