1 //GoodFET ChipCon Debugging Application
2 //Handles basic I/O for the Chipcon 8051 debugging protocol.
4 //Higher level left to client application.
6 //This is like SPI, except that you read or write, not both.
8 /** N.B. The READ verb performs a write of all (any) supplied data,
9 then reads a single byte reply from the target. The WRITE verb
13 //This is REALLY untested.
24 /** Concerning clock rates,
25 the maximimum clock rates are defined on page 4 of the spec.
26 They vary, but are roughly 30MHz. Raising this clock rate might
27 allow for clock glitching, but the GoodFET isn't sufficient fast for that.
28 Perhaps a 200MHz ARM or an FPGA in the BadassFET?
32 //MISO and MOSI are the same pin, direction changes.
38 //This could be more accurate.
39 //Does it ever need to be?
41 #define CCDELAY(x) delay(x)
43 #define SETMOSI P5OUT|=MOSI
44 #define CLRMOSI P5OUT&=~MOSI
45 #define SETCLK P5OUT|=SCK
46 #define CLRCLK P5OUT&=~SCK
47 #define READMISO (P5IN&MISO?1:0)
49 #define CCWRITE P5DIR|=MOSI
50 #define CCREAD P5DIR&=~MISO
52 //! Set up the pins for CC mode. Does not init debugger.
56 //P5DIR&=~MISO; //MOSI is MISO
59 //! Initialize the debugger
61 //Two positive debug clock pulses while !RST is low.
62 //Take RST low, pulse twice, then high.
80 //! Read and write a CC bit.
81 unsigned char cctrans8(unsigned char byte){
83 //This function came from the SPI Wikipedia article.
86 for (bit = 0; bit < 8; bit++) {
87 /* write MOSI on trailing edge of previous clock */
94 /* half a clock cycle before leading/rising edge */
98 /* half a clock cycle before trailing/falling edge */
101 /* read MISO on trailing edge */
109 //! Send a command from txbytes.
110 void cccmd(unsigned char len){
114 cctrans8(cmddata[i]);
117 //! Fetch a reply, usually 1 byte.
118 void ccread(unsigned char len){
122 cmddata[i]=cctrans8(0);
125 //! Handles a monitor command.
126 void cchandle(unsigned char app,
130 //PEEK and POKE will come later.
131 case READ: //Write a command and return 1-byte reply.
136 case WRITE: //Write a command with no reply.
140 case START://enter debugger
144 case STOP://exit debugger
145 //Take RST low, then high.
162 cc_wr_config(cmddata[0]);
177 case CC_SET_HW_BRKPNT:
178 cc_set_hw_brkpnt(cmddataword[0]);
190 txdata(app,NOK,0);//TODO add me
196 case CC_STEP_REPLACE:
197 txdata(app,NOK,0);//TODO add me
206 case CC_READ_CODE_MEMORY:
207 case CC_READ_XDATA_MEMORY:
208 case CC_WRITE_XDATA_MEMORY:
211 case CC_WRITE_FLASH_PAGE:
212 case CC_MASS_ERASE_FLASH:
213 case CC_PROGRAM_FLASH:
214 txdata(app,NOK,0);//TODO implement me.
219 //! Erase all of a Chipcon's memory.
220 void cc_chip_erase(){
225 //! Write the configuration byte.
226 void cc_wr_config(unsigned char config){
232 //! Read the configuration byte.
233 unsigned char cc_rd_config(){
242 //! Read the status register
243 unsigned char cc_read_status(){
250 //! Read the CHIP ID bytes.
251 unsigned short cc_get_chip_id(){
252 unsigned short toret;
259 toret=(toret<<8)+cmddata[1];
265 unsigned short cc_get_pc(){
271 return cmddataword[0];
275 //! Set a hardware breakpoint.
276 void cc_set_hw_brkpnt(unsigned short adr){
300 //! Step an instruction
301 void cc_step_instr(){