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Bit of rearranging of Chipcon support.
[goodfet]
/
firmware
/
apps
/
glitch
/
glitch.c
diff --git
a/firmware/apps/glitch/glitch.c
b/firmware/apps/glitch/glitch.c
index
df7dc86
..
f337e42
100644
(file)
--- a/
firmware/apps/glitch/glitch.c
+++ b/
firmware/apps/glitch/glitch.c
@@
-27,30
+27,31
@@
void glitchprime(){
void glitchsetup(){
#ifdef DAC12IR
//Set GSEL high to disable glitching.
void glitchsetup(){
#ifdef DAC12IR
//Set GSEL high to disable glitching.
-
- P5DIR|=0x80;
- P6DIR|=BIT6+BIT5;
- P5OUT|=0x80;
+ //Normal voltage, use resistors instead of output.
+ P5DIR=0x80; //ONLY glitch pin is output.
+ P5OUT|=0x80; //It MUST begin high.
+ P5REN|=0xFF; //Resistors pull high and low weakly.
+
+ P6DIR|=BIT6+BIT5;
P6OUT|=BIT6+BIT5;
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
TACTL = TASSEL1 + TACLR; // SMCLK, clear TAR
CCTL0 = CCIE; // CCR0 interrupt enabled
P6OUT|=BIT6+BIT5;
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
TACTL = TASSEL1 + TACLR; // SMCLK, clear TAR
CCTL0 = CCIE; // CCR0 interrupt enabled
- CCR0 = glitchcount+0x
30
; //clock divider
+ CCR0 = glitchcount+0x
15
; //clock divider
TACTL |= MC_3;
_EINT(); // Enable interrupts
#endif
}
// Timer A0 interrupt service routine
TACTL |= MC_3;
_EINT(); // Enable interrupts
#endif
}
// Timer A0 interrupt service routine
-interrupt(TIMERA0_VECTOR) Timer_A (void)
-{
- P1OUT^=1;
+interrupt(TIMERA0_VECTOR) Timer_A (void){
P5OUT&=~BIT7;//Glitch
P5OUT&=~BIT7;//Glitch
+ //P5DIR=BIT7; //All else high impedance.
P5OUT|=BIT7;//Normal
TACTL |= MC0;// Stop Timer_A;
P5OUT|=BIT7;//Normal
TACTL |= MC0;// Stop Timer_A;
- P1OUT&=~1;
+
return;
}
return;
}
@@
-70,6
+71,12
@@
void glitchvoltages(u16 gnd, u16 vcc){
//debughex(gnd);
//debughex(vcc);
//debughex(gnd);
//debughex(vcc);
+ /** N.B., because this is confusing as hell. As per Page 86 of
+ SLAS541F, P6SEL is not what controls the use of the DAC0/DAC1
+ functions on P6.6 and P6.5. Instead, CAPD or DAC12AMP>0 sets
+ the state.
+ */
+
#ifdef DAC12IR
ADC12CTL0 = REF2_5V + REFON; // Internal 2.5V ref on
// Delay here for reference to settle.
#ifdef DAC12IR
ADC12CTL0 = REF2_5V + REFON; // Internal 2.5V ref on
// Delay here for reference to settle.